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Chisel-Learn

目的:帮助快速入门chisel语言,熟悉 FPGA 相关知识,敏捷开发 RISCV-CPU 。

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项目目录

  • demo01:Hello World
  • demo02:Counter
  • demo03:BCD De/Encoder
  • demo04:Absract Ticker & Test
  • demo05:BubbleFIFO
  • demo06:BufferFIFO
  • demo07:OtherFIFOs
  • demo08:Simple RiscV32 CPU Design
  • demo09:LED Show: 4 to 7
  • demo10:Complex RiscV64 CPU Design
  • demo11:Rocketchip SoC Generator
  • demo12:Overlay your design on Pynq
  • demo13:Overlay your design on Fpga

配置环境

Setup Scala:

curl -fL "https://github.com/coursier/launchers/raw/master/cs-x86_64-pc-linux.gz" | gzip -d > cs
sudo chmod +x cs
./cs setup

Start a Chisel original example:

git clone https://github.com/schoeberl/chisel-examples.git

cd chisel-examples
cd hello-world
sbt run

Start with this repo:

git clone https://github.com/lancerstadium/chisel-learn.git

cd chisel-learn/demo01
sbt run

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Chisel学习 Riscv-CPU设计

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