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@luodeb luodeb commented Dec 6, 2025

This module implements page table entries for ARMv7-A architecture using
the Short-descriptor format, which supports 2-level page tables:

  • L1 (Translation Table): 4096 entries, each mapping 1MB or pointing to L2
  • L2 (Page Table): 256 entries, each mapping 4KB (Small Page)

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@equation314 equation314 left a comment

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Currently, PagingHandler::alloc_frame is designed to support pages of only 4KB in size, but the L1 page table in ARMv7-A is 16KB.

It may require updating the page frame allocation interface, such as #16.

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