|
| 1 | +/* |
| 2 | +********************************************************************************************************* |
| 3 | +* uC/OS-II |
| 4 | +* The Real-Time Kernel |
| 5 | +* |
| 6 | +* Copyright 1992-2020 Silicon Laboratories Inc. www.silabs.com |
| 7 | +* |
| 8 | +* SPDX-License-Identifier: APACHE-2.0 |
| 9 | +* |
| 10 | +* This software is subject to an open source license and is distributed by |
| 11 | +* Silicon Laboratories Inc. pursuant to the terms of the Apache License, |
| 12 | +* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. |
| 13 | +* |
| 14 | +********************************************************************************************************* |
| 15 | +*/ |
| 16 | + |
| 17 | +/* |
| 18 | +********************************************************************************************************* |
| 19 | +* |
| 20 | +* Altera NiosII Port |
| 21 | +* |
| 22 | +* Filename : os_cpu.h |
| 23 | +* Version : V2.93.00 |
| 24 | +********************************************************************************************************* |
| 25 | +* For : Altera NiosII |
| 26 | +* Toolchain : GNU - Altera NiosII |
| 27 | +********************************************************************************************************* |
| 28 | +*/ |
| 29 | + |
| 30 | +/****************************************************************************** |
| 31 | +* * |
| 32 | +* License Agreement * |
| 33 | +* * |
| 34 | +* Copyright (c) 2003-5 Altera Corporation, San Jose, California, USA. * |
| 35 | +* All rights reserved. * |
| 36 | +* * |
| 37 | +* Permission is hereby granted, free of charge, to any person obtaining a * |
| 38 | +* copy of this software and associated documentation files (the "Software"), * |
| 39 | +* to deal in the Software without restriction, including without limitation * |
| 40 | +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * |
| 41 | +* and/or sell copies of the Software, and to permit persons to whom the * |
| 42 | +* Software is furnished to do so, subject to the following conditions: * |
| 43 | +* * |
| 44 | +* The above copyright notice and this permission notice shall be included in * |
| 45 | +* all copies or substantial portions of the Software. * |
| 46 | +* * |
| 47 | +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * |
| 48 | +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * |
| 49 | +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * |
| 50 | +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * |
| 51 | +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * |
| 52 | +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * |
| 53 | +* DEALINGS IN THE SOFTWARE. * |
| 54 | +* * |
| 55 | +* This agreement shall be governed in all respects by the laws of the State * |
| 56 | +* of California and by the laws of the United States of America. * |
| 57 | +* * |
| 58 | +* Altera does not recommend, suggest or require that this reference design * |
| 59 | +* file be used in conjunction or combination with any other product. * |
| 60 | +******************************************************************************/ |
| 61 | + |
| 62 | +#ifndef __OS_CPU_H__ |
| 63 | +#define __OS_CPU_H__ |
| 64 | + |
| 65 | +#ifdef __cplusplus |
| 66 | +extern "C" |
| 67 | +{ |
| 68 | +#endif /* __cplusplus */ |
| 69 | + |
| 70 | +#include "sys/alt_irq.h" |
| 71 | + |
| 72 | +#ifdef OS_CPU_GLOBALS |
| 73 | +#define OS_CPU_EXT |
| 74 | +#else |
| 75 | +#define OS_CPU_EXT extern |
| 76 | +#endif |
| 77 | + |
| 78 | + |
| 79 | +/* |
| 80 | +********************************************************************************************************* |
| 81 | +* DATA TYPES |
| 82 | +* (Compiler Specific) |
| 83 | +********************************************************************************************************* |
| 84 | +*/ |
| 85 | + |
| 86 | + /* This is the definition for Nios32. */ |
| 87 | +typedef unsigned char BOOLEAN; |
| 88 | +typedef unsigned char INT8U; /* Unsigned 8 bit quantity */ |
| 89 | +typedef signed char INT8S; /* Signed 8 bit quantity */ |
| 90 | +typedef unsigned short INT16U; /* Unsigned 16 bit quantity */ |
| 91 | +typedef signed short INT16S; /* Signed 16 bit quantity */ |
| 92 | +typedef unsigned long INT32U; /* Unsigned 32 bit quantity */ |
| 93 | +typedef signed long INT32S; /* Signed 32 bit quantity */ |
| 94 | +typedef float FP32; /* Single precision floating point */ |
| 95 | +typedef double FP64; /* Double precision floating point */ |
| 96 | +typedef unsigned int OS_STK; /* Each stack entry is 32-bits */ |
| 97 | + |
| 98 | +/* |
| 99 | +********************************************************************************************************* |
| 100 | +* MACROS |
| 101 | +********************************************************************************************************* |
| 102 | +*/ |
| 103 | + |
| 104 | +#define OS_STK_GROWTH 1 /* Stack grows from HIGH to LOW memory */ |
| 105 | +#define OS_TASK_SW OSCtxSw |
| 106 | + |
| 107 | +/* |
| 108 | +********************************************************************************************************* |
| 109 | +* Disable and Enable Interrupts - 2 methods |
| 110 | +* |
| 111 | +* Method #1: Disable/Enable interrupts using simple instructions. After critical |
| 112 | +* section, interrupts will be enabled even if they were disabled before |
| 113 | +* entering the critical section. |
| 114 | +* |
| 115 | +* Method #2: Disable/Enable interrupts by preserving the state of interrupts. In |
| 116 | +* other words, if interrupts were disabled before entering the critical |
| 117 | +* section, they will be disabled when leaving the critical section. |
| 118 | +* |
| 119 | +* Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you |
| 120 | +* would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then |
| 121 | +* disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to |
| 122 | +* disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr' |
| 123 | +* into the CPU's status register. |
| 124 | +* |
| 125 | +********************************************************************************************************* |
| 126 | +*/ |
| 127 | + |
| 128 | +#define OS_CRITICAL_METHOD 3 |
| 129 | + |
| 130 | +#if OS_CRITICAL_METHOD == 1 |
| 131 | +#error OS_CRITICAL_METHOD == 1 not supported, please use method 3 instead. |
| 132 | +#endif |
| 133 | + |
| 134 | +#if OS_CRITICAL_METHOD == 2 |
| 135 | +#error OS_CRITICAL_METHOD == 2 not supported, please use method 3 instead. |
| 136 | +#endif |
| 137 | + |
| 138 | +#if OS_CRITICAL_METHOD == 3 |
| 139 | +#define OS_CPU_SR alt_irq_context |
| 140 | +#define OS_ENTER_CRITICAL() \ |
| 141 | + cpu_sr = alt_irq_disable_all () |
| 142 | +#define OS_EXIT_CRITICAL() \ |
| 143 | + alt_irq_enable_all (cpu_sr); |
| 144 | +#endif |
| 145 | + |
| 146 | +/* |
| 147 | +********************************************************************************************************* |
| 148 | +* PROTOTYPES |
| 149 | +********************************************************************************************************* |
| 150 | +*/ |
| 151 | + |
| 152 | +void OSStartHighRdy(void); |
| 153 | +void OSCtxSw (void); |
| 154 | +void OSIntCtxSw (void); |
| 155 | + |
| 156 | +#ifdef __cplusplus |
| 157 | +} |
| 158 | +#endif /* __cplusplus */ |
| 159 | + |
| 160 | +#endif /* __OS_CPU_H__ */ |
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