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Internals: reformat py files. No test change.
1 parent 9499b26 commit b3ec32b

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3 files changed

+20
-18
lines changed

3 files changed

+20
-18
lines changed

t/t_cores_veer_el2_cmark.py

Lines changed: 10 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -15,19 +15,16 @@
1515
os.path.abspath(test.t_dir + "/../submodules/Cores-VeeR-EL2"))
1616
test.setenv('VERILATOR', os.environ["VERILATOR_ROOT"] + "/bin/verilator")
1717

18-
19-
test.run(
20-
cmd=[
21-
"make -j4 -C " + test.obj_dir + " -f " + os.environ["RV_ROOT"] +
22-
"/tools/Makefile",
23-
("VERILATOR='" + os.environ["VERILATOR"] +
24-
" --debug-check -Wno-IMPLICITSTATIC --stats --timing " +
25-
' '.join(test.driver_verilator_flags) + "'"),
26-
"CONF_PARAMS=-iccm_enable=1",
27-
"GCC_PREFIX=none TEST=cmark_iccm",
28-
"VERILATOR_MAKE_FLAGS=VM_PARALLEL_BUILDS=1 verilator CFG_CXXFLAGS_WEXTRA=-Wextra"
29-
],
30-
logfile=test.obj_dir + "/sim.log")
18+
test.run(cmd=[
19+
"make -j4 -C " + test.obj_dir + " -f " + os.environ["RV_ROOT"] +
20+
"/tools/Makefile",
21+
("VERILATOR='" + os.environ["VERILATOR"] +
22+
" --debug-check -Wno-IMPLICITSTATIC --stats --timing " +
23+
' '.join(test.driver_verilator_flags) + "'"),
24+
"CONF_PARAMS=-iccm_enable=1", "GCC_PREFIX=none TEST=cmark_iccm",
25+
"VERILATOR_MAKE_FLAGS=VM_PARALLEL_BUILDS=1 verilator CFG_CXXFLAGS_WEXTRA=-Wextra"
26+
],
27+
logfile=test.obj_dir + "/sim.log")
3128

3229
test.file_grep(test.obj_dir + "/sim.log", r'\nTEST_PASSED\n')
3330

t/t_gdb_jtree.py

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,9 @@
2323

2424
purelib = sysconfig.get_paths().get("purelib", "")
2525
platlib = sysconfig.get_paths().get("platlib", "")
26-
pythonpaths = [p for p in (purelib, platlib, test.getenv_def("PYTHONPATH")) if p]
26+
pythonpaths = [
27+
p for p in (purelib, platlib, test.getenv_def("PYTHONPATH")) if p
28+
]
2729
test.setenv("PYTHONPATH", os.pathsep.join(pythonpaths))
2830

2931
test.setenv(

t/t_uvm_parse.py

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -13,9 +13,12 @@
1313

1414
uvm_root = os.path.abspath(test.t_dir + "/../submodules/uvm")
1515

16-
test.lint(
17-
v_flags=["--timing", "-Wall", "--debug-exit-uvm",
18-
#
19-
"+incdir+" + uvm_root + "/src"])
16+
test.lint(v_flags=[
17+
"--timing",
18+
"-Wall",
19+
"--debug-exit-uvm",
20+
#
21+
"+incdir+" + uvm_root + "/src"
22+
])
2023

2124
test.passes()

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