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variant(f4): add STM32F429I-DISC1 support (fixes #2026)
Still need to test SPI & USB Signed-off-by: Aymane Bahssain <aymane.bahssain@st.com>
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‎README.md‎

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@@ -197,6 +197,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32F407VG | [STM32F407G-DISC1](http://www.st.com/en/evaluation-tools/stm32f4discovery.html) | *0.1.0* | |
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| :yellow_heart: | STM32F411VE | [STM32F411E-DISCO](https://www.st.com/en/evaluation-tools/32f411ediscovery.html) | **2.12.0** | |
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| :green_heart: | STM32F413ZH | [32F413HDISCOVERY](https://www.st.com/en/evaluation-tools/32f413hdiscovery.html) | *1.9.0* | |
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| :yellow_heart: | STM32F429I | [STM32F429I-DISC1](https://www.st.com/en/evaluation-tools/32f429idiscovery.html) | **2.12.0** | |
200201
| :green_heart: | STM32F746NG | [STM32F746G-DISCOVERY](http://www.st.com/en/evaluation-tools/32f746gdiscovery.html) | *0.1.0* | |
201202
| :green_heart: | STM32G031J6 | [STM32G0316-DISCO](https://www.st.com/en/evaluation-tools/stm32g0316-disco.html) | *1.9.0* | |
202203
| :green_heart: | STM32G431CB | [B-G431B-ESC1](https://www.st.com/en/evaluation-tools/b-g431b-esc1.html) | *2.0.0* | |

‎boards.txt‎

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@@ -1505,6 +1505,22 @@ Disco.menu.pnum.DISCO_F413ZH.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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Disco.menu.pnum.DISCO_F413ZH.openocd.target=stm32f4x
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Disco.menu.pnum.DISCO_F413ZH.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F413.svd
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# DISCO_F429ZI board
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Disco.menu.pnum.DISCO_F429ZI= STM32F429ZI-DISCO
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Disco.menu.pnum.DISCO_F429ZI.node=DIS_F429ZI
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Disco.menu.pnum.DISCO_F429ZI.upload.maximum_size=2097152
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Disco.menu.pnum.DISCO_F429ZI.upload.maximum_data_size=196608
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Disco.menu.pnum.DISCO_F429ZI.build.mcu=cortex-m4
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Disco.menu.pnum.DISCO_F429ZI.build.fpu=-mfpu=fpv4-sp-d16
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Disco.menu.pnum.DISCO_F429ZI.build.float-abi=-mfloat-abi=hard
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Disco.menu.pnum.DISCO_F429ZI.build.board=DISCO_F429ZI
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Disco.menu.pnum.DISCO_F429ZI.build.series=STM32F4xx
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Disco.menu.pnum.DISCO_F429ZI.build.product_line=STM32F429xx
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Disco.menu.pnum.DISCO_F429ZI.build.variant=STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)
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Disco.menu.pnum.DISCO_F429ZI.build.variant_h=variant_DISCO_F429ZI.h
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Disco.menu.pnum.DISCO_F429ZI.openocd.target=stm32f4x
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Disco.menu.pnum.DISCO_F429ZI.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F429.svd
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# DISCO_F746NG board
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Disco.menu.pnum.DISCO_F746NG=STM32F746G-DISCOVERY
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Disco.menu.pnum.DISCO_F746NG.node=DIS_F746NG

‎cmake/boards_db.cmake‎

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@@ -5704,6 +5704,88 @@ target_compile_options(DISCO_F413ZH_xusb_HSFS INTERFACE
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"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
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)
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# DISCO_F429ZI
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# -----------------------------------------------------------------------------
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set(DISCO_F429ZI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)")
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set(DISCO_F429ZI_MAXSIZE 2097152)
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set(DISCO_F429ZI_MAXDATASIZE 196608)
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set(DISCO_F429ZI_MCU cortex-m4)
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set(DISCO_F429ZI_FPCONF "fpv4-sp-d16-hard")
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add_library(DISCO_F429ZI INTERFACE)
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target_compile_options(DISCO_F429ZI INTERFACE
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"SHELL:-DSTM32F429xx"
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"SHELL:"
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"SHELL:"
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"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
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-mcpu=${DISCO_F429ZI_MCU}
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)
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target_compile_definitions(DISCO_F429ZI INTERFACE
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"STM32F4xx"
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"ARDUINO_DISCO_F429ZI"
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"BOARD_NAME=\"DISCO_F429ZI\""
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"BOARD_ID=DISCO_F429ZI"
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"VARIANT_H=\"variant_DISCO_F429ZI.h\""
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)
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target_include_directories(DISCO_F429ZI INTERFACE
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${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
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${DISCO_F429ZI_VARIANT_PATH}
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)
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target_link_options(DISCO_F429ZI INTERFACE
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"LINKER:--default-script=${DISCO_F429ZI_VARIANT_PATH}/ldscript.ld"
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"LINKER:--defsym=LD_FLASH_OFFSET=0x0"
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"LINKER:--defsym=LD_MAX_SIZE=2097152"
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"LINKER:--defsym=LD_MAX_DATA_SIZE=196608"
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"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
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-mcpu=${DISCO_F429ZI_MCU}
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)
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add_library(DISCO_F429ZI_serial_disabled INTERFACE)
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target_compile_options(DISCO_F429ZI_serial_disabled INTERFACE
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"SHELL:"
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)
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add_library(DISCO_F429ZI_serial_generic INTERFACE)
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target_compile_options(DISCO_F429ZI_serial_generic INTERFACE
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"SHELL:-DHAL_UART_MODULE_ENABLED"
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)
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add_library(DISCO_F429ZI_serial_none INTERFACE)
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target_compile_options(DISCO_F429ZI_serial_none INTERFACE
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"SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
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)
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add_library(DISCO_F429ZI_usb_CDC INTERFACE)
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target_compile_options(DISCO_F429ZI_usb_CDC INTERFACE
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"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
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)
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add_library(DISCO_F429ZI_usb_CDCgen INTERFACE)
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target_compile_options(DISCO_F429ZI_usb_CDCgen INTERFACE
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"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
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)
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add_library(DISCO_F429ZI_usb_HID INTERFACE)
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target_compile_options(DISCO_F429ZI_usb_HID INTERFACE
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"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
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)
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add_library(DISCO_F429ZI_usb_none INTERFACE)
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target_compile_options(DISCO_F429ZI_usb_none INTERFACE
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"SHELL:"
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)
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add_library(DISCO_F429ZI_xusb_FS INTERFACE)
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target_compile_options(DISCO_F429ZI_xusb_FS INTERFACE
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"SHELL:"
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)
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add_library(DISCO_F429ZI_xusb_HS INTERFACE)
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target_compile_options(DISCO_F429ZI_xusb_HS INTERFACE
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"SHELL:-DUSE_USB_HS"
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)
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add_library(DISCO_F429ZI_xusb_HSFS INTERFACE)
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target_compile_options(DISCO_F429ZI_xusb_HSFS INTERFACE
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"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
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)
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# DISCO_F746NG
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# -----------------------------------------------------------------------------
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‎variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)/CMakeLists.txt‎

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@@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
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generic_clock.c
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PeripheralPins.c
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PeripheralPins_NUCLEO_F4x9ZI.c
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variant_DISCO_F429ZI.cpp
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variant_generic.cpp
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variant_NUCLEO_F4x9ZI.cpp
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)

‎variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)/variant_DISCO_F429ZI.cpp‎

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/*
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*******************************************************************************
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* Copyright (c) 2025, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#if defined(ARDUINO_DISCO_F429ZI)
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#include "pins_arduino.h"
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// Digital PinName array
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const PinName digitalPin[] = {
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PF_4, // 0
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PF_2, // 1
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PF_0, // 2
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PC_14, // 3
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PE_6, // 4
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PE_4, // 5
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PE_2, // 6
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PE_0, // 7
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PB_8, // 8
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NC, // 9 - BOOT0
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PB_6, // 10
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PB_4, // 11
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PG_15, // 12
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PG_13, // 13
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PG_11, // 14
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PG_9, // 15
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PD_7, // 16
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PD_5, // 17
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PD_3, // 18
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PD_1, // 19
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PC_12, // 20
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PC_10, // 21
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PA_14, // 22
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PA_12, // 23
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PA_10, // 24
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PA_8, // 25
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PC_8, // 26
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PC_6, // 27
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PG_7, // 28
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PG_5, // 29
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PF_5, // 30
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PF_3, // 31
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PF_1, // 32
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PC_15, // 33
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PC_13, // 34
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PE_5, // 35
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PE_3, // 36
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PE_1, // 37
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PB_9, // 38
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PB_7, // 39
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PB_5, // 40
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PB_3, // 41
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PG_14, // 42
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PG_12, // 43
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PG_10, // 44
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PD_6, // 45
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PD_4, // 46
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PD_2, // 47
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PD_0, // 48
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PC_11, // 49
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PA_15, // 50
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PA_13, // 51
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PA_11, // 52
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PA_9, // 53
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PC_9, // 54
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PC_7, // 55
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PG_8, // 56
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PG_6, // 57
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PG_4, // 58
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PF_6, // 59
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PF_8, // 60
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PF_10, // 61
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PH_1, // 62
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PC_1, // 63
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PC_3, // 64
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PA_1, // 65
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PA_3, // 66
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PA_5, // 67
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PA_7, // 68
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PC_5, // 69
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PB_1, // 70
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PF_12, // 71
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PF_14, // 72
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PG_0, // 73
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PE_7, // 74
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PE_9, // 75
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PE_11, // 76
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PE_13, // 77
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PE_15, // 78
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PB_11, // 79
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PB_13, // 80
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PB_15, // 81 // Not connected SB26 OFF
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PD_9, // 82
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PD_11, // 83
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PD_13, // 84
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PD_15, // 85
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PG_3, // 86
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PF_7, // 87
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PF_9, // 88
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PH_0, // 89
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PC_0, // 90
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PC_2, // 91
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PA_0, // 92
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PA_2, // 93
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PA_4, // 94
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PA_6, // 95
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PC_4, // 96
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PB_0, // 97
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NC, // 98 - BOOT1
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PF_11, // 99
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PF_13, // 100
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PF_15, // 101
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PG_1, // 102
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PE_8, // 103
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PE_10, // 104
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PE_12, // 105
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PE_14, // 106
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PB_10, // 107
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PB_12, // 108
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PB_14, // 109 // Not connected SB27 OFF
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PD_8, // 110
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PD_10, // 111
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PD_12, // 112
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PD_14, // 113
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PG_2 // 114
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};
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// Analog (Ax) pin number array
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const uint32_t analogInputPin[] = {
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0, // A0,
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30, // A1,
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31, // A2,
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59, // A3,
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60, // A4,
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61, // A5,
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63, // A6,
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64, // A7,
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65, // A8,
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66, // A9,
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67, // A10,
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68, // A11,
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69, // A12,
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70, // A13,
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87, // A14,
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88, // A15,
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90, // A16,
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91, // A17,
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92, // A18,
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93, // A19,
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94, // A20,
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95, // A21,
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96, // A22,
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97 // A23,
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};
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// ----------------------------------------------------------------------------
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief None
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* @param None
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* @retval None
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*/
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WEAK void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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/** Configure the main internal regulator output voltage
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*/
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 4;
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RCC_OscInitStruct.PLL.PLLN = 72;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 3;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
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Error_Handler();
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* ARDUINO_DISCO_F429ZI */

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