Update for new pac with write and modify not returning unit type

usbalbin · usbalbin · commit 369754d372ab · 2024-11-07T19:35:32.000+01:00
diff --git a/Cargo.toml b/Cargo.toml
@@ -13,7 +13,8 @@ version = "0.0.2"
 
 [dependencies]
 nb = "0.1.1"
-stm32g4 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies" } #"0.15.1"
+#stm32g4 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies" } #"0.15.1"
+stm32g4 = { version = "0.17.0", package = "stm32g4-staging" }
 paste = "1.0"
 bitflags = "1.2"
 vcell = "0.1"
diff --git a/src/adc.rs b/src/adc.rs
@@ -1947,7 +1947,7 @@ macro_rules! adc {
                         config::Sequence::Fourteen => self.adc_reg.sqr3().modify(|_, w| unsafe {w.sq14().bits(channel) }),
                         config::Sequence::Fifteen  => self.adc_reg.sqr4().modify(|_, w| unsafe {w.sq15().bits(channel) }),
                         config::Sequence::Sixteen  => self.adc_reg.sqr4().modify(|_, w| unsafe {w.sq16().bits(channel) }),
-                    }
+                    };
 
                     //Set the sample time for the channel
                     let st = u8::from(sample_time);
@@ -1973,7 +1973,7 @@ macro_rules! adc {
                             17 => self.adc_reg.smpr2().modify(|_, w| w.smp17().bits(st) ),
                             18 => self.adc_reg.smpr2().modify(|_, w| w.smp18().bits(st) ),
                             _ => unimplemented!(),
-                        }
+                        };
                     }
                 }
                 /// Synchronously convert a single sample
diff --git a/src/comparator.rs b/src/comparator.rs
@@ -162,13 +162,13 @@ macro_rules! positive_input_pin {
     ($COMP:ident, $pin_0:ident, $pin_1:ident) => {
         impl PositiveInput<$COMP> for &$pin_0<Analog> {
             fn setup(&self, comp: &$COMP) {
-                comp.csr().modify(|_, w| w.inpsel().bit(false))
+                comp.csr().modify(|_, w| w.inpsel().bit(false));
             }
         }
 
         impl PositiveInput<$COMP> for &$pin_1<Analog> {
             fn setup(&self, comp: &$COMP) {
-                comp.csr().modify(|_, w| w.inpsel().bit(true))
+                comp.csr().modify(|_, w| w.inpsel().bit(true));
             }
         }
     };
@@ -213,7 +213,7 @@ macro_rules! negative_input_pin_helper {
             }
 
             fn setup(&self, comp: &$COMP) {
-                comp.csr().modify(|_, w| unsafe { w.inmsel().bits($bits) })
+                comp.csr().modify(|_, w| unsafe { w.inmsel().bits($bits) });
             }
         }
     };
@@ -268,7 +268,7 @@ macro_rules! refint_input {
 
             fn setup(&self, comp: &$COMP) {
                 comp.csr()
-                    .modify(|_, w| unsafe { w.inmsel().bits(*self as u8) })
+                    .modify(|_, w| unsafe { w.inmsel().bits(*self as u8) });
             }
         }
     )+};
@@ -294,7 +294,7 @@ macro_rules! dac_input_helper {
             }
 
             fn setup(&self, comp: &$COMP) {
-                comp.csr().modify(|_, w| unsafe { w.inmsel().bits($bits) })
+                comp.csr().modify(|_, w| unsafe { w.inmsel().bits($bits) });
             }
         }
     };
diff --git a/src/exti.rs b/src/exti.rs
@@ -113,7 +113,7 @@ impl ExtiExt for EXTI {
             line => self
                 .imr2()
                 .modify(|r, w| unsafe { w.bits(r.bits() | 1 << (line - 32)) }),
-        }
+        };
     }
 
     fn unlisten(&self, ev: Event) {
@@ -133,7 +133,7 @@ impl ExtiExt for EXTI {
             line => {
                 let mask = !(1 << (line - 32));
                 self.imr2()
-                    .modify(|r, w| unsafe { w.bits(r.bits() & mask) })
+                    .modify(|r, w| unsafe { w.bits(r.bits() & mask) });
             }
         }
     }
diff --git a/src/gpio.rs b/src/gpio.rs
@@ -488,7 +488,7 @@ macro_rules! gpio {
                         unsafe {
                             (*$GPIOX::ptr()).ospeedr().modify(|r, w| {
                                 w.bits((r.bits() & !(0b11 << offset)) | ((speed as u32) << offset))
-                            })
+                            });
                         }
                         self
                     }
diff --git a/src/pwm.rs b/src/pwm.rs
@@ -1259,7 +1259,7 @@ macro_rules! tim_hal {
                             2 => tim.cr1().modify(|_, w| unsafe { w.ckd().bits(1) }),
                             4 => tim.cr1().modify(|_, w| unsafe { w.ckd().bits(2) }),
                             _ => panic!("Should be unreachable, invalid deadtime prescaler"),
-                        }
+                        };
 
                         let bkp = match self.fault_polarity {
                             Polarity::ActiveLow => false,
diff --git a/src/rcc/mod.rs b/src/rcc/mod.rs
@@ -362,7 +362,7 @@ impl Rcc {
         unsafe {
             // Adjust flash wait states
             let flash = &(*FLASH::ptr());
-            flash.acr().modify(|_, w| w.latency().bits(latency))
+            flash.acr().modify(|_, w| w.latency().bits(latency));
         }
     }
 
diff --git a/src/serial/usart.rs b/src/serial/usart.rs
@@ -529,8 +529,8 @@ macro_rules! uart_lp {
                     Event::Rxne => self.tx.usart.cr1().modify(|_, w| w.rxneie().set_bit()),
                     Event::Txe => self.tx.usart.cr1().modify(|_, w| w.txeie().set_bit()),
                     Event::Idle => self.tx.usart.cr1().modify(|_, w| w.idleie().set_bit()),
-                    _ => {}
-                }
+                    _ => unimplemented!(),
+                };
             }
 
             /// Stop listening for an interrupt event
@@ -539,8 +539,8 @@ macro_rules! uart_lp {
                     Event::Rxne => self.tx.usart.cr1().modify(|_, w| w.rxneie().clear_bit()),
                     Event::Txe => self.tx.usart.cr1().modify(|_, w| w.txeie().clear_bit()),
                     Event::Idle => self.tx.usart.cr1().modify(|_, w| w.idleie().clear_bit()),
-                    _ => {}
-                }
+                    _ => unimplemented!(),
+                };
             }
 
             /// Check if interrupt event is pending
@@ -683,8 +683,8 @@ macro_rules! uart_full {
                     Event::Rxne => self.tx.usart.cr1().modify(|_, w| w.rxneie().set_bit()),
                     Event::Txe => self.tx.usart.cr1().modify(|_, w| w.txeie().set_bit()),
                     Event::Idle => self.tx.usart.cr1().modify(|_, w| w.idleie().set_bit()),
-                    _ => {}
-                }
+                    _ => unimplemented!(),
+                };
             }
 
             /// Stop listening for an interrupt event
@@ -693,8 +693,8 @@ macro_rules! uart_full {
                     Event::Rxne => self.tx.usart.cr1().modify(|_, w| w.rxneie().clear_bit()),
                     Event::Txe => self.tx.usart.cr1().modify(|_, w| w.txeie().clear_bit()),
                     Event::Idle => self.tx.usart.cr1().modify(|_, w| w.idleie().clear_bit()),
-                    _ => {}
-                }
+                    _ => unimplemented!(),
+                };
             }
 
             /// Check if interrupt event is pending

Original file line number	Diff line number	Diff line change
`@@ -162,13 +162,13 @@ macro_rules! positive_input_pin {`
`162`	`162`	`($COMP:ident, $pin_0:ident, $pin_1:ident) => {`
`163`	`163`	`impl PositiveInput<$COMP> for &$pin_0<Analog> {`
`164`	`164`	`fn setup(&self, comp: &$COMP) {`
`165`		`- comp.csr().modify(\|_, w\| w.inpsel().bit(false))`
	`165`	`+ comp.csr().modify(\|_, w\| w.inpsel().bit(false));`
`166`	`166`	`}`
`167`	`167`	`}`
`168`	`168`
`169`	`169`	`impl PositiveInput<$COMP> for &$pin_1<Analog> {`
`170`	`170`	`fn setup(&self, comp: &$COMP) {`
`171`		`- comp.csr().modify(\|_, w\| w.inpsel().bit(true))`
	`171`	`+ comp.csr().modify(\|_, w\| w.inpsel().bit(true));`
`172`	`172`	`}`
`173`	`173`	`}`
`174`	`174`	`};`
`@@ -213,7 +213,7 @@ macro_rules! negative_input_pin_helper {`
`213`	`213`	`}`
`214`	`214`
`215`	`215`	`fn setup(&self, comp: &$COMP) {`
`216`		`- comp.csr().modify(\|_, w\| unsafe { w.inmsel().bits($bits) })`
	`216`	`+ comp.csr().modify(\|_, w\| unsafe { w.inmsel().bits($bits) });`
`217`	`217`	`}`
`218`	`218`	`}`
`219`	`219`	`};`
`@@ -268,7 +268,7 @@ macro_rules! refint_input {`
`268`	`268`
`269`	`269`	`fn setup(&self, comp: &$COMP) {`
`270`	`270`	`comp.csr()`
`271`		`- .modify(\|_, w\| unsafe { w.inmsel().bits(*self as u8) })`
	`271`	`+ .modify(\|_, w\| unsafe { w.inmsel().bits(*self as u8) });`
`272`	`272`	`}`
`273`	`273`	`}`
`274`	`274`	`)+};`
`@@ -294,7 +294,7 @@ macro_rules! dac_input_helper {`
`294`	`294`	`}`
`295`	`295`
`296`	`296`	`fn setup(&self, comp: &$COMP) {`
`297`		`- comp.csr().modify(\|_, w\| unsafe { w.inmsel().bits($bits) })`
	`297`	`+ comp.csr().modify(\|_, w\| unsafe { w.inmsel().bits($bits) });`
`298`	`298`	`}`
`299`	`299`	`}`
`300`	`300`	`};`
Original file line number	Diff line number	Diff line change
`@@ -113,7 +113,7 @@ impl ExtiExt for EXTI {`
`113`	`113`	`line => self`
`114`	`114`	`.imr2()`
`115`	`115`	`.modify(\|r, w\| unsafe { w.bits(r.bits() \| 1 << (line - 32)) }),`
`116`		`- }`
	`116`	`+ };`
`117`	`117`	`}`
`118`	`118`
`119`	`119`	`fn unlisten(&self, ev: Event) {`
`@@ -133,7 +133,7 @@ impl ExtiExt for EXTI {`
`133`	`133`	`line => {`
`134`	`134`	`let mask = !(1 << (line - 32));`
`135`	`135`	`self.imr2()`
`136`		`- .modify(\|r, w\| unsafe { w.bits(r.bits() & mask) })`
	`136`	`+ .modify(\|r, w\| unsafe { w.bits(r.bits() & mask) });`
`137`	`137`	`}`
`138`	`138`	`}`
`139`	`139`	`}`
Original file line number	Diff line number	Diff line change
`@@ -488,7 +488,7 @@ macro_rules! gpio {`
`488`	`488`	`unsafe {`
`489`	`489`	`(*$GPIOX::ptr()).ospeedr().modify(\|r, w\| {`
`490`	`490`	`w.bits((r.bits() & !(0b11 << offset)) \| ((speed as u32) << offset))`
`491`		`- })`
	`491`	`+ });`
`492`	`492`	`}`
`493`	`493`	`self`
`494`	`494`	`}`
Original file line number	Diff line number	Diff line change
`@@ -362,7 +362,7 @@ impl Rcc {`
`362`	`362`	`unsafe {`
`363`	`363`	`// Adjust flash wait states`
`364`	`364`	`let flash = &(*FLASH::ptr());`
`365`		`- flash.acr().modify(\|_, w\| w.latency().bits(latency))`
	`365`	`+ flash.acr().modify(\|_, w\| w.latency().bits(latency));`
`366`	`366`	`}`
`367`	`367`	`}`
`368`	`368`