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Use rcc Enable and Reset traits rather than direct register access
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src/syscfg.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
use crate::rcc::Rcc;
1+
use crate::rcc::{Enable, Rcc, Reset};
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use crate::stm32::SYSCFG;
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use core::ops::Deref;
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@@ -10,8 +10,8 @@ pub trait SysCfgExt {
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impl SysCfgExt for SYSCFG {
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fn constrain(self, rcc: &mut Rcc) -> SysCfg {
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// Enable SYSCFG peripheral clock in APB2ENR register
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rcc.apb2enr().modify(|_, w| w.syscfgen().set_bit());
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SYSCFG::enable(rcc);
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SYSCFG::reset(rcc);
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SysCfg(self)
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}

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