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fix(security): Fixed ESP32S2 memory protection check for Peri1 RTCSLOW interrupt
- fixes the issue found in espressif#15359 - extends debug printouts in the related tests
1 parent 93651dd commit fef8695

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3 files changed

+23
-11
lines changed

3 files changed

+23
-11
lines changed

‎components/hal/esp32s2/include/hal/memprot_peri_ll.h‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -112,7 +112,7 @@ static inline intptr_t memprot_ll_peri1_rtcslow_get_fault_address(void)
112112

113113
static inline bool memprot_ll_peri1_rtcslow_is_intr_mine(void)
114114
{
115-
if (memprot_ll_dram0_is_assoc_intr()) {
115+
if (memprot_ll_peri1_is_assoc_intr()) {
116116
uint32_t faulting_address = (uint32_t)memprot_ll_peri1_rtcslow_get_fault_address();
117117
return faulting_address >= PERI1_RTCSLOW_ADDRESS_LOW && faulting_address <= PERI1_RTCSLOW_ADDRESS_HIGH;
118118
}
@@ -123,7 +123,7 @@ static inline memprot_hal_err_t memprot_ll_peri1_rtcslow_set_prot(uint32_t *spli
123123
{
124124
uint32_t addr = (uint32_t)split_addr;
125125

126-
//check corresponding range fit & aligment to 32bit boundaries
126+
//check corresponding range fit & alignment to 32bit boundaries
127127
if (addr < PERI1_RTCSLOW_ADDRESS_LOW || addr > PERI1_RTCSLOW_ADDRESS_HIGH) {
128128
return MEMP_HAL_ERR_SPLIT_ADDR_INVALID;
129129
}
@@ -281,7 +281,7 @@ static inline memprot_hal_err_t memprot_ll_peri2_rtcslow_0_set_prot(uint32_t *sp
281281
{
282282
uint32_t addr = (uint32_t)split_addr;
283283

284-
//check corresponding range fit & aligment to 32bit boundaries
284+
//check corresponding range fit & alignment to 32bit boundaries
285285
if (addr < PERI2_RTCSLOW_0_ADDRESS_LOW || addr > PERI2_RTCSLOW_0_ADDRESS_HIGH) {
286286
return MEMP_HAL_ERR_SPLIT_ADDR_INVALID;
287287
}
@@ -369,7 +369,7 @@ static inline memprot_hal_err_t memprot_ll_peri2_rtcslow_1_set_prot(uint32_t *sp
369369
{
370370
uint32_t addr = (uint32_t)split_addr;
371371

372-
//check corresponding range fit & aligment to 32bit boundaries
372+
//check corresponding range fit & alignment to 32bit boundaries
373373
if (addr < PERI2_RTCSLOW_1_ADDRESS_LOW || addr > PERI2_RTCSLOW_1_ADDRESS_HIGH) {
374374
return MEMP_HAL_ERR_SPLIT_ADDR_INVALID;
375375
}

‎tools/ci/check_copyright_ignore.txt‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1025,7 +1025,6 @@ tools/test_apps/system/build_test/main/test_main.c
10251025
tools/test_apps/system/cxx_no_except/main/main.cpp
10261026
tools/test_apps/system/gdb_loadable_elf/main/hello_world_main.c
10271027
tools/test_apps/system/longjmp_test/main/hello_world_main.c
1028-
tools/test_apps/system/memprot/main/esp32s2/test_memprot_main.c
10291028
tools/test_apps/system/no_embedded_paths/check_for_file_paths.py
10301029
tools/test_apps/system/no_embedded_paths/main/test_no_embedded_paths_main.c
10311030
tools/test_apps/system/startup/main/test_startup_main.c

‎tools/test_apps/system/memprot/main/esp32s2/test_memprot_main.c‎

Lines changed: 18 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,18 @@
1-
/* MEMPROT IramDram testing code */
1+
/*
2+
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
27
#include <stdio.h>
38
#include <string.h>
49
#include "sdkconfig.h"
510
#include "esp_log.h"
611
#include "esp32s2/memprot.h"
712
#include "soc/soc.h"
813

14+
static const char *TAG = "memprot_test_ESP32S2";
15+
916
/*
1017
* ESP32S2 MEMORY PROTECTION MODULE TEST
1118
* =====================================
@@ -107,7 +114,6 @@ static uint8_t RTC_SLOW_ATTR rtcslow_dummy_buffer[2 * SRAM_TEST_BUFFER_SIZE] = {
107114
* testing regions and splitting address scheme
108115
*
109116
*/
110-
111117
static uint32_t *test_memprot_dram0_rtcfast_get_min_split_addr(void)
112118
{
113119
return (uint32_t *)(rtcfast_dummy_buffer + sizeof(rtcfast_dummy_buffer) / 2);
@@ -186,7 +192,6 @@ static uint32_t *test_memprot_addr_high(mem_type_prot_t mem_type)
186192
}
187193
}
188194

189-
190195
static uint32_t *test_memprot_get_split_addr(mem_type_prot_t mem_type)
191196
{
192197
switch (mem_type) {
@@ -209,7 +214,6 @@ static uint32_t *test_memprot_get_split_addr(mem_type_prot_t mem_type)
209214
}
210215
}
211216

212-
213217
/*
214218
* testing setup of the memory-protection module
215219
*/
@@ -274,7 +278,7 @@ static void test_memprot_set_prot(uint32_t *mem_type_mask, bool use_panic_handle
274278
esp_memprot_set_prot_peri2(MEMPROT_PERI2_RTCSLOW_1, test_memprot_peri2_rtcslow_1_get_min_split_addr(), WR_LOW_DIS, RD_LOW_DIS, EX_LOW_DIS, WR_HIGH_DIS, RD_HIGH_DIS, EX_HIGH_DIS);
275279
}
276280

277-
//reenable protection (bus based)
281+
//re-enable protection (bus based)
278282
if (use_iram0) {
279283
esp_memprot_intr_ena(MEMPROT_IRAM0_SRAM, true);
280284
}
@@ -355,9 +359,11 @@ static void test_memprot_read(mem_type_prot_t mem_type)
355359
bool write_perm_low, write_perm_high, read_perm_low, read_perm_high;
356360
esp_memprot_get_perm_write(mem_type, &write_perm_low, &write_perm_high);
357361
esp_memprot_get_perm_read(mem_type, &read_perm_low, &read_perm_high);
362+
ESP_EARLY_LOGD(TAG, "TEST_READ (low: r=%u w=%u, high: r=%u w=%u):", read_perm_low, write_perm_low, read_perm_high, write_perm_high);
358363

359364
volatile uint32_t *ptr_low = test_memprot_addr_low(mem_type);
360365
volatile uint32_t *ptr_high = test_memprot_addr_high(mem_type);
366+
ESP_EARLY_LOGD(TAG, "[test_addr_low=0x%08X test_addr_high=0x%08X]", ptr_low, ptr_high);
361367

362368
//temporarily allow WRITE for setting the test values
363369
esp_memprot_set_write_perm(mem_type, true, true);
@@ -397,12 +403,14 @@ static void test_memprot_write(mem_type_prot_t mem_type)
397403
bool write_perm_low, write_perm_high, read_perm_low, read_perm_high;
398404
esp_memprot_get_perm_write(mem_type, &write_perm_low, &write_perm_high);
399405
esp_memprot_get_perm_read(mem_type, &read_perm_low, &read_perm_high);
406+
ESP_EARLY_LOGD(TAG, "TEST_WRITE (low: r=%u w=%u, high: r=%u w=%u):", read_perm_low, write_perm_low, read_perm_high, write_perm_high);
400407

401408
//temporarily allow READ operation
402409
esp_memprot_set_read_perm(mem_type, true, true);
403410

404411
volatile uint32_t *ptr_low = test_memprot_addr_low(mem_type);
405412
volatile uint32_t *ptr_high = test_memprot_addr_high(mem_type);
413+
ESP_EARLY_LOGD(TAG, "[test_addr_low=0x%08X test_addr_high=0x%08X]", ptr_low, ptr_high);
406414

407415
//perform WRITE in low region
408416
const uint32_t test_val = 10;
@@ -447,8 +455,13 @@ static void test_memprot_exec(mem_type_prot_t mem_type)
447455
bool exec_perm_low, exec_perm_high;
448456
esp_memprot_get_perm_exec(mem_type, &exec_perm_low, &exec_perm_high);
449457

458+
bool read_perm_low, read_perm_high;
459+
esp_memprot_get_perm_read(mem_type, &read_perm_low, &read_perm_high);
460+
ESP_EARLY_LOGD(TAG, "TEST_EXEC (low: r=%u w=%u x=%u, high: r=%u w=%u x=%u):", read_perm_low, write_perm_low, exec_perm_low, read_perm_high, write_perm_high, exec_perm_high);
461+
450462
volatile uint32_t *fnc_ptr_low = test_memprot_addr_low(mem_type);
451463
volatile uint32_t *fnc_ptr_high = test_memprot_addr_high(mem_type);
464+
ESP_EARLY_LOGD(TAG, "[test_addr_low=0x%08X test_addr_high=0x%08X]", fnc_ptr_low, fnc_ptr_high);
452465

453466
//enable WRITE permission for both segments
454467
esp_memprot_set_write_perm(mem_type, true, true);

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