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fix(i2s): fixed the pdm2pcm capability on c5 and c61
1 parent 4ecb1ce commit b18506d

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+39
-160
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+39
-160
lines changed

‎components/esp_driver_i2s/test_apps/i2s/main/test_i2s.c‎

Lines changed: 31 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -986,3 +986,33 @@ TEST_CASE("I2S_asynchronous_read_write", "[i2s]")
986986

987987
TEST_ASSERT(received);
988988
}
989+
990+
#if SOC_I2S_SUPPORTS_PDM2PCM
991+
TEST_CASE("I2S_PDM2PCM_existence_test", "[i2s]")
992+
{
993+
i2s_chan_handle_t rx_handle;
994+
i2s_chan_config_t rx_chan_cfg = I2S_CHANNEL_DEFAULT_CONFIG(I2S_NUM_AUTO, I2S_ROLE_MASTER);
995+
TEST_ESP_OK(i2s_new_channel(&rx_chan_cfg, NULL, &rx_handle));
996+
997+
i2s_pdm_rx_config_t pdm_rx_cfg = {
998+
.clk_cfg = I2S_PDM_RX_CLK_DEFAULT_CONFIG(16000),
999+
.slot_cfg = I2S_PDM_RX_SLOT_PCM_FMT_DEFAULT_CONFIG(I2S_DATA_BIT_WIDTH_16BIT, I2S_SLOT_MODE_MONO),
1000+
.gpio_cfg = {
1001+
.clk = MASTER_BCK_IO,
1002+
.din = DATA_IN_IO,
1003+
.invert_flags = {
1004+
.clk_inv = false,
1005+
},
1006+
},
1007+
};
1008+
TEST_ESP_OK(i2s_channel_init_pdm_rx_mode(rx_handle, &pdm_rx_cfg));
1009+
TEST_ESP_OK(i2s_channel_enable(rx_handle));
1010+
1011+
uint8_t *r_buf[64] = {};
1012+
size_t r_bytes = 0;
1013+
// If PDM2PCM is not supported in the hardware, it will fail to read.
1014+
TEST_ESP_OK(i2s_channel_read(rx_handle, r_buf, 64, &r_bytes, 1000));
1015+
TEST_ESP_OK(i2s_channel_disable(rx_handle));
1016+
TEST_ESP_OK(i2s_del_channel(rx_handle));
1017+
}
1018+
#endif

‎components/hal/esp32c5/include/hal/i2s_ll.h‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -743,7 +743,6 @@ static inline void i2s_ll_rx_enable_tdm(i2s_dev_t *hw)
743743
{
744744
hw->rx_conf.rx_pdm_en = false;
745745
hw->rx_conf.rx_tdm_en = true;
746-
hw->rx_pdm2pcm_conf.rx_pdm2pcm_en = false;
747746
}
748747

749748
/**

‎components/hal/esp32c61/include/hal/i2s_ll.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/

‎components/soc/esp32c5/register/soc/i2s_reg.h‎

Lines changed: 1 addition & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -836,56 +836,6 @@ extern "C" {
836836
#define I2S_TX_IIR_HP_MULT12_0_V 0x00000007U
837837
#define I2S_TX_IIR_HP_MULT12_0_S 23
838838

839-
/** I2S_RX_PDM2PCM_CONF_REG register
840-
* I2S RX configure register
841-
*/
842-
#define I2S_RX_PDM2PCM_CONF_REG(i) (REG_I2S_BASE(i) + 0x4c)
843-
/** I2S_RX_PDM2PCM_EN : R/W; bitpos: [19]; default: 0;
844-
* 1: Enable PDM2PCM RX mode. 0: DIsable.
845-
*/
846-
#define I2S_RX_PDM2PCM_EN (BIT(19))
847-
#define I2S_RX_PDM2PCM_EN_M (I2S_RX_PDM2PCM_EN_V << I2S_RX_PDM2PCM_EN_S)
848-
#define I2S_RX_PDM2PCM_EN_V 0x00000001U
849-
#define I2S_RX_PDM2PCM_EN_S 19
850-
/** I2S_RX_PDM_SINC_DSR_16_EN : R/W; bitpos: [20]; default: 0;
851-
* Configure the down sampling rate of PDM RX filter group1 module. 1: The down
852-
* sampling rate is 128. 0: down sampling rate is 64.
853-
*/
854-
#define I2S_RX_PDM_SINC_DSR_16_EN (BIT(20))
855-
#define I2S_RX_PDM_SINC_DSR_16_EN_M (I2S_RX_PDM_SINC_DSR_16_EN_V << I2S_RX_PDM_SINC_DSR_16_EN_S)
856-
#define I2S_RX_PDM_SINC_DSR_16_EN_V 0x00000001U
857-
#define I2S_RX_PDM_SINC_DSR_16_EN_S 20
858-
/** I2S_RX_PDM2PCM_AMPLIFY_NUM : R/W; bitpos: [24:21]; default: 1;
859-
* Configure PDM RX amplify number.
860-
*/
861-
#define I2S_RX_PDM2PCM_AMPLIFY_NUM 0x0000000FU
862-
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_M (I2S_RX_PDM2PCM_AMPLIFY_NUM_V << I2S_RX_PDM2PCM_AMPLIFY_NUM_S)
863-
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_V 0x0000000FU
864-
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_S 21
865-
/** I2S_RX_PDM_HP_BYPASS : R/W; bitpos: [25]; default: 0;
866-
* I2S PDM RX bypass hp filter or not.
867-
*/
868-
#define I2S_RX_PDM_HP_BYPASS (BIT(25))
869-
#define I2S_RX_PDM_HP_BYPASS_M (I2S_RX_PDM_HP_BYPASS_V << I2S_RX_PDM_HP_BYPASS_S)
870-
#define I2S_RX_PDM_HP_BYPASS_V 0x00000001U
871-
#define I2S_RX_PDM_HP_BYPASS_S 25
872-
/** I2S_RX_IIR_HP_MULT12_5 : R/W; bitpos: [28:26]; default: 6;
873-
* The fourth parameter of PDM RX IIR_HP filter stage 2 is (504 +
874-
* LP_I2S_RX_IIR_HP_MULT12_5[2:0])
875-
*/
876-
#define I2S_RX_IIR_HP_MULT12_5 0x00000007U
877-
#define I2S_RX_IIR_HP_MULT12_5_M (I2S_RX_IIR_HP_MULT12_5_V << I2S_RX_IIR_HP_MULT12_5_S)
878-
#define I2S_RX_IIR_HP_MULT12_5_V 0x00000007U
879-
#define I2S_RX_IIR_HP_MULT12_5_S 26
880-
/** I2S_RX_IIR_HP_MULT12_0 : R/W; bitpos: [31:29]; default: 7;
881-
* The fourth parameter of PDM RX IIR_HP filter stage 1 is (504 +
882-
* LP_I2S_RX_IIR_HP_MULT12_0[2:0])
883-
*/
884-
#define I2S_RX_IIR_HP_MULT12_0 0x00000007U
885-
#define I2S_RX_IIR_HP_MULT12_0_M (I2S_RX_IIR_HP_MULT12_0_V << I2S_RX_IIR_HP_MULT12_0_S)
886-
#define I2S_RX_IIR_HP_MULT12_0_V 0x00000007U
887-
#define I2S_RX_IIR_HP_MULT12_0_S 29
888-
889839
/** I2S_RX_TDM_CTRL_REG register
890840
* I2S TX TDM mode control register
891841
*/

‎components/soc/esp32c5/register/soc/i2s_struct.h‎

Lines changed: 2 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -295,43 +295,6 @@ typedef union {
295295
uint32_t val;
296296
} i2s_rx_recomb_dma_chn_reg_t;
297297

298-
/** Type of rx_pdm2pcm_conf register
299-
* I2S RX configure register
300-
*/
301-
typedef union {
302-
struct {
303-
uint32_t reserved_0:19;
304-
/** rx_pdm2pcm_en : R/W; bitpos: [19]; default: 0;
305-
* 1: Enable PDM2PCM RX mode. 0: DIsable.
306-
*/
307-
uint32_t rx_pdm2pcm_en:1;
308-
/** rx_pdm_sinc_dsr_16_en : R/W; bitpos: [20]; default: 0;
309-
* Configure the down sampling rate of PDM RX filter group1 module. 1: The down
310-
* sampling rate is 128. 0: down sampling rate is 64.
311-
*/
312-
uint32_t rx_pdm_sinc_dsr_16_en:1;
313-
/** rx_pdm2pcm_amplify_num : R/W; bitpos: [24:21]; default: 1;
314-
* Configure PDM RX amplify number.
315-
*/
316-
uint32_t rx_pdm2pcm_amplify_num:4;
317-
/** rx_pdm_hp_bypass : R/W; bitpos: [25]; default: 0;
318-
* I2S PDM RX bypass hp filter or not.
319-
*/
320-
uint32_t rx_pdm_hp_bypass:1;
321-
/** rx_iir_hp_mult12_5 : R/W; bitpos: [28:26]; default: 6;
322-
* The fourth parameter of PDM RX IIR_HP filter stage 2 is (504 +
323-
* LP_I2S_RX_IIR_HP_MULT12_5[2:0])
324-
*/
325-
uint32_t rx_iir_hp_mult12_5:3;
326-
/** rx_iir_hp_mult12_0 : R/W; bitpos: [31:29]; default: 7;
327-
* The fourth parameter of PDM RX IIR_HP filter stage 1 is (504 +
328-
* LP_I2S_RX_IIR_HP_MULT12_0[2:0])
329-
*/
330-
uint32_t rx_iir_hp_mult12_0:3;
331-
};
332-
uint32_t val;
333-
} i2s_rx_pdm2pcm_conf_reg_t;
334-
335298
/** Type of rx_tdm_ctrl register
336299
* I2S TX TDM mode control register
337300
*/
@@ -1038,7 +1001,7 @@ typedef struct {
10381001
volatile i2s_rx_recomb_dma_chn_reg_t rx_recomb_dma_ch[4];
10391002
volatile i2s_tx_pcm2pdm_conf_reg_t tx_pcm2pdm_conf;
10401003
volatile i2s_tx_pcm2pdm_conf1_reg_t tx_pcm2pdm_conf1;
1041-
volatile i2s_rx_pdm2pcm_conf_reg_t rx_pdm2pcm_conf;
1004+
uint32_t reserved_048;
10421005
volatile i2s_rx_tdm_ctrl_reg_t rx_tdm_ctrl;
10431006
volatile i2s_tx_tdm_ctrl_reg_t tx_tdm_ctrl;
10441007
volatile i2s_rx_timing_reg_t rx_timing;

‎components/soc/esp32c61/register/soc/i2s_reg.h‎

Lines changed: 1 addition & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -661,40 +661,6 @@ extern "C" {
661661
#define I2S_TX_IIR_HP_MULT12_0_V 0x00000007U
662662
#define I2S_TX_IIR_HP_MULT12_0_S 23
663663

664-
/** I2S_RX_PDM2PCM_CONF_REG register
665-
* I2S RX configure register
666-
*/
667-
#define I2S_RX_PDM2PCM_CONF_REG (DR_REG_I2S_BASE + 0x48)
668-
/** I2S_RX_PDM2PCM_EN : R/W; bitpos: [19]; default: 0;
669-
* 1: Enable PDM2PCM RX mode. 0: DIsable.
670-
*/
671-
#define I2S_RX_PDM2PCM_EN (BIT(19))
672-
#define I2S_RX_PDM2PCM_EN_M (I2S_RX_PDM2PCM_EN_V << I2S_RX_PDM2PCM_EN_S)
673-
#define I2S_RX_PDM2PCM_EN_V 0x00000001U
674-
#define I2S_RX_PDM2PCM_EN_S 19
675-
/** I2S_RX_PDM_SINC_DSR_16_EN : R/W; bitpos: [20]; default: 0;
676-
* Configure the down sampling rate of PDM RX filter group1 module. 1: The down
677-
* sampling rate is 128. 0: down sampling rate is 64.
678-
*/
679-
#define I2S_RX_PDM_SINC_DSR_16_EN (BIT(20))
680-
#define I2S_RX_PDM_SINC_DSR_16_EN_M (I2S_RX_PDM_SINC_DSR_16_EN_V << I2S_RX_PDM_SINC_DSR_16_EN_S)
681-
#define I2S_RX_PDM_SINC_DSR_16_EN_V 0x00000001U
682-
#define I2S_RX_PDM_SINC_DSR_16_EN_S 20
683-
/** I2S_RX_PDM2PCM_AMPLIFY_NUM : R/W; bitpos: [24:21]; default: 1;
684-
* Configure PDM RX amplify number.
685-
*/
686-
#define I2S_RX_PDM2PCM_AMPLIFY_NUM 0x0000000FU
687-
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_M (I2S_RX_PDM2PCM_AMPLIFY_NUM_V << I2S_RX_PDM2PCM_AMPLIFY_NUM_S)
688-
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_V 0x0000000FU
689-
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_S 21
690-
/** I2S_RX_PDM_HP_BYPASS : R/W; bitpos: [25]; default: 0;
691-
* I2S PDM RX bypass hp filter or not.
692-
*/
693-
#define I2S_RX_PDM_HP_BYPASS (BIT(25))
694-
#define I2S_RX_PDM_HP_BYPASS_M (I2S_RX_PDM_HP_BYPASS_V << I2S_RX_PDM_HP_BYPASS_S)
695-
#define I2S_RX_PDM_HP_BYPASS_V 0x00000001U
696-
#define I2S_RX_PDM_HP_BYPASS_S 25
697-
698664
/** I2S_RX_TDM_CTRL_REG register
699665
* I2S TX TDM mode control register
700666
*/

‎components/soc/esp32c61/register/soc/i2s_struct.h‎

Lines changed: 2 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -240,34 +240,6 @@ typedef union {
240240
uint32_t val;
241241
} i2s_rx_conf1_reg_t;
242242

243-
/** Type of rx_pdm2pcm_conf register
244-
* I2S RX configure register
245-
*/
246-
typedef union {
247-
struct {
248-
uint32_t reserved_0:19;
249-
/** rx_pdm2pcm_en : R/W; bitpos: [19]; default: 0;
250-
* 1: Enable PDM2PCM RX mode. 0: DIsable.
251-
*/
252-
uint32_t rx_pdm2pcm_en:1;
253-
/** rx_pdm_sinc_dsr_16_en : R/W; bitpos: [20]; default: 0;
254-
* Configure the down sampling rate of PDM RX filter group1 module. 1: The down
255-
* sampling rate is 128. 0: down sampling rate is 64.
256-
*/
257-
uint32_t rx_pdm_sinc_dsr_16_en:1;
258-
/** rx_pdm2pcm_amplify_num : R/W; bitpos: [24:21]; default: 1;
259-
* Configure PDM RX amplify number.
260-
*/
261-
uint32_t rx_pdm2pcm_amplify_num:4;
262-
/** rx_pdm_hp_bypass : R/W; bitpos: [25]; default: 0;
263-
* I2S PDM RX bypass hp filter or not.
264-
*/
265-
uint32_t rx_pdm_hp_bypass:1;
266-
uint32_t reserved_26:6;
267-
};
268-
uint32_t val;
269-
} i2s_rx_pdm2pcm_conf_reg_t;
270-
271243
/** Type of rx_tdm_ctrl register
272244
* I2S TX TDM mode control register
273245
*/
@@ -973,8 +945,7 @@ typedef struct {
973945
uint32_t reserved_030[4];
974946
volatile i2s_tx_pcm2pdm_conf_reg_t tx_pcm2pdm_conf;
975947
volatile i2s_tx_pcm2pdm_conf1_reg_t tx_pcm2pdm_conf1;
976-
volatile i2s_rx_pdm2pcm_conf_reg_t rx_pdm2pcm_conf;
977-
uint32_t reserved_04c;
948+
uint32_t reserved_048[2];
978949
volatile i2s_rx_tdm_ctrl_reg_t rx_tdm_ctrl;
979950
volatile i2s_tx_tdm_ctrl_reg_t tx_tdm_ctrl;
980951
volatile i2s_rx_timing_reg_t rx_timing;

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