Skip to content

Commit a56249f

Browse files
committed
change(esp_hw_support): update power domain pd allowed check logic
1 parent bde6b91 commit a56249f

File tree

7 files changed

+238
-78
lines changed

7 files changed

+238
-78
lines changed

components/esp_hw_support/lowpower/port/esp32c5/sleep_clock.c

Lines changed: 25 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -76,36 +76,46 @@ esp_err_t sleep_clock_modem_retention_init(void *arg)
7676

7777
bool clock_domain_pd_allowed(void)
7878
{
79-
const uint32_t inited_modules = sleep_retention_get_inited_modules();
80-
const uint32_t created_modules = sleep_retention_get_created_modules();
81-
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
79+
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
80+
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
81+
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
8282

8383
/* The clock and reset of MODEM (WiFi, BLE and 15.4) modules are managed
8484
* through MODEM_SYSCON, when one or more MODEMs are initialized, it is
8585
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
8686
* or off. The clock and reset of digital peripherals are managed through
8787
* PCR, with TOP domain similar to MODEM domain. */
88-
uint32_t modem_clk_dep_modules = 0;
88+
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
8989
#if SOC_WIFI_SUPPORTED
90-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC) | BIT(SLEEP_RETENTION_MODULE_WIFI_BB);
90+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC % 32);
91+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_BB % 32);
9192
#endif
9293
#if SOC_BT_SUPPORTED
93-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
94+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
95+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
9496
#endif
9597
#if SOC_IEEE802154_SUPPORTED
96-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_802154_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
98+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_802154_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_802154_MAC % 32);
99+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
97100
#endif
98101

99-
uint32_t mask = 0;
100-
if (inited_modules & sys_clk_dep_modules) {
101-
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
102+
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
103+
104+
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
105+
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
106+
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
107+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
102108
}
103-
if (inited_modules & modem_clk_dep_modules) {
104109
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
105-
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
106-
#endif
110+
const sleep_retention_module_bitmap_t modem_modules = sleep_retention_module_bitmap_and(inited_modules, modem_clk_dep_modules);
111+
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
112+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
107113
}
108-
return ((inited_modules & mask) == (created_modules & mask));
114+
#endif
115+
116+
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
117+
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
118+
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
109119
}
110120

111121
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
@@ -119,7 +129,7 @@ ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
119129
#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
120130
init_param = (sleep_retention_module_init_param_t) {
121131
.cbs = { .create = { .handle = sleep_clock_modem_retention_init, .arg = NULL } },
122-
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
132+
.depends.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32),
123133
.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
124134
};
125135
sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_MODEM, &init_param);

components/esp_hw_support/lowpower/port/esp32c6/sleep_clock.c

Lines changed: 24 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -47,36 +47,46 @@ esp_err_t sleep_clock_modem_retention_init(void *arg)
4747

4848
bool clock_domain_pd_allowed(void)
4949
{
50-
const uint32_t inited_modules = sleep_retention_get_inited_modules();
51-
const uint32_t created_modules = sleep_retention_get_created_modules();
52-
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
50+
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
51+
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
52+
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
5353

5454
/* The clock and reset of MODEM (WiFi, BLE and 15.4) modules are managed
5555
* through MODEM_SYSCON, when one or more MODEMs are initialized, it is
5656
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
5757
* or off. The clock and reset of digital peripherals are managed through
5858
* PCR, with TOP domain similar to MODEM domain. */
59-
uint32_t modem_clk_dep_modules = 0;
59+
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
6060
#if SOC_WIFI_SUPPORTED
61-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC) | BIT(SLEEP_RETENTION_MODULE_WIFI_BB);
61+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC % 32);
62+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_BB % 32);
6263
#endif
6364
#if SOC_BT_SUPPORTED
64-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
65+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
66+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
6567
#endif
6668
#if SOC_IEEE802154_SUPPORTED
67-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_802154_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
69+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_802154_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_802154_MAC % 32);
70+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
6871
#endif
6972

70-
uint32_t mask = 0;
71-
if (inited_modules & sys_clk_dep_modules) {
72-
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
73+
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
74+
75+
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
76+
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
77+
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
78+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
7379
}
74-
if (inited_modules & modem_clk_dep_modules) {
7580
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
76-
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
77-
#endif
81+
const sleep_retention_module_bitmap_t modem_modules = sleep_retention_module_bitmap_and(inited_modules, modem_clk_dep_modules);
82+
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
83+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
7884
}
79-
return ((inited_modules & mask) == (created_modules & mask));
85+
#endif
86+
87+
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
88+
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
89+
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
8090
}
8191

8292
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)

components/esp_hw_support/lowpower/port/esp32c61/sleep_clock.c

Lines changed: 24 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -54,36 +54,42 @@ esp_err_t sleep_clock_modem_retention_init(void *arg)
5454

5555
bool clock_domain_pd_allowed(void)
5656
{
57-
const uint32_t inited_modules = sleep_retention_get_inited_modules();
58-
const uint32_t created_modules = sleep_retention_get_created_modules();
59-
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
57+
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
58+
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
59+
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
6060

6161
/* The clock and reset of MODEM (WiFi, BLE and 15.4) modules are managed
6262
* through MODEM_SYSCON, when one or more MODEMs are initialized, it is
6363
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
6464
* or off. The clock and reset of digital peripherals are managed through
6565
* PCR, with TOP domain similar to MODEM domain. */
66-
uint32_t modem_clk_dep_modules = 0;
66+
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
6767
#if SOC_WIFI_SUPPORTED
68-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC) | BIT(SLEEP_RETENTION_MODULE_WIFI_BB);
68+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC % 32);
69+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_BB % 32);
6970
#endif
7071
#if SOC_BT_SUPPORTED
71-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
72-
#endif
73-
#if SOC_IEEE802154_SUPPORTED
74-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_802154_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
72+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
73+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
7574
#endif
7675

77-
uint32_t mask = 0;
78-
if (inited_modules & sys_clk_dep_modules) {
79-
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
76+
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
77+
78+
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
79+
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
80+
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
81+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
8082
}
81-
if (inited_modules & modem_clk_dep_modules) {
82-
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
83-
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
84-
#endif
83+
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED
84+
const sleep_retention_module_bitmap_t modem_modules = sleep_retention_module_bitmap_and(inited_modules, modem_clk_dep_modules);
85+
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
86+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
8587
}
86-
return ((inited_modules & mask) == (created_modules & mask));
88+
#endif
89+
90+
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
91+
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
92+
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
8793
}
8894

8995
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
@@ -97,7 +103,7 @@ ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
97103
#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
98104
init_param = (sleep_retention_module_init_param_t) {
99105
.cbs = { .create = { .handle = sleep_clock_modem_retention_init, .arg = NULL } },
100-
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
106+
.depends.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32),
101107
.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
102108
};
103109
sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_MODEM, &init_param);

components/esp_hw_support/lowpower/port/esp32h2/sleep_clock.c

Lines changed: 22 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -56,33 +56,42 @@ esp_err_t sleep_clock_modem_retention_init(void *arg)
5656

5757
bool clock_domain_pd_allowed(void)
5858
{
59-
const uint32_t inited_modules = sleep_retention_get_inited_modules();
60-
const uint32_t created_modules = sleep_retention_get_created_modules();
61-
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
59+
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
60+
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
61+
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
6262

6363
/* The clock and reset of MODEM (WiFi, BLE and 15.4) modules are managed
6464
* through MODEM_SYSCON, when one or more MODEMs are initialized, it is
6565
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
6666
* or off. The clock and reset of digital peripherals are managed through
6767
* PCR, with TOP domain similar to MODEM domain. */
68-
uint32_t modem_clk_dep_modules = 0;
68+
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
6969
#if SOC_BT_SUPPORTED
70-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
70+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
71+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
7172
#endif
7273
#if SOC_IEEE802154_SUPPORTED
73-
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_802154_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
74+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_802154_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_802154_MAC % 32);
75+
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
7476
#endif
7577

76-
uint32_t mask = 0;
77-
if (inited_modules & sys_clk_dep_modules) {
78-
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
78+
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
79+
80+
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
81+
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
82+
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
83+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
7984
}
80-
if (inited_modules & modem_clk_dep_modules) {
8185
#if SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
82-
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
83-
#endif
86+
const sleep_retention_module_bitmap_t modem_modules = sleep_retention_module_bitmap_and(inited_modules, modem_clk_dep_modules);
87+
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
88+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
8489
}
85-
return ((inited_modules & mask) == (created_modules & mask));
90+
#endif
91+
92+
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
93+
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
94+
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
8695
}
8796

8897
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)

components/esp_hw_support/lowpower/port/esp32p4/sleep_clock.c

Lines changed: 13 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -31,15 +31,21 @@ esp_err_t sleep_clock_system_retention_init(void *arg)
3131

3232
bool clock_domain_pd_allowed(void)
3333
{
34-
const uint32_t inited_modules = sleep_retention_get_inited_modules();
35-
const uint32_t created_modules = sleep_retention_get_created_modules();
36-
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
34+
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
35+
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
36+
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
3737

38-
uint32_t mask = 0;
39-
if (inited_modules & sys_clk_dep_modules) {
40-
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
38+
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
39+
40+
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
41+
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
42+
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
43+
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
4144
}
42-
return ((inited_modules & mask) == (created_modules & mask));
45+
46+
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
47+
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
48+
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
4349
}
4450

4551
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)

0 commit comments

Comments
 (0)