Merge branch 'fix/fix_32k_config_revoke_breaks_io_holding_v5.4' into 'release/v5.4'

Jiang Jiang Jian · Jiang Jiang Jian · commit 7863b3c4198a · 2025-10-11T14:12:09.000+08:00
fix(esp_system): fix ext 32k io revoking breaks sleep io holding (v5.4)

See merge request espressif/esp-idf!42496
diff --git a/components/esp_system/port/soc/esp32/clk.c b/components/esp_system/port/soc/esp32/clk.c
@@ -61,7 +61,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
      */
     int retry_32k_xtal = RTC_XTAL_CAL_RETRY;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
             /* 32k XTAL oscillator needs to be enabled and running before it can
              * be used. Hardware doesn't have a direct way of checking if the
@@ -85,13 +87,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
                     }
                     ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 150 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {
             rtc_clk_8m_enable(true, true);
         }
         rtc_clk_slow_src_set(rtc_slow_clk_src);
-        if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
+        if (revoke_32k_enable || \
+                ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) {
             rtc_clk_32k_enable(false);
             rtc_clk_32k_disable_external();
         }
diff --git a/components/esp_system/port/soc/esp32c2/clk.c b/components/esp_system/port/soc/esp32c2/clk.c
@@ -154,7 +154,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
      */
     int retry_ext_clk = 3;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
             /* external clock needs to be connected to PIN0 before it can
              * be used. Here we use rtc_clk_cal function to count
@@ -174,13 +176,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
                     }
                     ESP_EARLY_LOGW(TAG, "external clock connected to pin0 not found, switching to internal 150 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {
             rtc_clk_8m_enable(true, true);
         }
         rtc_clk_slow_src_set(rtc_slow_clk_src);
-        if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
+        if (revoke_32k_enable || \
+                ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW))) {
             rtc_clk_32k_disable_external();
         }
         if (SLOW_CLK_CAL_CYCLES > 0) {
diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c
@@ -146,7 +146,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
      */
     int retry_32k_xtal = 3;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
             /* 32k XTAL oscillator needs to be enabled and running before it can
              * be used. Hardware doesn't have a direct way of checking if the
@@ -170,13 +172,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
                     }
                     ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 150 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {
             rtc_clk_8m_enable(true, true);
         }
         rtc_clk_slow_src_set(rtc_slow_clk_src);
-        if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
+        if (revoke_32k_enable || \
+                ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) {
             rtc_clk_32k_enable(false);
             rtc_clk_32k_disable_external();
         }
diff --git a/components/esp_system/port/soc/esp32c5/clk.c b/components/esp_system/port/soc/esp32c5/clk.c
@@ -138,7 +138,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
      */
     int retry_32k_xtal = 3;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K || rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
             /* 32k XTAL oscillator needs to be enabled and running before it can
              * be used. Hardware doesn't have a direct way of checking if the
@@ -165,13 +167,16 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
                     }
                     ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         }
         rtc_clk_slow_src_set(rtc_slow_clk_src);
         // Disable unused clock sources after clock source switching is complete.
         // Regardless of the clock source selection, the internal 136K clock source will always keep on.
-        if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
+        if (revoke_32k_enable || \
+                (((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) || (old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) && \
+                 ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)))) {
             rtc_clk_32k_enable(false);
             rtc_clk_32k_disable_external();
         }
diff --git a/components/esp_system/port/soc/esp32c6/clk.c b/components/esp_system/port/soc/esp32c6/clk.c
@@ -152,7 +152,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
      */
     int retry_32k_xtal = 3;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K || rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
             /* 32k XTAL oscillator needs to be enabled and running before it can
              * be used. Hardware doesn't have a direct way of checking if the
@@ -179,6 +181,7 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
                     }
                     ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K) {
@@ -187,7 +190,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
         rtc_clk_slow_src_set(rtc_slow_clk_src);
         // Disable unused clock sources after clock source switching is complete.
         // Regardless of the clock source selection, the internal 136K clock source will always keep on.
-        if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
+        if (revoke_32k_enable || \
+                (((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) || (old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) && \
+                 ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)))) {
             rtc_clk_32k_enable(false);
             rtc_clk_32k_disable_external();
         }
diff --git a/components/esp_system/port/soc/esp32c61/clk.c b/components/esp_system/port/soc/esp32c61/clk.c
@@ -117,7 +117,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
      */
     int retry_32k_xtal = 3;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K || rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
             /* 32k XTAL oscillator needs to be enabled and running before it can
              * be used. Hardware doesn't have a direct way of checking if the
@@ -144,13 +146,16 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
                     }
                     ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         }
         rtc_clk_slow_src_set(rtc_slow_clk_src);
         // Disable unused clock sources after clock source switching is complete.
         // Regardless of the clock source selection, the internal 136K clock source will always keep on.
-        if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
+        if (revoke_32k_enable || \
+                (((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) || (old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) && \
+                 ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)))) {
             rtc_clk_32k_enable(false);
             rtc_clk_32k_disable_external();
         }
diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h2/clk.c
@@ -150,7 +150,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
      */
     int retry_32k_xtal = 3;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K || rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
             /* 32k XTAL oscillator needs to be enabled and running before it can
              * be used. Hardware doesn't have a direct way of checking if the
@@ -177,6 +179,7 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
                     }
                     ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K) {
@@ -185,7 +188,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
         rtc_clk_slow_src_set(rtc_slow_clk_src);
         // Disable unused clock sources after clock source switching is complete.
         // Regardless of the clock source selection, the internal 136K clock source will always keep on.
-        if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
+        if (revoke_32k_enable || \
+                (((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) || (old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) && \
+                 ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)))) {
             rtc_clk_32k_enable(false);
             rtc_clk_32k_disable_external();
         }
diff --git a/components/esp_system/port/soc/esp32p4/clk.c b/components/esp_system/port/soc/esp32p4/clk.c
@@ -160,7 +160,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
      */
     int retry_32k_xtal = 3;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
             /* 32k XTAL oscillator needs to be enabled and running before it can
              * be used. Hardware doesn't have a direct way of checking if the
@@ -184,6 +186,7 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
                     }
                     ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K) {
@@ -193,7 +196,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
 
         // Disable unused clock sources after clock source switching is complete.
         // Regardless of the clock source selection, the internal 136K clock source will always keep on.
-        if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
+        if (revoke_32k_enable || \
+                ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K)) {
             rtc_clk_32k_enable(false);
         }
         if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) {
diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c
@@ -149,7 +149,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
      */
     int retry_32k_xtal = RTC_XTAL_CAL_RETRY;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
             /* 32k XTAL oscillator needs to be enabled and running before it can
              * be used. Hardware doesn't have a direct way of checking if the
@@ -173,13 +175,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
                     }
                     ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 90 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {
             rtc_clk_8m_enable(true, true);
         }
         rtc_clk_slow_src_set(rtc_slow_clk_src);
-        if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
+        if (revoke_32k_enable || \
+                ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) {
             rtc_clk_32k_enable(false);
             rtc_clk_32k_disable_external();
         }
diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c
@@ -147,7 +147,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
      */
     int retry_32k_xtal = RTC_XTAL_CAL_RETRY;
 
+    soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();
     do {
+        bool revoke_32k_enable = false;
         if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
             /* 32k XTAL oscillator needs to be enabled and running before it can
              * be used. Hardware doesn't have a direct way of checking if the
@@ -171,13 +173,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
                     }
                     ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 150 kHz oscillator");
                     rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;
+                    revoke_32k_enable = true;
                 }
             }
         } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {
             rtc_clk_8m_enable(true, true);
         }
         rtc_clk_slow_src_set(rtc_slow_clk_src);
-        if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
+        if (revoke_32k_enable || \
+                ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) {
             rtc_clk_32k_enable(false);
             rtc_clk_32k_disable_external();
         }

Original file line number	Diff line number	Diff line change
`@@ -61,7 +61,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`61`	`61`	`*/`
`62`	`62`	`int retry_32k_xtal = RTC_XTAL_CAL_RETRY;`
`63`	`63`
	`64`	`+ soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();`
`64`	`65`	`do {`
	`66`	`+ bool revoke_32k_enable = false;`
`65`	`67`	`if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
`66`	`68`	`/* 32k XTAL oscillator needs to be enabled and running before it can`
`67`	`69`	`* be used. Hardware doesn't have a direct way of checking if the`
`@@ -85,13 +87,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`85`	`87`	`}`
`86`	`88`	`ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 150 kHz oscillator");`
`87`	`89`	`rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;`
	`90`	`+ revoke_32k_enable = true;`
`88`	`91`	`}`
`89`	`92`	`}`
`90`	`93`	`} else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {`
`91`	`94`	`rtc_clk_8m_enable(true, true);`
`92`	`95`	`}`
`93`	`96`	`rtc_clk_slow_src_set(rtc_slow_clk_src);`
`94`		`- if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
	`97`	`+ if (revoke_32k_enable \|\| \`
	`98`	`+ ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) {`
`95`	`99`	`rtc_clk_32k_enable(false);`
`96`	`100`	`rtc_clk_32k_disable_external();`
`97`	`101`	`}`
Original file line number	Diff line number	Diff line change
`@@ -154,7 +154,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`154`	`154`	`*/`
`155`	`155`	`int retry_ext_clk = 3;`
`156`	`156`
	`157`	`+ soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();`
`157`	`158`	`do {`
	`159`	`+ bool revoke_32k_enable = false;`
`158`	`160`	`if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {`
`159`	`161`	`/* external clock needs to be connected to PIN0 before it can`
`160`	`162`	`* be used. Here we use rtc_clk_cal function to count`
`@@ -174,13 +176,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`174`	`176`	`}`
`175`	`177`	`ESP_EARLY_LOGW(TAG, "external clock connected to pin0 not found, switching to internal 150 kHz oscillator");`
`176`	`178`	`rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;`
	`179`	`+ revoke_32k_enable = true;`
`177`	`180`	`}`
`178`	`181`	`}`
`179`	`182`	`} else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {`
`180`	`183`	`rtc_clk_8m_enable(true, true);`
`181`	`184`	`}`
`182`	`185`	`rtc_clk_slow_src_set(rtc_slow_clk_src);`
`183`		`- if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {`
	`186`	`+ if (revoke_32k_enable \|\| \`
	`187`	`+ ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW))) {`
`184`	`188`	`rtc_clk_32k_disable_external();`
`185`	`189`	`}`
`186`	`190`	`if (SLOW_CLK_CAL_CYCLES > 0) {`
Original file line number	Diff line number	Diff line change
`@@ -146,7 +146,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`146`	`146`	`*/`
`147`	`147`	`int retry_32k_xtal = 3;`
`148`	`148`
	`149`	`+ soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();`
`149`	`150`	`do {`
	`151`	`+ bool revoke_32k_enable = false;`
`150`	`152`	`if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
`151`	`153`	`/* 32k XTAL oscillator needs to be enabled and running before it can`
`152`	`154`	`* be used. Hardware doesn't have a direct way of checking if the`
`@@ -170,13 +172,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`170`	`172`	`}`
`171`	`173`	`ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 150 kHz oscillator");`
`172`	`174`	`rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;`
	`175`	`+ revoke_32k_enable = true;`
`173`	`176`	`}`
`174`	`177`	`}`
`175`	`178`	`} else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {`
`176`	`179`	`rtc_clk_8m_enable(true, true);`
`177`	`180`	`}`
`178`	`181`	`rtc_clk_slow_src_set(rtc_slow_clk_src);`
`179`		`- if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
	`182`	`+ if (revoke_32k_enable \|\| \`
	`183`	`+ ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) {`
`180`	`184`	`rtc_clk_32k_enable(false);`
`181`	`185`	`rtc_clk_32k_disable_external();`
`182`	`186`	`}`
Original file line number	Diff line number	Diff line change
`@@ -138,7 +138,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)`
`138`	`138`	`*/`
`139`	`139`	`int retry_32k_xtal = 3;`
`140`	`140`
	`141`	`+ soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();`
`141`	`142`	`do {`
	`143`	`+ bool revoke_32k_enable = false;`
`142`	`144`	`if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K \|\| rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {`
`143`	`145`	`/* 32k XTAL oscillator needs to be enabled and running before it can`
`144`	`146`	`* be used. Hardware doesn't have a direct way of checking if the`
`@@ -165,13 +167,16 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)`
`165`	`167`	`}`
`166`	`168`	`ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator");`
`167`	`169`	`rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;`
	`170`	`+ revoke_32k_enable = true;`
`168`	`171`	`}`
`169`	`172`	`}`
`170`	`173`	`}`
`171`	`174`	`rtc_clk_slow_src_set(rtc_slow_clk_src);`
`172`	`175`	`// Disable unused clock sources after clock source switching is complete.`
`173`	`176`	`// Regardless of the clock source selection, the internal 136K clock source will always keep on.`
`174`		`- if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {`
	`177`	`+ if (revoke_32k_enable \|\| \`
	`178`	`+ (((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) \|\| (old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) && \`
	`179`	`+ ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)))) {`
`175`	`180`	`rtc_clk_32k_enable(false);`
`176`	`181`	`rtc_clk_32k_disable_external();`
`177`	`182`	`}`
Original file line number	Diff line number	Diff line change
`@@ -117,7 +117,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)`
`117`	`117`	`*/`
`118`	`118`	`int retry_32k_xtal = 3;`
`119`	`119`
	`120`	`+ soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();`
`120`	`121`	`do {`
	`122`	`+ bool revoke_32k_enable = false;`
`121`	`123`	`if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K \|\| rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {`
`122`	`124`	`/* 32k XTAL oscillator needs to be enabled and running before it can`
`123`	`125`	`* be used. Hardware doesn't have a direct way of checking if the`
`@@ -144,13 +146,16 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)`
`144`	`146`	`}`
`145`	`147`	`ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator");`
`146`	`148`	`rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;`
	`149`	`+ revoke_32k_enable = true;`
`147`	`150`	`}`
`148`	`151`	`}`
`149`	`152`	`}`
`150`	`153`	`rtc_clk_slow_src_set(rtc_slow_clk_src);`
`151`	`154`	`// Disable unused clock sources after clock source switching is complete.`
`152`	`155`	`// Regardless of the clock source selection, the internal 136K clock source will always keep on.`
`153`		`- if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {`
	`156`	`+ if (revoke_32k_enable \|\| \`
	`157`	`+ (((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) \|\| (old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) && \`
	`158`	`+ ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)))) {`
`154`	`159`	`rtc_clk_32k_enable(false);`
`155`	`160`	`rtc_clk_32k_disable_external();`
`156`	`161`	`}`
Original file line number	Diff line number	Diff line change
`@@ -160,7 +160,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)`
`160`	`160`	`*/`
`161`	`161`	`int retry_32k_xtal = 3;`
`162`	`162`
	`163`	`+ soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();`
`163`	`164`	`do {`
	`165`	`+ bool revoke_32k_enable = false;`
`164`	`166`	`if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
`165`	`167`	`/* 32k XTAL oscillator needs to be enabled and running before it can`
`166`	`168`	`* be used. Hardware doesn't have a direct way of checking if the`
`@@ -184,6 +186,7 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)`
`184`	`186`	`}`
`185`	`187`	`ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator");`
`186`	`188`	`rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;`
	`189`	`+ revoke_32k_enable = true;`
`187`	`190`	`}`
`188`	`191`	`}`
`189`	`192`	`} else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K) {`
`@@ -193,7 +196,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)`
`193`	`196`
`194`	`197`	`// Disable unused clock sources after clock source switching is complete.`
`195`	`198`	`// Regardless of the clock source selection, the internal 136K clock source will always keep on.`
`196`		`- if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
	`199`	`+ if (revoke_32k_enable \|\| \`
	`200`	`+ ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K)) {`
`197`	`201`	`rtc_clk_32k_enable(false);`
`198`	`202`	`}`
`199`	`203`	`if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) {`
Original file line number	Diff line number	Diff line change
`@@ -149,7 +149,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`149`	`149`	`*/`
`150`	`150`	`int retry_32k_xtal = RTC_XTAL_CAL_RETRY;`
`151`	`151`
	`152`	`+ soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();`
`152`	`153`	`do {`
	`154`	`+ bool revoke_32k_enable = false;`
`153`	`155`	`if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
`154`	`156`	`/* 32k XTAL oscillator needs to be enabled and running before it can`
`155`	`157`	`* be used. Hardware doesn't have a direct way of checking if the`
`@@ -173,13 +175,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`173`	`175`	`}`
`174`	`176`	`ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 90 kHz oscillator");`
`175`	`177`	`rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;`
	`178`	`+ revoke_32k_enable = true;`
`176`	`179`	`}`
`177`	`180`	`}`
`178`	`181`	`} else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {`
`179`	`182`	`rtc_clk_8m_enable(true, true);`
`180`	`183`	`}`
`181`	`184`	`rtc_clk_slow_src_set(rtc_slow_clk_src);`
`182`		`- if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
	`185`	`+ if (revoke_32k_enable \|\| \`
	`186`	`+ ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) {`
`183`	`187`	`rtc_clk_32k_enable(false);`
`184`	`188`	`rtc_clk_32k_disable_external();`
`185`	`189`	`}`
Original file line number	Diff line number	Diff line change
`@@ -147,7 +147,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`147`	`147`	`*/`
`148`	`148`	`int retry_32k_xtal = RTC_XTAL_CAL_RETRY;`
`149`	`149`
	`150`	`+ soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get();`
`150`	`151`	`do {`
	`152`	`+ bool revoke_32k_enable = false;`
`151`	`153`	`if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
`152`	`154`	`/* 32k XTAL oscillator needs to be enabled and running before it can`
`153`	`155`	`* be used. Hardware doesn't have a direct way of checking if the`
`@@ -171,13 +173,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)`
`171`	`173`	`}`
`172`	`174`	`ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 150 kHz oscillator");`
`173`	`175`	`rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW;`
	`176`	`+ revoke_32k_enable = true;`
`174`	`177`	`}`
`175`	`178`	`}`
`176`	`179`	`} else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {`
`177`	`180`	`rtc_clk_8m_enable(true, true);`
`178`	`181`	`}`
`179`	`182`	`rtc_clk_slow_src_set(rtc_slow_clk_src);`
`180`		`- if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {`
	`183`	`+ if (revoke_32k_enable \|\| \`
	`184`	`+ ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) {`
`181`	`185`	`rtc_clk_32k_enable(false);`
`182`	`186`	`rtc_clk_32k_disable_external();`
`183`	`187`	`}`