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Merge branch 'espressif:release/v5.4' into release/v5.4
2 parents 029aa09 + c94fdcd commit 1c4c5fe

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.github/workflows/docker.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ jobs:
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# Disable the job in forks
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if: ${{ github.repository_owner == 'espressif' }}
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24-
runs-on: ubuntu-latest
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runs-on: ubuntu-24.04-X64-large
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steps:
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# Depending on the branch/tag, set CLONE_BRANCH_OR_TAG variable (used in the Dockerfile
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# as a build arg) and TAG_NAME (used when tagging the image).

.gitlab/ci/common.yml

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@@ -40,7 +40,7 @@ variables:
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GIT_FETCH_EXTRA_FLAGS: "--no-recurse-submodules --prune --prune-tags"
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# we're using .cache folder for caches
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GIT_CLEAN_FLAGS: -ffdx -e .cache/
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LATEST_GIT_TAG: v5.4.2
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LATEST_GIT_TAG: v5.4.3
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SUBMODULE_FETCH_TOOL: "tools/ci/ci_fetch_submodule.py"
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# by default we will fetch all submodules

.gitmodules

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@@ -51,6 +51,7 @@
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url = ../../DaveGamble/cJSON.git
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sbom-version = 1.7.19
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sbom-cpe = cpe:2.3:a:cjson_project:cjson:{}:*:*:*:*:*:*:*
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sbom-cpe = cpe:2.3:a:davegamble:cjson:{}:*:*:*:*:*:*:*
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sbom-supplier = Person: Dave Gamble
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sbom-url = https://github.com/DaveGamble/cJSON
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sbom-description = Ultralightweight JSON parser in ANSI C

components/bootloader/Kconfig.projbuild

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1136,8 +1136,9 @@ menu "Security features"
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11371137
config SECURE_FLASH_PSEUDO_ROUND_FUNC
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bool "Permanently enable XTS-AES's pseudo rounds function"
1139-
default y
1140-
depends on SECURE_FLASH_ENCRYPTION_MODE_RELEASE && SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
1139+
default y if SECURE_FLASH_ENCRYPTION_MODE_RELEASE
1140+
default n
1141+
depends on SECURE_FLASH_ENC_ENABLED && SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
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help
11421143
If set (default), the bootloader will permanently enable the XTS-AES peripheral's pseudo rounds function.
11431144
Note: Enabling this config would burn an efuse.

components/bootloader_support/include/esp_flash_encrypt.h

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Original file line numberDiff line numberDiff line change
@@ -215,6 +215,10 @@ bool esp_flash_encryption_cfg_verify_release_mode(void);
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* It burns:
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* - "disable encrypt in dl mode"
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* - set FLASH_CRYPT_CNT efuse to max
218+
*
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* In case of the targets that support the XTS-AES peripheral's pseudo rounds function,
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* this API would configure the pseudo rounds level efuse bit to level low if the efuse bit
221+
* is not set already.
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*/
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void esp_flash_encryption_set_release_mode(void);
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components/bootloader_support/src/esp32h2/flash_encryption_secure_features.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
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3737
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
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39-
#if defined(CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE) && defined(SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND)
39+
#if CONFIG_SECURE_FLASH_PSEUDO_ROUND_FUNC
4040
if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
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ESP_LOGI(TAG, "Enable XTS-AES pseudo rounds function...");
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uint8_t xts_pseudo_level = CONFIG_SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH;

components/bootloader_support/src/flash_encrypt.c

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Original file line numberDiff line numberDiff line change
@@ -212,8 +212,13 @@ void esp_flash_encryption_set_release_mode(void)
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#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
214214
if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
215-
uint8_t xts_pseudo_level = ESP_XTS_AES_PSEUDO_ROUNDS_LOW;
216-
esp_efuse_write_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
215+
uint8_t xts_pseudo_level = 0;
216+
esp_efuse_read_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
217+
218+
if (xts_pseudo_level == ESP_XTS_AES_PSEUDO_ROUNDS_DISABLE) {
219+
xts_pseudo_level = ESP_XTS_AES_PSEUDO_ROUNDS_LOW;
220+
esp_efuse_write_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
221+
}
217222
}
218223
#endif
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components/bt/controller/esp32/bt.c

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Original file line numberDiff line numberDiff line change
@@ -1972,6 +1972,7 @@ esp_err_t esp_bt_controller_disable(void)
19721972
#endif
19731973

19741974
esp_phy_disable(PHY_MODEM_BT);
1975+
s_time_phy_rf_just_enabled = 0;
19751976
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
19761977
esp_unregister_shutdown_handler(bt_shutdown);
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components/esp-tls/esp_tls.h

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -396,10 +396,12 @@ esp_tls_t *esp_tls_conn_http_new(const char *url, const esp_tls_cfg_t *cfg) __at
396396
* @param[in] hostname Hostname of the host.
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* @param[in] hostlen Length of hostname.
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* @param[in] port Port number of the host.
399-
* @param[in] cfg TLS configuration as esp_tls_cfg_t. If you wish to open
400-
* non-TLS connection, keep this NULL. For TLS connection,
401-
* a pass pointer to esp_tls_cfg_t. At a minimum, this
402-
* structure should be zero-initialized.
399+
* @param[in] cfg TLS configuration as esp_tls_cfg_t. For a TLS
400+
* connection, pass a pointer to a esp_tls_cfg_t. For a
401+
* plain TCP connection, pass a pointer to a
402+
* esp_tls_cfg_t with is_plain_tcp set to true. At a
403+
* minimum, this pointer should be not NULL and the
404+
* structure should be zero-initialized
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* @param[in] tls Pointer to esp-tls as esp-tls handle.
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*
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* @return

components/esp-tls/esp_tls_mbedtls.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -239,7 +239,7 @@ int esp_mbedtls_handshake(esp_tls_t *tls, const esp_tls_cfg_t *cfg)
239239
ret = esp_mbedtls_dynamic_set_rx_buf_static(&tls->ssl);
240240
if (ret != 0) {
241241
ESP_LOGE(TAG, "esp_mbedtls_dynamic_set_rx_buf_static returned -0x%04X", -ret);
242-
return ret;
242+
return -1;
243243
}
244244
}
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#endif

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