Merge branch 'fix/esp32c5_rng_random_disable_v5.3' into 'release/v5.3'

fix(bootloader): update random disable api for ESP32-C5/C6 (v5.3)

See merge request espressif/esp-idf!32761

Author: jack0c

components/bootloader_support/src/bootloader_random_esp32c6.c

@@ -88,9 +88,6 @@ void bootloader_random_disable(void)
     REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC1_ENCAL_REF_ADDR, 0);
     REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC2_ENCAL_REF_ADDR, 0);
 
-    // Revert PMU_RF_PWC_REG to it's initial value
-    CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
-
     // disable ADC_CTRL_CLK (SAR ADC function clock)
     REG_WRITE(PCR_SARADC_CLKM_CONF_REG, 0x00404000);