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This code example creates a simple quadrature decoder on the PIC18F16Q40 device. It utilizes 2 of the Configurable Logic Cells (CLCs) and TMR1/2/3 to decode the quadrature output of the rotary encoder. A UART interface is also used for a serial readout.
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This code example creates a simple quadrature decoder on the PIC18F16Q40 device. It utilizes two of the Configurable Logic Cells (CLCs) and TMR1/2/3 to decode the quadrature output of the rotary encoder. A UART interface is also used for a serial readout.
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## Software Used
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The encoder used is a mechanical encoder with 24 pulses-per-revolution (PPR). High PPR encoders provide more precise positioning information. However, this example uses it for user interfacing, where the precision of a higher PPR encoder was not needed.
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To connect the encoder to the microcontroller, the manufacturer for this encoder (Bourns Inc.) recommends pulling up the outputs of the encoders to V<sub>DD</sub> and filtering with an RC filter, an example of which is shown in Figure 3. (See the [Manufacturer's Datasheet](https://www.bourns.com/docs/Product-Datasheets/PEC12R.pdf) for up-to date information.)
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To connect the encoder to the microcontroller, the manufacturer for this encoder (Bourns Inc.) recommends pulling up the outputs of the encoders to V<sub>DD</sub> and filtering with an RC filter, an example of which is shown in Figure 3. (See the [Manufacturer's Data Sheet](https://www.bourns.com/docs/Product-Datasheets/PEC12R.pdf) for up-to date information.)
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*Figure 3 - Implemented Circuit*
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10k resistors were added in series with the RC filter to reduce the current through the ESD diodes from the filter capacitor if power is lost while the capacitors are fully charged. Since the encoder signal is digital, the added resistance should have a minimial effect on the performance of the encoders.
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If the power is lost while the filter capacitors are fully charged, the 10k resistors added in series with the RC filter will reduce the current through the ESD diodes from the filter capacitor. The added resistance should have a minimial effect on the performance of the encoders.
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Note: Damage may occur if too much current is passed through the ESD diodes.
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## Operation
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This example has 2 outputs - a UART output and an LED bar graph display output.
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This example has two outputs - a UART output and an LED bar graph display output.
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The UART output prints the net change in encoder value (over a period of 1s) and the current volume of the program at 115,200 baud.
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The LED graph display output uses a 10-position LED bar graph to display the current volume.
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### UART Output
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The UART output is connected through the programmer to the PC. [MPLAB Data Visualizer](https://www.microchip.com/mplab/mplab-data-visualizer) can be used to visualize the serial output. After plugging in the board, select the programmer's COM port, but do not connect to it. In the bottom left corner of the Data Visualizer Window/Tab, enter the following settings.
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The UART output is connected through the programmer to the PC. [MPLAB Data Visualizer](https://www.microchip.com/mplab/mplab-data-visualizer) can be used to visualize the serial output. After plugging in the board, select the programmer's COM port, but do not connect to it. In the bottom left corner of the Data Visualizer Window, enter the following settings.
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* Baud Rate: 115,200
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* Char Length: 8 bits
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* Parity: None
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* Stop Bits: 1 bit
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After setting these options, press apply, then connect to the COM port. In the terminal window, set the display to 8-bit ASCII, the source to the connected COM port, and wait. Within a few seconds, text should start printing to the screen.
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After setting these options, press apply, then connect to the COM port. In the terminal window, set the display to 8-bit ASCII, the source to the connected COM port, and within a few seconds, text should start printing to the screen.
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*Figure 5 - Demonstration of the LED Bar Graph Output*
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Note: Due to differences in encoder parameters, some of the constants may have to be tweaked to find the right balance of speed and accuracy with the Volume Control.
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Note: Due to differences in encoder parameters, some of the constants may have to be tweaked to find the right balance of speed and accuracy with the volume control.
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#### Control options
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* Linear - Each pulse from the encoder is counted as 1.
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* Threshold - After exceeding a threshold, in this case 3 pulses, each pulse is worth the same as a "1 rotation pulse".
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*1 Rotation - Each pulse is worth approximately the value required for a single rotation to go from 0 to 100.
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* Linear - Each pulse from the encoder is counted as one
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* Threshold - After exceeding a threshold, in this case three pulses, each pulse is worth the same as a "one rotation pulse"
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*One Rotation - Each pulse is worth approximately the value required for a single rotation to go from 0 to 100
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## Theory of Operation
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The quadrature decoder takes 2 inputs, A and B, that are out-of-phase by 90 degrees. One of the inputs is considered a reference waveform, for which the phase of the other is measured against. The other waveform determines the direction of the encoder based on if it leads or lags the reference, as shown in Figure 6.
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The quadrature decoder takes two inputs, A and B, that are out-of-phase by 90 degrees. One of the inputs is considered a reference waveform, for which the phase of the other is measured against. The other waveform determines the direction of the encoder based on if it leads or lags the reference, as shown in Figure 6.
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*Figure 7 - CLC Logic Diagram*
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There are 2 CLCs used in this project, with the only difference being that A and B are swapped between the two. Swapping A and B causes one of the CLCs to see the input lag while the other sees the input lead. In a JK flip-flop, J must be high when the clock is rising in order to set the output high. The only flip-flop that will be set is the configuration where the input leads the clock signal, as shown in Figures 8 and 9.
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There are two CLCs used in this project, with the only difference being that A and B are swapped. Swapping A and B causes one of the CLCs to see the input lag while the other sees the input lead. In a JK flip-flop, J must be high when the clock is rising to set the output high. The only flip-flop that will be set is the configuration where the input leads the clock signal, as shown in Figures 8 and 9.
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*Figure 9 - Output of the CLCs (with A and B switched)*
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Both images were taken with a test signal of ~30Hz. Between runs, the wires to A and B were switched, causing 1 CLC to become active while the other becomes inactive. The output of the CLCs is internally routed to either TMR1 or TMR3. The rising edge of the output causes the timer to count. Normally the TMR1 or TMR3 overflow is used as an interrupt, however since the pulse count is unknown and is likely to be relatively small, it makes more sense to use a timer (such as TMR2) as an interrupt to poll the number of pulses in each.
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Both images were taken with a test signal of ~30 Hz. Between runs, the wires to A and B were switched, causing one CLC to become active while the other becomes inactive. The output of the CLCs is internally routed to either TMR1 or TMR3. The rising edge of the output causes the timer to count. Normally, the TMR1 or TMR3 overflow is used as an interrupt, however since the pulse count is unknown and is likely to be relatively small, it makes more sense to use a timer (such as TMR2) as an interrupt to poll the number of pulses in each timer.
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The simple way to get the number of pulses in TMR1/3 is to stop the timer, read the value, reset the counter back to 0, and start it again. However, if a pulse occurs, then it will be missed by the timer. A better approach is to use the relative difference between each polling event. If the encoder was spun in the same direction between each polling event, then the difference in values (current to old) will be 0, while the other will change. If the direction of rotation was changed between polling events, then both counters will have non-zero differences.
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To prevent invalid reads, this example uses TMR1 and TMR3 in 16-bit read mode to buffer the high byte of the timercounter when the low byte is read. This mode of operation prevents an increment that could occur after reading the 1st byte from affecting the high byte, as shown in Figure 10.
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To prevent invalid reads, this example uses TMR1 and TMR3 in 16-bit Read mode to buffer the high byte of the timer-counter when the low byte is read. This mode of operation prevents an increment that could occur after reading the first byte from affecting the high byte, as shown in Figure 10.
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