|
1 | | -# wokwi lookup table generator |
| 1 | +# Wokwi lookup table (LUT) generator |
2 | 2 |
|
3 | | -This git repository contains a **generator for wokwi schematics that implement lookup tables in conjunctive normal form (CNF)**, i.e. with AND and OR gates. (Detailed explanation what this means and how it is done will follow.) |
| 3 | +## What is this all about? |
4 | 4 |
|
5 | | -This project is written in Python3. |
| 5 | +This git repository contains a **generator for [wokwi](https://wokwi.com) schematics that implement lookup tables** (defined by a truth table and some more meta data in a JSON file, see the [./demos](demos) subdirectory. |
| 6 | + |
| 7 | +But what is wokwi? Wokwi is a free, browser-based simulator that supports different Arduino and several other boards and components (such as LEDs, buttons, switches, sensors, ...). It also has been used during [#TinyTapeout](https://tinytapeout.com) in August/September 2022 - an educational project that "aims to make it easier and cheaper than ever to get your digital designs manufactured on a real chip". So oversimplified you can also easily simulate and generate ASIC designs - from a very simple boolean algebra design description (truth tables). |
| 8 | + |
| 9 | +How does this work internally? See a separate section below the "Usage" section |
| 10 | + |
| 11 | +Language: This project is written in Python3. |
6 | 12 |
|
7 | 13 | > **Note** |
8 | 14 | > This project is work in progress. It is known that not all designs are generated correctly, so there are still some bugs. |
9 | 15 |
|
10 | 16 |
|
| 17 | +## Contribution |
| 18 | + |
11 | 19 | Feel free to contribute, open issues, [work on existing issues](https://github.com/maehw/wokwi-lookup-table-generator/issues), etc. |
12 | 20 | To contribute to the project, fork this GitHub repository and create a pull request. Detailed instructions can be found at https://docs.github.com/en/get-started/quickstart/contributing-to-projects. I'll be happy to review the code diff and eventually merge it into the original repo here. |
13 | 21 |
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@@ -104,18 +112,6 @@ The author says: |
104 | 112 | > The Quine McCluskey algorithm currently does not give deterministic results. An issue has been opened [here](https://github.com/tpircher/quine-mccluskey/issues/8). |
105 | 113 |
|
106 | 114 |
|
107 | | -## TODOs |
108 | | - |
109 | | -- document limitations |
110 | | -- add assertions |
111 | | -- use a more object-oriented approach for everything |
112 | | -- implement interactive mode |
113 | | -- perform sanity checks to see if all parts are connected, |
114 | | - some may be unused due to bugs (probably rounding) |
115 | | - |
116 | | -Some TODOs or ideas are already visible in the [issues tab](https://github.com/maehw/wokwi-lookup-table-generator/issues). Especially have a look at the issues labeled `good first issue` and `help wanted`. |
117 | | - |
118 | | - |
119 | 115 | ## Demo designs |
120 | 116 |
|
121 | 117 | For descriptions of the demo designs, inspect their JSON files in the `./demos` subdirectory of this repo. |
@@ -159,3 +155,72 @@ The unused input pin of a 2 input *OR* gate can |
159 | 155 |
|
160 | 156 | In the past I had used the first approach which takes more effort (adding a GND and a VCC block and adding connections to it). |
161 | 157 | I've switch to the second approach as this can be realized by adding a short wire connection from one inport to the other - and it's generic for AND and OR gates. |
| 158 | + |
| 159 | + |
| 160 | +## How does this work internally? |
| 161 | + |
| 162 | +The generator is fed with a truth table describing the boolean algebra to be implemented. |
| 163 | + |
| 164 | +The generator implements the lookup tables (truth tables) in conjunctive normal form (CNF)**, i.e. with AND and OR gates. |
| 165 | + |
| 166 | +Let's have a look at the example of a 2-bit half adder: "Logic that adds two numbers and produces a sum bit (S) and carry bit (C)." |
| 167 | + |
| 168 | +The truth table looks as follows (`a` and `b` are inputs, `S` (sum) and `C` (carry) are outputs): |
| 169 | + |
| 170 | +| a | b | S | C | |
| 171 | +|---|---|---|---| |
| 172 | +| 0 | 0 | 0 | 0 | |
| 173 | +| 0 | 1 | 1 | 0 | |
| 174 | +| 1 | 0 | 1 | 0 | |
| 175 | +| 1 | 1 | 0 | 1 | |
| 176 | + |
| 177 | +This can also be written as equations with functions of boolean algebra (using so called minterms): |
| 178 | + |
| 179 | +``` |
| 180 | +S = ~a*b + a*~b |
| 181 | +C = a*b |
| 182 | +``` |
| 183 | + |
| 184 | +where |
| 185 | + |
| 186 | +* `~` represents inversion (a `NOT` gate), |
| 187 | +* `*` represents a logical `AND`(an `AND` gate), |
| 188 | +* `+` represents a logical `OR` an `OR` gate). |
| 189 | + |
| 190 | +That also explains the term "sum of products" (SOP). |
| 191 | + |
| 192 | + |
| 193 | +For better readability the `*` are often omitted, leaving us with: |
| 194 | + |
| 195 | +``` |
| 196 | +S = ~ab + a~b |
| 197 | +C = ab |
| 198 | +``` |
| 199 | + |
| 200 | +The conversion from truth table to boolean algebra is done with a [Python implementation of the Quine McCluskey algorithm](https://pypi.org/project/quine-mccluskey/). Please note that these optimizations are not really required as the ASIC toolchain will take care of optimization (and know the kind of hardware cells being available on the target hardware), but it helps to understand own digital designs and their implementation. |
| 201 | + |
| 202 | +The algorithm basically performs the following steps (be careful as this concept image does not match the previously used example): |
| 203 | + |
| 204 | + |
| 205 | + |
| 206 | +* Insert buffers for the inputs and `NOT` gates for the inverted inputs (green step) |
| 207 | +* Insert `AND` gates and connect pairs of inputs to those `AND` gates (make products of two multiplicands; first yellow step) |
| 208 | +* Insert more `AND` gates and connect them so that a single product ends with one final `AND` gate to get a summand for the additional stage (second yellow step) |
| 209 | +* Insert `OR` gates and connect pairs of inputs to those `OR` gates (make sums of two summands; first blue step) |
| 210 | +* Insert more `OR` gates and connect them so that a single sum ends with one final `OR` gate to get the final output for the boolean algebraic function |
| 211 | + |
| 212 | + |
| 213 | +Further read: [Département d'informatique et de recherche opérationnelle - Université de Montréal: LOGIC SYNTHESIS AND TWO LEVEL LOGIC OPTIMIZATION](http://www.iro.umontreal.ca/~dift6221/demicheli4/twolevel1.4.ps.pdf) |
| 214 | + |
| 215 | + |
| 216 | +## TODOs |
| 217 | + |
| 218 | +- document limitations |
| 219 | +- add assertions |
| 220 | +- use a more object-oriented approach for everything |
| 221 | +- implement interactive mode |
| 222 | +- perform sanity checks to see if all parts are connected, |
| 223 | + some may be unused due to bugs (probably rounding) |
| 224 | + |
| 225 | +Some TODOs or ideas are already visible in the [issues tab](https://github.com/maehw/wokwi-lookup-table-generator/issues). Especially have a look at the issues labeled `good first issue` and `help wanted`. |
| 226 | + |
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