Update docs on adding new chip support. Regen yaml

Author: MabezDev

README.md

@@ -10,7 +10,40 @@ $ target-gen elf target/$(RUST_TARGET)/release/esp-flashloader output/esp32.yaml
 ```
 
 Example for the updating the `esp32c3` flash algorithm.
+
 ```bash
 $ cargo build --release --features esp32c3 --target riscv32imc-unknown-none-elf
 $ target-gen elf target/riscv32imc-unknown-none-elf/release/esp-flashloader output/esp32.yaml --update --name esp32c3-flashloader
-```
+```
+
+## Chip support
+
+|name   |supported|
+|-------|---------|
+|esp32c3|   Y     |
+
+## Adding new chips
+
+1. Add a feature for the chip inside `Cargo.toml`
+2. Add the ROM API linker script inside the `ld` directory.
+3. Inside the ROM API linker script, add a memory section detailing where the program will be loaded.
+    ```c
+    MEMORY {
+        /* Start 64k into the RAM region */
+        IRAM : ORIGIN = 0x40390000, LENGTH = 0x40000
+    }
+    ```
+    It's important to note that the algorithm cannot be loaded at the start of RAM, because probe-rs has a header it loads prior to the algo hence the 64K offset.
+4. Add the following snippet to the bottom of the `main()` function inside `build.rs`, adapting it for the new chip name.
+    ```rust
+    #[cfg(feature = "esp32c3")]
+    {
+        fs::copy("ld/esp32c3.x", out_dir.join("esp32c3.x")).unwrap();
+        println!("cargo:rerun-if-changed=ld/esp32c3.x");
+        println!("cargo:rustc-link-arg=-Tld/esp32c3.x");
+    }
+    ```
+5. Follow the instructions above for building
+6. Use `target-gen` _without_ the `update` flag to generate a new yaml algorithm.
+7. merge the new flash algorithm into the the main `esp32.yaml`
+8. Upstream the new updates to probe-rs.

build.rs

@@ -14,4 +14,4 @@ fn main() {
         println!("cargo:rerun-if-changed=ld/esp32c3.x");
         println!("cargo:rustc-link-arg=-Tld/esp32c3.x");
     }
-}
+}

build.sh

@@ -1,8 +1,8 @@
 ---
-name: "esp32"
+name: esp32
 manufacturer: ~
 variants:
-  - name: "esp32c3"
+  - name: esp32c3
     part: ~
     cores:
       - name: main
@@ -12,51 +12,49 @@ variants:
     memory_map:
       - Nvm:
           range:
-            start: 0x0
-            end: 0x800000
+            start: 0
+            end: 8388608
           is_boot_memory: true
-          cores: 
+          cores:
             - main
-      - Ram: # Instruction bus access
+      - Ram:
           range:
-            start: 0x40380000
-            end: 0x403E0000
+            start: 1077411840
+            end: 1077805056
           is_boot_memory: false
-          cores: 
+          cores:
             - main
-      - Ram: # Data bus access
+      - Ram:
           range:
-            start: 0x3FC80000
-            end: 0x3FC90000
+            start: 1070071808
+            end: 1070137344
           is_boot_memory: false
-          cores: 
+          cores:
             - main
     flash_algorithms:
       - esp32c3-flashloader
 flash_algorithms:
-  - esp-flashloader:
-    name: esp32c3-flashloader
-    cores: 
-      - main
-    description: "A flash loader for the esp32c3."
+  - name: esp32c3-flashloader
+    description: A flash loader for the esp32c3.
     default: true
     instructions: QREGxjcFOUADRQUHGcEBRS2glwDH/+eAoHCBRZcAx//ngIAUlwDH/+eAwBEZ5QFFtwU5QAVGI4jFBrJAQQGCgDGBFwPH/2cAYw4XA8f/ZwBjDRN3NgABxxMFoAqCgK6GsoU2hhcDx/9nAIMMAUWCgAAAAAA=
-    pc_init: 1
-    pc_uninit: 109
-    pc_program_page: 83
-    pc_erase_sector: 65
-    pc_erase_all: 75
+    load_address: 1077477376
+    pc_init: 0
+    pc_uninit: 108
+    pc_program_page: 82
+    pc_erase_sector: 64
+    pc_erase_all: 74
     data_section_offset: 116
-    load_address: 0x40390000
     flash_properties:
       address_range:
-        start: 0x0
-        end: 0x800000
+        start: 0
+        end: 67108864
       page_size: 2048
       erased_byte_value: 255
       program_page_timeout: 1000
       erase_sector_timeout: 2000
       sectors:
         - size: 4096
           address: 0
-
+    cores:
+      - main

output/esp32.yaml

@@ -73,15 +73,12 @@ extern "C" {
     fn esp_rom_spiflash_erase_chip() -> i32;
     fn esp_rom_spiflash_erase_block(block_number: u32) -> i32;
     fn esp_rom_spiflash_erase_sector(sector_number: u32) -> i32;
-
     /// address (4 byte alignment), data, length
     fn esp_rom_spiflash_write(dest_addr: u32, data: *const u8, len: u32) -> i32;
     /// address (4 byte alignment), data, length
     fn esp_rom_spiflash_read(src_addr: u32, data: *const u32, len: u32) -> i32;
-
     fn esp_rom_spiflash_unlock() -> i32;
     // fn esp_rom_spiflash_lock(); // can't find in idf defs?
-
     fn esp_rom_spiflash_attach(config: u32, legacy: bool);
 
     fn uart_tx_one_char(byte: u8);
@@ -169,7 +166,7 @@ pub static FlashDevice: FlashDeviceDescription = FlashDeviceDescription {
     dev_name: [0u8; 128],
     dev_type: 5,
     dev_addr: 0x0,
-    device_size: 0x4_000_000, /* set to max of 64MB */
+    device_size: u32::MAX, /* Set to max, is limited by NVM size */
     page_size: 2048,
     _reserved: 0,
     empty: 0xFF,