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arch-arm: Disassemble operands to LDP/STP instructions
ldp/stp are split into uops which include the src & dest for each reg, but tarmac trace only shows the ops and not the uops. This is annoying because ldp/stp is extremely common (eg for function entry/exit). Change-Id: Ib88dfbfff887ad7450bd846fe0d2e4cdc75c513b
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2 files changed

+38
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src/arch/arm/insts/macromem.cc

Lines changed: 32 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -246,7 +246,12 @@ PairMemOp::PairMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
246246
bool signExt, bool exclusive, bool acrel,
247247
int64_t imm, AddrMode mode,
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RegIndex rn, RegIndex rt, RegIndex rt2) :
249-
PredMacroOp(mnem, machInst, __opClass)
249+
PredMacroOp(mnem, machInst, __opClass),
250+
mode(mode),
251+
rn(rn),
252+
rt(rt),
253+
rt2(rt2),
254+
imm(imm)
250255
{
251256
bool post = (mode == AddrMd_PostIndex);
252257
bool writeback = (mode != AddrMd_Offset);
@@ -1643,5 +1648,31 @@ MicroMemPairOp::generateDisassembly(
16431648
return ss.str();
16441649
}
16451650

1651+
std::string
1652+
PairMemOp::generateDisassembly(
1653+
Addr pc, const loader::SymbolTable *symtab) const
1654+
{
1655+
std::stringstream ss;
1656+
printMnemonic(ss);
1657+
printIntReg(ss, rt);
1658+
ss << ", ";
1659+
printIntReg(ss, rt2);
1660+
ss << ", [";
1661+
printIntReg(ss, rn, 64);
1662+
if (mode == AddrMd_PostIndex) {
1663+
ss << "]";
1664+
}
1665+
if (imm) {
1666+
ccprintf(ss, ", #%d", imm);
1667+
}
1668+
if (mode != AddrMd_PostIndex) {
1669+
ss << "]";
1670+
}
1671+
if (mode == AddrMd_PreIndex) {
1672+
ss << "!";
1673+
}
1674+
return ss.str();
1675+
}
1676+
16461677
} // namespace ArmISA
16471678
} // namespace gem5

src/arch/arm/insts/macromem.hh

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -481,10 +481,16 @@ class PairMemOp : public PredMacroOp
481481
};
482482

483483
protected:
484+
AddrMode mode;
485+
RegIndex rn, rt, rt2;
486+
int32_t imm;
484487
PairMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
485488
uint32_t size, bool fp, bool load, bool noAlloc, bool signExt,
486489
bool exclusive, bool acrel, int64_t imm, AddrMode mode,
487490
RegIndex rn, RegIndex rt, RegIndex rt2);
491+
492+
std::string generateDisassembly(
493+
Addr pc, const loader::SymbolTable *symtab) const override;
488494
};
489495

490496
class BigFpMemImmOp : public PredMacroOp

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