arch-arm: Remove space in disassembly of DC instructions

bpfoley · bpfoley · commit 7929d38c43af · 2025-06-04T23:13:54.000+01:00
The argument to a DC op is stored in the SysDC64 mnemonic.
Hower printMnemonic prints it out with trailing whitespace, leading
to disassembly like "DC IVAC    , X0".

Output mnemonic directly to avoid this.

Change-Id: I7901b5c2953638ece45f78cbdf7df5443db473b7
diff --git a/src/arch/arm/insts/mem64.cc b/src/arch/arm/insts/mem64.cc
@@ -51,8 +51,7 @@ std::string
 SysDC64::generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const
 {
     std::stringstream ss;
-    printMnemonic(ss, "", false);
-    ccprintf(ss, ", ");
+    ss << "  " << mnemonic << ", ";
     printIntReg(ss, base);
     return ss.str();
 }

Original file line number	Diff line number	Diff line change
`@@ -51,8 +51,7 @@ std::string`
`51`	`51`	`SysDC64::generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const`
`52`	`52`	`{`
`53`	`53`	`std::stringstream ss;`
`54`		`- printMnemonic(ss, "", false);`
`55`		`- ccprintf(ss, ", ");`
	`54`	`+ ss << " " << mnemonic << ", ";`
`56`	`55`	`printIntReg(ss, base);`
`57`	`56`	`return ss.str();`
`58`	`57`	`}`