diff --git a/.clang-format b/.clang-format new file mode 100644 index 00000000..00133ace --- /dev/null +++ b/.clang-format @@ -0,0 +1,168 @@ +--- +Language: Cpp +# BasedOnStyle: Google +AccessModifierOffset: -1 +AlignAfterOpenBracket: Align +AlignConsecutiveMacros: true +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignEscapedNewlines: Left +AlignOperands: true +AlignTrailingComments: true +AllowAllArgumentsOnNextLine: true +AllowAllConstructorInitializersOnNextLine: true +AllowAllParametersOfDeclarationOnNextLine: true +AllowShortBlocksOnASingleLine: Never +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: All +AllowShortLambdasOnASingleLine: All +AllowShortIfStatementsOnASingleLine: WithoutElse +AllowShortLoopsOnASingleLine: true +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: true +AlwaysBreakTemplateDeclarations: Yes +BinPackArguments: true +BinPackParameters: true +BraceWrapping: + AfterCaseLabel: false + AfterClass: false + AfterControlStatement: false + AfterEnum: false + AfterFunction: false + AfterNamespace: false + AfterObjCDeclaration: false + AfterStruct: false + AfterUnion: false + AfterExternBlock: false + BeforeCatch: false + BeforeElse: false + IndentBraces: false + SplitEmptyFunction: true + SplitEmptyRecord: true + SplitEmptyNamespace: true +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Attach +BreakBeforeInheritanceComma: false +BreakInheritanceList: BeforeColon +BreakBeforeTernaryOperators: true +BreakConstructorInitializersBeforeComma: false +BreakConstructorInitializers: BeforeColon +BreakAfterJavaFieldAnnotations: false +BreakStringLiterals: true +ColumnLimit: 80 +CommentPragmas: '^ IWYU pragma:' +CompactNamespaces: false +ConstructorInitializerAllOnOneLineOrOnePerLine: true +ConstructorInitializerIndentWidth: 4 +ContinuationIndentWidth: 4 +Cpp11BracedListStyle: true +DeriveLineEnding: true +DerivePointerAlignment: true +DisableFormat: false +ExperimentalAutoDetectBinPacking: false +FixNamespaceComments: true +ForEachMacros: + - foreach + - Q_FOREACH + - BOOST_FOREACH +IncludeBlocks: Regroup +IncludeCategories: + - Regex: '^' + Priority: 2 + SortPriority: 0 + - Regex: '^<.*\.h>' + Priority: 1 + SortPriority: 0 + - Regex: '^<.*' + Priority: 2 + SortPriority: 0 + - Regex: '.*' + Priority: 3 + SortPriority: 0 +IncludeIsMainRegex: '([-_](test|unittest))?$' +IncludeIsMainSourceRegex: '' +IndentCaseLabels: true +IndentGotoLabels: true +IndentPPDirectives: None +IndentWidth: 4 +IndentWrappedFunctionNames: false +JavaScriptQuotes: Leave +JavaScriptWrapImports: true +KeepEmptyLinesAtTheStartOfBlocks: false +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +ObjCBinPackProtocolList: Never +ObjCBlockIndentWidth: 2 +ObjCSpaceAfterProperty: false +ObjCSpaceBeforeProtocolList: true +PenaltyBreakAssignment: 2 +PenaltyBreakBeforeFirstCallParameter: 1 +PenaltyBreakComment: 300 +PenaltyBreakFirstLessLess: 120 +PenaltyBreakString: 1000 +PenaltyBreakTemplateDeclaration: 10 +PenaltyExcessCharacter: 1000000 +PenaltyReturnTypeOnItsOwnLine: 200 +PointerAlignment: Left +RawStringFormats: + - Language: Cpp + Delimiters: + - cc + - CC + - cpp + - Cpp + - CPP + - 'c++' + - 'C++' + CanonicalDelimiter: '' + BasedOnStyle: google + - Language: TextProto + Delimiters: + - pb + - PB + - proto + - PROTO + EnclosingFunctions: + - EqualsProto + - EquivToProto + - PARSE_PARTIAL_TEXT_PROTO + - PARSE_TEST_PROTO + - PARSE_TEXT_PROTO + - ParseTextOrDie + - ParseTextProtoOrDie + CanonicalDelimiter: '' + BasedOnStyle: google +ReflowComments: true +SortIncludes: true +SortUsingDeclarations: true +SpaceAfterCStyleCast: false +SpaceAfterLogicalNot: false +SpaceAfterTemplateKeyword: true +SpaceBeforeAssignmentOperators: true +SpaceBeforeCpp11BracedList: false +SpaceBeforeCtorInitializerColon: true +SpaceBeforeInheritanceColon: true +SpaceBeforeParens: ControlStatements +SpaceBeforeRangeBasedForLoopColon: true +SpaceInEmptyBlock: false +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 2 +SpacesInAngles: false +SpacesInConditionalStatement: false +SpacesInContainerLiterals: true +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +SpaceBeforeSquareBrackets: false +Standard: Auto +StatementMacros: + - Q_UNUSED + - QT_REQUIRE_VERSION +TabWidth: 8 +UseCRLF: false +UseTab: Never +... + diff --git a/.cproject b/.cproject index 92b74819..3c1a932a 100644 --- a/.cproject +++ b/.cproject @@ -17,30 +17,30 @@ - - + + @@ -106,29 +109,29 @@ - - + + diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..b3194bdb --- /dev/null +++ b/.gitignore @@ -0,0 +1,3 @@ +Debug/ +Release/ +.settings/ diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml deleted file mode 100644 index cc6fc9e4..00000000 --- a/.settings/language.settings.xml +++ /dev/null @@ -1,27 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/Core/Inc/FreeRTOSConfig.h b/Core/Inc/FreeRTOSConfig.h index 8be38751..72bf3a28 100644 --- a/Core/Inc/FreeRTOSConfig.h +++ b/Core/Inc/FreeRTOSConfig.h @@ -140,10 +140,14 @@ standard names. */ /* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick, to prevent overwriting SysTick_Handler defined within STM32Cube HAL */ -#define xPortSysTickHandler SysTick_Handler +//#define xPortSysTickHandler SysTick_Handler /* USER CODE BEGIN Defines */ /* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */ /* USER CODE END Defines */ +#if (configUSE_TRACE_FACILITY == 1) +#include "trcRecorder.h" +#endif + #endif /* FREERTOS_CONFIG_H */ diff --git a/Core/Inc/MESCBLDC.h b/Core/Inc/MESCBLDC.h index af97e256..a29b239a 100644 --- a/Core/Inc/MESCBLDC.h +++ b/Core/Inc/MESCBLDC.h @@ -1,20 +1,20 @@ /* -** - ****************************************************************************** - * @file : MESCBLDC.h - * @brief : BLDC running code - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 David Molony. - * All rights reserved.

- * - * This software component is licensed under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + ** + ****************************************************************************** + * @file : MESCBLDC.h + * @brief : BLDC running code + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 David Molony. + * All rights reserved.

+ * + * This software component is licensed under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** * MESCBLDC.h * @@ -23,37 +23,32 @@ */ #include "stm32f3xx_hal.h" - #ifndef INC_MESCBLDC_H_ #define INC_MESCBLDC_H_ - #endif /* INC_MESCBLDC_H_ */ -typedef struct -{ -float ReqCurrent; -int BLDCduty; -int BLDCEstate; -int CurrentChannel; -float currentCurrent; -int pGain; -int iGain; -}MESCBLDCVars_s; +typedef struct { + float ReqCurrent; + int BLDCduty; + int BLDCEstate; + int CurrentChannel; + float currentCurrent; + int pGain; + int iGain; +} MESCBLDCVars_s; MESCBLDCVars_s BLDCVars; -typedef enum -{ - BLDC_FORWARDS=1, - BLDC_BACKWARDS=2, - BLDC_IDLE=3, - BLDC_BRAKE=4 -}MESCBLDCState_e; +typedef enum { + BLDC_FORWARDS = 1, + BLDC_BACKWARDS = 2, + BLDC_IDLE = 3, + BLDC_BRAKE = 4 +} MESCBLDCState_e; MESCBLDCState_e BLDCState; - /* Function prototypes -----------------------------------------------*/ void BLDCInit(); void BLDCCommuteHall(); diff --git a/Core/Inc/MESCfoc.h b/Core/Inc/MESCfoc.h index 8a52c1f2..b02eec8a 100644 --- a/Core/Inc/MESCfoc.h +++ b/Core/Inc/MESCfoc.h @@ -1,20 +1,20 @@ /* -** - ****************************************************************************** - * @file : MESCfoc.h - * @brief : FOC running code and ADC buffers - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 David Molony. - * All rights reserved.

- * - * This software component is licensed under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + ** + ****************************************************************************** + * @file : MESCfoc.h + * @brief : FOC running code and ADC buffers + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 David Molony. + * All rights reserved.

+ * + * This software component is licensed under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** * MESCfoc.h * @@ -24,80 +24,117 @@ #include "stm32f3xx_hal.h" +#define FOC_SECTORS_PER_REVOLUTION (6) +#define FOC_CONV_CHANNELS (3) +#define FOC_TRANSFORMED_CHANNELS (2) +#define FOC_NUM_ADC (3) -#define FOC_SECTORS_PER_REVOLUTION (6) -#define FOC_CONV_CHANNELS (3) -#define FOC_TRANSFORMED_CHANNELS (2) -#define FOC_NUM_ADC (3) - +// fixme: I think this type of stuff is causing confusion later on especially in +// the code that strives for maintainability. What does an alias give you? typedef uint16_t foc_angle_t; -typedef int32_t foc_field_angle_t; +typedef int32_t foc_field_angle_t; typedef float current_amps_t; typedef float voltage_t; -typedef struct -{ - foc_angle_t ElecAngle; //Current electrical angle - uint16_t Sector; //Current electrical sector - 6 sectors, as a consequence of Hall and 3 phase sinwave numbered 0-5 [0,FOC_SECTORS_PER_REVOLUTION) - foc_angle_t AnglePerSector; //6 sectors per eRevolution ((USHRT_MAX + 1) / FOC_SECTORS_PER_REVOLUTION) - foc_angle_t RotorAngle; //Rotor angle, either fetched from hall sensors as (sector*anglePerSector+tim3Count)/6 or from observer - foc_angle_t AngleStep; //At startup, step angle is zero, zero speed. This is the angle by which the inverter increments each PWM cycle under open loop - - uint16_t PWM[FOC_CONV_CHANNELS]; //3 phase vector for the PWM generation, do math on these before writing them to the timer registers - - current_amps_t Iab[FOC_TRANSFORMED_CHANNELS]; //Float vector containing the Clark transformed current in amps - current_amps_t Idq[FOC_TRANSFORMED_CHANNELS]; //Float vector containing the Park transformed current in amps - voltage_t Vbus; //Float vector containing the bus voltage in Volts - voltage_t Vswitch[FOC_CONV_CHANNELS]; //Float vector containing the switch node voltages (phase voltages) - foc_field_angle_t FieldAngle; //Signed number containing the angle between the electrical field and rotor, implemented as rotorAngle-elecAngle +// fixme: why is this in a struct? +typedef struct { + foc_angle_t ElecAngle; // Current electrical angle + uint16_t Sector; // Current electrical sector - 6 sectors, as a consequence + // of Hall and 3 phase sinwave numbered 0-5 + // [0,FOC_SECTORS_PER_REVOLUTION) + foc_angle_t AnglePerSector; // 6 sectors per eRevolution ((USHRT_MAX + 1) / + // FOC_SECTORS_PER_REVOLUTION) + foc_angle_t + RotorAngle; // Rotor angle, either fetched from hall sensors as + // (sector*anglePerSector+tim3Count)/6 or from observer + foc_angle_t AngleStep; // At startup, step angle is zero, zero speed. This + // is the angle by which the inverter increments + // each PWM cycle under open loop + + uint16_t PWM[FOC_CONV_CHANNELS]; // 3 phase vector for the PWM generation, + // do math on these before writing them to + // the timer registers + + current_amps_t + Iab[FOC_TRANSFORMED_CHANNELS]; // Float vector containing the Clark + // transformed current in amps + current_amps_t + Idq[FOC_TRANSFORMED_CHANNELS]; // Float vector containing the Park + // transformed current in amps + voltage_t Vbus; // Float vector containing the bus voltage in Volts + voltage_t Vswitch[FOC_CONV_CHANNELS]; // Float vector containing the switch + // node voltages (phase voltages) + foc_field_angle_t FieldAngle; // Signed number containing the angle between + // the electrical field and rotor, + // implemented as rotorAngle-elecAngle } MESCfoc_s; -void foc_init( MESCfoc_s * foc ); - - -typedef struct -{ - uint32_t RawADC[FOC_NUM_ADC][FOC_CONV_CHANNELS]; //ADC1 returns Ucurrent, DClink voltage and U phase voltage - //ADC2 returns Vcurrent, V and W phase voltages - //ADC3 returns Wcurrent, - uint16_t ADCOffset[FOC_NUM_ADC]; //During detect phase, need to sense the zero current offset - float ConvertedADC[FOC_NUM_ADC][FOC_CONV_CHANNELS]; //We will fill this with currents in A and voltages in Volts +void foc_init(MESCfoc_s *foc); // fixme: floating function prototype + +// fixme: why is this in a struct? what advantages does this give? +typedef struct { + uint32_t RawADC[FOC_NUM_ADC] + [FOC_CONV_CHANNELS]; // ADC1 returns Ucurrent, DClink + // voltage and U phase voltage ADC2 + // returns Vcurrent, V and W phase + // voltages ADC3 returns Wcurrent, + uint16_t ADCOffset[FOC_NUM_ADC]; // During detect phase, need to sense the + // zero current offset + float ConvertedADC[FOC_NUM_ADC] + [FOC_CONV_CHANNELS]; // We will fill this with currents + // in A and voltages in Volts } foc_measurement_t; -foc_measurement_t measurement_buffers; +foc_measurement_t measurement_buffers; // fixme: floating function prototype -typedef struct -{ +typedef struct { uint16_t Delta; uint16_t Length; -} MESC_RCPWMin_t; +} MESC_RCPWMin_t; /* Function prototypes -----------------------------------------------*/ +// fixme: inconsistent naming convention for functions. Choose one and stick to +// it across entire codebase. Choice needs to be documented. I recommend +// variable: lower_snake_case = 1; +// function: lowerCamelCase(); +// constant: UPPER_CASE; + void fastLoop(); void V_I_Check(); -void ADCConversion(); //Roll this into the V_I_Check? less branching, can probably reduce no.ops and needs doing every cycle anyway... - //convert currents from uint_16 ADC readings into float A and uint_16 voltages into float volts - //Since the observer needs the Clark transformed current, do the Clark transform now -void observerTick(); //Call every time to allow the observer, whatever it is, to update itself and find motor position -void MESCFOC(); //Park transform and current control (PI?) - -void openLoopPIFF(); //Just keep the phase currents at the requested value without really thinking about things like synchronising, phase etc... - -void writePWM(); //Offset the PWM to voltage centred (0Vduty is 50% PWM) or subtract lowest phase to always clamp one phase at 0V, write CCR registers - -void GenerateBreak(); //Software break that does not stop the PWM timer but disables the outputs, sum of phU,V,W_Break(); -int isMotorRunning(); //return motor state if state is one of the running states, if it's an idle, error or break state, disable all outputs and measure the phase voltages - if all the same, then it's stationary. -int GetHallState(); //Self explanatory... +void ADCConversion(); // Roll this into the V_I_Check? less branching, can + // probably reduce no.ops and needs doing every cycle + // anyway... +// convert currents from uint_16 ADC readings into float A and uint_16 voltages +// into float volts Since the observer needs the Clark transformed current, do +// the Clark transform now +void observerTick(); // Call every time to allow the observer, whatever it is, + // to update itself and find motor position +void MESCFOC(); // Park transform and current control (PI?) + +void openLoopPIFF(); // Just keep the phase currents at the requested value + // without really thinking about things like + // synchronising, phase etc... + +void writePWM(); // Offset the PWM to voltage centred (0Vduty is 50% PWM) or + // subtract lowest phase to always clamp one phase at 0V, + // write CCR registers + +void GenerateBreak(); // Software break that does not stop the PWM timer but + // disables the outputs, sum of phU,V,W_Break(); +int isMotorRunning(); // return motor state if state is one of the running + // states, if it's an idle, error or break state, disable + // all outputs and measure the phase voltages - if all + // the same, then it's stationary. +int GetHallState(); // Self explanatory... void measureResistance(); void measureInductance(); -void phU_Break(); //Turn all phase U FETs off, Tristate the ouput - For BLDC mode mainly, but also used for measuring -void phU_Enable(); //Basically un-break phase U, opposite of above... +void phU_Break(); // Turn all phase U FETs off, Tristate the ouput - For BLDC + // mode mainly, but also used for measuring +void phU_Enable(); // Basically un-break phase U, opposite of above... void phV_Break(); void phV_Enable(); void phW_Break(); void phW_Enable(); - - diff --git a/Core/Inc/MESChw_setup.h b/Core/Inc/MESChw_setup.h index 98fdfcf4..972823a6 100644 --- a/Core/Inc/MESChw_setup.h +++ b/Core/Inc/MESChw_setup.h @@ -1,20 +1,20 @@ /* -** - ****************************************************************************** - * @file : MESChw_setup.c - * @brief : Initialisation code for the PCB - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 David Molony. - * All rights reserved.

- * - * This software component is licensed under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + ** + ****************************************************************************** + * @file : MESChw_setup.c + * @brief : Initialisation code for the PCB + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 David Molony. + * All rights reserved.

+ * + * This software component is licensed under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** * MESChw_setup.c * @@ -29,44 +29,58 @@ //#define HW_SETUP_IGAIN ((HW_SETUP_RSHUNT*...)/(...)) // _OR +typedef float + hardware_vars_t; // Let's have all the hardware and everything in float for + // now, until we start running out of clock cycles? -typedef float hardware_vars_t; //Let's have all the hardware and everything in float for now, until we start running out of clock cycles? - -typedef struct -{ - hardware_vars_t Rshunt; //Shunt resistance, ohms - hardware_vars_t RVBT; //Vbus top divider - Also for switch divider - hardware_vars_t RVBB; //Vbus bottom divider - Also for switch divider - hardware_vars_t VBGain; //=RVBB/(RVBB+RVBT); //Resistor divider network gain (fractional) - hardware_vars_t RIphPU; //phase current pullup - hardware_vars_t RIphSR; //phase current series resistance - hardware_vars_t OpGain; //OpAmp gain, if external, or internal PGA - hardware_vars_t Igain; //=Rshunt*OpGain*RIphPU/(RIphSR+RIphPU); //Resistor gain network*opamp gain - total gain before the current hits the ADC, might want this inverted to avoid using division? +typedef struct { + hardware_vars_t Rshunt; // Shunt resistance, ohms + hardware_vars_t RVBT; // Vbus top divider - Also for switch divider + hardware_vars_t RVBB; // Vbus bottom divider - Also for switch divider + hardware_vars_t VBGain; //=RVBB/(RVBB+RVBT); //Resistor divider + //network gain (fractional) + hardware_vars_t RIphPU; // phase current pullup + hardware_vars_t RIphSR; // phase current series resistance + hardware_vars_t OpGain; // OpAmp gain, if external, or internal PGA + hardware_vars_t + Igain; //=Rshunt*OpGain*RIphPU/(RIphSR+RIphPU); //Resistor gain + // network*opamp gain - total gain before the current hits the + // ADC, might want this inverted to avoid using division? } hw_setup_s; hw_setup_s g_hw_setup; // _OR_ // void hw_setup_init( hw_setp_s * hw_setup ); - - -typedef struct -{ - hardware_vars_t Rphase; //unsigned int containing phase resistance in mOhms, populated by DETECTING if not already known; - uint8_t uncertainty; //uncertainty should start at 255 an as the measure resistance is called each PWM cycle, be deprecated by accumulating the measurements until it reaches 0, at which point the resistance is accepted - hardware_vars_t Lphase; //unsigned int containing phase inductance in uH, range from very very low inductance high kV strong magnet BLDC motors to low kV weak magnet ones; - uint16_t RawCurrLim; //Current limit that will trigger a software generated break from ADC. Actual current equal to (RawCurrLim-IMid)*3.3/4096/Gain/Rshunt //example (4096-2048)*3.3/(4096*16*0.001)= 103A - uint16_t RawVoltLim; ////Voltage limit that will trigger a software generated break from ADC. Actual voltage equal to RawVoltLim*3.3*Divider/4096 // example 2303*3.3/4096*(R1k5+R47k/R1K5)=60V +typedef struct { + hardware_vars_t + Rphase; // unsigned int containing phase resistance in mOhms, + // populated by DETECTING if not already known; + uint8_t uncertainty; // uncertainty should start at 255 an as the measure + // resistance is called each PWM cycle, be deprecated + // by accumulating the measurements until it reaches + // 0, at which point the resistance is accepted + hardware_vars_t + Lphase; // unsigned int containing phase inductance in uH, + // range from very very low inductance high kV strong + // magnet BLDC motors to low kV weak magnet ones; + uint16_t RawCurrLim; // Current limit that will trigger a software + // generated break from ADC. Actual current equal to + // (RawCurrLim-IMid)*3.3/4096/Gain/Rshunt //example + // (4096-2048)*3.3/(4096*16*0.001)= 103A + uint16_t RawVoltLim; ////Voltage limit that will trigger a software + ///generated break from ADC. Actual voltage equal to + /// RawVoltLim*3.3*Divider/4096 // + /// example 2303*3.3/4096*(R1k5+R47k/R1K5)=60V } motor_s; motor_s motor; // _OR_ -//void motor_init( struct motor_s *motor); //Rob created prototype init, unused for now - - -// +// void motor_init( struct motor_s *motor); //Rob created prototype init, +// unused for now /* Function prototypes -----------------------------------------------*/ -void motor_init(); //Fills the parameters of the motor struct -void hw_init(); //Fills the parameters of the hardware struct, simplifies some into useful overall gain values +void motor_init(); // Fills the parameters of the motor struct +void hw_init(); // Fills the parameters of the hardware struct, simplifies some + // into useful overall gain values diff --git a/Core/Inc/MESCmotor_state.h b/Core/Inc/MESCmotor_state.h index 1ca8acbd..be48e86e 100644 --- a/Core/Inc/MESCmotor_state.h +++ b/Core/Inc/MESCmotor_state.h @@ -1,20 +1,20 @@ /* -** - ****************************************************************************** - * @file : MESCmotor_state.h - * @brief : Code for motor state machine - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 David Molony. - * All rights reserved.

- * - * This software component is licensed under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + ** + ****************************************************************************** + * @file : MESCmotor_state.h + * @brief : Code for motor state machine + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 David Molony. + * All rights reserved.

+ * + * This software component is licensed under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** * MESCmotor_state.h * @@ -24,54 +24,63 @@ #include "stm32f3xx_hal.h" -typedef enum -{ - MOTOR_STATE_IDLE=0, - //All PWM should be off state, nothing happening. Motor may be spinning freely - MOTOR_STATE_DETECTING=1, - //PWM not generating output, but still running to trigger the ADC/check for hall sensors. - //Returned values from ADC used to detect if the motor is spinning, how fast, what speed... - MOTOR_STATE_ALIGN=2, - //Hold one phase at current - MOTOR_STATE_MEASURING=3, - //Measuring resistance and inducance of phase - MOTOR_STATE_OPEN_LOOP_STARTUP=4, - //Starting up in sensorless mode - MOTOR_STATE_OPEN_LOOP_TRANSITION=5, - //Checking motor is running synchronously and phaselocking - MOTOR_STATE_HALL_NEAR_STATIONARY=6, - /*Hall sensors detected but the hall timer is overflowing because motor is too slow. Commutation based on number of steps advanced/lagging - Positive throttle implies step will always give positive torque - efield 60 or 120 degrees ahead of hall sensors - Negative throttle implies braking - efield always aligned 1 step behind direction of spin - Direction of spin not needed to be known - just - if((efieldstep-hallstep)>1){efieldstep-1;}//need to account for overflow of steps1-6 - if((efieldstep-hallstep)<-1){efieldstep+1;}//need to account for overflow of steps1-6 - Implement PI loop+feed forward based on PP, kV, Resistance - */ - MOTOR_STATE_HALL_RUN=7, - /*Hall sensors are changing state fast enough for the timer to detect them. From this, a continuous sinusoidal FOC algorithm can be running - Always align the current 90degrees to the field(hall sensor) - Magnitude of current proportional to throttle demand (+/- can either be +/- current, or invert 90degree angle, depending on inverter algorithm - */ - MOTOR_STATE_SENSORLESS_RUN=8, - /* - */ - MOTOR_STATE_ERROR=10, - /*Enter this state when the overcurrent or overvoltage trips, or illegal hall state or sensorless observer fault occurs - All PWM signals should be disabled, the timer may be in fault mode with all outputs disabled, or it may be required to implement the bit writes to turn off the outputs +typedef enum { + //fixme: why do you assign enum values explicitly? Do they have meaning? + MOTOR_STATE_IDLE = 0, + // All PWM should be off state, nothing happening. Motor may be spinning + // freely + MOTOR_STATE_DETECTING = 1, + // PWM not generating output, but still running to trigger the ADC/check for + // hall sensors. Returned values from ADC used to detect if the motor is + // spinning, how fast, what speed... + MOTOR_STATE_ALIGN = 2, + // Hold one phase at current + MOTOR_STATE_MEASURING = 3, + // Measuring resistance and inducance of phase + MOTOR_STATE_OPEN_LOOP_STARTUP = 4, + // Starting up in sensorless mode + MOTOR_STATE_OPEN_LOOP_TRANSITION = 5, + // Checking motor is running synchronously and phaselocking + MOTOR_STATE_HALL_NEAR_STATIONARY = 6, + /*Hall sensors detected but the hall timer is overflowing because motor is + too slow. Commutation based on number of steps advanced/lagging Positive + throttle implies step will always give positive torque - efield 60 or 120 + degrees ahead of hall sensors Negative throttle implies braking - efield + always aligned 1 step behind direction of spin Direction of spin not needed + to be known - just if((efieldstep-hallstep)>1){efieldstep-1;}//need to + account for overflow of steps1-6 + if((efieldstep-hallstep)<-1){efieldstep+1;}//need to account for overflow + of steps1-6 Implement PI loop+feed forward based on PP, kV, Resistance + */ + MOTOR_STATE_HALL_RUN = 7, + /*Hall sensors are changing state fast enough for the timer to detect them. + From this, a continuous sinusoidal FOC algorithm can be running Always + align the current 90degrees to the field(hall sensor) Magnitude of current + proportional to throttle demand (+/- can either be +/- current, or invert + 90degree angle, depending on inverter algorithm + */ + MOTOR_STATE_SENSORLESS_RUN = 8, + /* + */ + MOTOR_STATE_ERROR = 10, + /*Enter this state when the overcurrent or overvoltage trips, or illegal + hall state or sensorless observer fault occurs All PWM signals should be + disabled, the timer may be in fault mode with all outputs disabled, or it + may be required to implement the bit writes to turn off the outputs - */ - MOTOR_STATE_RECOVERING=11, - /* - After a fault state, might want to implement a routine to restart the system on the fly - detect if motor is running, detect speed, phase, re-enable PWM - */ + */ + MOTOR_STATE_RECOVERING = 11, + /* + After a fault state, might want to implement a routine to restart the + system on the fly - detect if motor is running, detect speed, phase, + re-enable PWM + */ } motor_state_e; motor_state_e MotorState; -typedef enum -{ +typedef enum { MOTOR_SENSOR_MODE_OPENLOOP, MOTOR_SENSOR_MODE_HALL, MOTOR_SENSOR_MODE_SENSORLESS, @@ -79,18 +88,16 @@ typedef enum motor_sensor_mode_e MotorSensorMode; -typedef enum -{ +typedef enum { MOTOR_DIRECTION_CLOCKWISE, MOTOR_DIRECTION_COUNTERCLOCKWISE } motor_direction_e; motor_direction_e MotorDirection; -typedef enum -{ +typedef enum { MOTOR_CONTROL_TYPE_BLDC, - MOTOR_CONTROL_TYPE_FOC + MOTOR_CONTROL_TYPE_FOC } motor_control_type_e; motor_control_type_e MotorControlType; diff --git a/Core/Inc/MESCsin_lut.h b/Core/Inc/MESCsin_lut.h index dbbc1232..c81c4010 100644 --- a/Core/Inc/MESCsin_lut.h +++ b/Core/Inc/MESCsin_lut.h @@ -1,20 +1,20 @@ /* -** - ****************************************************************************** - * @file : MESCsin_lut.h - * @brief : BLDC running code - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 David Molony. - * All rights reserved.

- * - * This software component is licensed under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + ** + ****************************************************************************** + * @file : MESCsin_lut.h + * @brief : BLDC running code + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 David Molony. + * All rights reserved.

+ * + * This software component is licensed under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** * MESCsin_lut.h * @@ -26,4 +26,3 @@ #define SINLUT_ENTRIES (256) const uint8_t g_sin_lut[SINLUT_ENTRIES]; - diff --git a/Core/Src/MESCBLDC.c b/Core/Src/MESCBLDC.c index ecb02fc7..3d891e02 100644 --- a/Core/Src/MESCBLDC.c +++ b/Core/Src/MESCBLDC.c @@ -1,20 +1,20 @@ /* -** - ****************************************************************************** - * @file : MESCBLDC.c - * @brief : BLDC running code - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 David Molony. - * All rights reserved.

- * - * This software component is licensed under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + ** + ****************************************************************************** + * @file : MESCBLDC.c + * @brief : BLDC running code + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 David Molony. + * All rights reserved.

+ * + * This software component is licensed under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** * MESCBLDC.c * @@ -23,152 +23,167 @@ */ #include "MESCBLDC.h" + #include "MESCfoc.h" -#include "MESCmotor_state.h" #include "MESChw_setup.h" +#include "MESCmotor_state.h" extern TIM_HandleTypeDef htim1; - -void BLDCInit(){ - BLDCVars.ReqCurrent=0; //Start the motor at 0 current - BLDCVars.BLDCduty=0; - BLDCVars.CurrentChannel=0; - BLDCVars.currentCurrent=0; - BLDCVars.pGain=1023*motor.Rphase/8; //wtf should I set the gain as by default... V/Amp error...Perhaps base it on Rphase and the bus voltage (nominally 48V)? But we don;t know the exact bus voltage yet... - BLDCVars.iGain=BLDCVars.pGain; //Initially, let's just make the iGain the same as the pGain, so after 1 second their contributions will be equal. - BLDCVars.BLDCEstate=GetHallState(); - BLDCState=BLDC_FORWARDS; - -} - - -void BLDCCommuteHall(){ -int CurrentHallState=GetHallState(); //Borrow the hall state detection from the FOC system -static int LastHallState=7; - -if(BLDCState==BLDC_FORWARDS){ - BLDCVars.BLDCEstate=(CurrentHallState+2)%6; - writeBLDC(); //Write the PWM values for the next state to generate forward torque - if(!(BLDCVars.BLDCEstate==(CurrentHallState+1))){ -//ToDo Fix if the writeBLDC command is put in here, the PWM duty gets stuck at 0. -} - +void BLDCInit() { + BLDCVars.ReqCurrent = 0; // Start the motor at 0 current + BLDCVars.BLDCduty = 0; + BLDCVars.CurrentChannel = 0; + BLDCVars.currentCurrent = 0; + BLDCVars.pGain = + 1023 * motor.Rphase / + 8; // wtf should I set the gain as by default... V/Amp error...Perhaps + // base it on Rphase and the bus voltage (nominally 48V)? But we + // don;t know the exact bus voltage yet... + BLDCVars.iGain = + BLDCVars.pGain; // Initially, let's just make the iGain the + // same as the pGain, so after 1 second + // their contributions will be equal. + BLDCVars.BLDCEstate = GetHallState(); + BLDCState = BLDC_FORWARDS; } -else if(BLDCState==BLDC_BACKWARDS){ - BLDCVars.BLDCEstate=(CurrentHallState+4)%6; - writeBLDC(); //Write the PWM values for the previous state to generate reverse torque - if(!(CurrentHallState==CurrentHallState)){ - } +void BLDCCommuteHall() { + int CurrentHallState = + GetHallState(); // Borrow the hall state detection from the FOC system + static int LastHallState = 7; + + if (BLDCState == BLDC_FORWARDS) { + BLDCVars.BLDCEstate = (CurrentHallState + 2) % 6; + writeBLDC(); // Write the PWM values for the next state to generate + // forward torque + if (!(BLDCVars.BLDCEstate == (CurrentHallState + 1))) { + // ToDo Fix if the writeBLDC command is put in here, the PWM duty + // gets stuck at 0. + } + } else if (BLDCState == BLDC_BACKWARDS) { + BLDCVars.BLDCEstate = (CurrentHallState + 4) % 6; + writeBLDC(); // Write the PWM values for the previous state to generate + // reverse torque + // FIXME: what is this supposed to accomplish? + // commented out since this code does nothing and is likely removed by + // the compiler. if(!(CurrentHallState==CurrentHallState)){ + // } + } else if (BLDCState == BLDC_BRAKE) { + int hallStateChange = CurrentHallState - LastHallState; + // ToDo Logic to always be on synch or hanging 1 step in front or + // behind... ToDo this does not cope with the roll-over, making for a + // very jerky brake + // TODO: the expression inside if() statement is very hard to read. + // Create separate variable. + if (((hallStateChange) % 6) > 1) { + BLDCVars.BLDCEstate = (CurrentHallState + 5) % 6; + } else if (((CurrentHallState - LastHallState) % 6) < -1) { + BLDCVars.BLDCEstate = (CurrentHallState + 1) % 6; + LastHallState = CurrentHallState; + } + writeBLDC(); + } else { + // Disable the drivers, freewheel + // fixme: misleading function name. If this is freewheel, then it should + // be named as such. + phU_Break(); + phV_Break(); + phW_Break(); + } } -else if(BLDCState==BLDC_BRAKE){ - //ToDo Logic to always be on synch or hanging 1 step in front or behind... - - if(((CurrentHallState-LastHallState)%6)>1){ //ToDo this does not cope with the rollover, makign for a very jerky brake - BLDCVars.BLDCEstate=(CurrentHallState+5)%6; - - } - else if(((CurrentHallState-LastHallState)%6)<-1){ - BLDCVars.BLDCEstate=(CurrentHallState+1)%6; - - LastHallState=CurrentHallState; - } - writeBLDC(); -} -else{ -//Disable the drivers, freewheel -phU_Break(); -phV_Break(); -phW_Break(); -} -} - - -void BLDCCurrentController(){ -//Implement a simple PI controller - static float CurrentError=0; - static float CurrentIntegralError=0; - static int Duty=0; - - BLDCVars.currentCurrent= measurement_buffers.ConvertedADC[BLDCVars.CurrentChannel][0]; - - CurrentError=(BLDCVars.ReqCurrent-BLDCVars.currentCurrent);//measurement_buffers.ConvertedADC[BLDCVars.CurrentChannel][0]); - - CurrentIntegralError=CurrentIntegralError + CurrentError*0.000027; //37kHz PWM, so the integral portion should be multiplied by 1/37k before accumulating - if(CurrentIntegralError>10) CurrentIntegralError=10; //Magic numbers - if(CurrentIntegralError<-10) CurrentIntegralError=-10; //Magic numbers - - Duty=(int)(CurrentError*BLDCVars.pGain + CurrentIntegralError*BLDCVars.iGain); - - if(Duty>1023){ - Duty=1023; - } - else if(Duty<0){ - Duty=0; - } - - BLDCVars.BLDCduty=Duty; +void BLDCCurrentController() { + // Implement a simple PI controller + static float CurrentError = 0; + static float CurrentIntegralError = 0; + static int Duty = 0; + + BLDCVars.currentCurrent = + measurement_buffers.ConvertedADC[BLDCVars.CurrentChannel][0]; + + CurrentError = (BLDCVars.ReqCurrent - BLDCVars.currentCurrent); + // measurement_buffers.ConvertedADC[BLDCVars.CurrentChannel][0]); + + CurrentIntegralError = + CurrentIntegralError + + CurrentError * 0.000027; // 37kHz PWM, so the integral portion should + // be multiplied by 1/37k before accumulating + if (CurrentIntegralError > 10) CurrentIntegralError = 10; // Magic numbers + if (CurrentIntegralError < -10) + CurrentIntegralError = -10; // Magic numbers + + Duty = (int)(CurrentError * BLDCVars.pGain + + CurrentIntegralError * BLDCVars.iGain); + + if (Duty > 1023) { + Duty = 1023; + } else if (Duty < 0) { + Duty = 0; + } + BLDCVars.BLDCduty = Duty; } -void writeBLDC(){ - switch(BLDCVars.BLDCEstate){ - case 0: - //disable phase first - phW_Break(); - //WritePWM values - htim1.Instance->CCR1=BLDCVars.BLDCduty; - htim1.Instance->CCR2=0; - phU_Enable(); - phV_Enable(); - BLDCVars.CurrentChannel=1; //Write the field into which the lowside current will flow, to be retrieved from the FOC_measurement_vars - break; - - case 1: - phV_Break(); - htim1.Instance->CCR1=BLDCVars.BLDCduty; - htim1.Instance->CCR3=0; - phU_Enable(); - phW_Enable(); - BLDCVars.CurrentChannel=2; - break; - - case 2: - phU_Break(); - htim1.Instance->CCR2=BLDCVars.BLDCduty; - htim1.Instance->CCR3=0; - phV_Enable(); - phW_Enable(); - BLDCVars.CurrentChannel=2; - break; - - case 3: - phW_Break(); - htim1.Instance->CCR1=0; - htim1.Instance->CCR2=BLDCVars.BLDCduty; - phU_Enable(); - phV_Enable(); - BLDCVars.CurrentChannel=0; - break; - - case 4: - phV_Break(); - htim1.Instance->CCR1=0; - htim1.Instance->CCR3=BLDCVars.BLDCduty; - phU_Enable(); - phW_Enable(); - BLDCVars.CurrentChannel=0; - break; - - case 5: - phU_Break(); - htim1.Instance->CCR2=0; - htim1.Instance->CCR3=BLDCVars.BLDCduty; - phV_Enable(); - phW_Enable(); - BLDCVars.CurrentChannel=1; - break; - - } +void writeBLDC() { + switch (BLDCVars.BLDCEstate) { + case 0: + // disable phase first + phW_Break(); + // WritePWM values + htim1.Instance->CCR1 = BLDCVars.BLDCduty; + htim1.Instance->CCR2 = 0; + phU_Enable(); + phV_Enable(); + BLDCVars.CurrentChannel = + 1; // Write the field into which the lowside current will flow, + // to be retrieved from the FOC_measurement_vars + break; + + case 1: + phV_Break(); + htim1.Instance->CCR1 = BLDCVars.BLDCduty; + htim1.Instance->CCR3 = 0; + phU_Enable(); + phW_Enable(); + BLDCVars.CurrentChannel = 2; + break; + + case 2: + phU_Break(); + htim1.Instance->CCR2 = BLDCVars.BLDCduty; + htim1.Instance->CCR3 = 0; + phV_Enable(); + phW_Enable(); + BLDCVars.CurrentChannel = 2; + break; + + case 3: + phW_Break(); + htim1.Instance->CCR1 = 0; + htim1.Instance->CCR2 = BLDCVars.BLDCduty; + phU_Enable(); + phV_Enable(); + BLDCVars.CurrentChannel = 0; + break; + + case 4: + phV_Break(); + htim1.Instance->CCR1 = 0; + htim1.Instance->CCR3 = BLDCVars.BLDCduty; + phU_Enable(); + phW_Enable(); + BLDCVars.CurrentChannel = 0; + break; + + case 5: + phU_Break(); + htim1.Instance->CCR2 = 0; + htim1.Instance->CCR3 = BLDCVars.BLDCduty; + phV_Enable(); + phW_Enable(); + BLDCVars.CurrentChannel = 1; + break; + default: + break; + } } diff --git a/Core/Src/MESCfoc.c b/Core/Src/MESCfoc.c index cd09b846..80c5ee7a 100644 --- a/Core/Src/MESCfoc.c +++ b/Core/Src/MESCfoc.c @@ -1,20 +1,20 @@ /* -** - ****************************************************************************** - * @file : MESCfoc.c - * @brief : FOC running code and ADC buffers - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 David Molony. - * All rights reserved.

- * - * This software component is licensed under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + ** + ****************************************************************************** + * @file : MESCfoc.c + * @brief : FOC running code and ADC buffers + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 David Molony. + * All rights reserved.

+ * + * This software component is licensed under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** * MESCfoc.c * @@ -22,310 +22,398 @@ * Author: David Molony */ - /* Includes ------------------------------------------------------------------*/ #include "MESCfoc.h" -#include "MESCmotor_state.h" -#include "MESChw_setup.h" -#include "MESCBLDC.h" +#include "MESCBLDC.h" +#include "MESChw_setup.h" +#include "MESCmotor_state.h" extern TIM_HandleTypeDef htim1; - -void fastLoop(){//Call this directly from the ADC callback IRQ -V_I_Check(); //Run the current and voltage checks -switch(MotorState){ - case MOTOR_STATE_SENSORLESS_RUN: - ADCConversion();//Convert the ADC values into floats, do Clark transform - //Call the observer - //Call the current and phase controller - //Write the PWM values - break; - - case MOTOR_STATE_HALL_RUN: - ADCConversion();//Convert the ADC values into floats, do Clark transform - if(MotorControlType==MOTOR_CONTROL_TYPE_BLDC){//BLDC is hopefully just a temporary "Get it spinning" kind of thing, to be deprecated in favour of FOC - BLDCCurrentController(); - BLDCCommuteHall(); - } - //Get the current position from HallTimer - //Call the current and phase controller - //Write the PWM values - break; - - case MOTOR_STATE_HALL_NEAR_STATIONARY: - ADCConversion();//Convert the ADC values into floats, do Clark transform, but we ignore the answer here, just want the float currents. - //Call GetHallState - //Call the BLDC discrete controller - Override the normal current controller, this is 6 step DC only - //Write the PWM values - break; - - case MOTOR_STATE_OPEN_LOOP_STARTUP: - //Same as open loop - ADCConversion(); //Convert the ADC values into floats, do Clark transform, ignore result of Clark, just want the float currents - openLoopPIFF(); - //Write the PWM values - break; - - case MOTOR_STATE_OPEN_LOOP_TRANSITION: - //Run open loop - //Run observer - //RunFOC - //Weighted average of the outputs N PWM cycles - //Write the PWM values - break; - - case MOTOR_STATE_IDLE: - // Do basically nothing - //ToDo Set PWM to no output state - break; - - case MOTOR_STATE_DETECTING: - ; - int test=8; - test = GetHallState(); - - if((test==6)||(test==7)){ - //no hall sensors detected - MotorSensorMode=MOTOR_SENSOR_MODE_SENSORLESS; - } - else if(test==8){ - MotorState=MOTOR_STATE_ERROR; - } - //ToDo add reporting - else { - //hall sensors detected - MotorSensorMode=MOTOR_SENSOR_MODE_HALL; - } - break; - - case MOTOR_STATE_MEASURING: - if(motor.Rphase==0){ //Every PWM cycle we enter this function until the resistance measurement has converged at a good value. Once the measurement is complete, Rphase is set, and this is no longer called - measureResistance(); - break; - } - else if(motor.Lphase==0){ - //As per resistance measurement, this will be called until an inductance measurement is converged. - //Inductance measurement might require a serious reset of the ADC, or calling this function many times per PWM period by resetting the OCR4 register to trigger the ADC successively - measureInductance(); - break; - } - - case MOTOR_STATE_ERROR: - GenerateBreak(); //Generate a break state - //Now panic and freak out - break; - case MOTOR_STATE_ALIGN: - //Turn on at a given voltage at electricalangle0; - break; - case MOTOR_STATE_RECOVERING: - //No clue so far. Read the phase voltages and determine position and attempt to restart? - //Should already be in break state, and should stay there... - break; - } +void fastLoop() { // Call this directly from the ADC callback IRQ + V_I_Check(); // Run the current and voltage checks + switch (MotorState) { + case MOTOR_STATE_SENSORLESS_RUN: + ADCConversion(); // Convert the ADC values into floats, do Clark + // transform + // Call the observer + // Call the current and phase controller + // Write the PWM values + break; + + case MOTOR_STATE_HALL_RUN: + ADCConversion(); // Convert the ADC values into floats, do Clark + // transform + if (MotorControlType == + MOTOR_CONTROL_TYPE_BLDC) { // BLDC is hopefully just a + // temporary "Get it spinning" kind + // of thing, to be deprecated in + // favour of FOC + BLDCCurrentController(); + BLDCCommuteHall(); + } + // Get the current position from HallTimer + // Call the current and phase controller + // Write the PWM values + break; + + case MOTOR_STATE_HALL_NEAR_STATIONARY: + ADCConversion(); // Convert the ADC values into floats, do Clark + // transform, but we ignore the answer here, just + // want the float currents. + // Call GetHallState + // Call the BLDC discrete controller - Override the normal current + // controller, this is 6 step DC only Write the PWM values + break; + + case MOTOR_STATE_OPEN_LOOP_STARTUP: + // Same as open loop + ADCConversion(); // Convert the ADC values into floats, do Clark + // transform, ignore result of Clark, just want + // the float currents + openLoopPIFF(); + // Write the PWM values + break; + + case MOTOR_STATE_OPEN_LOOP_TRANSITION: + // Run open loop + // Run observer + // RunFOC + // Weighted average of the outputs N PWM cycles + // Write the PWM values + break; + + case MOTOR_STATE_IDLE: + // Do basically nothing + // ToDo Set PWM to no output state + break; + + case MOTOR_STATE_DETECTING:; + int test = 8; // fixme: why assign a number only to reassign + // straight away with something else? + test = GetHallState(); + + if ((test == 6) || (test == 7)) { + // no hall sensors detected + MotorSensorMode = MOTOR_SENSOR_MODE_SENSORLESS; + } else if (test == 8) { + MotorState = MOTOR_STATE_ERROR; + } + // ToDo add reporting + else { + // hall sensors detected + MotorSensorMode = MOTOR_SENSOR_MODE_HALL; + } + break; + + case MOTOR_STATE_MEASURING: + if (motor.Rphase == + 0) { // Every PWM cycle we enter this function until + // the resistance measurement has converged at a + // good value. Once the measurement is complete, + // Rphase is set, and this is no longer called + measureResistance(); + break; + } else if (motor.Lphase == 0) { + // As per resistance measurement, this will be called until an + // inductance measurement is converged. Inductance measurement + // might require a serious reset of the ADC, or calling this + // function many times per PWM period by resetting the OCR4 + // register to trigger the ADC successively + measureInductance(); + break; + } + // fixme: probably a bug: does the break; statement belong after the + // closing bracket for if statement? + + case MOTOR_STATE_ERROR: + GenerateBreak(); // Generate a break state + // Now panic and freak out + // fixme: do we actually need to panic? should there be special + // state of MOTOR_STATE_PANIC? + break; + case MOTOR_STATE_ALIGN: + // Turn on at a given voltage at electricalangle0; + break; + case MOTOR_STATE_RECOVERING: + // fixme: this probably should not try to recover without external + // prompt unless reason for failure is understood. + + // No clue so far. Read the phase voltages and determine position + // and attempt to restart? Should already be in break state, and + // should stay there... + break; + } } - -void V_I_Check(){ // &RawADC1,&RawADC2, &RawADC3 as arguments? Is this the correct use of &pointers? Just need it to look in the buffers filled by the DMA - //Check currents, voltages are within panic limits - if((measurement_buffers.RawADC[0][0]>motor.RawCurrLim)|(measurement_buffers.RawADC[1][0]>motor.RawCurrLim)|(measurement_buffers.RawADC[2][0]>motor.RawCurrLim)|(measurement_buffers.RawADC[0][1]>motor.RawVoltLim)){ - GenerateBreak(); - MotorState=ERROR; - } +// TODO: refactor this function. Is this function called by DMA interrupt? +void V_I_Check() { // &RawADC1,&RawADC2, &RawADC3 as arguments? Is this the + // correct use of &pointers? Just need it to look in the + // buffers filled by the DMA + // Check currents, voltages are within panic limits + if ((measurement_buffers.RawADC[0][0] > motor.RawCurrLim) | + (measurement_buffers.RawADC[1][0] > motor.RawCurrLim) | + (measurement_buffers.RawADC[2][0] > motor.RawCurrLim) | + (measurement_buffers.RawADC[0][1] > motor.RawVoltLim)) { + GenerateBreak(); + MotorState = ERROR; + // fixme I think this is meant to be MOTOR_STATE_ERROR, not generic + // system ERROR. + } } -void ADCConversion(){ - //Here we take the raw ADC values, offset, cast to (float) and use the hardware gain values to create volt and amp variables - extern int initing; - if(initing){ - measurement_buffers.ADCOffset[0] = (255*measurement_buffers.ADCOffset[0]+measurement_buffers.RawADC[0][0])/256; - measurement_buffers.ADCOffset[1] = (255*measurement_buffers.ADCOffset[1]+measurement_buffers.RawADC[1][0])/256; - measurement_buffers.ADCOffset[2] = (255*measurement_buffers.ADCOffset[2]+measurement_buffers.RawADC[2][0])/256; - static int initcycles=0; - initcycles=initcycles+1; - if(initcycles>1000){ - initing=0; - } - }else{ - measurement_buffers.ConvertedADC[0][0]=((float)measurement_buffers.RawADC[0][0]-(float)measurement_buffers.ADCOffset[0])*g_hw_setup.Igain; //Currents - measurement_buffers.ConvertedADC[1][0]=((float)measurement_buffers.RawADC[1][0]-(float)measurement_buffers.ADCOffset[1])*g_hw_setup.Igain; - measurement_buffers.ConvertedADC[2][0]=((float)measurement_buffers.RawADC[2][0]-(float)measurement_buffers.ADCOffset[2])*g_hw_setup.Igain; - measurement_buffers.ConvertedADC[0][1]=(float)measurement_buffers.RawADC[0][1]*g_hw_setup.VBGain; //Vbus - measurement_buffers.ConvertedADC[0][2]=(float)measurement_buffers.RawADC[0][2]*g_hw_setup.VBGain; //Usw - measurement_buffers.ConvertedADC[1][1]=(float)measurement_buffers.RawADC[1][1]*g_hw_setup.VBGain; //Vsw - measurement_buffers.ConvertedADC[1][2]=(float)measurement_buffers.RawADC[1][2]*g_hw_setup.VBGain; //Wsw - } +void ADCConversion() { + // Here we take the raw ADC values, offset, cast to (float) and use the + // hardware gain values to create volt and amp variables + // fixme: huh? where does "initing" come from? what does "initing" mean? + // initialising? Can "initing" be passed as an argument to this function? + // found it... sort of, but still don't understand. + extern int initing; + if (initing) { + measurement_buffers.ADCOffset[0] = + (255 * measurement_buffers.ADCOffset[0] + + measurement_buffers.RawADC[0][0]) / + 256; + measurement_buffers.ADCOffset[1] = + (255 * measurement_buffers.ADCOffset[1] + + measurement_buffers.RawADC[1][0]) / + 256; + measurement_buffers.ADCOffset[2] = + (255 * measurement_buffers.ADCOffset[2] + + measurement_buffers.RawADC[2][0]) / + 256; + static int initcycles = 0; + initcycles = initcycles + 1; + if (initcycles > 1000) { + initing = 0; + } + } else { + measurement_buffers.ConvertedADC[0][0] = + ((float)measurement_buffers.RawADC[0][0] - + (float)measurement_buffers.ADCOffset[0]) * + g_hw_setup.Igain; // Currents + measurement_buffers.ConvertedADC[1][0] = + ((float)measurement_buffers.RawADC[1][0] - + (float)measurement_buffers.ADCOffset[1]) * + g_hw_setup.Igain; + measurement_buffers.ConvertedADC[2][0] = + ((float)measurement_buffers.RawADC[2][0] - + (float)measurement_buffers.ADCOffset[2]) * + g_hw_setup.Igain; + measurement_buffers.ConvertedADC[0][1] = + (float)measurement_buffers.RawADC[0][1] * + g_hw_setup.VBGain; // Vbus + measurement_buffers.ConvertedADC[0][2] = + (float)measurement_buffers.RawADC[0][2] * g_hw_setup.VBGain; // Usw + measurement_buffers.ConvertedADC[1][1] = + (float)measurement_buffers.RawADC[1][1] * g_hw_setup.VBGain; // Vsw + measurement_buffers.ConvertedADC[1][2] = + (float)measurement_buffers.RawADC[1][2] * g_hw_setup.VBGain; // Wsw + } } -void GenerateBreak(){ - //Here we set all the PWMoutputs to LOW, without triggering the timerBRK, which should only be set by the hardware comparators, in the case of a shoot-through orother catastrophic event - //This function means that the timer can be left running, ADCs sampling etc which enables a recovery, or single PWM period break in which the backEMF can be measured directly - //This function needs implementing and testing before any high current or voltage is applied, otherwise... DeadFETs - phU_Break(); - phV_Break(); - phW_Break(); +void GenerateBreak() { + // Here we set all the PWMoutputs to LOW, without triggering the timerBRK, + // which should only be set by the hardware comparators, in the case of a + // shoot-through orother catastrophic event This function means that the + // timer can be left running, ADCs sampling etc which enables a recovery, or + // single PWM period break in which the backEMF can be measured directly + // This function needs implementing and testing before any high current or + // voltage is applied, otherwise... DeadFETs + phU_Break(); + phV_Break(); + phW_Break(); } -int GetHallState(){ - - - //int hallState=0; - //hallState=((HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_6))|((HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_7))<<1)|((HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_8))<<2)); - //ToDo Using these HAL_GPIO_ReadPin functions is very computationally expensive, should replace with a register read->byte mask->rightshift - switch(((GPIOB->IDR>>6)&0x7)) - //switch(hallState) - { - case 0: - return 7; //7 is the no hall sensor detected state (all low) - break; - case 7: - return 6; //6 is the no hall sensor detected state (all high) - break; -//Implement the hall table order here, depending how the hall sensors are configured - case 1: - return 0; - break; - case 3: - return 1; - break; - case 2: - return 2; - break; - case 6: - return 3; - break; - case 4: - return 4; - break; - case 5: - return 5; - break; - default: - return 8; - break; - } +int GetHallState() { + // int hallState=0; + // hallState=((HAL_GPIO_ReadPin(GPIOB, + // GPIO_PIN_6))|((HAL_GPIO_ReadPin(GPIOB, + // GPIO_PIN_7))<<1)|((HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_8))<<2)); ToDo Using + // these HAL_GPIO_ReadPin functions is very computationally expensive, + // should replace with a register read->byte mask->rightshift + switch (((GPIOB->IDR >> 6) & 0x7)) + // switch(hallState) + { + case 0: + return 7; // 7 is the no hall sensor detected state (all low) + break; + case 7: + return 6; // 6 is the no hall sensor detected state (all high) + break; + // Implement the hall table order here, depending how the hall + // sensors are configured + case 1: + return 0; + break; + case 3: + return 1; + break; + case 2: + return 2; + break; + case 6: + return 3; + break; + case 4: + return 4; + break; + case 5: + return 5; + break; + default: + return 8; + break; + } } -void measureResistance(){ - /*In this function, we are going to use the openloop PIFF controller to create a current, probably 1A, through a pair of motor windings, - * keeping the third tri-stated. - * We then generate a pair of V and I values, from the bus voltage and duty cycle, and the current reading - * We repeat this at higher current, say 5A, and then apply R=dV/dI from the two values to generate a resistance. - * Don't use a single point, since this is subject to anomolies from switching dead times, ADC sampling position...etc. Use of the derivative eliminates all steady state error sources - * ToDo Repeat for all phases? Or just assume they are all close enough that it doesn't matter? Could be useful for disconnection detection... - */ - static float currAcc2=0; //codebase static? - static float currAcc1=0; //codebase static? -ADCConversion(); //call the ADC conversion, which gives us float current values and voltages - static uint16_t PWMcycles=0; //codebase, this is going to initialise it as 0 once only and then not reset it each time this is called right? -if(isMotorRunning()){ - //do nothing +void measureResistance() { + /*In this function, we are going to use the openloop PIFF controller to + * create a current, probably 1A, through a pair of motor windings, keeping + * the third tri-stated. We then generate a pair of V and I values, from the + * bus voltage and duty cycle, and the current reading We repeat this at + * higher current, say 5A, and then apply R=dV/dI from the two values to + * generate a resistance. Don't use a single point, since this is subject to + * anomolies from switching dead times, ADC sampling position...etc. Use of + * the derivative eliminates all steady state error sources ToDo Repeat for + * all phases? Or just assume they are all close enough that it doesn't + * matter? Could be useful for disconnection detection... + */ + static float currAcc2 = 0; // codebase static? + static float currAcc1 = 0; // codebase static? + + ADCConversion(); // call the ADC conversion, which gives us float current + // values and voltages + static uint16_t PWMcycles = + 0; // codebase, this is going to initialise it as 0 once only and then + // not reset it each time this is called right? + if (isMotorRunning()) { + // do nothing + } else { + // turn off phW, we are just going to measure RUV + static uint16_t testPWM1 = + 2; // ToDo MASSIVE HACK, completely uncontrolled value + // "2",2/1024/37kHz--> 54ns pulse... Possibly won't even turn on + // the FETs Assuming the device does respond, and ton==toff, + // then approx. 48V*2/1024=0.09V. Typically + // R=2(PCB)+4(2xFETs)+100(Rmotor)=106mOhm-->1A + static uint16_t testPWM2 = + 10; // ToDo EVEN BIGGER HACK...uncontrolled value "10" -->270ns + // pulse... Probably will turn the FETs on... + phW_Break(); + phU_Enable(); + phV_Enable(); + if (PWMcycles < 1000) { + htim1.Instance->CCR2 = 0; + htim1.Instance->CCR1 = testPWM1; + // Accumulate the currents with an exponential smoother. This + // averaging should remove some noise and slightly increase + // effective resolution + currAcc1 = + (99 * currAcc1 + measurement_buffers.ConvertedADC[1][0]) * 0.01; + } + + else if (PWMcycles < 2000) { + htim1.Instance->CCR2 = 0; + htim1.Instance->CCR1 = testPWM2; + // Accumulate the currents with an exponential smoother + currAcc2 = + (99 * currAcc2 + measurement_buffers.ConvertedADC[1][0]) * 0.01; + } else if (PWMcycles == 2000) { + // First let's just turn everything off. Nobody likes motors sitting + // there getting hot while debugging. + htim1.Instance->CCR2 = 0; + htim1.Instance->CCR1 = 0; + phU_Break(); + phV_Break(); + phW_Break(); + // calculate the resistance from two accumulated currents and two + // voltages + motor.Rphase = (((float)(testPWM2 - testPWM1)) * + measurement_buffers.ConvertedADC[0][1]) / + (currAcc2 - currAcc1); + } + } } -else{ - //turn off phW, we are just going to measure RUV - static uint16_t testPWM1=2; //ToDo MASSIVE HACK, completely uncontrolled value "2",2/1024/37kHz--> 54ns pulse... Possibly won't even turn on the FETs - //Assuming the device does respond, and ton==toff, then approx. 48V*2/1024=0.09V. Typically R=2(PCB)+4(2xFETs)+100(Rmotor)=106mOhm-->1A - static uint16_t testPWM2=10; //ToDo EVEN BIGGER HACK...uncontrolled value "10" -->270ns pulse... Probably will turn the FETs on... - phW_Break(); - phU_Enable(); - phV_Enable(); - if(PWMcycles<1000){ - htim1.Instance->CCR2=0; - htim1.Instance->CCR1=testPWM1; - //Accumulate the currents with an exponential smoother. This averaging should remove some noise and slightly increase effective resolution - currAcc1=(99*currAcc1+measurement_buffers.ConvertedADC[1][0])*0.01; - } - - else if (PWMcycles<2000){ - htim1.Instance->CCR2=0; - htim1.Instance->CCR1=testPWM2; - //Accumulate the currents with an exponential smoother - currAcc2=(99*currAcc2+measurement_buffers.ConvertedADC[1][0])*0.01; - } - else if (PWMcycles==2000){ - //First let's just turn everything off. Nobody likes motors sitting there getting hot while debugging. - htim1.Instance->CCR2=0; - htim1.Instance->CCR1=0; - phU_Break(); - phV_Break(); - phW_Break(); - //calculate the resistance from two accumulated currents and two voltages - motor.Rphase=(((float)(testPWM2-testPWM1))*measurement_buffers.ConvertedADC[0][1])/(currAcc2-currAcc1); - } -} -} -void measureInductance(){ - /* - * In this function, we are going to run at a fixed duty cycle (perhaps as determined by Measure Resistance?), pushing ~5A through the motor coils (~100ADCcounts). - * We will then wait until steady state achieved... 1000 PWM cycles? before modulating CCR4, which triggers the ADC to capture currents at at least 2 time points within the PWM cycle - * With this change in current, and knowing R from previous measurement, we can calculate L using L=Vdt/dI=IRdt/dI - * ToDo Actually do this... - * ToDo Determination of the direct and quadrature inductances for MTPA in future? - */ +void measureInductance() { + /* + * In this function, we are going to run at a fixed duty cycle (perhaps as + * determined by Measure Resistance?), pushing ~5A through the motor coils + * (~100ADCcounts). We will then wait until steady state achieved... 1000 + * PWM cycles? before modulating CCR4, which triggers the ADC to capture + * currents at at least 2 time points within the PWM cycle With this change + * in current, and knowing R from previous measurement, we can calculate L + * using L=Vdt/dI=IRdt/dI ToDo Actually do this... ToDo Determination of the + * direct and quadrature inductances for MTPA in future? + */ } - -uint32_t tmpccmrx; //Temporary buffer which is used to turn on/off phase PWMs -//Turn all phase U FETs off, Tristate the HBridge output - For BLDC mode mainly, but also used for measuring, software fault detection and recovery -//ToDo TEST THOROUGHLY The register manipulations for the break functions were used previously on an STM32F042K6 for my first BLDC drive, on TIM1, which should be identical, but definitely needs checking -void phU_Break(){ - tmpccmrx = htim1.Instance->CCMR1; - tmpccmrx &= ~TIM_CCMR1_OC1M; - tmpccmrx &= ~TIM_CCMR1_CC1S; - tmpccmrx |= TIM_OCMODE_FORCED_INACTIVE; - htim1.Instance->CCMR1 = tmpccmrx; - htim1.Instance->CCER &= ~TIM_CCER_CC1E; //disable - htim1.Instance->CCER &= ~TIM_CCER_CC1NE; //disable +/*fixme: this variable is not scope limited, so it is not temporary. It needs to + * get a better name and be placed in a .h file. */ +uint32_t tmpccmrx; // Temporary buffer which is used to turn on/off phase PWMs +// Turn all phase U FETs off, Tristate the HBridge output - For BLDC mode +// mainly, but also used for measuring, software fault detection and recovery +// ToDo TEST THOROUGHLY The register manipulations for the break functions were +// used previously on an STM32F042K6 for my first BLDC drive, on TIM1, which +// should be identical, but definitely needs checking +void phU_Break() { + tmpccmrx = htim1.Instance->CCMR1; + tmpccmrx &= ~TIM_CCMR1_OC1M; + tmpccmrx &= ~TIM_CCMR1_CC1S; + tmpccmrx |= TIM_OCMODE_FORCED_INACTIVE; + htim1.Instance->CCMR1 = tmpccmrx; + htim1.Instance->CCER &= ~TIM_CCER_CC1E; // disable + htim1.Instance->CCER &= ~TIM_CCER_CC1NE; // disable } -//Basically un-break phase U, opposite of above... -void phU_Enable(){ - tmpccmrx = htim1.Instance->CCMR1; - tmpccmrx &= ~TIM_CCMR1_OC1M; - tmpccmrx &= ~TIM_CCMR1_CC1S; - tmpccmrx |= TIM_OCMODE_PWM1; - htim1.Instance->CCMR1 = tmpccmrx; - htim1.Instance->CCER |= TIM_CCER_CC1E; //enable - htim1.Instance->CCER |= TIM_CCER_CC1NE; //enable +// Basically un-break phase U, opposite of above... +void phU_Enable() { + tmpccmrx = htim1.Instance->CCMR1; + tmpccmrx &= ~TIM_CCMR1_OC1M; + tmpccmrx &= ~TIM_CCMR1_CC1S; + tmpccmrx |= TIM_OCMODE_PWM1; + htim1.Instance->CCMR1 = tmpccmrx; + htim1.Instance->CCER |= TIM_CCER_CC1E; // enable + htim1.Instance->CCER |= TIM_CCER_CC1NE; // enable } -void phV_Break(){ - tmpccmrx = htim1.Instance->CCMR1; - tmpccmrx &= ~TIM_CCMR1_OC2M; - tmpccmrx &= ~TIM_CCMR1_CC2S; - tmpccmrx |= TIM_OCMODE_FORCED_INACTIVE<<8; - htim1.Instance->CCMR1 = tmpccmrx; - htim1.Instance->CCER &= ~TIM_CCER_CC2E; //disable - htim1.Instance->CCER &= ~TIM_CCER_CC2NE; //disable +void phV_Break() { + tmpccmrx = htim1.Instance->CCMR1; + tmpccmrx &= ~TIM_CCMR1_OC2M; + tmpccmrx &= ~TIM_CCMR1_CC2S; + tmpccmrx |= TIM_OCMODE_FORCED_INACTIVE << 8; + htim1.Instance->CCMR1 = tmpccmrx; + htim1.Instance->CCER &= ~TIM_CCER_CC2E; // disable + htim1.Instance->CCER &= ~TIM_CCER_CC2NE; // disable } -void phV_Enable(){ - tmpccmrx = htim1.Instance->CCMR1; - tmpccmrx &= ~TIM_CCMR1_OC2M; - tmpccmrx &= ~TIM_CCMR1_CC2S; - tmpccmrx |= TIM_OCMODE_PWM1<<8; -htim1.Instance->CCMR1 = tmpccmrx; -htim1.Instance->CCER |= TIM_CCER_CC2E; //enable -htim1.Instance->CCER |= TIM_CCER_CC2NE; //enable +void phV_Enable() { + tmpccmrx = htim1.Instance->CCMR1; + tmpccmrx &= ~TIM_CCMR1_OC2M; + tmpccmrx &= ~TIM_CCMR1_CC2S; + tmpccmrx |= TIM_OCMODE_PWM1 << 8; + htim1.Instance->CCMR1 = tmpccmrx; + htim1.Instance->CCER |= TIM_CCER_CC2E; // enable + htim1.Instance->CCER |= TIM_CCER_CC2NE; // enable } -void phW_Break(){ - tmpccmrx = htim1.Instance->CCMR2; - tmpccmrx &= ~TIM_CCMR2_OC3M; - tmpccmrx &= ~TIM_CCMR2_CC3S; - tmpccmrx |= TIM_OCMODE_FORCED_INACTIVE; - htim1.Instance->CCMR2 = tmpccmrx; - htim1.Instance->CCER &= ~TIM_CCER_CC3E; //disable - htim1.Instance->CCER &= ~TIM_CCER_CC3NE; //disable +void phW_Break() { + tmpccmrx = htim1.Instance->CCMR2; + tmpccmrx &= ~TIM_CCMR2_OC3M; + tmpccmrx &= ~TIM_CCMR2_CC3S; + tmpccmrx |= TIM_OCMODE_FORCED_INACTIVE; + htim1.Instance->CCMR2 = tmpccmrx; + htim1.Instance->CCER &= ~TIM_CCER_CC3E; // disable + htim1.Instance->CCER &= ~TIM_CCER_CC3NE; // disable } -void phW_Enable(){ - tmpccmrx = htim1.Instance->CCMR2; +void phW_Enable() { + tmpccmrx = htim1.Instance->CCMR2; tmpccmrx &= ~TIM_CCMR2_OC3M; tmpccmrx &= ~TIM_CCMR2_CC3S; tmpccmrx |= TIM_OCMODE_PWM1; htim1.Instance->CCMR2 = tmpccmrx; - htim1.Instance->CCER |= TIM_CCER_CC3E; //enable - htim1.Instance->CCER |= TIM_CCER_CC3NE; //enable + htim1.Instance->CCER |= TIM_CCER_CC3E; // enable + htim1.Instance->CCER |= TIM_CCER_CC3NE; // enable } diff --git a/Core/Src/MESChw_setup.c b/Core/Src/MESChw_setup.c index 91375a8e..8b3ef719 100644 --- a/Core/Src/MESChw_setup.c +++ b/Core/Src/MESChw_setup.c @@ -1,20 +1,20 @@ /* -** - ****************************************************************************** - * @file : MESChw_setup.c - * @brief : Initialisation code for the PCB - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 David Molony. - * All rights reserved.

- * - * This software component is licensed under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + ** + ****************************************************************************** + * @file : MESChw_setup.c + * @brief : Initialisation code for the PCB + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 David Molony. + * All rights reserved.

+ * + * This software component is licensed under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** * MESChw_setup.c * @@ -24,24 +24,24 @@ /* Includes ------------------------------------------------------------------*/ #include "MESChw_setup.h" - - -void motor_init(){ - motor.Rphase=0; //We init at 0 to trigger the measurer to get the vals - motor.Lphase=0; //We init at 0 to trigger the measurer to get the vals - motor.uncertainty=1; - motor.RawCurrLim=3000; - motor.RawVoltLim=2303; +void motor_init() { + motor.Rphase = 0; // We init at 0 to trigger the measurer to get the vals + motor.Lphase = 0; // We init at 0 to trigger the measurer to get the vals + motor.uncertainty = 1; + motor.RawCurrLim = 3000; + motor.RawVoltLim = 2303; } -void hw_init(){ - g_hw_setup.Rshunt=0.001; - g_hw_setup.RIphPU=4700; - g_hw_setup.RIphSR=150; - g_hw_setup.RVBB=1500; - g_hw_setup.RVBT=47000; - g_hw_setup.OpGain=16; //Can this be inferred from the HAL declaration? - g_hw_setup.VBGain=g_hw_setup.RVBB/(g_hw_setup.RVBB+g_hw_setup.RVBT); - g_hw_setup.Igain=3.3/(g_hw_setup.Rshunt*4096*g_hw_setup.OpGain*g_hw_setup.RIphPU/(g_hw_setup.RIphPU+g_hw_setup.RIphSR));//g_hw_setup.Rshunt*g_hw_setup.OpGain*g_hw_setup.RIphPU/(g_hw_setup.RIphPU+g_hw_setup.RIphSR); - +void hw_init() { + g_hw_setup.Rshunt = 0.001; + g_hw_setup.RIphPU = 4700; + g_hw_setup.RIphSR = 150; + g_hw_setup.RVBB = 1500; + g_hw_setup.RVBT = 47000; + g_hw_setup.OpGain = 16; // Can this be inferred from the HAL declaration? + g_hw_setup.VBGain = g_hw_setup.RVBB / (g_hw_setup.RVBB + g_hw_setup.RVBT); + g_hw_setup.Igain = + 3.3 / (g_hw_setup.Rshunt * 4096 * g_hw_setup.OpGain * + g_hw_setup.RIphPU / (g_hw_setup.RIphPU + g_hw_setup.RIphSR)); + // g_hw_setup.Rshunt*g_hw_setup.OpGain*g_hw_setup.RIphPU/(g_hw_setup.RIphPU+g_hw_setup.RIphSR); } diff --git a/Core/Src/MESCmotor_state.c b/Core/Src/MESCmotor_state.c index 27a6ba54..2f2fd651 100644 --- a/Core/Src/MESCmotor_state.c +++ b/Core/Src/MESCmotor_state.c @@ -1,20 +1,20 @@ /* -** - ****************************************************************************** - * @file : MESCmotor_state.c - * @brief : Code for motor state machine - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 David Molony. - * All rights reserved.

- * - * This software component is licensed under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + ** + ****************************************************************************** + * @file : MESCmotor_state.c + * @brief : Code for motor state machine + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 David Molony. + * All rights reserved.

+ * + * This software component is licensed under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** * MESCmotor_state.c * @@ -25,10 +25,9 @@ /* Includes ------------------------------------------------------------------*/ #include "MESCmotor_state.h" -void MESC_Init(){ - MotorState=MOTOR_STATE_IDLE; - MotorSensorMode=MOTOR_SENSOR_MODE_HALL; - MotorControlType=MOTOR_CONTROL_TYPE_BLDC; - MotorDirection=MOTOR_DIRECTION_CLOCKWISE; - +void MESC_Init() { + MotorState = MOTOR_STATE_IDLE; + MotorSensorMode = MOTOR_SENSOR_MODE_HALL; + MotorControlType = MOTOR_CONTROL_TYPE_BLDC; + MotorDirection = MOTOR_DIRECTION_CLOCKWISE; } diff --git a/Core/Src/main.c b/Core/Src/main.c index ae9053b4..bf924cfe 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -1,24 +1,25 @@ /* USER CODE BEGIN Header */ /** - ****************************************************************************** - * @file : main.c - * @brief : Main program body - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" + #include "cmsis_os.h" #include "usb_device.h" @@ -73,40 +74,36 @@ DMA_HandleTypeDef hdma_usart3_tx; /* Definitions for defaultTask */ osThreadId_t defaultTaskHandle; const osThreadAttr_t defaultTask_attributes = { - .name = "defaultTask", - .priority = (osPriority_t) osPriorityNormal, - .stack_size = 128 * 4 -}; + .name = "defaultTask", + .priority = (osPriority_t)osPriorityNormal, + .stack_size = 128 * 4}; /* Definitions for SlowLoopTask */ osThreadId_t SlowLoopTaskHandle; const osThreadAttr_t SlowLoopTask_attributes = { - .name = "SlowLoopTask", - .priority = (osPriority_t) osPriorityLow, - .stack_size = 128 * 4 -}; + .name = "SlowLoopTask", + .priority = (osPriority_t)osPriorityLow, + .stack_size = 128 * 4}; /* Definitions for ComsTask */ osThreadId_t ComsTaskHandle; const osThreadAttr_t ComsTask_attributes = { - .name = "ComsTask", - .priority = (osPriority_t) osPriorityLow, - .stack_size = 128 * 4 -}; + .name = "ComsTask", + .priority = (osPriority_t)osPriorityLow, + .stack_size = 128 * 4}; /* Definitions for BatCheckTask */ osThreadId_t BatCheckTaskHandle; const osThreadAttr_t BatCheckTask_attributes = { - .name = "BatCheckTask", - .priority = (osPriority_t) osPriorityLow, - .stack_size = 128 * 4 -}; + .name = "BatCheckTask", + .priority = (osPriority_t)osPriorityLow, + .stack_size = 128 * 4}; /* USER CODE BEGIN PV */ -uint16_t a=0; -float adcBuff1[3]={0,0,0}; -uint32_t adcBuff2[3]={0,0,0}; -uint32_t adcBuff3[3]={0,0,0}; -uint32_t ICVals[2] = {0,0}; -uint32_t RegBuff=0; -uint32_t quickHall=0; -int initing=1; +uint16_t a = 0; +float adcBuff1[3] = {0, 0, 0}; +uint32_t adcBuff2[3] = {0, 0, 0}; +uint32_t adcBuff3[3] = {0, 0, 0}; +uint32_t ICVals[2] = {0, 0}; +uint32_t RegBuff = 0; +uint32_t quickHall = 0; +int initing = 1; /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ @@ -139,1243 +136,1160 @@ void BatCheck(void *argument); /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ - -void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim){ - if(htim->Channel==HAL_TIM_ACTIVE_CHANNEL_1){ - ICVals[0]=HAL_TIM_ReadCapturedValue(&htim3, TIM_CHANNEL_1); - - // Target is 20000 guard is +-10000 - if ((ICVals[0] < 10000) || (30000 < ICVals[0])) - { - a = 0; - BLDCVars.ReqCurrent=0; - } - - else - if(ICVals[0]!=0){ - BLDCState=BLDC_FORWARDS; - ICVals[1]=HAL_TIM_ReadCapturedValue(&htim3, TIM_CHANNEL_2); - if (ICVals[1] > 2000) ICVals[1] = 2000; - if (ICVals[1] < 1000) ICVals[1] = 1000; - - // Mid-point is 1500 guard is +-100 - if ((ICVals[1] > 1400) && (1600 > ICVals[1])) - { - ICVals[1] = 1500; - } -//Set the current setpoint here - if(1){//Current control, ToDo convert to Enum - if(ICVals[1]>1600) BLDCVars.ReqCurrent=((float)ICVals[1]-1600)/5.0; //Crude hack, which gets current scaled to +/-80A based on 1000-2000us PWM in - else if(ICVals[1]<1400) BLDCVars.ReqCurrent=((float)ICVals[1]-1400)/5.0; //Crude hack, which gets current scaled to +/-80A based on 1000-2000us PWM in - else BLDCVars.ReqCurrent=0; - } - - if(0){//Duty cycle control, ToDo convert to Enum - if(a<10){ - BLDCVars.BLDCduty=0; - } - if(a>9){ - BLDCVars.BLDCduty=10*(a-9); - } - } - - } - - ///////////////////////////////// -/* if(ICVals[0]!=0){ - ICVals[1]=HAL_TIM_ReadCapturedValue(&htim3, TIM_CHANNEL_2); - if(ICVals[1]>1500){ - BLDCState=BLDC_FORWARDS; - a=100*(ICVals[1]-1500)/1500; - } - else if(ICVals[1]<1500){ - BLDCState=BLDC_FORWARDS; - a=100*(1500-ICVals[1])/1500; - } - }*/ - - } +// fixme: this function should not be here. It should be in a separate file or +// at least marked explicitly what it does and why. +void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { + if (htim->Channel == HAL_TIM_ACTIVE_CHANNEL_1) { + ICVals[0] = HAL_TIM_ReadCapturedValue(&htim3, TIM_CHANNEL_1); + + // Target is 20000 guard is +-10000 + if ((ICVals[0] < 10000) || (30000 < ICVals[0])) { + a = 0; + BLDCVars.ReqCurrent = 0; + } + + else if (ICVals[0] != 0) { + BLDCState = BLDC_FORWARDS; + ICVals[1] = HAL_TIM_ReadCapturedValue(&htim3, TIM_CHANNEL_2); + if (ICVals[1] > 2000) ICVals[1] = 2000; + if (ICVals[1] < 1000) ICVals[1] = 1000; + + // Mid-point is 1500 guard is +-100 + if ((ICVals[1] > 1400) && (1600 > ICVals[1])) { + ICVals[1] = 1500; + } + // Set the current setpoint here + if (1) { // Current control, ToDo convert to Enum + if (ICVals[1] > 1600) + BLDCVars.ReqCurrent = + ((float)ICVals[1] - 1600) / + 5.0; // Crude hack, which gets current scaled to +/-80A + // based on 1000-2000us PWM in + else if (ICVals[1] < 1400) + BLDCVars.ReqCurrent = + ((float)ICVals[1] - 1400) / + 5.0; // Crude hack, which gets current scaled to +/-80A + // based on 1000-2000us PWM in + else + BLDCVars.ReqCurrent = 0; + } + + if (0) { // Duty cycle control, ToDo convert to Enum + if (a < 10) { + BLDCVars.BLDCduty = 0; + } + if (a > 9) { + BLDCVars.BLDCduty = 10 * (a - 9); + } + } + } + // todo: remove dead code. + ///////////////////////////////// + /* if(ICVals[0]!=0){ + ICVals[1]=HAL_TIM_ReadCapturedValue(&htim3, + TIM_CHANNEL_2); if(ICVals[1]>1500){ BLDCState=BLDC_FORWARDS; + a=100*(ICVals[1]-1500)/1500; + } + else if(ICVals[1]<1500){ + BLDCState=BLDC_FORWARDS; + a=100*(1500-ICVals[1])/1500; + } + }*/ + } } - /* USER CODE END 0 */ /** - * @brief The application entry point. - * @retval int + * @brief The application entry point. + * @retval int + */ +int main(void) { + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU + * Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the + * Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* start tracealyzer trace recorder. + * TRC_INIT - not sure what that does. + * TRC_START - start recording immediately. + * TRC_TRC_START_AWAIT_HOST - trace recorder will halt execution and wait + * till host part of the code starts. Use this option if you want to see + * something that happens at the very start of the code execution. + * N.B.: Mind that with last option execution will not start unless host + * software is started. This option is really only for debugging purposes. + * */ + vTraceEnable(TRC_START); + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_DMA_Init(); + MX_ADC1_Init(); + MX_ADC2_Init(); + MX_ADC3_Init(); + MX_COMP1_Init(); + MX_COMP2_Init(); + MX_COMP4_Init(); + MX_COMP7_Init(); + MX_I2C1_Init(); + MX_OPAMP1_Init(); + MX_OPAMP2_Init(); + MX_OPAMP3_Init(); + MX_TIM1_Init(); + MX_TIM3_Init(); + MX_TIM4_Init(); + MX_USART3_UART_Init(); + /* USER CODE BEGIN 2 */ + HAL_TIM_IC_Start_IT(&htim3, TIM_CHANNEL_1); + HAL_TIM_IC_Start_IT(&htim3, TIM_CHANNEL_2); + // Place to mess about with PWM in + + HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED); + HAL_ADCEx_Calibration_Start(&hadc2, ADC_SINGLE_ENDED); + HAL_ADCEx_Calibration_Start(&hadc3, ADC_SINGLE_ENDED); + HAL_Delay(3000); + // fixme: what does this do? needs explanation. + quickHall = (GPIOB->IDR >> 6) & 0x7; + + /* Trying to fix this pernicious Opamp offset, implementing the calibration + routine apparently only works if the opamp is not in PGA mode. + * Sadly, it makes no damned difference, leaving this code here since it + possibly should be included regardless. hopamp1.Init.Mode = + OPAMP_STANDALONE_MODE ; HAL_OPAMP_Init(&hopamp1); + HAL_OPAMP_SelfCalibrate(&hopamp1); + HAL_Delay(50); + hopamp1.Init.Mode = OPAMP_PGA_MODE; + HAL_OPAMP_Init(&hopamp1); */ -int main(void) -{ - /* USER CODE BEGIN 1 */ - - /* USER CODE END 1 */ - - /* MCU Configuration--------------------------------------------------------*/ - - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); - - /* USER CODE BEGIN Init */ - - /* USER CODE END Init */ - - /* Configure the system clock */ - SystemClock_Config(); - - /* USER CODE BEGIN SysInit */ - - /* USER CODE END SysInit */ - - /* Initialize all configured peripherals */ - MX_GPIO_Init(); - MX_DMA_Init(); - MX_ADC1_Init(); - MX_ADC2_Init(); - MX_ADC3_Init(); - MX_COMP1_Init(); - MX_COMP2_Init(); - MX_COMP4_Init(); - MX_COMP7_Init(); - MX_I2C1_Init(); - MX_OPAMP1_Init(); - MX_OPAMP2_Init(); - MX_OPAMP3_Init(); - MX_TIM1_Init(); - MX_TIM3_Init(); - MX_TIM4_Init(); - MX_USART3_UART_Init(); - /* USER CODE BEGIN 2 */ - HAL_TIM_IC_Start_IT(&htim3, TIM_CHANNEL_1); - HAL_TIM_IC_Start_IT(&htim3, TIM_CHANNEL_2); - //Place to mess about with PWM in - - - HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED); - HAL_ADCEx_Calibration_Start(&hadc2, ADC_SINGLE_ENDED); - HAL_ADCEx_Calibration_Start(&hadc3, ADC_SINGLE_ENDED); - HAL_Delay(3000); -quickHall=(GPIOB->IDR>>6)&0x7; - - /* Trying to fix this pernicious Opamp offset, implementing the calibration routine apparently only works if the opamp is not in PGA mode. - * Sadly, it makes no damned difference, leaving this code here since it possibly should be included regardless. - hopamp1.Init.Mode = OPAMP_STANDALONE_MODE ; - HAL_OPAMP_Init(&hopamp1); - HAL_OPAMP_SelfCalibrate(&hopamp1); - HAL_Delay(50); - hopamp1.Init.Mode = OPAMP_PGA_MODE; - HAL_OPAMP_Init(&hopamp1); -*/ - - - - HAL_Delay(50); -HAL_OPAMP_Start(&hopamp1); -HAL_OPAMP_Start(&hopamp2); -HAL_OPAMP_Start(&hopamp3); - - -motor_init(); -hw_init(); -motor.Rphase=0.1; -BLDCInit(); -measurement_buffers.ADCOffset[0]=1900; -measurement_buffers.ADCOffset[1]=1900; -measurement_buffers.ADCOffset[2]=1900; - - - - - -HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1); -HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_1); -__HAL_TIM_SET_COUNTER(&htim1,10); - -HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_2); -HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_2); -__HAL_TIM_SET_COUNTER(&htim1,10); - -HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3); -HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_3); -__HAL_TIM_SET_COUNTER(&htim1,10); -/* -HAL_COMP_Start(&hcomp1); -HAL_COMP_Start(&hcomp2); -HAL_COMP_Start(&hcomp4); -HAL_COMP_Start(&hcomp7);*/ -__HAL_TIM_SET_COUNTER(&htim1,10); -HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&measurement_buffers.RawADC[0][0], 3); -__HAL_TIM_SET_COUNTER(&htim1,10); - -HAL_ADC_Start_DMA(&hadc2, (uint32_t*)&measurement_buffers.RawADC[1][0], 3); -__HAL_TIM_SET_COUNTER(&htim1,10); - -HAL_ADC_Start_DMA(&hadc3, (uint32_t*)&measurement_buffers.RawADC[2][0], 1); -//Here we can init the measurement buffer offsets; ADC and timer and interrupts are running... -HAL_Delay(100); -initing=0; - -__HAL_TIM_MOE_ENABLE(&htim1); // initialising the comparators triggers the break state - -BLDCVars.BLDCduty=70; - - - - //Add a little area in which I can mess about without the RTOS -while(1){ - HAL_Delay(100); - HAL_UART_Transmit(&huart3, "HelloWorld\r", 12, 10); -} - /* USER CODE END 2 */ - - /* Init scheduler */ - osKernelInitialize(); - - /* USER CODE BEGIN RTOS_MUTEX */ - /* add mutexes, ... */ - /* USER CODE END RTOS_MUTEX */ - /* USER CODE BEGIN RTOS_SEMAPHORES */ - /* add semaphores, ... */ - /* USER CODE END RTOS_SEMAPHORES */ - - /* USER CODE BEGIN RTOS_TIMERS */ - /* start timers, add new ones, ... */ - /* USER CODE END RTOS_TIMERS */ - - /* USER CODE BEGIN RTOS_QUEUES */ - /* add queues, ... */ - /* USER CODE END RTOS_QUEUES */ - - /* Create the thread(s) */ - /* creation of defaultTask */ - defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes); - - /* creation of SlowLoopTask */ - SlowLoopTaskHandle = osThreadNew(SlowLoopEntry, NULL, &SlowLoopTask_attributes); - - /* creation of ComsTask */ - ComsTaskHandle = osThreadNew(ComsTaskEntry, NULL, &ComsTask_attributes); - - /* creation of BatCheckTask */ - BatCheckTaskHandle = osThreadNew(BatCheck, NULL, &BatCheckTask_attributes); - - /* USER CODE BEGIN RTOS_THREADS */ - /* add threads, ... */ - /* USER CODE END RTOS_THREADS */ - - /* Start scheduler */ - osKernelStart(); - - /* We should never get here as control is now taken by the scheduler */ - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ - while (1) - { - /* USER CODE END WHILE */ - - /* USER CODE BEGIN 3 */ - } - /* USER CODE END 3 */ + HAL_Delay(50); + HAL_OPAMP_Start(&hopamp1); + HAL_OPAMP_Start(&hopamp2); + HAL_OPAMP_Start(&hopamp3); + + // fixme: this portion of the code requires explanation of what is + // happening. + motor_init(); + hw_init(); + motor.Rphase = 0.1; + BLDCInit(); + measurement_buffers.ADCOffset[0] = 1900; + measurement_buffers.ADCOffset[1] = 1900; + measurement_buffers.ADCOffset[2] = 1900; + + HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1); + HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_1); + __HAL_TIM_SET_COUNTER(&htim1, 10); + + HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_2); + HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_2); + __HAL_TIM_SET_COUNTER(&htim1, 10); + + HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3); + HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_3); + __HAL_TIM_SET_COUNTER(&htim1, 10); + /* + HAL_COMP_Start(&hcomp1); + HAL_COMP_Start(&hcomp2); + HAL_COMP_Start(&hcomp4); + HAL_COMP_Start(&hcomp7);*/ + __HAL_TIM_SET_COUNTER(&htim1, 10); + HAL_ADC_Start_DMA(&hadc1, (uint32_t *)&measurement_buffers.RawADC[0][0], 3); + __HAL_TIM_SET_COUNTER(&htim1, 10); + + HAL_ADC_Start_DMA(&hadc2, (uint32_t *)&measurement_buffers.RawADC[1][0], 3); + __HAL_TIM_SET_COUNTER(&htim1, 10); + + HAL_ADC_Start_DMA(&hadc3, (uint32_t *)&measurement_buffers.RawADC[2][0], 1); + // Here we can init the measurement buffer offsets; ADC and timer and + // interrupts are running... + HAL_Delay(100); + initing = 0; + + __HAL_TIM_MOE_ENABLE( + &htim1); // initialising the comparators triggers the break state + + BLDCVars.BLDCduty = 70; + + // Add a little area in which I can mess about without the RTOS + while (1) { + HAL_Delay(100); + // explicit typecasting to stop warning generation due to direct string + // argument. + HAL_UART_Transmit(&huart3, (uint8_t *)"HelloWorld\r", 12, 10); + } + /* USER CODE END 2 */ + + /* Init scheduler */ + osKernelInitialize(); + + /* USER CODE BEGIN RTOS_MUTEX */ + /* add mutexes, ... */ + /* USER CODE END RTOS_MUTEX */ + + /* USER CODE BEGIN RTOS_SEMAPHORES */ + /* add semaphores, ... */ + /* USER CODE END RTOS_SEMAPHORES */ + + /* USER CODE BEGIN RTOS_TIMERS */ + /* start timers, add new ones, ... */ + /* USER CODE END RTOS_TIMERS */ + + /* USER CODE BEGIN RTOS_QUEUES */ + /* add queues, ... */ + /* USER CODE END RTOS_QUEUES */ + + /* Create the thread(s) */ + /* creation of defaultTask */ + defaultTaskHandle = + osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes); + + /* creation of SlowLoopTask */ + SlowLoopTaskHandle = + osThreadNew(SlowLoopEntry, NULL, &SlowLoopTask_attributes); + + /* creation of ComsTask */ + ComsTaskHandle = osThreadNew(ComsTaskEntry, NULL, &ComsTask_attributes); + + /* creation of BatCheckTask */ + BatCheckTaskHandle = osThreadNew(BatCheck, NULL, &BatCheckTask_attributes); + + /* USER CODE BEGIN RTOS_THREADS */ + /* add threads, ... */ + /* USER CODE END RTOS_THREADS */ + + /* Start scheduler */ + osKernelStart(); + + /* We should never get here as control is now taken by the scheduler */ + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) { + /* USER CODE END WHILE */ + // TODO: should put a bit of panic code here. something that'll send a + // message through uart and set all motor controls in safe state. + // Perhaps outside of while loop. + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ } /** - * @brief System Clock Configuration - * @retval None - */ -void SystemClock_Config(void) -{ - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - - /** Initializes the RCC Oscillators according to the specified parameters - * in the RCC_OscInitTypeDef structure. - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; - RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { - Error_Handler(); - } - /** Initializes the CPU, AHB and APB buses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) - { - Error_Handler(); - } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB|RCC_PERIPHCLK_USART3 - |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_TIM1 - |RCC_PERIPHCLK_ADC12|RCC_PERIPHCLK_ADC34; - PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; - PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1; - PeriphClkInit.Adc34ClockSelection = RCC_ADC34PLLCLK_DIV1; - PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI; - PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; - PeriphClkInit.Tim1ClockSelection = RCC_TIM1CLK_HCLK; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - { - Error_Handler(); - } + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = + RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | + RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = + RCC_PERIPHCLK_USB | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_I2C1 | + RCC_PERIPHCLK_TIM1 | RCC_PERIPHCLK_ADC12 | RCC_PERIPHCLK_ADC34; + PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; + PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1; + PeriphClkInit.Adc34ClockSelection = RCC_ADC34PLLCLK_DIV1; + PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI; + PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; + PeriphClkInit.Tim1ClockSelection = RCC_TIM1CLK_HCLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } } /** - * @brief ADC1 Initialization Function - * @param None - * @retval None - */ -static void MX_ADC1_Init(void) -{ - - /* USER CODE BEGIN ADC1_Init 0 */ - - /* USER CODE END ADC1_Init 0 */ - - ADC_MultiModeTypeDef multimode = {0}; - ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0}; - ADC_ChannelConfTypeDef sConfig = {0}; - - /* USER CODE BEGIN ADC1_Init 1 */ - - /* USER CODE END ADC1_Init 1 */ - /** Common config - */ - hadc1.Instance = ADC1; - hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; - hadc1.Init.Resolution = ADC_RESOLUTION_12B; - hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - hadc1.Init.ContinuousConvMode = DISABLE; - hadc1.Init.DiscontinuousConvMode = DISABLE; - hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_FALLING; - hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_TRGO; - hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - hadc1.Init.NbrOfConversion = 3; - hadc1.Init.DMAContinuousRequests = ENABLE; - hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - hadc1.Init.LowPowerAutoWait = DISABLE; - hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; - if (HAL_ADC_Init(&hadc1) != HAL_OK) - { - Error_Handler(); - } - /** Configure the ADC multi-mode - */ - multimode.Mode = ADC_MODE_INDEPENDENT; - if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) - { - Error_Handler(); - } - /** Configure Analog WatchDog 1 - */ - AnalogWDGConfig.WatchdogNumber = ADC_ANALOGWATCHDOG_1; - AnalogWDGConfig.WatchdogMode = ADC_ANALOGWATCHDOG_SINGLE_REG; - AnalogWDGConfig.HighThreshold = 0; - AnalogWDGConfig.LowThreshold = 0; - AnalogWDGConfig.Channel = ADC_CHANNEL_1; - AnalogWDGConfig.ITMode = DISABLE; - if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK) - { - Error_Handler(); - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_3; - sConfig.Rank = ADC_REGULAR_RANK_1; - sConfig.SingleDiff = ADC_SINGLE_ENDED; - sConfig.SamplingTime = ADC_SAMPLETIME_61CYCLES_5; - sConfig.OffsetNumber = ADC_OFFSET_NONE; - sConfig.Offset = 0; - if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - { - Error_Handler(); - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_1; - sConfig.Rank = ADC_REGULAR_RANK_2; - if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - { - Error_Handler(); - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_4; - sConfig.Rank = ADC_REGULAR_RANK_3; - sConfig.SamplingTime = ADC_SAMPLETIME_4CYCLES_5; - if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN ADC1_Init 2 */ - - /* USER CODE END ADC1_Init 2 */ - + * @brief ADC1 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC1_Init(void) { + /* USER CODE BEGIN ADC1_Init 0 */ + + /* USER CODE END ADC1_Init 0 */ + + ADC_MultiModeTypeDef multimode = {0}; + ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0}; + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC1_Init 1 */ + + /* USER CODE END ADC1_Init 1 */ + /** Common config + */ + hadc1.Instance = ADC1; + hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc1.Init.Resolution = ADC_RESOLUTION_12B; + hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + hadc1.Init.ContinuousConvMode = DISABLE; + hadc1.Init.DiscontinuousConvMode = DISABLE; + hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_FALLING; + hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_TRGO; + hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc1.Init.NbrOfConversion = 3; + hadc1.Init.DMAContinuousRequests = ENABLE; + hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + hadc1.Init.LowPowerAutoWait = DISABLE; + hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; + if (HAL_ADC_Init(&hadc1) != HAL_OK) { + Error_Handler(); + } + /** Configure the ADC multi-mode + */ + multimode.Mode = ADC_MODE_INDEPENDENT; + if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) { + Error_Handler(); + } + /** Configure Analog WatchDog 1 + */ + AnalogWDGConfig.WatchdogNumber = ADC_ANALOGWATCHDOG_1; + AnalogWDGConfig.WatchdogMode = ADC_ANALOGWATCHDOG_SINGLE_REG; + AnalogWDGConfig.HighThreshold = 0; + AnalogWDGConfig.LowThreshold = 0; + AnalogWDGConfig.Channel = ADC_CHANNEL_1; + AnalogWDGConfig.ITMode = DISABLE; + if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK) { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_3; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SingleDiff = ADC_SINGLE_ENDED; + sConfig.SamplingTime = ADC_SAMPLETIME_61CYCLES_5; + sConfig.OffsetNumber = ADC_OFFSET_NONE; + sConfig.Offset = 0; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_1; + sConfig.Rank = ADC_REGULAR_RANK_2; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_4; + sConfig.Rank = ADC_REGULAR_RANK_3; + sConfig.SamplingTime = ADC_SAMPLETIME_4CYCLES_5; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN ADC1_Init 2 */ + + /* USER CODE END ADC1_Init 2 */ } /** - * @brief ADC2 Initialization Function - * @param None - * @retval None - */ -static void MX_ADC2_Init(void) -{ - - /* USER CODE BEGIN ADC2_Init 0 */ - - /* USER CODE END ADC2_Init 0 */ - - ADC_ChannelConfTypeDef sConfig = {0}; - - /* USER CODE BEGIN ADC2_Init 1 */ - - /* USER CODE END ADC2_Init 1 */ - /** Common config - */ - hadc2.Instance = ADC2; - hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; - hadc2.Init.Resolution = ADC_RESOLUTION_12B; - hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE; - hadc2.Init.ContinuousConvMode = DISABLE; - hadc2.Init.DiscontinuousConvMode = DISABLE; - hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_FALLING; - hadc2.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_TRGO; - hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; - hadc2.Init.NbrOfConversion = 3; - hadc2.Init.DMAContinuousRequests = ENABLE; - hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV; - hadc2.Init.LowPowerAutoWait = DISABLE; - hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; - if (HAL_ADC_Init(&hadc2) != HAL_OK) - { - Error_Handler(); - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_3; - sConfig.Rank = ADC_REGULAR_RANK_1; - sConfig.SingleDiff = ADC_SINGLE_ENDED; - sConfig.SamplingTime = ADC_SAMPLETIME_61CYCLES_5; - sConfig.OffsetNumber = ADC_OFFSET_NONE; - sConfig.Offset = 0; - if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - { - Error_Handler(); - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_1; - sConfig.Rank = ADC_REGULAR_RANK_2; - sConfig.SamplingTime = ADC_SAMPLETIME_4CYCLES_5; - if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - { - Error_Handler(); - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_2; - sConfig.Rank = ADC_REGULAR_RANK_3; - if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN ADC2_Init 2 */ - - /* USER CODE END ADC2_Init 2 */ - + * @brief ADC2 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC2_Init(void) { + /* USER CODE BEGIN ADC2_Init 0 */ + + /* USER CODE END ADC2_Init 0 */ + + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC2_Init 1 */ + + /* USER CODE END ADC2_Init 1 */ + /** Common config + */ + hadc2.Instance = ADC2; + hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc2.Init.Resolution = ADC_RESOLUTION_12B; + hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE; + hadc2.Init.ContinuousConvMode = DISABLE; + hadc2.Init.DiscontinuousConvMode = DISABLE; + hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_FALLING; + hadc2.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_TRGO; + hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc2.Init.NbrOfConversion = 3; + hadc2.Init.DMAContinuousRequests = ENABLE; + hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV; + hadc2.Init.LowPowerAutoWait = DISABLE; + hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; + if (HAL_ADC_Init(&hadc2) != HAL_OK) { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_3; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SingleDiff = ADC_SINGLE_ENDED; + sConfig.SamplingTime = ADC_SAMPLETIME_61CYCLES_5; + sConfig.OffsetNumber = ADC_OFFSET_NONE; + sConfig.Offset = 0; + if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_1; + sConfig.Rank = ADC_REGULAR_RANK_2; + sConfig.SamplingTime = ADC_SAMPLETIME_4CYCLES_5; + if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_2; + sConfig.Rank = ADC_REGULAR_RANK_3; + if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN ADC2_Init 2 */ + + /* USER CODE END ADC2_Init 2 */ } /** - * @brief ADC3 Initialization Function - * @param None - * @retval None - */ -static void MX_ADC3_Init(void) -{ - - /* USER CODE BEGIN ADC3_Init 0 */ - - /* USER CODE END ADC3_Init 0 */ - - ADC_MultiModeTypeDef multimode = {0}; - ADC_ChannelConfTypeDef sConfig = {0}; - - /* USER CODE BEGIN ADC3_Init 1 */ - - /* USER CODE END ADC3_Init 1 */ - /** Common config - */ - hadc3.Instance = ADC3; - hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; - hadc3.Init.Resolution = ADC_RESOLUTION_12B; - hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - hadc3.Init.ContinuousConvMode = DISABLE; - hadc3.Init.DiscontinuousConvMode = DISABLE; - hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_FALLING; - hadc3.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_TRGO; - hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - hadc3.Init.NbrOfConversion = 1; - hadc3.Init.DMAContinuousRequests = ENABLE; - hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV; - hadc3.Init.LowPowerAutoWait = DISABLE; - hadc3.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; - if (HAL_ADC_Init(&hadc3) != HAL_OK) - { - Error_Handler(); - } - /** Configure the ADC multi-mode - */ - multimode.Mode = ADC_MODE_INDEPENDENT; - if (HAL_ADCEx_MultiModeConfigChannel(&hadc3, &multimode) != HAL_OK) - { - Error_Handler(); - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_1; - sConfig.Rank = ADC_REGULAR_RANK_1; - sConfig.SingleDiff = ADC_SINGLE_ENDED; - sConfig.SamplingTime = ADC_SAMPLETIME_61CYCLES_5; - sConfig.OffsetNumber = ADC_OFFSET_NONE; - sConfig.Offset = 0; - if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN ADC3_Init 2 */ - - /* USER CODE END ADC3_Init 2 */ - + * @brief ADC3 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC3_Init(void) { + /* USER CODE BEGIN ADC3_Init 0 */ + + /* USER CODE END ADC3_Init 0 */ + + ADC_MultiModeTypeDef multimode = {0}; + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC3_Init 1 */ + + /* USER CODE END ADC3_Init 1 */ + /** Common config + */ + hadc3.Instance = ADC3; + hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc3.Init.Resolution = ADC_RESOLUTION_12B; + hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc3.Init.ContinuousConvMode = DISABLE; + hadc3.Init.DiscontinuousConvMode = DISABLE; + hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_FALLING; + hadc3.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_TRGO; + hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc3.Init.NbrOfConversion = 1; + hadc3.Init.DMAContinuousRequests = ENABLE; + hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV; + hadc3.Init.LowPowerAutoWait = DISABLE; + hadc3.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; + if (HAL_ADC_Init(&hadc3) != HAL_OK) { + Error_Handler(); + } + /** Configure the ADC multi-mode + */ + multimode.Mode = ADC_MODE_INDEPENDENT; + if (HAL_ADCEx_MultiModeConfigChannel(&hadc3, &multimode) != HAL_OK) { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_1; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SingleDiff = ADC_SINGLE_ENDED; + sConfig.SamplingTime = ADC_SAMPLETIME_61CYCLES_5; + sConfig.OffsetNumber = ADC_OFFSET_NONE; + sConfig.Offset = 0; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN ADC3_Init 2 */ + + /* USER CODE END ADC3_Init 2 */ } /** - * @brief COMP1 Initialization Function - * @param None - * @retval None - */ -static void MX_COMP1_Init(void) -{ - - /* USER CODE BEGIN COMP1_Init 0 */ - - /* USER CODE END COMP1_Init 0 */ - - /* USER CODE BEGIN COMP1_Init 1 */ - - /* USER CODE END COMP1_Init 1 */ - hcomp1.Instance = COMP1; - hcomp1.Init.InvertingInput = COMP_INVERTINGINPUT_1_4VREFINT; - hcomp1.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; - hcomp1.Init.Output = COMP_OUTPUT_TIM1BKIN2; - hcomp1.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; - hcomp1.Init.Hysteresis = COMP_HYSTERESIS_NONE; - hcomp1.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; - hcomp1.Init.Mode = COMP_MODE_HIGHSPEED; - hcomp1.Init.WindowMode = COMP_WINDOWMODE_DISABLE; - hcomp1.Init.TriggerMode = COMP_TRIGGERMODE_NONE; - if (HAL_COMP_Init(&hcomp1) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN COMP1_Init 2 */ - - /* USER CODE END COMP1_Init 2 */ - + * @brief COMP1 Initialization Function + * @param None + * @retval None + */ +static void MX_COMP1_Init(void) { + /* USER CODE BEGIN COMP1_Init 0 */ + + /* USER CODE END COMP1_Init 0 */ + + /* USER CODE BEGIN COMP1_Init 1 */ + + /* USER CODE END COMP1_Init 1 */ + hcomp1.Instance = COMP1; + hcomp1.Init.InvertingInput = COMP_INVERTINGINPUT_1_4VREFINT; + hcomp1.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; + hcomp1.Init.Output = COMP_OUTPUT_TIM1BKIN2; + hcomp1.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; + hcomp1.Init.Hysteresis = COMP_HYSTERESIS_NONE; + hcomp1.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; + hcomp1.Init.Mode = COMP_MODE_HIGHSPEED; + hcomp1.Init.WindowMode = COMP_WINDOWMODE_DISABLE; + hcomp1.Init.TriggerMode = COMP_TRIGGERMODE_NONE; + if (HAL_COMP_Init(&hcomp1) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN COMP1_Init 2 */ + + /* USER CODE END COMP1_Init 2 */ } /** - * @brief COMP2 Initialization Function - * @param None - * @retval None - */ -static void MX_COMP2_Init(void) -{ - - /* USER CODE BEGIN COMP2_Init 0 */ - - /* USER CODE END COMP2_Init 0 */ - - /* USER CODE BEGIN COMP2_Init 1 */ - - /* USER CODE END COMP2_Init 1 */ - hcomp2.Instance = COMP2; - hcomp2.Init.InvertingInput = COMP_INVERTINGINPUT_1_4VREFINT; - hcomp2.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; - hcomp2.Init.Output = COMP_OUTPUT_TIM1BKIN2; - hcomp2.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; - hcomp2.Init.Hysteresis = COMP_HYSTERESIS_NONE; - hcomp2.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; - hcomp2.Init.Mode = COMP_MODE_HIGHSPEED; - hcomp2.Init.WindowMode = COMP_WINDOWMODE_DISABLE; - hcomp2.Init.TriggerMode = COMP_TRIGGERMODE_NONE; - if (HAL_COMP_Init(&hcomp2) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN COMP2_Init 2 */ - - /* USER CODE END COMP2_Init 2 */ - + * @brief COMP2 Initialization Function + * @param None + * @retval None + */ +static void MX_COMP2_Init(void) { + /* USER CODE BEGIN COMP2_Init 0 */ + + /* USER CODE END COMP2_Init 0 */ + + /* USER CODE BEGIN COMP2_Init 1 */ + + /* USER CODE END COMP2_Init 1 */ + hcomp2.Instance = COMP2; + hcomp2.Init.InvertingInput = COMP_INVERTINGINPUT_1_4VREFINT; + hcomp2.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; + hcomp2.Init.Output = COMP_OUTPUT_TIM1BKIN2; + hcomp2.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; + hcomp2.Init.Hysteresis = COMP_HYSTERESIS_NONE; + hcomp2.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; + hcomp2.Init.Mode = COMP_MODE_HIGHSPEED; + hcomp2.Init.WindowMode = COMP_WINDOWMODE_DISABLE; + hcomp2.Init.TriggerMode = COMP_TRIGGERMODE_NONE; + if (HAL_COMP_Init(&hcomp2) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN COMP2_Init 2 */ + + /* USER CODE END COMP2_Init 2 */ } /** - * @brief COMP4 Initialization Function - * @param None - * @retval None - */ -static void MX_COMP4_Init(void) -{ - - /* USER CODE BEGIN COMP4_Init 0 */ - - /* USER CODE END COMP4_Init 0 */ - - /* USER CODE BEGIN COMP4_Init 1 */ - - /* USER CODE END COMP4_Init 1 */ - hcomp4.Instance = COMP4; - hcomp4.Init.InvertingInput = COMP_INVERTINGINPUT_1_4VREFINT; - hcomp4.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; - hcomp4.Init.Output = COMP_OUTPUT_TIM1BKIN2; - hcomp4.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; - hcomp4.Init.Hysteresis = COMP_HYSTERESIS_NONE; - hcomp4.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; - hcomp4.Init.Mode = COMP_MODE_HIGHSPEED; - hcomp4.Init.WindowMode = COMP_WINDOWMODE_DISABLE; - hcomp4.Init.TriggerMode = COMP_TRIGGERMODE_NONE; - if (HAL_COMP_Init(&hcomp4) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN COMP4_Init 2 */ - - /* USER CODE END COMP4_Init 2 */ - + * @brief COMP4 Initialization Function + * @param None + * @retval None + */ +static void MX_COMP4_Init(void) { + /* USER CODE BEGIN COMP4_Init 0 */ + + /* USER CODE END COMP4_Init 0 */ + + /* USER CODE BEGIN COMP4_Init 1 */ + + /* USER CODE END COMP4_Init 1 */ + hcomp4.Instance = COMP4; + hcomp4.Init.InvertingInput = COMP_INVERTINGINPUT_1_4VREFINT; + hcomp4.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; + hcomp4.Init.Output = COMP_OUTPUT_TIM1BKIN2; + hcomp4.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; + hcomp4.Init.Hysteresis = COMP_HYSTERESIS_NONE; + hcomp4.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; + hcomp4.Init.Mode = COMP_MODE_HIGHSPEED; + hcomp4.Init.WindowMode = COMP_WINDOWMODE_DISABLE; + hcomp4.Init.TriggerMode = COMP_TRIGGERMODE_NONE; + if (HAL_COMP_Init(&hcomp4) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN COMP4_Init 2 */ + + /* USER CODE END COMP4_Init 2 */ } /** - * @brief COMP7 Initialization Function - * @param None - * @retval None - */ -static void MX_COMP7_Init(void) -{ - - /* USER CODE BEGIN COMP7_Init 0 */ - - /* USER CODE END COMP7_Init 0 */ - - /* USER CODE BEGIN COMP7_Init 1 */ - - /* USER CODE END COMP7_Init 1 */ - hcomp7.Instance = COMP7; - hcomp7.Init.InvertingInput = COMP_INVERTINGINPUT_3_4VREFINT; - hcomp7.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; - hcomp7.Init.Output = COMP_OUTPUT_TIM1BKIN2; - hcomp7.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; - hcomp7.Init.Hysteresis = COMP_HYSTERESIS_NONE; - hcomp7.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; - hcomp7.Init.Mode = COMP_MODE_HIGHSPEED; - hcomp7.Init.WindowMode = COMP_WINDOWMODE_DISABLE; - hcomp7.Init.TriggerMode = COMP_TRIGGERMODE_NONE; - if (HAL_COMP_Init(&hcomp7) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN COMP7_Init 2 */ - - /* USER CODE END COMP7_Init 2 */ - + * @brief COMP7 Initialization Function + * @param None + * @retval None + */ +static void MX_COMP7_Init(void) { + /* USER CODE BEGIN COMP7_Init 0 */ + + /* USER CODE END COMP7_Init 0 */ + + /* USER CODE BEGIN COMP7_Init 1 */ + + /* USER CODE END COMP7_Init 1 */ + hcomp7.Instance = COMP7; + hcomp7.Init.InvertingInput = COMP_INVERTINGINPUT_3_4VREFINT; + hcomp7.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; + hcomp7.Init.Output = COMP_OUTPUT_TIM1BKIN2; + hcomp7.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; + hcomp7.Init.Hysteresis = COMP_HYSTERESIS_NONE; + hcomp7.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; + hcomp7.Init.Mode = COMP_MODE_HIGHSPEED; + hcomp7.Init.WindowMode = COMP_WINDOWMODE_DISABLE; + hcomp7.Init.TriggerMode = COMP_TRIGGERMODE_NONE; + if (HAL_COMP_Init(&hcomp7) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN COMP7_Init 2 */ + + /* USER CODE END COMP7_Init 2 */ } /** - * @brief I2C1 Initialization Function - * @param None - * @retval None - */ -static void MX_I2C1_Init(void) -{ - - /* USER CODE BEGIN I2C1_Init 0 */ - - /* USER CODE END I2C1_Init 0 */ - - /* USER CODE BEGIN I2C1_Init 1 */ - - /* USER CODE END I2C1_Init 1 */ - hi2c1.Instance = I2C1; - hi2c1.Init.Timing = 0x0000020B; - hi2c1.Init.OwnAddress1 = 0; - hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - hi2c1.Init.OwnAddress2 = 0; - hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; - hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - if (HAL_I2C_Init(&hi2c1) != HAL_OK) - { - Error_Handler(); - } - /** Configure Analogue filter - */ - if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) - { - Error_Handler(); - } - /** Configure Digital filter - */ - if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN I2C1_Init 2 */ - - /* USER CODE END I2C1_Init 2 */ - + * @brief I2C1 Initialization Function + * @param None + * @retval None + */ +static void MX_I2C1_Init(void) { + /* USER CODE BEGIN I2C1_Init 0 */ + + /* USER CODE END I2C1_Init 0 */ + + /* USER CODE BEGIN I2C1_Init 1 */ + + /* USER CODE END I2C1_Init 1 */ + hi2c1.Instance = I2C1; + hi2c1.Init.Timing = 0x0000020B; + hi2c1.Init.OwnAddress1 = 0; + hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; + hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; + hi2c1.Init.OwnAddress2 = 0; + hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; + hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; + hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + if (HAL_I2C_Init(&hi2c1) != HAL_OK) { + Error_Handler(); + } + /** Configure Analogue filter + */ + if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != + HAL_OK) { + Error_Handler(); + } + /** Configure Digital filter + */ + if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN I2C1_Init 2 */ + + /* USER CODE END I2C1_Init 2 */ } /** - * @brief OPAMP1 Initialization Function - * @param None - * @retval None - */ -static void MX_OPAMP1_Init(void) -{ - - /* USER CODE BEGIN OPAMP1_Init 0 */ - - /* USER CODE END OPAMP1_Init 0 */ - - /* USER CODE BEGIN OPAMP1_Init 1 */ - - /* USER CODE END OPAMP1_Init 1 */ - hopamp1.Instance = OPAMP1; - hopamp1.Init.Mode = OPAMP_PGA_MODE; - hopamp1.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0; - hopamp1.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE; - hopamp1.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_NO; - hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_16; - hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY; - if (HAL_OPAMP_Init(&hopamp1) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN OPAMP1_Init 2 */ - - /* USER CODE END OPAMP1_Init 2 */ - + * @brief OPAMP1 Initialization Function + * @param None + * @retval None + */ +static void MX_OPAMP1_Init(void) { + /* USER CODE BEGIN OPAMP1_Init 0 */ + + /* USER CODE END OPAMP1_Init 0 */ + + /* USER CODE BEGIN OPAMP1_Init 1 */ + + /* USER CODE END OPAMP1_Init 1 */ + hopamp1.Instance = OPAMP1; + hopamp1.Init.Mode = OPAMP_PGA_MODE; + hopamp1.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0; + hopamp1.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE; + hopamp1.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_NO; + hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_16; + hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY; + if (HAL_OPAMP_Init(&hopamp1) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN OPAMP1_Init 2 */ + + /* USER CODE END OPAMP1_Init 2 */ } /** - * @brief OPAMP2 Initialization Function - * @param None - * @retval None - */ -static void MX_OPAMP2_Init(void) -{ - - /* USER CODE BEGIN OPAMP2_Init 0 */ - - /* USER CODE END OPAMP2_Init 0 */ - - /* USER CODE BEGIN OPAMP2_Init 1 */ - - /* USER CODE END OPAMP2_Init 1 */ - hopamp2.Instance = OPAMP2; - hopamp2.Init.Mode = OPAMP_PGA_MODE; - hopamp2.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0; - hopamp2.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE; - hopamp2.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_NO; - hopamp2.Init.PgaGain = OPAMP_PGA_GAIN_16; - hopamp2.Init.UserTrimming = OPAMP_TRIMMING_FACTORY; - if (HAL_OPAMP_Init(&hopamp2) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN OPAMP2_Init 2 */ - - /* USER CODE END OPAMP2_Init 2 */ - + * @brief OPAMP2 Initialization Function + * @param None + * @retval None + */ +static void MX_OPAMP2_Init(void) { + /* USER CODE BEGIN OPAMP2_Init 0 */ + + /* USER CODE END OPAMP2_Init 0 */ + + /* USER CODE BEGIN OPAMP2_Init 1 */ + + /* USER CODE END OPAMP2_Init 1 */ + hopamp2.Instance = OPAMP2; + hopamp2.Init.Mode = OPAMP_PGA_MODE; + hopamp2.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0; + hopamp2.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE; + hopamp2.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_NO; + hopamp2.Init.PgaGain = OPAMP_PGA_GAIN_16; + hopamp2.Init.UserTrimming = OPAMP_TRIMMING_FACTORY; + if (HAL_OPAMP_Init(&hopamp2) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN OPAMP2_Init 2 */ + + /* USER CODE END OPAMP2_Init 2 */ } /** - * @brief OPAMP3 Initialization Function - * @param None - * @retval None - */ -static void MX_OPAMP3_Init(void) -{ - - /* USER CODE BEGIN OPAMP3_Init 0 */ - - /* USER CODE END OPAMP3_Init 0 */ - - /* USER CODE BEGIN OPAMP3_Init 1 */ - - /* USER CODE END OPAMP3_Init 1 */ - hopamp3.Instance = OPAMP3; - hopamp3.Init.Mode = OPAMP_PGA_MODE; - hopamp3.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0; - hopamp3.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE; - hopamp3.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_NO; - hopamp3.Init.PgaGain = OPAMP_PGA_GAIN_16; - hopamp3.Init.UserTrimming = OPAMP_TRIMMING_FACTORY; - if (HAL_OPAMP_Init(&hopamp3) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN OPAMP3_Init 2 */ - - /* USER CODE END OPAMP3_Init 2 */ - + * @brief OPAMP3 Initialization Function + * @param None + * @retval None + */ +static void MX_OPAMP3_Init(void) { + /* USER CODE BEGIN OPAMP3_Init 0 */ + + /* USER CODE END OPAMP3_Init 0 */ + + /* USER CODE BEGIN OPAMP3_Init 1 */ + + /* USER CODE END OPAMP3_Init 1 */ + hopamp3.Instance = OPAMP3; + hopamp3.Init.Mode = OPAMP_PGA_MODE; + hopamp3.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0; + hopamp3.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE; + hopamp3.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_NO; + hopamp3.Init.PgaGain = OPAMP_PGA_GAIN_16; + hopamp3.Init.UserTrimming = OPAMP_TRIMMING_FACTORY; + if (HAL_OPAMP_Init(&hopamp3) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN OPAMP3_Init 2 */ + + /* USER CODE END OPAMP3_Init 2 */ } /** - * @brief TIM1 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM1_Init(void) -{ - - /* USER CODE BEGIN TIM1_Init 0 */ - - /* USER CODE END TIM1_Init 0 */ - - TIM_MasterConfigTypeDef sMasterConfig = {0}; - TIM_OC_InitTypeDef sConfigOC = {0}; - TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; - - /* USER CODE BEGIN TIM1_Init 1 */ - - /* USER CODE END TIM1_Init 1 */ - htim1.Instance = TIM1; - htim1.Init.Prescaler = 0; - htim1.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED1; - htim1.Init.Period = 1023; - htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim1.Init.RepetitionCounter = 0; - htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) - { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_OC4REF; - sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) - { - Error_Handler(); - } - sConfigOC.OCMode = TIM_OCMODE_PWM1; - sConfigOC.Pulse = 512; - sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; - sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; - sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; - if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - { - Error_Handler(); - } - sConfigOC.Pulse = 5; - if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) - { - Error_Handler(); - } - sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_ENABLE; - sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_ENABLE; - sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - sBreakDeadTimeConfig.DeadTime = 30; - sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; - sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - sBreakDeadTimeConfig.BreakFilter = 0; - sBreakDeadTimeConfig.Break2State = TIM_BREAK2_ENABLE; - sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; - sBreakDeadTimeConfig.Break2Filter = 6; - sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN TIM1_Init 2 */ - - /* USER CODE END TIM1_Init 2 */ - HAL_TIM_MspPostInit(&htim1); - + * @brief TIM1 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM1_Init(void) { + /* USER CODE BEGIN TIM1_Init 0 */ + + /* USER CODE END TIM1_Init 0 */ + + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + + /* USER CODE BEGIN TIM1_Init 1 */ + + /* USER CODE END TIM1_Init 1 */ + htim1.Instance = TIM1; + htim1.Init.Prescaler = 0; + htim1.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED1; + htim1.Init.Period = 1023; + htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim1.Init.RepetitionCounter = 0; + htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_OC4REF; + sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != + HAL_OK) { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 512; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; + if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != + HAL_OK) { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != + HAL_OK) { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != + HAL_OK) { + Error_Handler(); + } + sConfigOC.Pulse = 5; + if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_4) != + HAL_OK) { + Error_Handler(); + } + sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_ENABLE; + sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_ENABLE; + sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + sBreakDeadTimeConfig.DeadTime = 30; + sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + sBreakDeadTimeConfig.BreakFilter = 0; + sBreakDeadTimeConfig.Break2State = TIM_BREAK2_ENABLE; + sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + sBreakDeadTimeConfig.Break2Filter = 6; + sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != + HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN TIM1_Init 2 */ + + /* USER CODE END TIM1_Init 2 */ + HAL_TIM_MspPostInit(&htim1); } /** - * @brief TIM3 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM3_Init(void) -{ - - /* USER CODE BEGIN TIM3_Init 0 */ - - /* USER CODE END TIM3_Init 0 */ - - TIM_SlaveConfigTypeDef sSlaveConfig = {0}; - TIM_MasterConfigTypeDef sMasterConfig = {0}; - TIM_IC_InitTypeDef sConfigIC = {0}; - - /* USER CODE BEGIN TIM3_Init 1 */ - - /* USER CODE END TIM3_Init 1 */ - htim3.Instance = TIM3; - htim3.Init.Prescaler = 71; - htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - htim3.Init.Period = 65535; - htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - if (HAL_TIM_Base_Init(&htim3) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_IC_Init(&htim3) != HAL_OK) - { - Error_Handler(); - } - sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET; - sSlaveConfig.InputTrigger = TIM_TS_TI1FP1; - sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - sSlaveConfig.TriggerFilter = 0; - if (HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig) != HAL_OK) - { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - { - Error_Handler(); - } - sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI; - sConfigIC.ICPrescaler = TIM_ICPSC_DIV1; - sConfigIC.ICFilter = 0; - if (HAL_TIM_IC_ConfigChannel(&htim3, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) - { - Error_Handler(); - } - sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING; - sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI; - if (HAL_TIM_IC_ConfigChannel(&htim3, &sConfigIC, TIM_CHANNEL_2) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN TIM3_Init 2 */ - - /* USER CODE END TIM3_Init 2 */ - + * @brief TIM3 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM3_Init(void) { + /* USER CODE BEGIN TIM3_Init 0 */ + + /* USER CODE END TIM3_Init 0 */ + + TIM_SlaveConfigTypeDef sSlaveConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_IC_InitTypeDef sConfigIC = {0}; + + /* USER CODE BEGIN TIM3_Init 1 */ + + /* USER CODE END TIM3_Init 1 */ + htim3.Instance = TIM3; + htim3.Init.Prescaler = 71; + htim3.Init.CounterMode = TIM_COUNTERMODE_UP; + htim3.Init.Period = 65535; + htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim3) != HAL_OK) { + Error_Handler(); + } + if (HAL_TIM_IC_Init(&htim3) != HAL_OK) { + Error_Handler(); + } + sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET; + sSlaveConfig.InputTrigger = TIM_TS_TI1FP1; + sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING; + sSlaveConfig.TriggerFilter = 0; + if (HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig) != HAL_OK) { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != + HAL_OK) { + Error_Handler(); + } + sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING; + sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI; + sConfigIC.ICPrescaler = TIM_ICPSC_DIV1; + sConfigIC.ICFilter = 0; + if (HAL_TIM_IC_ConfigChannel(&htim3, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) { + Error_Handler(); + } + sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING; + sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI; + if (HAL_TIM_IC_ConfigChannel(&htim3, &sConfigIC, TIM_CHANNEL_2) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN TIM3_Init 2 */ + + /* USER CODE END TIM3_Init 2 */ } /** - * @brief TIM4 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM4_Init(void) -{ - - /* USER CODE BEGIN TIM4_Init 0 */ - - /* USER CODE END TIM4_Init 0 */ - - TIM_SlaveConfigTypeDef sSlaveConfig = {0}; - TIM_MasterConfigTypeDef sMasterConfig = {0}; - TIM_IC_InitTypeDef sConfigIC = {0}; - - /* USER CODE BEGIN TIM4_Init 1 */ - - /* USER CODE END TIM4_Init 1 */ - htim4.Instance = TIM4; - htim4.Init.Prescaler = 109; - htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - htim4.Init.Period = 65535; - htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_IC_Init(&htim4) != HAL_OK) - { - Error_Handler(); - } - sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET; - sSlaveConfig.InputTrigger = TIM_TS_TI1F_ED; - sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - sSlaveConfig.TriggerFilter = 0; - if (HAL_TIM_SlaveConfigSynchro(&htim4, &sSlaveConfig) != HAL_OK) - { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - { - Error_Handler(); - } - sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI; - sConfigIC.ICPrescaler = TIM_ICPSC_DIV1; - sConfigIC.ICFilter = 0; - if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_2) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_3) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_ConfigTI1Input(&htim4, TIM_TI1SELECTION_XORCOMBINATION) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN TIM4_Init 2 */ - - /* USER CODE END TIM4_Init 2 */ - + * @brief TIM4 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM4_Init(void) { + /* USER CODE BEGIN TIM4_Init 0 */ + + /* USER CODE END TIM4_Init 0 */ + + TIM_SlaveConfigTypeDef sSlaveConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_IC_InitTypeDef sConfigIC = {0}; + + /* USER CODE BEGIN TIM4_Init 1 */ + + /* USER CODE END TIM4_Init 1 */ + htim4.Instance = TIM4; + htim4.Init.Prescaler = 109; + htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + htim4.Init.Period = 65535; + htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim4) != HAL_OK) { + Error_Handler(); + } + if (HAL_TIM_IC_Init(&htim4) != HAL_OK) { + Error_Handler(); + } + sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET; + sSlaveConfig.InputTrigger = TIM_TS_TI1F_ED; + sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING; + sSlaveConfig.TriggerFilter = 0; + if (HAL_TIM_SlaveConfigSynchro(&htim4, &sSlaveConfig) != HAL_OK) { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != + HAL_OK) { + Error_Handler(); + } + sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING; + sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI; + sConfigIC.ICPrescaler = TIM_ICPSC_DIV1; + sConfigIC.ICFilter = 0; + if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) { + Error_Handler(); + } + if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_2) != HAL_OK) { + Error_Handler(); + } + if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_3) != HAL_OK) { + Error_Handler(); + } + if (HAL_TIM_ConfigTI1Input(&htim4, TIM_TI1SELECTION_XORCOMBINATION) != + HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN TIM4_Init 2 */ + + /* USER CODE END TIM4_Init 2 */ } /** - * @brief USART3 Initialization Function - * @param None - * @retval None - */ -static void MX_USART3_UART_Init(void) -{ - - /* USER CODE BEGIN USART3_Init 0 */ - - /* USER CODE END USART3_Init 0 */ - - /* USER CODE BEGIN USART3_Init 1 */ - - /* USER CODE END USART3_Init 1 */ - huart3.Instance = USART3; - huart3.Init.BaudRate = 115200; - huart3.Init.WordLength = UART_WORDLENGTH_8B; - huart3.Init.StopBits = UART_STOPBITS_1; - huart3.Init.Parity = UART_PARITY_NONE; - huart3.Init.Mode = UART_MODE_TX_RX; - huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart3.Init.OverSampling = UART_OVERSAMPLING_16; - huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - if (HAL_UART_Init(&huart3) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN USART3_Init 2 */ - - /* USER CODE END USART3_Init 2 */ - + * @brief USART3 Initialization Function + * @param None + * @retval None + */ +static void MX_USART3_UART_Init(void) { + /* USER CODE BEGIN USART3_Init 0 */ + + /* USER CODE END USART3_Init 0 */ + + /* USER CODE BEGIN USART3_Init 1 */ + + /* USER CODE END USART3_Init 1 */ + huart3.Instance = USART3; + huart3.Init.BaudRate = 115200; + huart3.Init.WordLength = UART_WORDLENGTH_8B; + huart3.Init.StopBits = UART_STOPBITS_1; + huart3.Init.Parity = UART_PARITY_NONE; + huart3.Init.Mode = UART_MODE_TX_RX; + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart3.Init.OverSampling = UART_OVERSAMPLING_16; + huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart3) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN USART3_Init 2 */ + + /* USER CODE END USART3_Init 2 */ } /** - * Enable DMA controller clock - */ -static void MX_DMA_Init(void) -{ - - /* DMA controller clock enable */ - __HAL_RCC_DMA1_CLK_ENABLE(); - __HAL_RCC_DMA2_CLK_ENABLE(); - - /* DMA interrupt init */ - /* DMA1_Channel1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); - /* DMA1_Channel2_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn); - /* DMA1_Channel3_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn); - /* DMA1_Channel6_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn); - /* DMA1_Channel7_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn); - /* DMA2_Channel1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Channel1_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Channel1_IRQn); - /* DMA2_Channel5_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Channel5_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Channel5_IRQn); - + * Enable DMA controller clock + */ +static void MX_DMA_Init(void) { + /* DMA controller clock enable */ + __HAL_RCC_DMA1_CLK_ENABLE(); + __HAL_RCC_DMA2_CLK_ENABLE(); + + /* DMA interrupt init */ + /* DMA1_Channel1_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); + /* DMA1_Channel2_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn); + /* DMA1_Channel3_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn); + /* DMA1_Channel6_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn); + /* DMA1_Channel7_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn); + /* DMA2_Channel1_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Channel1_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Channel1_IRQn); + /* DMA2_Channel5_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Channel5_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Channel5_IRQn); } /** - * @brief GPIO Initialization Function - * @param None - * @retval None - */ -static void MX_GPIO_Init(void) -{ - - /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOF_CLK_ENABLE(); - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) { + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); } /* USER CODE BEGIN 4 */ -void HAL_ADC_ConvcpltCallback(ADC_HandleTypeDef* hadc){ - -} +void HAL_ADC_ConvcpltCallback(ADC_HandleTypeDef *hadc) {} /* USER CODE END 4 */ /* USER CODE BEGIN Header_StartDefaultTask */ /** - * @brief Function implementing the defaultTask thread. - * @param argument: Not used - * @retval None - */ + * @brief Function implementing the defaultTask thread. + * @param argument: Not used + * @retval None + */ /* USER CODE END Header_StartDefaultTask */ -void StartDefaultTask(void *argument) -{ - /* init code for USB_DEVICE */ - MX_USB_DEVICE_Init(); - /* USER CODE BEGIN 5 */ - /* Infinite loop */ - for(;;) - { - osDelay(1); - } - /* USER CODE END 5 */ +void StartDefaultTask(void *argument) { + /* init code for USB_DEVICE */ + MX_USB_DEVICE_Init(); + /* USER CODE BEGIN 5 */ + /* Infinite loop */ + for (;;) { + osDelay(1); + } + /* USER CODE END 5 */ } /* USER CODE BEGIN Header_SlowLoopEntry */ /** -* @brief Function implementing the SlowLoopTask thread. -* @param argument: Not used -* @retval None -*/ + * @brief Function implementing the SlowLoopTask thread. + * @param argument: Not used + * @retval None + */ /* USER CODE END Header_SlowLoopEntry */ -void SlowLoopEntry(void *argument) -{ - /* USER CODE BEGIN SlowLoopEntry */ - /* Infinite loop */ - for(;;) - { - osDelay(1); - } - /* USER CODE END SlowLoopEntry */ +void SlowLoopEntry(void *argument) { + /* USER CODE BEGIN SlowLoopEntry */ + /* Infinite loop */ + for (;;) { + osDelay(1); + } + /* USER CODE END SlowLoopEntry */ } /* USER CODE BEGIN Header_ComsTaskEntry */ /** -* @brief Function implementing the ComsTask thread. -* @param argument: Not used -* @retval None -*/ + * @brief Function implementing the ComsTask thread. + * @param argument: Not used + * @retval None + */ /* USER CODE END Header_ComsTaskEntry */ -void ComsTaskEntry(void *argument) -{ - /* USER CODE BEGIN ComsTaskEntry */ - /* Infinite loop */ - for(;;) - { - osDelay(1); - } - /* USER CODE END ComsTaskEntry */ +void ComsTaskEntry(void *argument) { + /* USER CODE BEGIN ComsTaskEntry */ + /* Infinite loop */ + for (;;) { + osDelay(1); + } + /* USER CODE END ComsTaskEntry */ } /* USER CODE BEGIN Header_BatCheck */ /** -* @brief Function implementing the BatCheckTask thread. -* @param argument: Not used -* @retval None -*/ + * @brief Function implementing the BatCheckTask thread. + * @param argument: Not used + * @retval None + */ /* USER CODE END Header_BatCheck */ -void BatCheck(void *argument) -{ - /* USER CODE BEGIN BatCheck */ - /* Infinite loop */ - for(;;) - { - osDelay(1); - } - /* USER CODE END BatCheck */ +void BatCheck(void *argument) { + /* USER CODE BEGIN BatCheck */ + /* Infinite loop */ + for (;;) { + osDelay(1); + } + /* USER CODE END BatCheck */ } /** - * @brief Period elapsed callback in non blocking mode - * @note This function is called when TIM7 interrupt took place, inside - * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment - * a global variable "uwTick" used as application time base. - * @param htim : TIM handle - * @retval None - */ -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) -{ - /* USER CODE BEGIN Callback 0 */ - - /* USER CODE END Callback 0 */ - if (htim->Instance == TIM7) { - HAL_IncTick(); - } - /* USER CODE BEGIN Callback 1 */ - - /* USER CODE END Callback 1 */ + * @brief Period elapsed callback in non blocking mode + * @note This function is called when TIM7 interrupt took place, inside + * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment + * a global variable "uwTick" used as application time base. + * @param htim : TIM handle + * @retval None + */ +void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { + /* USER CODE BEGIN Callback 0 */ + + /* USER CODE END Callback 0 */ + if (htim->Instance == TIM7) { + HAL_IncTick(); + } + /* USER CODE BEGIN Callback 1 */ + + /* USER CODE END Callback 1 */ } /** - * @brief This function is executed in case of error occurrence. - * @retval None - */ -void Error_Handler(void) -{ - /* USER CODE BEGIN Error_Handler_Debug */ - /* User can add his own implementation to report the HAL error return state */ - - /* USER CODE END Error_Handler_Debug */ + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) { + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state + */ + + /* USER CODE END Error_Handler_Debug */ } -#ifdef USE_FULL_ASSERT +#ifdef USE_FULL_ASSERT /** - * @brief Reports the name of the source file and the source line number - * where the assert_param error has occurred. - * @param file: pointer to the source file name - * @param line: assert_param error line source number - * @retval None - */ -void assert_failed(uint8_t *file, uint32_t line) -{ - /* USER CODE BEGIN 6 */ - /* User can add his own implementation to report the file name and line number, - tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ - /* USER CODE END 6 */ + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) { + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line + number, tex: printf("Wrong parameters value: file %s on line %d\r\n", + file, line) */ + /* USER CODE END 6 */ } #endif /* USE_FULL_ASSERT */ diff --git a/Debug/Core/Src/MESCBLDC.d b/Debug/Core/Src/MESCBLDC.d deleted file mode 100644 index d2333588..00000000 --- a/Debug/Core/Src/MESCBLDC.d +++ /dev/null @@ -1,125 +0,0 @@ -Core/Src/MESCBLDC.o: ../Core/Src/MESCBLDC.c ../Core/Inc/MESCBLDC.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCfoc.h ../Core/Inc/MESCmotor_state.h \ - ../Core/Inc/MESChw_setup.h - -../Core/Inc/MESCBLDC.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: diff --git a/Debug/Core/Src/MESCBLDC.o b/Debug/Core/Src/MESCBLDC.o deleted file mode 100644 index 1fc19154..00000000 Binary files a/Debug/Core/Src/MESCBLDC.o and /dev/null differ diff --git a/Debug/Core/Src/MESCBLDC.su b/Debug/Core/Src/MESCBLDC.su deleted file mode 100644 index 9d1cf00e..00000000 --- a/Debug/Core/Src/MESCBLDC.su +++ /dev/null @@ -1,4 +0,0 @@ -MESCBLDC.c:33:6:BLDCInit 8 static -MESCBLDC.c:46:6:BLDCCommuteHall 16 static -MESCBLDC.c:88:6:BLDCCurrentController 16 static -MESCBLDC.c:115:6:writeBLDC 8 static diff --git a/Debug/Core/Src/MESCfoc.d b/Debug/Core/Src/MESCfoc.d deleted file mode 100644 index 3045cab6..00000000 --- a/Debug/Core/Src/MESCfoc.d +++ /dev/null @@ -1,125 +0,0 @@ -Core/Src/MESCfoc.o: ../Core/Src/MESCfoc.c ../Core/Inc/MESCfoc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCBLDC.h - -../Core/Inc/MESCfoc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCBLDC.h: diff --git a/Debug/Core/Src/MESCfoc.o b/Debug/Core/Src/MESCfoc.o deleted file mode 100644 index 553b798b..00000000 Binary files a/Debug/Core/Src/MESCfoc.o and /dev/null differ diff --git a/Debug/Core/Src/MESCfoc.su b/Debug/Core/Src/MESCfoc.su deleted file mode 100644 index abddca04..00000000 --- a/Debug/Core/Src/MESCfoc.su +++ /dev/null @@ -1,13 +0,0 @@ -MESCfoc.c:36:6:fastLoop 16 static -MESCfoc.c:130:6:V_I_Check 8 static -MESCfoc.c:138:6:ADCConversion 4 static -MESCfoc.c:161:6:GenerateBreak 8 static -MESCfoc.c:170:5:GetHallState 4 static -MESCfoc.c:209:6:measureResistance 16 static -MESCfoc.c:259:6:measureInductance 4 static -MESCfoc.c:273:6:phU_Break 4 static -MESCfoc.c:283:6:phU_Enable 4 static -MESCfoc.c:293:6:phV_Break 4 static -MESCfoc.c:303:6:phV_Enable 4 static -MESCfoc.c:313:6:phW_Break 4 static -MESCfoc.c:323:6:phW_Enable 4 static diff --git a/Debug/Core/Src/MESChw_setup.d b/Debug/Core/Src/MESChw_setup.d deleted file mode 100644 index f1f9d3cb..00000000 --- a/Debug/Core/Src/MESChw_setup.d +++ /dev/null @@ -1,118 +0,0 @@ -Core/Src/MESChw_setup.o: ../Core/Src/MESChw_setup.c \ - ../Core/Inc/MESChw_setup.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Core/Inc/MESChw_setup.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Core/Src/MESChw_setup.o b/Debug/Core/Src/MESChw_setup.o deleted file mode 100644 index 86029dfc..00000000 Binary files a/Debug/Core/Src/MESChw_setup.o and /dev/null differ diff --git a/Debug/Core/Src/MESChw_setup.su b/Debug/Core/Src/MESChw_setup.su deleted file mode 100644 index b6f73ca7..00000000 --- a/Debug/Core/Src/MESChw_setup.su +++ /dev/null @@ -1,2 +0,0 @@ -MESChw_setup.c:29:6:motor_init 4 static -MESChw_setup.c:37:6:hw_init 16 static diff --git a/Debug/Core/Src/MESCmotor_state.d b/Debug/Core/Src/MESCmotor_state.d deleted file mode 100644 index b29001b5..00000000 --- a/Debug/Core/Src/MESCmotor_state.d +++ /dev/null @@ -1,118 +0,0 @@ -Core/Src/MESCmotor_state.o: ../Core/Src/MESCmotor_state.c \ - ../Core/Inc/MESCmotor_state.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Core/Inc/MESCmotor_state.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Core/Src/MESCmotor_state.o b/Debug/Core/Src/MESCmotor_state.o deleted file mode 100644 index 09b7a13a..00000000 Binary files a/Debug/Core/Src/MESCmotor_state.o and /dev/null differ diff --git a/Debug/Core/Src/MESCmotor_state.su b/Debug/Core/Src/MESCmotor_state.su deleted file mode 100644 index c62fffcd..00000000 --- a/Debug/Core/Src/MESCmotor_state.su +++ /dev/null @@ -1 +0,0 @@ -MESCmotor_state.c:28:6:MESC_Init 4 static diff --git a/Debug/Core/Src/freertos.d b/Debug/Core/Src/freertos.d deleted file mode 100644 index b8822d29..00000000 --- a/Debug/Core/Src/freertos.d +++ /dev/null @@ -1,156 +0,0 @@ -Core/Src/freertos.o: ../Core/Src/freertos.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \ - ../Core/Inc/main.h ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: diff --git a/Debug/Core/Src/freertos.o b/Debug/Core/Src/freertos.o deleted file mode 100644 index 53cb97aa..00000000 Binary files a/Debug/Core/Src/freertos.o and /dev/null differ diff --git a/Debug/Core/Src/freertos.su b/Debug/Core/Src/freertos.su deleted file mode 100644 index e69de29b..00000000 diff --git a/Debug/Core/Src/main.d b/Debug/Core/Src/main.d deleted file mode 100644 index 191bdc3b..00000000 --- a/Debug/Core/Src/main.d +++ /dev/null @@ -1,165 +0,0 @@ -Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../USB_DEVICE/App/usb_device.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../USB_DEVICE/Target/usbd_conf.h - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os.h: - -../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../USB_DEVICE/App/usb_device.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../USB_DEVICE/Target/usbd_conf.h: diff --git a/Debug/Core/Src/main.o b/Debug/Core/Src/main.o deleted file mode 100644 index b7a5eea4..00000000 Binary files a/Debug/Core/Src/main.o and /dev/null differ diff --git a/Debug/Core/Src/main.su b/Debug/Core/Src/main.su deleted file mode 100644 index 04b2d5f6..00000000 --- a/Debug/Core/Src/main.su +++ /dev/null @@ -1,27 +0,0 @@ -main.c:143:6:HAL_TIM_IC_CaptureCallback 16 static -main.c:207:5:main 8 static -main.c:385:6:SystemClock_Config 128 static -main.c:439:13:MX_ADC1_Init 72 static -main.c:532:13:MX_ADC2_Init 32 static -main.c:604:13:MX_ADC3_Init 48 static -main.c:667:13:MX_COMP1_Init 8 static -main.c:702:13:MX_COMP2_Init 8 static -main.c:737:13:MX_COMP4_Init 8 static -main.c:772:13:MX_COMP7_Init 8 static -main.c:807:13:MX_I2C1_Init 8 static -main.c:853:13:MX_OPAMP1_Init 8 static -main.c:885:13:MX_OPAMP2_Init 8 static -main.c:917:13:MX_OPAMP3_Init 8 static -main.c:949:13:MX_TIM1_Init 96 static -main.c:1032:13:MX_TIM3_Init 56 static -main.c:1099:13:MX_TIM4_Init 56 static -main.c:1172:13:MX_USART3_UART_Init 8 static -main.c:1205:13:MX_DMA_Init 16 static -main.c:1242:13:MX_GPIO_Init 24 static -main.c:1253:6:HAL_ADC_ConvcpltCallback 16 static -main.c:1265:6:StartDefaultTask 16 static -main.c:1285:6:SlowLoopEntry 16 static -main.c:1303:6:ComsTaskEntry 16 static -main.c:1321:6:BatCheck 16 static -main.c:1340:6:HAL_TIM_PeriodElapsedCallback 16 static -main.c:1357:6:Error_Handler 4 static diff --git a/Debug/Core/Src/stm32f3xx_hal_msp.d b/Debug/Core/Src/stm32f3xx_hal_msp.d deleted file mode 100644 index f0f48fbb..00000000 --- a/Debug/Core/Src/stm32f3xx_hal_msp.d +++ /dev/null @@ -1,129 +0,0 @@ -Core/Src/stm32f3xx_hal_msp.o: ../Core/Src/stm32f3xx_hal_msp.c \ - ../Core/Inc/main.h ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: diff --git a/Debug/Core/Src/stm32f3xx_hal_msp.o b/Debug/Core/Src/stm32f3xx_hal_msp.o deleted file mode 100644 index ba17adcb..00000000 Binary files a/Debug/Core/Src/stm32f3xx_hal_msp.o and /dev/null differ diff --git a/Debug/Core/Src/stm32f3xx_hal_msp.su b/Debug/Core/Src/stm32f3xx_hal_msp.su deleted file mode 100644 index efa1266a..00000000 --- a/Debug/Core/Src/stm32f3xx_hal_msp.su +++ /dev/null @@ -1,16 +0,0 @@ -stm32f3xx_hal_msp.c:79:6:HAL_MspInit 16 static -stm32f3xx_hal_msp.c:105:6:HAL_ADC_MspInit 56 static -stm32f3xx_hal_msp.c:236:6:HAL_ADC_MspDeInit 16 static -stm32f3xx_hal_msp.c:327:6:HAL_COMP_MspInit 56 static -stm32f3xx_hal_msp.c:415:6:HAL_COMP_MspDeInit 16 static -stm32f3xx_hal_msp.c:486:6:HAL_I2C_MspInit 48 static -stm32f3xx_hal_msp.c:564:6:HAL_I2C_MspDeInit 16 static -stm32f3xx_hal_msp.c:598:6:HAL_OPAMP_MspInit 48 static -stm32f3xx_hal_msp.c:670:6:HAL_OPAMP_MspDeInit 16 static -stm32f3xx_hal_msp.c:729:6:HAL_TIM_PWM_MspInit 24 static -stm32f3xx_hal_msp.c:751:6:HAL_TIM_Base_MspInit 56 static -stm32f3xx_hal_msp.c:808:6:HAL_TIM_MspPostInit 48 static -stm32f3xx_hal_msp.c:860:6:HAL_TIM_PWM_MspDeInit 16 static -stm32f3xx_hal_msp.c:882:6:HAL_TIM_Base_MspDeInit 16 static -stm32f3xx_hal_msp.c:931:6:HAL_UART_MspInit 48 static -stm32f3xx_hal_msp.c:1007:6:HAL_UART_MspDeInit 16 static diff --git a/Debug/Core/Src/stm32f3xx_hal_timebase_tim.d b/Debug/Core/Src/stm32f3xx_hal_timebase_tim.d deleted file mode 100644 index d38f4d0f..00000000 --- a/Debug/Core/Src/stm32f3xx_hal_timebase_tim.d +++ /dev/null @@ -1,116 +0,0 @@ -Core/Src/stm32f3xx_hal_timebase_tim.o: \ - ../Core/Src/stm32f3xx_hal_timebase_tim.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Core/Src/stm32f3xx_hal_timebase_tim.o b/Debug/Core/Src/stm32f3xx_hal_timebase_tim.o deleted file mode 100644 index c08794fb..00000000 Binary files a/Debug/Core/Src/stm32f3xx_hal_timebase_tim.o and /dev/null differ diff --git a/Debug/Core/Src/stm32f3xx_hal_timebase_tim.su b/Debug/Core/Src/stm32f3xx_hal_timebase_tim.su deleted file mode 100644 index d5b017b3..00000000 --- a/Debug/Core/Src/stm32f3xx_hal_timebase_tim.su +++ /dev/null @@ -1,3 +0,0 @@ -stm32f3xx_hal_timebase_tim.c:42:19:HAL_InitTick 56 static -stm32f3xx_hal_timebase_tim.c:94:6:HAL_SuspendTick 4 static -stm32f3xx_hal_timebase_tim.c:106:6:HAL_ResumeTick 4 static diff --git a/Debug/Core/Src/stm32f3xx_it.d b/Debug/Core/Src/stm32f3xx_it.d deleted file mode 100644 index 0416c1ad..00000000 --- a/Debug/Core/Src/stm32f3xx_it.d +++ /dev/null @@ -1,132 +0,0 @@ -Core/Src/stm32f3xx_it.o: ../Core/Src/stm32f3xx_it.c ../Core/Inc/main.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Core/Inc/stm32f3xx_it.h - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Core/Inc/stm32f3xx_it.h: diff --git a/Debug/Core/Src/stm32f3xx_it.o b/Debug/Core/Src/stm32f3xx_it.o deleted file mode 100644 index 5d134396..00000000 Binary files a/Debug/Core/Src/stm32f3xx_it.o and /dev/null differ diff --git a/Debug/Core/Src/stm32f3xx_it.su b/Debug/Core/Src/stm32f3xx_it.su deleted file mode 100644 index 5363a3fa..00000000 --- a/Debug/Core/Src/stm32f3xx_it.su +++ /dev/null @@ -1,17 +0,0 @@ -stm32f3xx_it.c:82:6:NMI_Handler 4 static -stm32f3xx_it.c:95:6:HardFault_Handler 4 static -stm32f3xx_it.c:110:6:MemManage_Handler 4 static -stm32f3xx_it.c:125:6:BusFault_Handler 4 static -stm32f3xx_it.c:140:6:UsageFault_Handler 4 static -stm32f3xx_it.c:155:6:DebugMon_Handler 4 static -stm32f3xx_it.c:175:6:DMA1_Channel1_IRQHandler 8 static -stm32f3xx_it.c:195:6:DMA1_Channel2_IRQHandler 8 static -stm32f3xx_it.c:209:6:DMA1_Channel3_IRQHandler 8 static -stm32f3xx_it.c:223:6:DMA1_Channel6_IRQHandler 8 static -stm32f3xx_it.c:237:6:DMA1_Channel7_IRQHandler 8 static -stm32f3xx_it.c:251:6:ADC1_2_IRQHandler 8 static -stm32f3xx_it.c:267:6:USB_LP_CAN_RX0_IRQHandler 8 static -stm32f3xx_it.c:281:6:TIM3_IRQHandler 8 static -stm32f3xx_it.c:295:6:TIM7_IRQHandler 8 static -stm32f3xx_it.c:309:6:DMA2_Channel1_IRQHandler 8 static -stm32f3xx_it.c:323:6:DMA2_Channel5_IRQHandler 8 static diff --git a/Debug/Core/Src/subdir.mk b/Debug/Core/Src/subdir.mk deleted file mode 100644 index 89507094..00000000 --- a/Debug/Core/Src/subdir.mk +++ /dev/null @@ -1,74 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Core/Src/MESCBLDC.c \ -../Core/Src/MESCfoc.c \ -../Core/Src/MESChw_setup.c \ -../Core/Src/MESCmotor_state.c \ -../Core/Src/freertos.c \ -../Core/Src/main.c \ -../Core/Src/stm32f3xx_hal_msp.c \ -../Core/Src/stm32f3xx_hal_timebase_tim.c \ -../Core/Src/stm32f3xx_it.c \ -../Core/Src/syscalls.c \ -../Core/Src/sysmem.c \ -../Core/Src/system_stm32f3xx.c - -OBJS += \ -./Core/Src/MESCBLDC.o \ -./Core/Src/MESCfoc.o \ -./Core/Src/MESChw_setup.o \ -./Core/Src/MESCmotor_state.o \ -./Core/Src/freertos.o \ -./Core/Src/main.o \ -./Core/Src/stm32f3xx_hal_msp.o \ -./Core/Src/stm32f3xx_hal_timebase_tim.o \ -./Core/Src/stm32f3xx_it.o \ -./Core/Src/syscalls.o \ -./Core/Src/sysmem.o \ -./Core/Src/system_stm32f3xx.o - -C_DEPS += \ -./Core/Src/MESCBLDC.d \ -./Core/Src/MESCfoc.d \ -./Core/Src/MESChw_setup.d \ -./Core/Src/MESCmotor_state.d \ -./Core/Src/freertos.d \ -./Core/Src/main.d \ -./Core/Src/stm32f3xx_hal_msp.d \ -./Core/Src/stm32f3xx_hal_timebase_tim.d \ -./Core/Src/stm32f3xx_it.d \ -./Core/Src/syscalls.d \ -./Core/Src/sysmem.d \ -./Core/Src/system_stm32f3xx.d - - -# Each subdirectory must supply rules for building sources it contributes -Core/Src/MESCBLDC.o: ../Core/Src/MESCBLDC.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/MESCBLDC.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/MESCfoc.o: ../Core/Src/MESCfoc.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/MESCfoc.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/MESChw_setup.o: ../Core/Src/MESChw_setup.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/MESChw_setup.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/MESCmotor_state.o: ../Core/Src/MESCmotor_state.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/MESCmotor_state.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/freertos.o: ../Core/Src/freertos.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/freertos.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/main.o: ../Core/Src/main.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/stm32f3xx_hal_msp.o: ../Core/Src/stm32f3xx_hal_msp.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f3xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/stm32f3xx_hal_timebase_tim.o: ../Core/Src/stm32f3xx_hal_timebase_tim.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f3xx_hal_timebase_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/stm32f3xx_it.o: ../Core/Src/stm32f3xx_it.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f3xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/syscalls.o: ../Core/Src/syscalls.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/sysmem.o: ../Core/Src/sysmem.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Core/Src/system_stm32f3xx.o: ../Core/Src/system_stm32f3xx.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32f3xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/Core/Src/syscalls.d b/Debug/Core/Src/syscalls.d deleted file mode 100644 index 8667c708..00000000 --- a/Debug/Core/Src/syscalls.d +++ /dev/null @@ -1 +0,0 @@ -Core/Src/syscalls.o: ../Core/Src/syscalls.c diff --git a/Debug/Core/Src/syscalls.o b/Debug/Core/Src/syscalls.o deleted file mode 100644 index a6908897..00000000 Binary files a/Debug/Core/Src/syscalls.o and /dev/null differ diff --git a/Debug/Core/Src/syscalls.su b/Debug/Core/Src/syscalls.su deleted file mode 100644 index 492a785a..00000000 --- a/Debug/Core/Src/syscalls.su +++ /dev/null @@ -1,18 +0,0 @@ -syscalls.c:48:6:initialise_monitor_handles 4 static -syscalls.c:52:5:_getpid 4 static -syscalls.c:57:5:_kill 16 static -syscalls.c:63:6:_exit 16 static -syscalls.c:69:27:_read 32 static -syscalls.c:81:27:_write 32 static -syscalls.c:92:5:_close 16 static -syscalls.c:98:5:_fstat 16 static -syscalls.c:104:5:_isatty 16 static -syscalls.c:109:5:_lseek 24 static -syscalls.c:114:5:_open 12 static -syscalls.c:120:5:_wait 16 static -syscalls.c:126:5:_unlink 16 static -syscalls.c:132:5:_times 16 static -syscalls.c:137:5:_stat 16 static -syscalls.c:143:5:_link 16 static -syscalls.c:149:5:_fork 8 static -syscalls.c:155:5:_execve 24 static diff --git a/Debug/Core/Src/sysmem.d b/Debug/Core/Src/sysmem.d deleted file mode 100644 index 74fecf9b..00000000 --- a/Debug/Core/Src/sysmem.d +++ /dev/null @@ -1 +0,0 @@ -Core/Src/sysmem.o: ../Core/Src/sysmem.c diff --git a/Debug/Core/Src/sysmem.o b/Debug/Core/Src/sysmem.o deleted file mode 100644 index 620ab52c..00000000 Binary files a/Debug/Core/Src/sysmem.o and /dev/null differ diff --git a/Debug/Core/Src/sysmem.su b/Debug/Core/Src/sysmem.su deleted file mode 100644 index 23954eab..00000000 --- a/Debug/Core/Src/sysmem.su +++ /dev/null @@ -1 +0,0 @@ -sysmem.c:38:9:_sbrk 24 static diff --git a/Debug/Core/Src/system_stm32f3xx.d b/Debug/Core/Src/system_stm32f3xx.d deleted file mode 100644 index ed23e1ad..00000000 --- a/Debug/Core/Src/system_stm32f3xx.d +++ /dev/null @@ -1,115 +0,0 @@ -Core/Src/system_stm32f3xx.o: ../Core/Src/system_stm32f3xx.c \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Core/Src/system_stm32f3xx.o b/Debug/Core/Src/system_stm32f3xx.o deleted file mode 100644 index 33a1bdf6..00000000 Binary files a/Debug/Core/Src/system_stm32f3xx.o and /dev/null differ diff --git a/Debug/Core/Src/system_stm32f3xx.su b/Debug/Core/Src/system_stm32f3xx.su deleted file mode 100644 index 4aba8001..00000000 --- a/Debug/Core/Src/system_stm32f3xx.su +++ /dev/null @@ -1,2 +0,0 @@ -system_stm32f3xx.c:151:6:SystemInit 4 static -system_stm32f3xx.c:201:6:SystemCoreClockUpdate 24 static diff --git a/Debug/Core/Startup/startup_stm32f303cbtx.o b/Debug/Core/Startup/startup_stm32f303cbtx.o deleted file mode 100644 index 8563140a..00000000 Binary files a/Debug/Core/Startup/startup_stm32f303cbtx.o and /dev/null differ diff --git a/Debug/Core/Startup/subdir.mk b/Debug/Core/Startup/subdir.mk deleted file mode 100644 index 60caaf64..00000000 --- a/Debug/Core/Startup/subdir.mk +++ /dev/null @@ -1,19 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -S_SRCS += \ -../Core/Startup/startup_stm32f303cbtx.s - -OBJS += \ -./Core/Startup/startup_stm32f303cbtx.o - -S_DEPS += \ -./Core/Startup/startup_stm32f303cbtx.d - - -# Each subdirectory must supply rules for building sources it contributes -Core/Startup/startup_stm32f303cbtx.o: ../Core/Startup/startup_stm32f303cbtx.s - arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -c -x assembler-with-cpp -MMD -MP -MF"Core/Startup/startup_stm32f303cbtx.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<" - diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.d deleted file mode 100644 index acbfcab7..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o deleted file mode 100644 index 3d685193..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.su deleted file mode 100644 index 83316759..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.su +++ /dev/null @@ -1,25 +0,0 @@ -stm32f3xx_hal.c:138:19:HAL_Init 8 static -stm32f3xx_hal.c:163:19:HAL_DeInit 8 static -stm32f3xx_hal.c:186:13:HAL_MspInit 4 static -stm32f3xx_hal.c:197:13:HAL_MspDeInit 4 static -stm32f3xx_hal.c:220:26:HAL_InitTick 16 static -stm32f3xx_hal.c:278:13:HAL_IncTick 4 static -stm32f3xx_hal.c:289:17:HAL_GetTick 4 static -stm32f3xx_hal.c:298:10:HAL_GetTickPrio 4 static -stm32f3xx_hal.c:307:19:HAL_SetTickFreq 24 static -stm32f3xx_hal.c:339:21:HAL_GetTickFreq 4 static -stm32f3xx_hal.c:355:13:HAL_Delay 24 static -stm32f3xx_hal.c:381:13:HAL_SuspendTick 4 static -stm32f3xx_hal.c:399:13:HAL_ResumeTick 4 static -stm32f3xx_hal.c:410:10:HAL_GetHalVersion 4 static -stm32f3xx_hal.c:419:10:HAL_GetREVID 4 static -stm32f3xx_hal.c:428:10:HAL_GetDEVID 4 static -stm32f3xx_hal.c:437:10:HAL_GetUIDw0 4 static -stm32f3xx_hal.c:446:10:HAL_GetUIDw1 4 static -stm32f3xx_hal.c:455:10:HAL_GetUIDw2 4 static -stm32f3xx_hal.c:464:6:HAL_DBGMCU_EnableDBGSleepMode 4 static -stm32f3xx_hal.c:473:6:HAL_DBGMCU_DisableDBGSleepMode 4 static -stm32f3xx_hal.c:482:6:HAL_DBGMCU_EnableDBGStopMode 4 static -stm32f3xx_hal.c:491:6:HAL_DBGMCU_DisableDBGStopMode 4 static -stm32f3xx_hal.c:500:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static -stm32f3xx_hal.c:509:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.d deleted file mode 100644 index c68236a0..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o deleted file mode 100644 index a2ee6e06..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.su deleted file mode 100644 index fb66765e..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.su +++ /dev/null @@ -1,22 +0,0 @@ -stm32f3xx_hal_adc.c:469:26:HAL_ADC_Init 16 static -stm32f3xx_hal_adc.c:500:26:HAL_ADC_DeInit 16 static -stm32f3xx_hal_adc.c:517:13:HAL_ADC_MspInit 16 static -stm32f3xx_hal_adc.c:532:13:HAL_ADC_MspDeInit 16 static -stm32f3xx_hal_adc.c:782:26:HAL_ADC_Start 16 static -stm32f3xx_hal_adc.c:805:26:HAL_ADC_Stop 16 static -stm32f3xx_hal_adc.c:823:26:HAL_ADC_PollForConversion 16 static -stm32f3xx_hal_adc.c:849:26:HAL_ADC_PollForEvent 24 static -stm32f3xx_hal_adc.c:878:26:HAL_ADC_Start_IT 16 static -stm32f3xx_hal_adc.c:905:26:HAL_ADC_Stop_IT 16 static -stm32f3xx_hal_adc.c:933:26:HAL_ADC_Start_DMA 24 static -stm32f3xx_hal_adc.c:960:26:HAL_ADC_Stop_DMA 16 static -stm32f3xx_hal_adc.c:981:17:HAL_ADC_GetValue 16 static -stm32f3xx_hal_adc.c:995:13:HAL_ADC_IRQHandler 16 static -stm32f3xx_hal_adc.c:1009:13:HAL_ADC_ConvCpltCallback 16 static -stm32f3xx_hal_adc.c:1024:13:HAL_ADC_ConvHalfCpltCallback 16 static -stm32f3xx_hal_adc.c:1039:13:HAL_ADC_LevelOutOfWindowCallback 16 static -stm32f3xx_hal_adc.c:1055:13:HAL_ADC_ErrorCallback 16 static -stm32f3xx_hal_adc.c:1107:26:HAL_ADC_ConfigChannel 16 static -stm32f3xx_hal_adc.c:1134:26:HAL_ADC_AnalogWDGConfig 16 static -stm32f3xx_hal_adc.c:1178:10:HAL_ADC_GetState 16 static -stm32f3xx_hal_adc.c:1192:10:HAL_ADC_GetError 16 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.d deleted file mode 100644 index 5f69a212..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o deleted file mode 100644 index c83550cd..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.su deleted file mode 100644 index 1eb2a38f..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.su +++ /dev/null @@ -1,42 +0,0 @@ -stm32f3xx_hal_adc_ex.c:234:19:HAL_ADC_Init 112 static -stm32f3xx_hal_adc_ex.c:807:19:HAL_ADC_DeInit 104 static -stm32f3xx_hal_adc_ex.c:1242:19:HAL_ADC_Start 24 static -stm32f3xx_hal_adc_ex.c:1448:19:HAL_ADC_Stop 24 static -stm32f3xx_hal_adc_ex.c:1553:19:HAL_ADC_PollForConversion 32 static -stm32f3xx_hal_adc_ex.c:1856:19:HAL_ADC_PollForEvent 32 static -stm32f3xx_hal_adc_ex.c:2034:19:HAL_ADC_Start_IT 24 static -stm32f3xx_hal_adc_ex.c:2271:19:HAL_ADC_Stop_IT 24 static -stm32f3xx_hal_adc_ex.c:2377:19:HAL_ADC_Start_DMA 32 static -stm32f3xx_hal_adc_ex.c:2648:19:HAL_ADC_Stop_DMA 24 static -stm32f3xx_hal_adc_ex.c:2798:10:HAL_ADC_GetValue 16 static -stm32f3xx_hal_adc_ex.c:2856:6:HAL_ADC_IRQHandler 32 static -stm32f3xx_hal_adc_ex.c:3311:19:HAL_ADCEx_Calibration_Start 24 static -stm32f3xx_hal_adc_ex.c:3500:10:HAL_ADCEx_Calibration_GetValue 16 static -stm32f3xx_hal_adc_ex.c:3535:19:HAL_ADCEx_Calibration_SetValue 32 static -stm32f3xx_hal_adc_ex.c:3600:19:HAL_ADCEx_InjectedStart 24 static -stm32f3xx_hal_adc_ex.c:3788:19:HAL_ADCEx_InjectedStop 24 static -stm32f3xx_hal_adc_ex.c:3931:19:HAL_ADCEx_InjectedPollForConversion 32 static -stm32f3xx_hal_adc_ex.c:4158:19:HAL_ADCEx_InjectedStart_IT 24 static -stm32f3xx_hal_adc_ex.c:4378:19:HAL_ADCEx_InjectedStop_IT 24 static -stm32f3xx_hal_adc_ex.c:4538:19:HAL_ADCEx_MultiModeStart_DMA 112 static -stm32f3xx_hal_adc_ex.c:4678:19:HAL_ADCEx_MultiModeStop_DMA 104 static -stm32f3xx_hal_adc_ex.c:4798:10:HAL_ADCEx_MultiModeGetValue 24 static -stm32f3xx_hal_adc_ex.c:4849:10:HAL_ADCEx_InjectedGetValue 24 static -stm32f3xx_hal_adc_ex.c:4963:19:HAL_ADCEx_RegularStop 24 static -stm32f3xx_hal_adc_ex.c:5037:19:HAL_ADCEx_RegularStop_IT 24 static -stm32f3xx_hal_adc_ex.c:5117:19:HAL_ADCEx_RegularStop_DMA 24 static -stm32f3xx_hal_adc_ex.c:5229:19:HAL_ADCEx_RegularMultiModeStop_DMA 104 static -stm32f3xx_hal_adc_ex.c:5374:13:HAL_ADCEx_InjectedConvCpltCallback 16 static -stm32f3xx_hal_adc_ex.c:5397:13:HAL_ADCEx_InjectedQueueOverflowCallback 16 static -stm32f3xx_hal_adc_ex.c:5413:13:HAL_ADCEx_LevelOutOfWindow2Callback 16 static -stm32f3xx_hal_adc_ex.c:5428:13:HAL_ADCEx_LevelOutOfWindow3Callback 16 static -stm32f3xx_hal_adc_ex.c:5491:19:HAL_ADC_ConfigChannel 112 static -stm32f3xx_hal_adc_ex.c:5957:19:HAL_ADCEx_InjectedConfigChannel 120 static -stm32f3xx_hal_adc_ex.c:6709:19:HAL_ADC_AnalogWDGConfig 40 static -stm32f3xx_hal_adc_ex.c:6994:19:HAL_ADCEx_MultiModeConfigChannel 104 static -stm32f3xx_hal_adc_ex.c:7124:13:ADC_DMAConvCplt 24 static -stm32f3xx_hal_adc_ex.c:7171:13:ADC_DMAHalfConvCplt 24 static -stm32f3xx_hal_adc_ex.c:7189:13:ADC_DMAError 24 static -stm32f3xx_hal_adc_ex.c:7219:26:ADC_Enable 24 static -stm32f3xx_hal_adc_ex.c:7273:26:ADC_Disable 24 static -stm32f3xx_hal_adc_ex.c:7332:26:ADC_ConversionStop 32 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.d deleted file mode 100644 index 11d75486..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o deleted file mode 100644 index 314e80fe..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.su deleted file mode 100644 index 0dade49b..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.su +++ /dev/null @@ -1,14 +0,0 @@ -stm32f3xx_hal_comp.c:341:19:HAL_COMP_Init 32 static -stm32f3xx_hal_comp.c:425:19:HAL_COMP_DeInit 24 static -stm32f3xx_hal_comp.c:469:13:HAL_COMP_MspInit 16 static -stm32f3xx_hal_comp.c:484:13:HAL_COMP_MspDeInit 16 static -stm32f3xx_hal_comp.c:681:19:HAL_COMP_Start 24 static -stm32f3xx_hal_comp.c:750:19:HAL_COMP_Stop 24 static -stm32f3xx_hal_comp.c:788:19:HAL_COMP_Start_IT 24 static -stm32f3xx_hal_comp.c:860:19:HAL_COMP_Stop_IT 24 static -stm32f3xx_hal_comp.c:877:6:HAL_COMP_IRQHandler 24 static -stm32f3xx_hal_comp.c:901:13:HAL_COMP_TriggerCallback 16 static -stm32f3xx_hal_comp.c:935:19:HAL_COMP_Lock 24 static -stm32f3xx_hal_comp.c:993:10:HAL_COMP_GetOutputLevel 24 static -stm32f3xx_hal_comp.c:1032:23:HAL_COMP_GetState 16 static -stm32f3xx_hal_comp.c:1052:10:HAL_COMP_GetError 16 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.d deleted file mode 100644 index adb736fb..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o deleted file mode 100644 index 9cd38d92..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su deleted file mode 100644 index bb5a8b2c..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su +++ /dev/null @@ -1,32 +0,0 @@ -core_cm4.h:1657:22:__NVIC_SetPriorityGrouping 24 static -core_cm4.h:1676:26:__NVIC_GetPriorityGrouping 4 static -core_cm4.h:1688:22:__NVIC_EnableIRQ 16 static -core_cm4.h:1724:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm -core_cm4.h:1743:26:__NVIC_GetPendingIRQ 16 static -core_cm4.h:1762:22:__NVIC_SetPendingIRQ 16 static -core_cm4.h:1777:22:__NVIC_ClearPendingIRQ 16 static -core_cm4.h:1794:26:__NVIC_GetActive 16 static -core_cm4.h:1816:22:__NVIC_SetPriority 16 static -core_cm4.h:1838:26:__NVIC_GetPriority 16 static -core_cm4.h:1863:26:NVIC_EncodePriority 40 static -core_cm4.h:1890:22:NVIC_DecodePriority 40 static -core_cm4.h:1939:34:__NVIC_SystemReset 4 static,ignoring_inline_asm -core_cm4.h:2022:26:SysTick_Config 16 static -stm32f3xx_hal_cortex.c:169:6:HAL_NVIC_SetPriorityGrouping 16 static -stm32f3xx_hal_cortex.c:191:6:HAL_NVIC_SetPriority 32 static -stm32f3xx_hal_cortex.c:213:6:HAL_NVIC_EnableIRQ 16 static -stm32f3xx_hal_cortex.c:229:6:HAL_NVIC_DisableIRQ 16 static -stm32f3xx_hal_cortex.c:242:6:HAL_NVIC_SystemReset 8 static -stm32f3xx_hal_cortex.c:255:10:HAL_SYSTICK_Config 16 static -stm32f3xx_hal_cortex.c:285:6:HAL_MPU_Disable 4 static -stm32f3xx_hal_cortex.c:305:6:HAL_MPU_Enable 16 static -stm32f3xx_hal_cortex.c:320:6:HAL_MPU_ConfigRegion 16 static -stm32f3xx_hal_cortex.c:364:10:HAL_NVIC_GetPriorityGrouping 8 static -stm32f3xx_hal_cortex.c:391:6:HAL_NVIC_GetPriority 24 static -stm32f3xx_hal_cortex.c:406:6:HAL_NVIC_SetPendingIRQ 16 static -stm32f3xx_hal_cortex.c:421:10:HAL_NVIC_GetPendingIRQ 16 static -stm32f3xx_hal_cortex.c:434:6:HAL_NVIC_ClearPendingIRQ 16 static -stm32f3xx_hal_cortex.c:448:10:HAL_NVIC_GetActive 16 static -stm32f3xx_hal_cortex.c:462:6:HAL_SYSTICK_CLKSourceConfig 16 static -stm32f3xx_hal_cortex.c:480:6:HAL_SYSTICK_IRQHandler 8 static -stm32f3xx_hal_cortex.c:489:13:HAL_SYSTICK_Callback 4 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.d deleted file mode 100644 index 0437d3aa..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o deleted file mode 100644 index 1fcb314c..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.su deleted file mode 100644 index f3c2014e..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.su +++ /dev/null @@ -1,14 +0,0 @@ -stm32f3xx_hal_dma.c:137:19:HAL_DMA_Init 24 static -stm32f3xx_hal_dma.c:199:19:HAL_DMA_DeInit 16 static -stm32f3xx_hal_dma.c:281:19:HAL_DMA_Start 32 static -stm32f3xx_hal_dma.c:328:19:HAL_DMA_Start_IT 32 static -stm32f3xx_hal_dma.c:384:19:HAL_DMA_Abort 16 static -stm32f3xx_hal_dma.c:422:19:HAL_DMA_Abort_IT 24 static -stm32f3xx_hal_dma.c:468:19:HAL_DMA_PollForTransfer 32 static -stm32f3xx_hal_dma.c:569:6:HAL_DMA_IRQHandler 24 static -stm32f3xx_hal_dma.c:661:19:HAL_DMA_RegisterCallback 32 static -stm32f3xx_hal_dma.c:712:19:HAL_DMA_UnRegisterCallback 24 static -stm32f3xx_hal_dma.c:788:22:HAL_DMA_GetState 16 static -stm32f3xx_hal_dma.c:799:10:HAL_DMA_GetError 16 static -stm32f3xx_hal_dma.c:825:13:DMA_SetConfig 24 static -stm32f3xx_hal_dma.c:859:13:DMA_CalcBaseAndBitshift 16 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.d deleted file mode 100644 index a0d4ce15..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o deleted file mode 100644 index b07f6b6c..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.su deleted file mode 100644 index d5e7b3ab..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.su +++ /dev/null @@ -1,9 +0,0 @@ -stm32f3xx_hal_exti.c:144:19:HAL_EXTI_SetConfigLine 40 static -stm32f3xx_hal_exti.c:265:19:HAL_EXTI_GetConfigLine 40 static -stm32f3xx_hal_exti.c:368:19:HAL_EXTI_ClearConfigLine 40 static -stm32f3xx_hal_exti.c:433:19:HAL_EXTI_RegisterCallback 32 static -stm32f3xx_hal_exti.c:458:19:HAL_EXTI_GetHandle 16 static -stm32f3xx_hal_exti.c:498:6:HAL_EXTI_IRQHandler 32 static -stm32f3xx_hal_exti.c:535:10:HAL_EXTI_GetPending 40 static -stm32f3xx_hal_exti.c:569:6:HAL_EXTI_ClearPending 32 static -stm32f3xx_hal_exti.c:596:6:HAL_EXTI_GenerateSWI 32 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.d deleted file mode 100644 index 42a50afd..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o deleted file mode 100644 index dbb44975..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.su deleted file mode 100644 index 89a89501..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.su +++ /dev/null @@ -1,14 +0,0 @@ -stm32f3xx_hal_flash.c:168:19:HAL_FLASH_Program 48 static -stm32f3xx_hal_flash.c:240:19:HAL_FLASH_Program_IT 40 static -stm32f3xx_hal_flash.c:286:6:HAL_FLASH_IRQHandler 24 static -stm32f3xx_hal_flash.c:429:13:HAL_FLASH_EndOfOperationCallback 16 static -stm32f3xx_hal_flash.c:447:13:HAL_FLASH_OperationErrorCallback 16 static -stm32f3xx_hal_flash.c:480:19:HAL_FLASH_Unlock 16 static -stm32f3xx_hal_flash.c:504:19:HAL_FLASH_Lock 4 static -stm32f3xx_hal_flash.c:516:19:HAL_FLASH_OB_Unlock 4 static -stm32f3xx_hal_flash.c:536:19:HAL_FLASH_OB_Lock 4 static -stm32f3xx_hal_flash.c:549:19:HAL_FLASH_OB_Launch 8 static -stm32f3xx_hal_flash.c:581:10:HAL_FLASH_GetError 4 static -stm32f3xx_hal_flash.c:604:13:FLASH_Program_HalfWord 16 static -stm32f3xx_hal_flash.c:621:19:FLASH_WaitForLastOperation 24 static -stm32f3xx_hal_flash.c:664:13:FLASH_SetErrorCode 16 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.d deleted file mode 100644 index 7e8ec8da..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o deleted file mode 100644 index 52f7beb7..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su deleted file mode 100644 index a854b5aa..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su +++ /dev/null @@ -1,16 +0,0 @@ -stm32f3xx_hal_flash_ex.c:159:19:HAL_FLASHEx_Erase 24 static -stm32f3xx_hal_flash_ex.c:240:19:HAL_FLASHEx_Erase_IT 24 static -stm32f3xx_hal_flash_ex.c:313:19:HAL_FLASHEx_OBErase 16 static -stm32f3xx_hal_flash_ex.c:362:19:HAL_FLASHEx_OBProgram 24 static -stm32f3xx_hal_flash_ex.c:443:6:HAL_FLASHEx_OBGetConfig 16 static -stm32f3xx_hal_flash_ex.c:465:10:HAL_FLASHEx_OBGetUserData 40 static,ignoring_inline_asm -stm32f3xx_hal_flash_ex.c:500:13:FLASH_MassErase 4 static -stm32f3xx_hal_flash_ex.c:521:26:FLASH_OB_EnableWRP 32 static -stm32f3xx_hal_flash_ex.c:633:26:FLASH_OB_DisableWRP 32 static -stm32f3xx_hal_flash_ex.c:743:26:FLASH_OB_RDP_LevelConfig 24 static -stm32f3xx_hal_flash_ex.c:794:26:FLASH_OB_UserConfig 24 static -stm32f3xx_hal_flash_ex.c:848:26:FLASH_OB_ProgramData 24 static -stm32f3xx_hal_flash_ex.c:881:17:FLASH_OB_GetWRP 4 static -stm32f3xx_hal_flash_ex.c:895:17:FLASH_OB_GetRDP 16 static -stm32f3xx_hal_flash_ex.c:930:16:FLASH_OB_GetUser 16 static,ignoring_inline_asm -stm32f3xx_hal_flash_ex.c:959:6:FLASH_PageErase 16 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.d deleted file mode 100644 index 439dcfc7..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o deleted file mode 100644 index a3a8e87d..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.su deleted file mode 100644 index 1605c837..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.su +++ /dev/null @@ -1,8 +0,0 @@ -stm32f3xx_hal_gpio.c:179:6:HAL_GPIO_Init 32 static -stm32f3xx_hal_gpio.c:304:6:HAL_GPIO_DeInit 32 static -stm32f3xx_hal_gpio.c:386:15:HAL_GPIO_ReadPin 24 static -stm32f3xx_hal_gpio.c:420:6:HAL_GPIO_WritePin 16 static -stm32f3xx_hal_gpio.c:442:6:HAL_GPIO_TogglePin 16 static -stm32f3xx_hal_gpio.c:468:19:HAL_GPIO_LockPin 24 static -stm32f3xx_hal_gpio.c:503:6:HAL_GPIO_EXTI_IRQHandler 16 static -stm32f3xx_hal_gpio.c:518:13:HAL_GPIO_EXTI_Callback 16 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.d deleted file mode 100644 index c7b9d2cf..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o deleted file mode 100644 index cdd078f0..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.su deleted file mode 100644 index abfabc59..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.su +++ /dev/null @@ -1,78 +0,0 @@ -stm32f3xx_hal_i2c.c:469:19:HAL_I2C_Init 16 static -stm32f3xx_hal_i2c.c:578:19:HAL_I2C_DeInit 16 static -stm32f3xx_hal_i2c.c:624:13:HAL_I2C_MspInit 16 static -stm32f3xx_hal_i2c.c:640:13:HAL_I2C_MspDeInit 16 static -stm32f3xx_hal_i2c.c:1060:19:HAL_I2C_Master_Transmit 40 static -stm32f3xx_hal_i2c.c:1174:19:HAL_I2C_Master_Receive 40 static -stm32f3xx_hal_i2c.c:1287:19:HAL_I2C_Slave_Transmit 40 static -stm32f3xx_hal_i2c.c:1424:19:HAL_I2C_Slave_Receive 40 static -stm32f3xx_hal_i2c.c:1550:19:HAL_I2C_Master_Transmit_IT 40 static -stm32f3xx_hal_i2c.c:1619:19:HAL_I2C_Master_Receive_IT 40 static -stm32f3xx_hal_i2c.c:1686:19:HAL_I2C_Slave_Transmit_IT 24 static -stm32f3xx_hal_i2c.c:1735:19:HAL_I2C_Slave_Receive_IT 24 static -stm32f3xx_hal_i2c.c:1786:19:HAL_I2C_Master_Transmit_DMA 40 static -stm32f3xx_hal_i2c.c:1929:19:HAL_I2C_Master_Receive_DMA 40 static -stm32f3xx_hal_i2c.c:2070:19:HAL_I2C_Slave_Transmit_DMA 32 static -stm32f3xx_hal_i2c.c:2173:19:HAL_I2C_Slave_Receive_DMA 32 static -stm32f3xx_hal_i2c.c:2280:19:HAL_I2C_Mem_Write 40 static -stm32f3xx_hal_i2c.c:2415:19:HAL_I2C_Mem_Read 40 static -stm32f3xx_hal_i2c.c:2548:19:HAL_I2C_Mem_Write_IT 40 static -stm32f3xx_hal_i2c.c:2639:19:HAL_I2C_Mem_Read_IT 40 static -stm32f3xx_hal_i2c.c:2729:19:HAL_I2C_Mem_Write_DMA 48 static -stm32f3xx_hal_i2c.c:2873:19:HAL_I2C_Mem_Read_DMA 48 static -stm32f3xx_hal_i2c.c:3014:19:HAL_I2C_IsDeviceReady 48 static -stm32f3xx_hal_i2c.c:3156:19:HAL_I2C_Master_Seq_Transmit_IT 40 static -stm32f3xx_hal_i2c.c:3240:19:HAL_I2C_Master_Seq_Transmit_DMA 48 static -stm32f3xx_hal_i2c.c:3402:19:HAL_I2C_Master_Seq_Receive_IT 40 static -stm32f3xx_hal_i2c.c:3486:19:HAL_I2C_Master_Seq_Receive_DMA 48 static -stm32f3xx_hal_i2c.c:3646:19:HAL_I2C_Slave_Seq_Transmit_IT 24 static -stm32f3xx_hal_i2c.c:3741:19:HAL_I2C_Slave_Seq_Transmit_DMA 32 static -stm32f3xx_hal_i2c.c:3920:19:HAL_I2C_Slave_Seq_Receive_IT 24 static -stm32f3xx_hal_i2c.c:4015:19:HAL_I2C_Slave_Seq_Receive_DMA 32 static -stm32f3xx_hal_i2c.c:4190:19:HAL_I2C_EnableListen_IT 16 static -stm32f3xx_hal_i2c.c:4214:19:HAL_I2C_DisableListen_IT 24 static -stm32f3xx_hal_i2c.c:4247:19:HAL_I2C_Master_Abort_IT 24 static -stm32f3xx_hal_i2c.c:4297:6:HAL_I2C_EV_IRQHandler 24 static -stm32f3xx_hal_i2c.c:4316:6:HAL_I2C_ER_IRQHandler 32 static -stm32f3xx_hal_i2c.c:4365:13:HAL_I2C_MasterTxCpltCallback 16 static -stm32f3xx_hal_i2c.c:4381:13:HAL_I2C_MasterRxCpltCallback 16 static -stm32f3xx_hal_i2c.c:4396:13:HAL_I2C_SlaveTxCpltCallback 16 static -stm32f3xx_hal_i2c.c:4412:13:HAL_I2C_SlaveRxCpltCallback 16 static -stm32f3xx_hal_i2c.c:4430:13:HAL_I2C_AddrCallback 16 static -stm32f3xx_hal_i2c.c:4448:13:HAL_I2C_ListenCpltCallback 16 static -stm32f3xx_hal_i2c.c:4464:13:HAL_I2C_MemTxCpltCallback 16 static -stm32f3xx_hal_i2c.c:4480:13:HAL_I2C_MemRxCpltCallback 16 static -stm32f3xx_hal_i2c.c:4496:13:HAL_I2C_ErrorCallback 16 static -stm32f3xx_hal_i2c.c:4512:13:HAL_I2C_AbortCpltCallback 16 static -stm32f3xx_hal_i2c.c:4547:22:HAL_I2C_GetState 16 static -stm32f3xx_hal_i2c.c:4559:21:HAL_I2C_GetMode 16 static -stm32f3xx_hal_i2c.c:4570:10:HAL_I2C_GetError 16 static -stm32f3xx_hal_i2c.c:4595:26:I2C_Master_ISR_IT 40 static -stm32f3xx_hal_i2c.c:4732:26:I2C_Slave_ISR_IT 32 static -stm32f3xx_hal_i2c.c:4865:26:I2C_Master_ISR_DMA 40 static -stm32f3xx_hal_i2c.c:5000:26:I2C_Slave_ISR_DMA 32 static -stm32f3xx_hal_i2c.c:5122:26:I2C_RequestMemoryWrite 32 static -stm32f3xx_hal_i2c.c:5175:26:I2C_RequestMemoryRead 32 static -stm32f3xx_hal_i2c.c:5222:13:I2C_ITAddrCplt 24 static -stm32f3xx_hal_i2c.c:5317:13:I2C_ITMasterSeqCplt 16 static -stm32f3xx_hal_i2c.c:5370:13:I2C_ITSlaveSeqCplt 16 static -stm32f3xx_hal_i2c.c:5426:13:I2C_ITMasterCplt 24 static -stm32f3xx_hal_i2c.c:5545:13:I2C_ITSlaveCplt 24 static -stm32f3xx_hal_i2c.c:5682:13:I2C_ITListenCplt 16 static -stm32f3xx_hal_i2c.c:5733:13:I2C_ITError 24 static -stm32f3xx_hal_i2c.c:5851:13:I2C_Flush_TXDR 16 static -stm32f3xx_hal_i2c.c:5872:13:I2C_DMAMasterTransmitCplt 24 static -stm32f3xx_hal_i2c.c:5920:13:I2C_DMASlaveTransmitCplt 24 static -stm32f3xx_hal_i2c.c:5947:13:I2C_DMAMasterReceiveCplt 24 static -stm32f3xx_hal_i2c.c:5995:13:I2C_DMASlaveReceiveCplt 24 static -stm32f3xx_hal_i2c.c:6022:13:I2C_DMAError 24 static -stm32f3xx_hal_i2c.c:6039:13:I2C_DMAAbort 24 static -stm32f3xx_hal_i2c.c:6080:26:I2C_WaitOnFlagUntilTimeout 24 static -stm32f3xx_hal_i2c.c:6110:26:I2C_WaitOnTXISFlagUntilTimeout 24 static -stm32f3xx_hal_i2c.c:6147:26:I2C_WaitOnSTOPFlagUntilTimeout 24 static -stm32f3xx_hal_i2c.c:6181:26:I2C_WaitOnRXNEFlagUntilTimeout 24 static -stm32f3xx_hal_i2c.c:6244:26:I2C_IsAcknowledgeFailed 24 static -stm32f3xx_hal_i2c.c:6312:13:I2C_TransferConfig 24 static -stm32f3xx_hal_i2c.c:6331:13:I2C_Enable_IRQ 24 static -stm32f3xx_hal_i2c.c:6402:13:I2C_Disable_IRQ 24 static -stm32f3xx_hal_i2c.c:6465:13:I2C_ConvertOtherXferOptions 16 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.d deleted file mode 100644 index 0bd67304..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o deleted file mode 100644 index 6e40551c..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.su deleted file mode 100644 index 065d68da..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.su +++ /dev/null @@ -1,6 +0,0 @@ -stm32f3xx_hal_i2c_ex.c:97:19:HAL_I2CEx_ConfigAnalogFilter 16 static -stm32f3xx_hal_i2c_ex.c:141:19:HAL_I2CEx_ConfigDigitalFilter 24 static -stm32f3xx_hal_i2c_ex.c:192:19:HAL_I2CEx_EnableWakeUp 16 static -stm32f3xx_hal_i2c_ex.c:231:19:HAL_I2CEx_DisableWakeUp 16 static -stm32f3xx_hal_i2c_ex.c:279:6:HAL_I2CEx_EnableFastModePlus 24 static -stm32f3xx_hal_i2c_ex.c:306:6:HAL_I2CEx_DisableFastModePlus 24 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.d deleted file mode 100644 index 0eb97a8b..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o deleted file mode 100644 index e201e558..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.su deleted file mode 100644 index e0e86d06..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.su +++ /dev/null @@ -1,10 +0,0 @@ -stm32f3xx_hal_opamp.c:247:19:HAL_OPAMP_Init 24 static -stm32f3xx_hal_opamp.c:400:19:HAL_OPAMP_DeInit 24 static -stm32f3xx_hal_opamp.c:465:13:HAL_OPAMP_MspInit 16 static -stm32f3xx_hal_opamp.c:482:13:HAL_OPAMP_MspDeInit 16 static -stm32f3xx_hal_opamp.c:519:19:HAL_OPAMP_Start 24 static -stm32f3xx_hal_opamp.c:561:19:HAL_OPAMP_Stop 24 static -stm32f3xx_hal_opamp.c:610:19:HAL_OPAMP_SelfCalibrate 32 static -stm32f3xx_hal_opamp.c:812:19:HAL_OPAMP_Lock 24 static -stm32f3xx_hal_opamp.c:866:24:HAL_OPAMP_GetState 16 static -stm32f3xx_hal_opamp.c:888:28:HAL_OPAMP_GetTrimOffset 32 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.d deleted file mode 100644 index 8e4bf908..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o deleted file mode 100644 index 4c0dd8e2..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.su deleted file mode 100644 index eb8f25c9..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.su +++ /dev/null @@ -1 +0,0 @@ -stm32f3xx_hal_opamp_ex.c:336:19:HAL_OPAMPEx_SelfCalibrateAll 64 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.d deleted file mode 100644 index e2cfedf8..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o deleted file mode 100644 index 53297716..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.su deleted file mode 100644 index e6ad7b40..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.su +++ /dev/null @@ -1,33 +0,0 @@ -stm32f3xx_hal_pcd.c:120:19:HAL_PCD_Init 64 static -stm32f3xx_hal_pcd.c:207:19:HAL_PCD_DeInit 16 static -stm32f3xx_hal_pcd.c:243:13:HAL_PCD_MspInit 16 static -stm32f3xx_hal_pcd.c:258:13:HAL_PCD_MspDeInit 16 static -stm32f3xx_hal_pcd.c:808:19:HAL_PCD_Start 16 static -stm32f3xx_hal_pcd.c:825:19:HAL_PCD_Stop 16 static -stm32f3xx_hal_pcd.c:843:6:HAL_PCD_IRQHandler 16 static -stm32f3xx_hal_pcd.c:934:13:HAL_PCD_DataOutStageCallback 16 static -stm32f3xx_hal_pcd.c:951:13:HAL_PCD_DataInStageCallback 16 static -stm32f3xx_hal_pcd.c:966:13:HAL_PCD_SetupStageCallback 16 static -stm32f3xx_hal_pcd.c:981:13:HAL_PCD_SOFCallback 16 static -stm32f3xx_hal_pcd.c:996:13:HAL_PCD_ResetCallback 16 static -stm32f3xx_hal_pcd.c:1011:13:HAL_PCD_SuspendCallback 16 static -stm32f3xx_hal_pcd.c:1026:13:HAL_PCD_ResumeCallback 16 static -stm32f3xx_hal_pcd.c:1042:13:HAL_PCD_ISOOUTIncompleteCallback 16 static -stm32f3xx_hal_pcd.c:1059:13:HAL_PCD_ISOINIncompleteCallback 16 static -stm32f3xx_hal_pcd.c:1075:13:HAL_PCD_ConnectCallback 16 static -stm32f3xx_hal_pcd.c:1090:13:HAL_PCD_DisconnectCallback 16 static -stm32f3xx_hal_pcd.c:1124:19:HAL_PCD_DevConnect 16 static -stm32f3xx_hal_pcd.c:1140:19:HAL_PCD_DevDisconnect 16 static -stm32f3xx_hal_pcd.c:1157:19:HAL_PCD_SetAddress 16 static -stm32f3xx_hal_pcd.c:1173:19:HAL_PCD_EP_Open 24 static -stm32f3xx_hal_pcd.c:1217:19:HAL_PCD_EP_Close 24 static -stm32f3xx_hal_pcd.c:1248:19:HAL_PCD_EP_Receive 32 static -stm32f3xx_hal_pcd.c:1279:10:HAL_PCD_EP_GetRxCount 16 static -stm32f3xx_hal_pcd.c:1291:19:HAL_PCD_EP_Transmit 32 static -stm32f3xx_hal_pcd.c:1322:19:HAL_PCD_EP_SetStall 24 static -stm32f3xx_hal_pcd.c:1363:19:HAL_PCD_EP_ClrStall 24 static -stm32f3xx_hal_pcd.c:1399:19:HAL_PCD_EP_Flush 16 static -stm32f3xx_hal_pcd.c:1413:19:HAL_PCD_ActivateRemoteWakeup 16 static -stm32f3xx_hal_pcd.c:1423:19:HAL_PCD_DeActivateRemoteWakeup 16 static -stm32f3xx_hal_pcd.c:1452:18:HAL_PCD_GetState 16 static -stm32f3xx_hal_pcd.c:1476:26:PCD_EP_ISR_Handler 48 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.d deleted file mode 100644 index e59f381b..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o deleted file mode 100644 index 310b174e..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.su deleted file mode 100644 index 3331be5e..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.su +++ /dev/null @@ -1,4 +0,0 @@ -stm32f3xx_hal_pcd_ex.c:81:20:HAL_PCDEx_PMAConfig 32 static -stm32f3xx_hal_pcd_ex.c:126:13:HAL_PCDEx_SetConnectionState 16 static -stm32f3xx_hal_pcd_ex.c:143:13:HAL_PCDEx_LPM_Callback 16 static -stm32f3xx_hal_pcd_ex.c:160:13:HAL_PCDEx_BCD_Callback 16 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.d deleted file mode 100644 index 3ffdf1b6..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o deleted file mode 100644 index 54b6eb46..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su deleted file mode 100644 index fd2aa473..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su +++ /dev/null @@ -1,12 +0,0 @@ -stm32f3xx_hal_pwr.c:75:6:HAL_PWR_DeInit 4 static -stm32f3xx_hal_pwr.c:88:6:HAL_PWR_EnableBkUpAccess 4 static -stm32f3xx_hal_pwr.c:100:6:HAL_PWR_DisableBkUpAccess 4 static -stm32f3xx_hal_pwr.c:243:6:HAL_PWR_EnableWakeUpPin 16 static -stm32f3xx_hal_pwr.c:258:6:HAL_PWR_DisableWakeUpPin 16 static -stm32f3xx_hal_pwr.c:283:6:HAL_PWR_EnterSLEEPMode 16 static,ignoring_inline_asm -stm32f3xx_hal_pwr.c:325:6:HAL_PWR_EnterSTOPMode 24 static,ignoring_inline_asm -stm32f3xx_hal_pwr.c:375:6:HAL_PWR_EnterSTANDBYMode 4 static,ignoring_inline_asm -stm32f3xx_hal_pwr.c:399:6:HAL_PWR_EnableSleepOnExit 4 static -stm32f3xx_hal_pwr.c:412:6:HAL_PWR_DisableSleepOnExit 4 static -stm32f3xx_hal_pwr.c:426:6:HAL_PWR_EnableSEVOnPend 4 static -stm32f3xx_hal_pwr.c:439:6:HAL_PWR_DisableSEVOnPend 4 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.d deleted file mode 100644 index 0e198258..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o deleted file mode 100644 index 075ced16..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.su deleted file mode 100644 index 374a46ba..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.su +++ /dev/null @@ -1,5 +0,0 @@ -stm32f3xx_hal_pwr_ex.c:129:6:HAL_PWR_ConfigPVD 16 static -stm32f3xx_hal_pwr_ex.c:171:6:HAL_PWR_EnablePVD 4 static -stm32f3xx_hal_pwr_ex.c:180:6:HAL_PWR_DisablePVD 4 static -stm32f3xx_hal_pwr_ex.c:190:6:HAL_PWR_PVD_IRQHandler 8 static -stm32f3xx_hal_pwr_ex.c:207:13:HAL_PWR_PVDCallback 4 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.d deleted file mode 100644 index 1c1b3090..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o deleted file mode 100644 index 16a7a3b4..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su deleted file mode 100644 index f8bc9ce9..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su +++ /dev/null @@ -1,14 +0,0 @@ -stm32f3xx_hal_rcc.c:216:19:HAL_RCC_DeInit 24 static,ignoring_inline_asm -stm32f3xx_hal_rcc.c:316:19:HAL_RCC_OscConfig 520 static,ignoring_inline_asm -stm32f3xx_hal_rcc.c:696:19:HAL_RCC_ClockConfig 128 static,ignoring_inline_asm -stm32f3xx_hal_rcc.c:888:6:HAL_RCC_MCOConfig 48 static -stm32f3xx_hal_rcc.c:922:6:HAL_RCC_EnableCSS 16 static,ignoring_inline_asm -stm32f3xx_hal_rcc.c:931:6:HAL_RCC_DisableCSS 16 static,ignoring_inline_asm -stm32f3xx_hal_rcc.c:965:10:HAL_RCC_GetSysClockFreq 48 static,ignoring_inline_asm -stm32f3xx_hal_rcc.c:1029:10:HAL_RCC_GetHCLKFreq 4 static -stm32f3xx_hal_rcc.c:1040:10:HAL_RCC_GetPCLK1Freq 16 static,ignoring_inline_asm -stm32f3xx_hal_rcc.c:1052:10:HAL_RCC_GetPCLK2Freq 16 static,ignoring_inline_asm -stm32f3xx_hal_rcc.c:1065:6:HAL_RCC_GetOscConfig 24 static,ignoring_inline_asm -stm32f3xx_hal_rcc.c:1153:6:HAL_RCC_GetClockConfig 16 static -stm32f3xx_hal_rcc.c:1183:6:HAL_RCC_NMI_IRQHandler 8 static -stm32f3xx_hal_rcc.c:1200:13:HAL_RCC_CSSCallback 4 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.d deleted file mode 100644 index 5a1daae4..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o deleted file mode 100644 index bb565600..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su deleted file mode 100644 index eb085dd4..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su +++ /dev/null @@ -1,4 +0,0 @@ -stm32f3xx_hal_rcc_ex.c:107:19:HAL_RCCEx_PeriphCLKConfig 80 static,ignoring_inline_asm -stm32f3xx_hal_rcc_ex.c:575:6:HAL_RCCEx_GetPeriphCLKConfig 16 static -stm32f3xx_hal_rcc_ex.c:946:10:HAL_RCCEx_GetPeriphCLKFreq 80 static,ignoring_inline_asm -stm32f3xx_hal_rcc_ex.c:1533:17:RCC_GetPLLCLKFreq 24 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.d deleted file mode 100644 index 53f3c557..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o deleted file mode 100644 index 82ef32e2..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.su deleted file mode 100644 index 9ccbce88..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.su +++ /dev/null @@ -1,118 +0,0 @@ -stm32f3xx_hal_tim.c:272:19:HAL_TIM_Base_Init 16 static -stm32f3xx_hal_tim.c:324:19:HAL_TIM_Base_DeInit 16 static -stm32f3xx_hal_tim.c:360:13:HAL_TIM_Base_MspInit 16 static -stm32f3xx_hal_tim.c:375:13:HAL_TIM_Base_MspDeInit 16 static -stm32f3xx_hal_tim.c:391:19:HAL_TIM_Base_Start 24 static -stm32f3xx_hal_tim.c:420:19:HAL_TIM_Base_Stop 16 static -stm32f3xx_hal_tim.c:443:19:HAL_TIM_Base_Start_IT 24 static -stm32f3xx_hal_tim.c:469:19:HAL_TIM_Base_Stop_IT 16 static -stm32f3xx_hal_tim.c:490:19:HAL_TIM_Base_Start_DMA 32 static -stm32f3xx_hal_tim.c:549:19:HAL_TIM_Base_Stop_DMA 16 static -stm32f3xx_hal_tim.c:604:19:HAL_TIM_OC_Init 16 static -stm32f3xx_hal_tim.c:656:19:HAL_TIM_OC_DeInit 16 static -stm32f3xx_hal_tim.c:692:13:HAL_TIM_OC_MspInit 16 static -stm32f3xx_hal_tim.c:707:13:HAL_TIM_OC_MspDeInit 16 static -stm32f3xx_hal_tim.c:731:19:HAL_TIM_OC_Start 24 static -stm32f3xx_hal_tim.c:772:19:HAL_TIM_OC_Stop 16 static -stm32f3xx_hal_tim.c:804:19:HAL_TIM_OC_Start_IT 24 static -stm32f3xx_hal_tim.c:876:19:HAL_TIM_OC_Stop_IT 16 static -stm32f3xx_hal_tim.c:944:19:HAL_TIM_OC_Start_DMA 32 static -stm32f3xx_hal_tim.c:1086:19:HAL_TIM_OC_Stop_DMA 16 static -stm32f3xx_hal_tim.c:1183:19:HAL_TIM_PWM_Init 16 static -stm32f3xx_hal_tim.c:1235:19:HAL_TIM_PWM_DeInit 16 static -stm32f3xx_hal_tim.c:1271:13:HAL_TIM_PWM_MspInit 16 static -stm32f3xx_hal_tim.c:1286:13:HAL_TIM_PWM_MspDeInit 16 static -stm32f3xx_hal_tim.c:1310:19:HAL_TIM_PWM_Start 24 static -stm32f3xx_hal_tim.c:1351:19:HAL_TIM_PWM_Stop 16 static -stm32f3xx_hal_tim.c:1386:19:HAL_TIM_PWM_Start_IT 24 static -stm32f3xx_hal_tim.c:1457:19:HAL_TIM_PWM_Stop_IT 16 static -stm32f3xx_hal_tim.c:1525:19:HAL_TIM_PWM_Start_DMA 32 static -stm32f3xx_hal_tim.c:1666:19:HAL_TIM_PWM_Stop_DMA 16 static -stm32f3xx_hal_tim.c:1763:19:HAL_TIM_IC_Init 16 static -stm32f3xx_hal_tim.c:1815:19:HAL_TIM_IC_DeInit 16 static -stm32f3xx_hal_tim.c:1851:13:HAL_TIM_IC_MspInit 16 static -stm32f3xx_hal_tim.c:1866:13:HAL_TIM_IC_MspDeInit 16 static -stm32f3xx_hal_tim.c:1887:19:HAL_TIM_IC_Start 24 static -stm32f3xx_hal_tim.c:1919:19:HAL_TIM_IC_Stop 16 static -stm32f3xx_hal_tim.c:1945:19:HAL_TIM_IC_Start_IT 24 static -stm32f3xx_hal_tim.c:2010:19:HAL_TIM_IC_Stop_IT 16 static -stm32f3xx_hal_tim.c:2072:19:HAL_TIM_IC_Start_DMA 32 static -stm32f3xx_hal_tim.c:2207:19:HAL_TIM_IC_Stop_DMA 16 static -stm32f3xx_hal_tim.c:2302:19:HAL_TIM_OnePulse_Init 16 static -stm32f3xx_hal_tim.c:2361:19:HAL_TIM_OnePulse_DeInit 16 static -stm32f3xx_hal_tim.c:2397:13:HAL_TIM_OnePulse_MspInit 16 static -stm32f3xx_hal_tim.c:2412:13:HAL_TIM_OnePulse_MspDeInit 16 static -stm32f3xx_hal_tim.c:2431:19:HAL_TIM_OnePulse_Start 16 static -stm32f3xx_hal_tim.c:2467:19:HAL_TIM_OnePulse_Stop 16 static -stm32f3xx_hal_tim.c:2503:19:HAL_TIM_OnePulse_Start_IT 16 static -stm32f3xx_hal_tim.c:2545:19:HAL_TIM_OnePulse_Stop_IT 16 static -stm32f3xx_hal_tim.c:2615:19:HAL_TIM_Encoder_Init 32 static -stm32f3xx_hal_tim.c:2720:19:HAL_TIM_Encoder_DeInit 16 static -stm32f3xx_hal_tim.c:2756:13:HAL_TIM_Encoder_MspInit 16 static -stm32f3xx_hal_tim.c:2771:13:HAL_TIM_Encoder_MspDeInit 16 static -stm32f3xx_hal_tim.c:2791:19:HAL_TIM_Encoder_Start 16 static -stm32f3xx_hal_tim.c:2835:19:HAL_TIM_Encoder_Stop 16 static -stm32f3xx_hal_tim.c:2881:19:HAL_TIM_Encoder_Start_IT 16 static -stm32f3xx_hal_tim.c:2931:19:HAL_TIM_Encoder_Stop_IT 16 static -stm32f3xx_hal_tim.c:2985:19:HAL_TIM_Encoder_Start_DMA 24 static -stm32f3xx_hal_tim.c:3120:19:HAL_TIM_Encoder_Stop_DMA 16 static -stm32f3xx_hal_tim.c:3186:6:HAL_TIM_IRQHandler 16 static -stm32f3xx_hal_tim.c:3419:19:HAL_TIM_OC_ConfigChannel 24 static -stm32f3xx_hal_tim.c:3523:19:HAL_TIM_IC_ConfigChannel 24 static -stm32f3xx_hal_tim.c:3623:19:HAL_TIM_PWM_ConfigChannel 24 static -stm32f3xx_hal_tim.c:3776:19:HAL_TIM_OnePulse_ConfigChannel 56 static -stm32f3xx_hal_tim.c:3920:19:HAL_TIM_DMABurst_WriteStart 32 static -stm32f3xx_hal_tim.c:3971:19:HAL_TIM_DMABurst_MultiWriteStart 24 static -stm32f3xx_hal_tim.c:4143:19:HAL_TIM_DMABurst_WriteStop 24 static -stm32f3xx_hal_tim.c:4244:19:HAL_TIM_DMABurst_ReadStart 32 static -stm32f3xx_hal_tim.c:4295:19:HAL_TIM_DMABurst_MultiReadStart 24 static -stm32f3xx_hal_tim.c:4468:19:HAL_TIM_DMABurst_ReadStop 24 static -stm32f3xx_hal_tim.c:4547:19:HAL_TIM_GenerateEvent 16 static -stm32f3xx_hal_tim.c:4587:19:HAL_TIM_ConfigOCrefClear 24 static -stm32f3xx_hal_tim.c:4760:19:HAL_TIM_ConfigClockSource 24 static -stm32f3xx_hal_tim.c:4912:19:HAL_TIM_ConfigTI1Input 24 static -stm32f3xx_hal_tim.c:4944:19:HAL_TIM_SlaveConfigSynchro 16 static -stm32f3xx_hal_tim.c:4984:19:HAL_TIM_SlaveConfigSynchro_IT 16 static -stm32f3xx_hal_tim.c:5027:10:HAL_TIM_ReadCapturedValue 24 static -stm32f3xx_hal_tim.c:5111:13:HAL_TIM_PeriodElapsedCallback 16 static -stm32f3xx_hal_tim.c:5126:13:HAL_TIM_PeriodElapsedHalfCpltCallback 16 static -stm32f3xx_hal_tim.c:5141:13:HAL_TIM_OC_DelayElapsedCallback 16 static -stm32f3xx_hal_tim.c:5156:13:HAL_TIM_IC_CaptureCallback 16 static -stm32f3xx_hal_tim.c:5171:13:HAL_TIM_IC_CaptureHalfCpltCallback 16 static -stm32f3xx_hal_tim.c:5186:13:HAL_TIM_PWM_PulseFinishedCallback 16 static -stm32f3xx_hal_tim.c:5201:13:HAL_TIM_PWM_PulseFinishedHalfCpltCallback 16 static -stm32f3xx_hal_tim.c:5216:13:HAL_TIM_TriggerCallback 16 static -stm32f3xx_hal_tim.c:5231:13:HAL_TIM_TriggerHalfCpltCallback 16 static -stm32f3xx_hal_tim.c:5246:13:HAL_TIM_ErrorCallback 16 static -stm32f3xx_hal_tim.c:5781:22:HAL_TIM_Base_GetState 16 static -stm32f3xx_hal_tim.c:5791:22:HAL_TIM_OC_GetState 16 static -stm32f3xx_hal_tim.c:5801:22:HAL_TIM_PWM_GetState 16 static -stm32f3xx_hal_tim.c:5811:22:HAL_TIM_IC_GetState 16 static -stm32f3xx_hal_tim.c:5821:22:HAL_TIM_OnePulse_GetState 16 static -stm32f3xx_hal_tim.c:5831:22:HAL_TIM_Encoder_GetState 16 static -stm32f3xx_hal_tim.c:5853:6:TIM_DMAError 24 static -stm32f3xx_hal_tim.c:5871:6:TIM_DMADelayPulseCplt 24 static -stm32f3xx_hal_tim.c:5912:6:TIM_DMADelayPulseHalfCplt 24 static -stm32f3xx_hal_tim.c:5953:6:TIM_DMACaptureCplt 24 static -stm32f3xx_hal_tim.c:5994:6:TIM_DMACaptureHalfCplt 24 static -stm32f3xx_hal_tim.c:6035:13:TIM_DMAPeriodElapsedCplt 24 static -stm32f3xx_hal_tim.c:6053:13:TIM_DMAPeriodElapsedHalfCplt 24 static -stm32f3xx_hal_tim.c:6071:13:TIM_DMATriggerCplt 24 static -stm32f3xx_hal_tim.c:6089:13:TIM_DMATriggerHalfCplt 24 static -stm32f3xx_hal_tim.c:6108:6:TIM_Base_SetConfig 24 static -stm32f3xx_hal_tim.c:6156:13:TIM_OC1_SetConfig 32 static -stm32f3xx_hal_tim.c:6231:6:TIM_OC2_SetConfig 32 static -stm32f3xx_hal_tim.c:6309:13:TIM_OC3_SetConfig 32 static -stm32f3xx_hal_tim.c:6385:13:TIM_OC4_SetConfig 32 static -stm32f3xx_hal_tim.c:6448:13:TIM_OC5_SetConfig 32 static -stm32f3xx_hal_tim.c:6503:13:TIM_OC6_SetConfig 32 static -stm32f3xx_hal_tim.c:6558:26:TIM_SlaveTimer_SetConfig 32 static -stm32f3xx_hal_tim.c:6689:6:TIM_TI1_SetConfig 32 static -stm32f3xx_hal_tim.c:6736:13:TIM_TI1_ConfigInputStage 32 static -stm32f3xx_hal_tim.c:6779:13:TIM_TI2_SetConfig 32 static -stm32f3xx_hal_tim.c:6819:13:TIM_TI2_ConfigInputStage 32 static -stm32f3xx_hal_tim.c:6862:13:TIM_TI3_SetConfig 32 static -stm32f3xx_hal_tim.c:6910:13:TIM_TI4_SetConfig 32 static -stm32f3xx_hal_tim.c:6953:13:TIM_ITRx_SetConfig 24 static -stm32f3xx_hal_tim.c:6983:6:TIM_ETR_SetConfig 32 static -stm32f3xx_hal_tim.c:7015:6:TIM_CCxChannelCmd 32 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.d deleted file mode 100644 index 6425148e..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o deleted file mode 100644 index ed32b5b1..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.su deleted file mode 100644 index 689dc727..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.su +++ /dev/null @@ -1,41 +0,0 @@ -stm32f3xx_hal_tim_ex.c:132:19:HAL_TIMEx_HallSensor_Init 48 static -stm32f3xx_hal_tim_ex.c:224:19:HAL_TIMEx_HallSensor_DeInit 16 static -stm32f3xx_hal_tim_ex.c:260:13:HAL_TIMEx_HallSensor_MspInit 16 static -stm32f3xx_hal_tim_ex.c:275:13:HAL_TIMEx_HallSensor_MspDeInit 16 static -stm32f3xx_hal_tim_ex.c:290:19:HAL_TIMEx_HallSensor_Start 24 static -stm32f3xx_hal_tim_ex.c:317:19:HAL_TIMEx_HallSensor_Stop 16 static -stm32f3xx_hal_tim_ex.c:338:19:HAL_TIMEx_HallSensor_Start_IT 24 static -stm32f3xx_hal_tim_ex.c:368:19:HAL_TIMEx_HallSensor_Stop_IT 16 static -stm32f3xx_hal_tim_ex.c:394:19:HAL_TIMEx_HallSensor_Start_DMA 32 static -stm32f3xx_hal_tim_ex.c:454:19:HAL_TIMEx_HallSensor_Stop_DMA 16 static -stm32f3xx_hal_tim_ex.c:510:19:HAL_TIMEx_OCN_Start 24 static -stm32f3xx_hal_tim_ex.c:545:19:HAL_TIMEx_OCN_Stop 16 static -stm32f3xx_hal_tim_ex.c:574:19:HAL_TIMEx_OCN_Start_IT 24 static -stm32f3xx_hal_tim_ex.c:640:19:HAL_TIMEx_OCN_Stop_IT 24 static -stm32f3xx_hal_tim_ex.c:706:19:HAL_TIMEx_OCN_Start_DMA 32 static -stm32f3xx_hal_tim_ex.c:824:19:HAL_TIMEx_OCN_Stop_DMA 16 static -stm32f3xx_hal_tim_ex.c:919:19:HAL_TIMEx_PWMN_Start 24 static -stm32f3xx_hal_tim_ex.c:953:19:HAL_TIMEx_PWMN_Stop 16 static -stm32f3xx_hal_tim_ex.c:982:19:HAL_TIMEx_PWMN_Start_IT 24 static -stm32f3xx_hal_tim_ex.c:1047:19:HAL_TIMEx_PWMN_Stop_IT 24 static -stm32f3xx_hal_tim_ex.c:1114:19:HAL_TIMEx_PWMN_Start_DMA 32 static -stm32f3xx_hal_tim_ex.c:1231:19:HAL_TIMEx_PWMN_Stop_DMA 16 static -stm32f3xx_hal_tim_ex.c:1314:19:HAL_TIMEx_OnePulseN_Start 16 static -stm32f3xx_hal_tim_ex.c:1339:19:HAL_TIMEx_OnePulseN_Stop 16 static -stm32f3xx_hal_tim_ex.c:1368:19:HAL_TIMEx_OnePulseN_Start_IT 16 static -stm32f3xx_hal_tim_ex.c:1399:19:HAL_TIMEx_OnePulseN_Stop_IT 16 static -stm32f3xx_hal_tim_ex.c:1470:19:HAL_TIMEx_ConfigCommutEvent 24 static -stm32f3xx_hal_tim_ex.c:1526:19:HAL_TIMEx_ConfigCommutEvent_IT 24 static -stm32f3xx_hal_tim_ex.c:1583:19:HAL_TIMEx_ConfigCommutEvent_DMA 24 static -stm32f3xx_hal_tim_ex.c:1632:19:HAL_TIMEx_MasterConfigSynchronization 24 static -stm32f3xx_hal_tim_ex.c:1707:19:HAL_TIMEx_ConfigBreakDeadTime 24 static -stm32f3xx_hal_tim_ex.c:1852:19:HAL_TIMEx_RemapConfig 16 static -stm32f3xx_hal_tim_ex.c:1879:19:HAL_TIMEx_GroupChannel5 16 static -stm32f3xx_hal_tim_ex.c:1930:13:HAL_TIMEx_CommutCallback 16 static -stm32f3xx_hal_tim_ex.c:1944:13:HAL_TIMEx_CommutHalfCpltCallback 16 static -stm32f3xx_hal_tim_ex.c:1959:13:HAL_TIMEx_BreakCallback 16 static -stm32f3xx_hal_tim_ex.c:1975:13:HAL_TIMEx_Break2Callback 16 static -stm32f3xx_hal_tim_ex.c:2009:22:HAL_TIMEx_HallSensor_GetState 16 static -stm32f3xx_hal_tim_ex.c:2032:6:TIMEx_DMACommutationCplt 24 static -stm32f3xx_hal_tim_ex.c:2051:6:TIMEx_DMACommutationHalfCplt 24 static -stm32f3xx_hal_tim_ex.c:2078:13:TIM_CCxNChannelCmd 32 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.d deleted file mode 100644 index 73dc3f7b..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o deleted file mode 100644 index 95e87722..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.su deleted file mode 100644 index 7d4716df..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.su +++ /dev/null @@ -1,63 +0,0 @@ -stm32f3xx_hal_uart.c:287:19:HAL_UART_Init 16 static -stm32f3xx_hal_uart.c:360:19:HAL_HalfDuplex_Init 16 static -stm32f3xx_hal_uart.c:433:19:HAL_LIN_Init 16 static -stm32f3xx_hal_uart.c:530:19:HAL_MultiProcessor_Init 24 static -stm32f3xx_hal_uart.c:604:19:HAL_UART_DeInit 16 static -stm32f3xx_hal_uart.c:649:13:HAL_UART_MspInit 16 static -stm32f3xx_hal_uart.c:664:13:HAL_UART_MspDeInit 16 static -stm32f3xx_hal_uart.c:1004:19:HAL_UART_Transmit 48 static -stm32f3xx_hal_uart.c:1089:19:HAL_UART_Receive 48 static -stm32f3xx_hal_uart.c:1174:19:HAL_UART_Transmit_IT 24 static -stm32f3xx_hal_uart.c:1227:19:HAL_UART_Receive_IT 24 static -stm32f3xx_hal_uart.c:1286:19:HAL_UART_Transmit_DMA 24 static -stm32f3xx_hal_uart.c:1362:19:HAL_UART_Receive_DMA 24 static -stm32f3xx_hal_uart.c:1433:19:HAL_UART_DMAPause 24 static -stm32f3xx_hal_uart.c:1467:19:HAL_UART_DMAResume 16 static -stm32f3xx_hal_uart.c:1499:19:HAL_UART_DMAStop 24 static -stm32f3xx_hal_uart.c:1574:19:HAL_UART_Abort 16 static -stm32f3xx_hal_uart.c:1662:19:HAL_UART_AbortTransmit 16 static -stm32f3xx_hal_uart.c:1714:19:HAL_UART_AbortReceive 16 static -stm32f3xx_hal_uart.c:1774:19:HAL_UART_Abort_IT 24 static -stm32f3xx_hal_uart.c:1913:19:HAL_UART_AbortTransmit_IT 16 static -stm32f3xx_hal_uart.c:1997:19:HAL_UART_AbortReceive_IT 16 static -stm32f3xx_hal_uart.c:2081:6:HAL_UART_IRQHandler 40 static -stm32f3xx_hal_uart.c:2285:13:HAL_UART_TxCpltCallback 16 static -stm32f3xx_hal_uart.c:2300:13:HAL_UART_TxHalfCpltCallback 16 static -stm32f3xx_hal_uart.c:2315:13:HAL_UART_RxCpltCallback 16 static -stm32f3xx_hal_uart.c:2330:13:HAL_UART_RxHalfCpltCallback 16 static -stm32f3xx_hal_uart.c:2345:13:HAL_UART_ErrorCallback 16 static -stm32f3xx_hal_uart.c:2360:13:HAL_UART_AbortCpltCallback 16 static -stm32f3xx_hal_uart.c:2375:13:HAL_UART_AbortTransmitCpltCallback 16 static -stm32f3xx_hal_uart.c:2390:13:HAL_UART_AbortReceiveCpltCallback 16 static -stm32f3xx_hal_uart.c:2437:6:HAL_UART_ReceiverTimeout_Config 16 static -stm32f3xx_hal_uart.c:2449:19:HAL_UART_EnableReceiverTimeout 16 static -stm32f3xx_hal_uart.c:2480:19:HAL_UART_DisableReceiverTimeout 16 static -stm32f3xx_hal_uart.c:2511:19:HAL_MultiProcessor_EnableMuteMode 16 static -stm32f3xx_hal_uart.c:2531:19:HAL_MultiProcessor_DisableMuteMode 16 static -stm32f3xx_hal_uart.c:2551:6:HAL_MultiProcessor_EnterMuteMode 16 static -stm32f3xx_hal_uart.c:2561:19:HAL_HalfDuplex_EnableTransmitter 16 static -stm32f3xx_hal_uart.c:2584:19:HAL_HalfDuplex_EnableReceiver 16 static -stm32f3xx_hal_uart.c:2608:19:HAL_LIN_SendBreak 16 static -stm32f3xx_hal_uart.c:2653:23:HAL_UART_GetState 24 static -stm32f3xx_hal_uart.c:2669:10:HAL_UART_GetError 16 static -stm32f3xx_hal_uart.c:2712:19:UART_SetConfig 40 static -stm32f3xx_hal_uart.c:2852:6:UART_AdvFeatureConfig 16 static -stm32f3xx_hal_uart.c:2926:19:UART_CheckIdleState 32 static -stm32f3xx_hal_uart.c:2976:19:UART_WaitOnFlagUntilTimeout 24 static -stm32f3xx_hal_uart.c:3031:13:UART_EndTxTransfer 16 static -stm32f3xx_hal_uart.c:3046:13:UART_EndRxTransfer 16 static -stm32f3xx_hal_uart.c:3065:13:UART_DMATransmitCplt 24 static -stm32f3xx_hal_uart.c:3099:13:UART_DMATxHalfCplt 24 static -stm32f3xx_hal_uart.c:3117:13:UART_DMAReceiveCplt 24 static -stm32f3xx_hal_uart.c:3152:13:UART_DMARxHalfCplt 24 static -stm32f3xx_hal_uart.c:3170:13:UART_DMAError 32 static -stm32f3xx_hal_uart.c:3210:13:UART_DMAAbortOnError 24 static -stm32f3xx_hal_uart.c:3233:13:UART_DMATxAbortCallback 24 static -stm32f3xx_hal_uart.c:3282:13:UART_DMARxAbortCallback 24 static -stm32f3xx_hal_uart.c:3333:13:UART_DMATxOnlyAbortCallback 24 static -stm32f3xx_hal_uart.c:3361:13:UART_DMARxOnlyAbortCallback 24 static -stm32f3xx_hal_uart.c:3393:13:UART_TxISR_8BIT 16 static -stm32f3xx_hal_uart.c:3422:13:UART_TxISR_16BIT 24 static -stm32f3xx_hal_uart.c:3454:13:UART_EndTransmit_IT 16 static -stm32f3xx_hal_uart.c:3479:13:UART_RxISR_8BIT 24 static -stm32f3xx_hal_uart.c:3529:13:UART_RxISR_16BIT 24 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.d deleted file mode 100644 index b0b6014e..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o deleted file mode 100644 index 29f4bb03..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.su deleted file mode 100644 index dd13dc4b..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.su +++ /dev/null @@ -1,7 +0,0 @@ -stm32f3xx_hal_uart_ex.c:148:19:HAL_RS485Ex_Init 32 static -stm32f3xx_hal_uart_ex.c:250:13:HAL_UARTEx_WakeupCallback 16 static -stm32f3xx_hal_uart_ex.c:297:19:HAL_MultiProcessorEx_AddressLength_Set 16 static -stm32f3xx_hal_uart_ex.c:335:19:HAL_UARTEx_StopModeWakeUpSourceConfig 40 static -stm32f3xx_hal_uart_ex.c:390:19:HAL_UARTEx_EnableStopMode 16 static -stm32f3xx_hal_uart_ex.c:409:19:HAL_UARTEx_DisableStopMode 16 static -stm32f3xx_hal_uart_ex.c:441:13:UARTEx_Wakeup_AddressConfig 24 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.d b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.d deleted file mode 100644 index f02e1095..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.d +++ /dev/null @@ -1,116 +0,0 @@ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o: \ - ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.c \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o deleted file mode 100644 index 2fed11b9..00000000 Binary files a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o and /dev/null differ diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.su b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.su deleted file mode 100644 index 7d8bed43..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.su +++ /dev/null @@ -1,30 +0,0 @@ -stm32f3xx_ll_usb.c:64:19:USB_CoreInit 16 static -stm32f3xx_ll_usb.c:84:19:USB_EnableGlobalInt 24 static -stm32f3xx_ll_usb.c:106:19:USB_DisableGlobalInt 24 static -stm32f3xx_ll_usb.c:130:19:USB_SetCurrentMode 16 static -stm32f3xx_ll_usb.c:151:19:USB_DevInit 16 static -stm32f3xx_ll_usb.c:182:19:USB_SetDevSpeed 16 static -stm32f3xx_ll_usb.c:204:19:USB_FlushTxFifo 16 static -stm32f3xx_ll_usb.c:223:19:USB_FlushRxFifo 16 static -stm32f3xx_ll_usb.c:242:19:USB_ActivateEndpoint 32 static -stm32f3xx_ll_usb.c:358:19:USB_DeactivateEndpoint 16 static -stm32f3xx_ll_usb.c:411:19:USB_EPStartXfer 96 static -stm32f3xx_ll_usb.c:499:19:USB_WritePacket 24 static -stm32f3xx_ll_usb.c:521:7:USB_ReadPacket 24 static -stm32f3xx_ll_usb.c:540:19:USB_EPSetStall 16 static -stm32f3xx_ll_usb.c:560:19:USB_EPClearStall 16 static -stm32f3xx_ll_usb.c:591:19:USB_StopDevice 16 static -stm32f3xx_ll_usb.c:612:20:USB_SetDevAddress 16 static -stm32f3xx_ll_usb.c:628:20:USB_DevConnect 16 static -stm32f3xx_ll_usb.c:645:20:USB_DevDisconnect 16 static -stm32f3xx_ll_usb.c:662:11:USB_ReadInterrupts 24 static -stm32f3xx_ll_usb.c:675:10:USB_ReadDevAllOutEpInterrupt 16 static -stm32f3xx_ll_usb.c:691:10:USB_ReadDevAllInEpInterrupt 16 static -stm32f3xx_ll_usb.c:709:10:USB_ReadDevOutEPInterrupt 16 static -stm32f3xx_ll_usb.c:728:10:USB_ReadDevInEPInterrupt 16 static -stm32f3xx_ll_usb.c:746:7:USB_ClearInterrupts 16 static -stm32f3xx_ll_usb.c:763:19:USB_EP0_OutStart 16 static -stm32f3xx_ll_usb.c:780:19:USB_ActivateRemoteWakeup 16 static -stm32f3xx_ll_usb.c:792:19:USB_DeActivateRemoteWakeup 16 static -stm32f3xx_ll_usb.c:806:6:USB_WritePMA 56 static -stm32f3xx_ll_usb.c:840:6:USB_ReadPMA 48 static diff --git a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk b/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk deleted file mode 100644 index 733d84d6..00000000 --- a/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk +++ /dev/null @@ -1,139 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c \ -../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.c - -OBJS += \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - -C_DEPS += \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.d \ -./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.d - - -# Each subdirectory must supply rules for building sources it contributes -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o: ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/MESC_Firmware.bin b/Debug/MESC_Firmware.bin deleted file mode 100644 index c84587e7..00000000 Binary files a/Debug/MESC_Firmware.bin and /dev/null differ diff --git a/Debug/MESC_Firmware.elf b/Debug/MESC_Firmware.elf deleted file mode 100644 index 13ef4650..00000000 Binary files a/Debug/MESC_Firmware.elf and /dev/null differ diff --git a/Debug/MESC_Firmware.list b/Debug/MESC_Firmware.list deleted file mode 100644 index e5d33b1b..00000000 --- a/Debug/MESC_Firmware.list +++ /dev/null @@ -1,30639 +0,0 @@ - -MESC_Firmware.elf: file format elf32-littlearm - -Sections: -Idx Name Size VMA LMA File off Algn - 0 .isr_vector 00000188 08000000 08000000 00010000 2**0 - CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 0000bd5c 08000190 08000190 00010190 2**4 - CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 0000007c 0800beec 0800beec 0001beec 2**2 - CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 0800bf68 0800bf68 00020014 2**0 - CONTENTS - 4 .ARM 00000000 0800bf68 0800bf68 00020014 2**0 - CONTENTS - 5 .preinit_array 00000000 0800bf68 0800bf68 00020014 2**0 - CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 0800bf68 0800bf68 0001bf68 2**2 - CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 0800bf6c 0800bf6c 0001bf6c 2**2 - CONTENTS, ALLOC, LOAD, DATA - 8 .data 00000014 20000000 0800bf70 00020000 2**2 - CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000df8 20000014 0800bf84 00020014 2**2 - ALLOC - 10 ._user_heap_stack 00000604 20000e0c 0800bf84 00020e0c 2**0 - ALLOC - 11 .ARM.attributes 00000030 00000000 00000000 00020014 2**0 - CONTENTS, READONLY - 12 .debug_info 00022bb7 00000000 00000000 00020044 2**0 - CONTENTS, READONLY, DEBUGGING - 13 .debug_abbrev 0000424a 00000000 00000000 00042bfb 2**0 - CONTENTS, READONLY, DEBUGGING - 14 .debug_aranges 00001bd0 00000000 00000000 00046e48 2**3 - CONTENTS, READONLY, DEBUGGING - 15 .debug_ranges 000019e8 00000000 00000000 00048a18 2**3 - CONTENTS, READONLY, DEBUGGING - 16 .debug_macro 0001fba6 00000000 00000000 0004a400 2**0 - CONTENTS, READONLY, DEBUGGING - 17 .debug_line 000191f3 00000000 00000000 00069fa6 2**0 - CONTENTS, READONLY, DEBUGGING - 18 .debug_str 000b9e5a 00000000 00000000 00083199 2**0 - CONTENTS, READONLY, DEBUGGING - 19 .comment 0000007b 00000000 00000000 0013cff3 2**0 - CONTENTS, READONLY - 20 .debug_frame 000075a8 00000000 00000000 0013d070 2**2 - CONTENTS, READONLY, DEBUGGING - -Disassembly of section .text: - -08000190 <__do_global_dtors_aux>: - 8000190: b510 push {r4, lr} - 8000192: 4c05 ldr r4, [pc, #20] ; (80001a8 <__do_global_dtors_aux+0x18>) - 8000194: 7823 ldrb r3, [r4, #0] - 8000196: b933 cbnz r3, 80001a6 <__do_global_dtors_aux+0x16> - 8000198: 4b04 ldr r3, [pc, #16] ; (80001ac <__do_global_dtors_aux+0x1c>) - 800019a: b113 cbz r3, 80001a2 <__do_global_dtors_aux+0x12> - 800019c: 4804 ldr r0, [pc, #16] ; (80001b0 <__do_global_dtors_aux+0x20>) - 800019e: f3af 8000 nop.w - 80001a2: 2301 movs r3, #1 - 80001a4: 7023 strb r3, [r4, #0] - 80001a6: bd10 pop {r4, pc} - 80001a8: 20000014 .word 0x20000014 - 80001ac: 00000000 .word 0x00000000 - 80001b0: 0800bed4 .word 0x0800bed4 - -080001b4 : - 80001b4: b508 push {r3, lr} - 80001b6: 4b03 ldr r3, [pc, #12] ; (80001c4 ) - 80001b8: b11b cbz r3, 80001c2 - 80001ba: 4903 ldr r1, [pc, #12] ; (80001c8 ) - 80001bc: 4803 ldr r0, [pc, #12] ; (80001cc ) - 80001be: f3af 8000 nop.w - 80001c2: bd08 pop {r3, pc} - 80001c4: 00000000 .word 0x00000000 - 80001c8: 20000018 .word 0x20000018 - 80001cc: 0800bed4 .word 0x0800bed4 - -080001d0 <__aeabi_drsub>: - 80001d0: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 - 80001d4: e002 b.n 80001dc <__adddf3> - 80001d6: bf00 nop - -080001d8 <__aeabi_dsub>: - 80001d8: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000 - -080001dc <__adddf3>: - 80001dc: b530 push {r4, r5, lr} - 80001de: ea4f 0441 mov.w r4, r1, lsl #1 - 80001e2: ea4f 0543 mov.w r5, r3, lsl #1 - 80001e6: ea94 0f05 teq r4, r5 - 80001ea: bf08 it eq - 80001ec: ea90 0f02 teqeq r0, r2 - 80001f0: bf1f itttt ne - 80001f2: ea54 0c00 orrsne.w ip, r4, r0 - 80001f6: ea55 0c02 orrsne.w ip, r5, r2 - 80001fa: ea7f 5c64 mvnsne.w ip, r4, asr #21 - 80001fe: ea7f 5c65 mvnsne.w ip, r5, asr #21 - 8000202: f000 80e2 beq.w 80003ca <__adddf3+0x1ee> - 8000206: ea4f 5454 mov.w r4, r4, lsr #21 - 800020a: ebd4 5555 rsbs r5, r4, r5, lsr #21 - 800020e: bfb8 it lt - 8000210: 426d neglt r5, r5 - 8000212: dd0c ble.n 800022e <__adddf3+0x52> - 8000214: 442c add r4, r5 - 8000216: ea80 0202 eor.w r2, r0, r2 - 800021a: ea81 0303 eor.w r3, r1, r3 - 800021e: ea82 0000 eor.w r0, r2, r0 - 8000222: ea83 0101 eor.w r1, r3, r1 - 8000226: ea80 0202 eor.w r2, r0, r2 - 800022a: ea81 0303 eor.w r3, r1, r3 - 800022e: 2d36 cmp r5, #54 ; 0x36 - 8000230: bf88 it hi - 8000232: bd30 pophi {r4, r5, pc} - 8000234: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 - 8000238: ea4f 3101 mov.w r1, r1, lsl #12 - 800023c: f44f 1c80 mov.w ip, #1048576 ; 0x100000 - 8000240: ea4c 3111 orr.w r1, ip, r1, lsr #12 - 8000244: d002 beq.n 800024c <__adddf3+0x70> - 8000246: 4240 negs r0, r0 - 8000248: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 800024c: f013 4f00 tst.w r3, #2147483648 ; 0x80000000 - 8000250: ea4f 3303 mov.w r3, r3, lsl #12 - 8000254: ea4c 3313 orr.w r3, ip, r3, lsr #12 - 8000258: d002 beq.n 8000260 <__adddf3+0x84> - 800025a: 4252 negs r2, r2 - 800025c: eb63 0343 sbc.w r3, r3, r3, lsl #1 - 8000260: ea94 0f05 teq r4, r5 - 8000264: f000 80a7 beq.w 80003b6 <__adddf3+0x1da> - 8000268: f1a4 0401 sub.w r4, r4, #1 - 800026c: f1d5 0e20 rsbs lr, r5, #32 - 8000270: db0d blt.n 800028e <__adddf3+0xb2> - 8000272: fa02 fc0e lsl.w ip, r2, lr - 8000276: fa22 f205 lsr.w r2, r2, r5 - 800027a: 1880 adds r0, r0, r2 - 800027c: f141 0100 adc.w r1, r1, #0 - 8000280: fa03 f20e lsl.w r2, r3, lr - 8000284: 1880 adds r0, r0, r2 - 8000286: fa43 f305 asr.w r3, r3, r5 - 800028a: 4159 adcs r1, r3 - 800028c: e00e b.n 80002ac <__adddf3+0xd0> - 800028e: f1a5 0520 sub.w r5, r5, #32 - 8000292: f10e 0e20 add.w lr, lr, #32 - 8000296: 2a01 cmp r2, #1 - 8000298: fa03 fc0e lsl.w ip, r3, lr - 800029c: bf28 it cs - 800029e: f04c 0c02 orrcs.w ip, ip, #2 - 80002a2: fa43 f305 asr.w r3, r3, r5 - 80002a6: 18c0 adds r0, r0, r3 - 80002a8: eb51 71e3 adcs.w r1, r1, r3, asr #31 - 80002ac: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 - 80002b0: d507 bpl.n 80002c2 <__adddf3+0xe6> - 80002b2: f04f 0e00 mov.w lr, #0 - 80002b6: f1dc 0c00 rsbs ip, ip, #0 - 80002ba: eb7e 0000 sbcs.w r0, lr, r0 - 80002be: eb6e 0101 sbc.w r1, lr, r1 - 80002c2: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000 - 80002c6: d31b bcc.n 8000300 <__adddf3+0x124> - 80002c8: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000 - 80002cc: d30c bcc.n 80002e8 <__adddf3+0x10c> - 80002ce: 0849 lsrs r1, r1, #1 - 80002d0: ea5f 0030 movs.w r0, r0, rrx - 80002d4: ea4f 0c3c mov.w ip, ip, rrx - 80002d8: f104 0401 add.w r4, r4, #1 - 80002dc: ea4f 5244 mov.w r2, r4, lsl #21 - 80002e0: f512 0f80 cmn.w r2, #4194304 ; 0x400000 - 80002e4: f080 809a bcs.w 800041c <__adddf3+0x240> - 80002e8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 - 80002ec: bf08 it eq - 80002ee: ea5f 0c50 movseq.w ip, r0, lsr #1 - 80002f2: f150 0000 adcs.w r0, r0, #0 - 80002f6: eb41 5104 adc.w r1, r1, r4, lsl #20 - 80002fa: ea41 0105 orr.w r1, r1, r5 - 80002fe: bd30 pop {r4, r5, pc} - 8000300: ea5f 0c4c movs.w ip, ip, lsl #1 - 8000304: 4140 adcs r0, r0 - 8000306: eb41 0101 adc.w r1, r1, r1 - 800030a: f411 1f80 tst.w r1, #1048576 ; 0x100000 - 800030e: f1a4 0401 sub.w r4, r4, #1 - 8000312: d1e9 bne.n 80002e8 <__adddf3+0x10c> - 8000314: f091 0f00 teq r1, #0 - 8000318: bf04 itt eq - 800031a: 4601 moveq r1, r0 - 800031c: 2000 moveq r0, #0 - 800031e: fab1 f381 clz r3, r1 - 8000322: bf08 it eq - 8000324: 3320 addeq r3, #32 - 8000326: f1a3 030b sub.w r3, r3, #11 - 800032a: f1b3 0220 subs.w r2, r3, #32 - 800032e: da0c bge.n 800034a <__adddf3+0x16e> - 8000330: 320c adds r2, #12 - 8000332: dd08 ble.n 8000346 <__adddf3+0x16a> - 8000334: f102 0c14 add.w ip, r2, #20 - 8000338: f1c2 020c rsb r2, r2, #12 - 800033c: fa01 f00c lsl.w r0, r1, ip - 8000340: fa21 f102 lsr.w r1, r1, r2 - 8000344: e00c b.n 8000360 <__adddf3+0x184> - 8000346: f102 0214 add.w r2, r2, #20 - 800034a: bfd8 it le - 800034c: f1c2 0c20 rsble ip, r2, #32 - 8000350: fa01 f102 lsl.w r1, r1, r2 - 8000354: fa20 fc0c lsr.w ip, r0, ip - 8000358: bfdc itt le - 800035a: ea41 010c orrle.w r1, r1, ip - 800035e: 4090 lslle r0, r2 - 8000360: 1ae4 subs r4, r4, r3 - 8000362: bfa2 ittt ge - 8000364: eb01 5104 addge.w r1, r1, r4, lsl #20 - 8000368: 4329 orrge r1, r5 - 800036a: bd30 popge {r4, r5, pc} - 800036c: ea6f 0404 mvn.w r4, r4 - 8000370: 3c1f subs r4, #31 - 8000372: da1c bge.n 80003ae <__adddf3+0x1d2> - 8000374: 340c adds r4, #12 - 8000376: dc0e bgt.n 8000396 <__adddf3+0x1ba> - 8000378: f104 0414 add.w r4, r4, #20 - 800037c: f1c4 0220 rsb r2, r4, #32 - 8000380: fa20 f004 lsr.w r0, r0, r4 - 8000384: fa01 f302 lsl.w r3, r1, r2 - 8000388: ea40 0003 orr.w r0, r0, r3 - 800038c: fa21 f304 lsr.w r3, r1, r4 - 8000390: ea45 0103 orr.w r1, r5, r3 - 8000394: bd30 pop {r4, r5, pc} - 8000396: f1c4 040c rsb r4, r4, #12 - 800039a: f1c4 0220 rsb r2, r4, #32 - 800039e: fa20 f002 lsr.w r0, r0, r2 - 80003a2: fa01 f304 lsl.w r3, r1, r4 - 80003a6: ea40 0003 orr.w r0, r0, r3 - 80003aa: 4629 mov r1, r5 - 80003ac: bd30 pop {r4, r5, pc} - 80003ae: fa21 f004 lsr.w r0, r1, r4 - 80003b2: 4629 mov r1, r5 - 80003b4: bd30 pop {r4, r5, pc} - 80003b6: f094 0f00 teq r4, #0 - 80003ba: f483 1380 eor.w r3, r3, #1048576 ; 0x100000 - 80003be: bf06 itte eq - 80003c0: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000 - 80003c4: 3401 addeq r4, #1 - 80003c6: 3d01 subne r5, #1 - 80003c8: e74e b.n 8000268 <__adddf3+0x8c> - 80003ca: ea7f 5c64 mvns.w ip, r4, asr #21 - 80003ce: bf18 it ne - 80003d0: ea7f 5c65 mvnsne.w ip, r5, asr #21 - 80003d4: d029 beq.n 800042a <__adddf3+0x24e> - 80003d6: ea94 0f05 teq r4, r5 - 80003da: bf08 it eq - 80003dc: ea90 0f02 teqeq r0, r2 - 80003e0: d005 beq.n 80003ee <__adddf3+0x212> - 80003e2: ea54 0c00 orrs.w ip, r4, r0 - 80003e6: bf04 itt eq - 80003e8: 4619 moveq r1, r3 - 80003ea: 4610 moveq r0, r2 - 80003ec: bd30 pop {r4, r5, pc} - 80003ee: ea91 0f03 teq r1, r3 - 80003f2: bf1e ittt ne - 80003f4: 2100 movne r1, #0 - 80003f6: 2000 movne r0, #0 - 80003f8: bd30 popne {r4, r5, pc} - 80003fa: ea5f 5c54 movs.w ip, r4, lsr #21 - 80003fe: d105 bne.n 800040c <__adddf3+0x230> - 8000400: 0040 lsls r0, r0, #1 - 8000402: 4149 adcs r1, r1 - 8000404: bf28 it cs - 8000406: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000 - 800040a: bd30 pop {r4, r5, pc} - 800040c: f514 0480 adds.w r4, r4, #4194304 ; 0x400000 - 8000410: bf3c itt cc - 8000412: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000 - 8000416: bd30 popcc {r4, r5, pc} - 8000418: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 - 800041c: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000 - 8000420: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 - 8000424: f04f 0000 mov.w r0, #0 - 8000428: bd30 pop {r4, r5, pc} - 800042a: ea7f 5c64 mvns.w ip, r4, asr #21 - 800042e: bf1a itte ne - 8000430: 4619 movne r1, r3 - 8000432: 4610 movne r0, r2 - 8000434: ea7f 5c65 mvnseq.w ip, r5, asr #21 - 8000438: bf1c itt ne - 800043a: 460b movne r3, r1 - 800043c: 4602 movne r2, r0 - 800043e: ea50 3401 orrs.w r4, r0, r1, lsl #12 - 8000442: bf06 itte eq - 8000444: ea52 3503 orrseq.w r5, r2, r3, lsl #12 - 8000448: ea91 0f03 teqeq r1, r3 - 800044c: f441 2100 orrne.w r1, r1, #524288 ; 0x80000 - 8000450: bd30 pop {r4, r5, pc} - 8000452: bf00 nop - -08000454 <__aeabi_ui2d>: - 8000454: f090 0f00 teq r0, #0 - 8000458: bf04 itt eq - 800045a: 2100 moveq r1, #0 - 800045c: 4770 bxeq lr - 800045e: b530 push {r4, r5, lr} - 8000460: f44f 6480 mov.w r4, #1024 ; 0x400 - 8000464: f104 0432 add.w r4, r4, #50 ; 0x32 - 8000468: f04f 0500 mov.w r5, #0 - 800046c: f04f 0100 mov.w r1, #0 - 8000470: e750 b.n 8000314 <__adddf3+0x138> - 8000472: bf00 nop - -08000474 <__aeabi_i2d>: - 8000474: f090 0f00 teq r0, #0 - 8000478: bf04 itt eq - 800047a: 2100 moveq r1, #0 - 800047c: 4770 bxeq lr - 800047e: b530 push {r4, r5, lr} - 8000480: f44f 6480 mov.w r4, #1024 ; 0x400 - 8000484: f104 0432 add.w r4, r4, #50 ; 0x32 - 8000488: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000 - 800048c: bf48 it mi - 800048e: 4240 negmi r0, r0 - 8000490: f04f 0100 mov.w r1, #0 - 8000494: e73e b.n 8000314 <__adddf3+0x138> - 8000496: bf00 nop - -08000498 <__aeabi_f2d>: - 8000498: 0042 lsls r2, r0, #1 - 800049a: ea4f 01e2 mov.w r1, r2, asr #3 - 800049e: ea4f 0131 mov.w r1, r1, rrx - 80004a2: ea4f 7002 mov.w r0, r2, lsl #28 - 80004a6: bf1f itttt ne - 80004a8: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000 - 80004ac: f093 4f7f teqne r3, #4278190080 ; 0xff000000 - 80004b0: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000 - 80004b4: 4770 bxne lr - 80004b6: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000 - 80004ba: bf08 it eq - 80004bc: 4770 bxeq lr - 80004be: f093 4f7f teq r3, #4278190080 ; 0xff000000 - 80004c2: bf04 itt eq - 80004c4: f441 2100 orreq.w r1, r1, #524288 ; 0x80000 - 80004c8: 4770 bxeq lr - 80004ca: b530 push {r4, r5, lr} - 80004cc: f44f 7460 mov.w r4, #896 ; 0x380 - 80004d0: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 - 80004d4: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 - 80004d8: e71c b.n 8000314 <__adddf3+0x138> - 80004da: bf00 nop - -080004dc <__aeabi_ul2d>: - 80004dc: ea50 0201 orrs.w r2, r0, r1 - 80004e0: bf08 it eq - 80004e2: 4770 bxeq lr - 80004e4: b530 push {r4, r5, lr} - 80004e6: f04f 0500 mov.w r5, #0 - 80004ea: e00a b.n 8000502 <__aeabi_l2d+0x16> - -080004ec <__aeabi_l2d>: - 80004ec: ea50 0201 orrs.w r2, r0, r1 - 80004f0: bf08 it eq - 80004f2: 4770 bxeq lr - 80004f4: b530 push {r4, r5, lr} - 80004f6: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000 - 80004fa: d502 bpl.n 8000502 <__aeabi_l2d+0x16> - 80004fc: 4240 negs r0, r0 - 80004fe: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 8000502: f44f 6480 mov.w r4, #1024 ; 0x400 - 8000506: f104 0432 add.w r4, r4, #50 ; 0x32 - 800050a: ea5f 5c91 movs.w ip, r1, lsr #22 - 800050e: f43f aed8 beq.w 80002c2 <__adddf3+0xe6> - 8000512: f04f 0203 mov.w r2, #3 - 8000516: ea5f 0cdc movs.w ip, ip, lsr #3 - 800051a: bf18 it ne - 800051c: 3203 addne r2, #3 - 800051e: ea5f 0cdc movs.w ip, ip, lsr #3 - 8000522: bf18 it ne - 8000524: 3203 addne r2, #3 - 8000526: eb02 02dc add.w r2, r2, ip, lsr #3 - 800052a: f1c2 0320 rsb r3, r2, #32 - 800052e: fa00 fc03 lsl.w ip, r0, r3 - 8000532: fa20 f002 lsr.w r0, r0, r2 - 8000536: fa01 fe03 lsl.w lr, r1, r3 - 800053a: ea40 000e orr.w r0, r0, lr - 800053e: fa21 f102 lsr.w r1, r1, r2 - 8000542: 4414 add r4, r2 - 8000544: e6bd b.n 80002c2 <__adddf3+0xe6> - 8000546: bf00 nop - -08000548 <__aeabi_dmul>: - 8000548: b570 push {r4, r5, r6, lr} - 800054a: f04f 0cff mov.w ip, #255 ; 0xff - 800054e: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 - 8000552: ea1c 5411 ands.w r4, ip, r1, lsr #20 - 8000556: bf1d ittte ne - 8000558: ea1c 5513 andsne.w r5, ip, r3, lsr #20 - 800055c: ea94 0f0c teqne r4, ip - 8000560: ea95 0f0c teqne r5, ip - 8000564: f000 f8de bleq 8000724 <__aeabi_dmul+0x1dc> - 8000568: 442c add r4, r5 - 800056a: ea81 0603 eor.w r6, r1, r3 - 800056e: ea21 514c bic.w r1, r1, ip, lsl #21 - 8000572: ea23 534c bic.w r3, r3, ip, lsl #21 - 8000576: ea50 3501 orrs.w r5, r0, r1, lsl #12 - 800057a: bf18 it ne - 800057c: ea52 3503 orrsne.w r5, r2, r3, lsl #12 - 8000580: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 - 8000584: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 - 8000588: d038 beq.n 80005fc <__aeabi_dmul+0xb4> - 800058a: fba0 ce02 umull ip, lr, r0, r2 - 800058e: f04f 0500 mov.w r5, #0 - 8000592: fbe1 e502 umlal lr, r5, r1, r2 - 8000596: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000 - 800059a: fbe0 e503 umlal lr, r5, r0, r3 - 800059e: f04f 0600 mov.w r6, #0 - 80005a2: fbe1 5603 umlal r5, r6, r1, r3 - 80005a6: f09c 0f00 teq ip, #0 - 80005aa: bf18 it ne - 80005ac: f04e 0e01 orrne.w lr, lr, #1 - 80005b0: f1a4 04ff sub.w r4, r4, #255 ; 0xff - 80005b4: f5b6 7f00 cmp.w r6, #512 ; 0x200 - 80005b8: f564 7440 sbc.w r4, r4, #768 ; 0x300 - 80005bc: d204 bcs.n 80005c8 <__aeabi_dmul+0x80> - 80005be: ea5f 0e4e movs.w lr, lr, lsl #1 - 80005c2: 416d adcs r5, r5 - 80005c4: eb46 0606 adc.w r6, r6, r6 - 80005c8: ea42 21c6 orr.w r1, r2, r6, lsl #11 - 80005cc: ea41 5155 orr.w r1, r1, r5, lsr #21 - 80005d0: ea4f 20c5 mov.w r0, r5, lsl #11 - 80005d4: ea40 505e orr.w r0, r0, lr, lsr #21 - 80005d8: ea4f 2ece mov.w lr, lr, lsl #11 - 80005dc: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd - 80005e0: bf88 it hi - 80005e2: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 - 80005e6: d81e bhi.n 8000626 <__aeabi_dmul+0xde> - 80005e8: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000 - 80005ec: bf08 it eq - 80005ee: ea5f 0e50 movseq.w lr, r0, lsr #1 - 80005f2: f150 0000 adcs.w r0, r0, #0 - 80005f6: eb41 5104 adc.w r1, r1, r4, lsl #20 - 80005fa: bd70 pop {r4, r5, r6, pc} - 80005fc: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 - 8000600: ea46 0101 orr.w r1, r6, r1 - 8000604: ea40 0002 orr.w r0, r0, r2 - 8000608: ea81 0103 eor.w r1, r1, r3 - 800060c: ebb4 045c subs.w r4, r4, ip, lsr #1 - 8000610: bfc2 ittt gt - 8000612: ebd4 050c rsbsgt r5, r4, ip - 8000616: ea41 5104 orrgt.w r1, r1, r4, lsl #20 - 800061a: bd70 popgt {r4, r5, r6, pc} - 800061c: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 - 8000620: f04f 0e00 mov.w lr, #0 - 8000624: 3c01 subs r4, #1 - 8000626: f300 80ab bgt.w 8000780 <__aeabi_dmul+0x238> - 800062a: f114 0f36 cmn.w r4, #54 ; 0x36 - 800062e: bfde ittt le - 8000630: 2000 movle r0, #0 - 8000632: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000 - 8000636: bd70 pople {r4, r5, r6, pc} - 8000638: f1c4 0400 rsb r4, r4, #0 - 800063c: 3c20 subs r4, #32 - 800063e: da35 bge.n 80006ac <__aeabi_dmul+0x164> - 8000640: 340c adds r4, #12 - 8000642: dc1b bgt.n 800067c <__aeabi_dmul+0x134> - 8000644: f104 0414 add.w r4, r4, #20 - 8000648: f1c4 0520 rsb r5, r4, #32 - 800064c: fa00 f305 lsl.w r3, r0, r5 - 8000650: fa20 f004 lsr.w r0, r0, r4 - 8000654: fa01 f205 lsl.w r2, r1, r5 - 8000658: ea40 0002 orr.w r0, r0, r2 - 800065c: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000 - 8000660: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 - 8000664: eb10 70d3 adds.w r0, r0, r3, lsr #31 - 8000668: fa21 f604 lsr.w r6, r1, r4 - 800066c: eb42 0106 adc.w r1, r2, r6 - 8000670: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 - 8000674: bf08 it eq - 8000676: ea20 70d3 biceq.w r0, r0, r3, lsr #31 - 800067a: bd70 pop {r4, r5, r6, pc} - 800067c: f1c4 040c rsb r4, r4, #12 - 8000680: f1c4 0520 rsb r5, r4, #32 - 8000684: fa00 f304 lsl.w r3, r0, r4 - 8000688: fa20 f005 lsr.w r0, r0, r5 - 800068c: fa01 f204 lsl.w r2, r1, r4 - 8000690: ea40 0002 orr.w r0, r0, r2 - 8000694: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 - 8000698: eb10 70d3 adds.w r0, r0, r3, lsr #31 - 800069c: f141 0100 adc.w r1, r1, #0 - 80006a0: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 - 80006a4: bf08 it eq - 80006a6: ea20 70d3 biceq.w r0, r0, r3, lsr #31 - 80006aa: bd70 pop {r4, r5, r6, pc} - 80006ac: f1c4 0520 rsb r5, r4, #32 - 80006b0: fa00 f205 lsl.w r2, r0, r5 - 80006b4: ea4e 0e02 orr.w lr, lr, r2 - 80006b8: fa20 f304 lsr.w r3, r0, r4 - 80006bc: fa01 f205 lsl.w r2, r1, r5 - 80006c0: ea43 0302 orr.w r3, r3, r2 - 80006c4: fa21 f004 lsr.w r0, r1, r4 - 80006c8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 - 80006cc: fa21 f204 lsr.w r2, r1, r4 - 80006d0: ea20 0002 bic.w r0, r0, r2 - 80006d4: eb00 70d3 add.w r0, r0, r3, lsr #31 - 80006d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 - 80006dc: bf08 it eq - 80006de: ea20 70d3 biceq.w r0, r0, r3, lsr #31 - 80006e2: bd70 pop {r4, r5, r6, pc} - 80006e4: f094 0f00 teq r4, #0 - 80006e8: d10f bne.n 800070a <__aeabi_dmul+0x1c2> - 80006ea: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000 - 80006ee: 0040 lsls r0, r0, #1 - 80006f0: eb41 0101 adc.w r1, r1, r1 - 80006f4: f411 1f80 tst.w r1, #1048576 ; 0x100000 - 80006f8: bf08 it eq - 80006fa: 3c01 subeq r4, #1 - 80006fc: d0f7 beq.n 80006ee <__aeabi_dmul+0x1a6> - 80006fe: ea41 0106 orr.w r1, r1, r6 - 8000702: f095 0f00 teq r5, #0 - 8000706: bf18 it ne - 8000708: 4770 bxne lr - 800070a: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000 - 800070e: 0052 lsls r2, r2, #1 - 8000710: eb43 0303 adc.w r3, r3, r3 - 8000714: f413 1f80 tst.w r3, #1048576 ; 0x100000 - 8000718: bf08 it eq - 800071a: 3d01 subeq r5, #1 - 800071c: d0f7 beq.n 800070e <__aeabi_dmul+0x1c6> - 800071e: ea43 0306 orr.w r3, r3, r6 - 8000722: 4770 bx lr - 8000724: ea94 0f0c teq r4, ip - 8000728: ea0c 5513 and.w r5, ip, r3, lsr #20 - 800072c: bf18 it ne - 800072e: ea95 0f0c teqne r5, ip - 8000732: d00c beq.n 800074e <__aeabi_dmul+0x206> - 8000734: ea50 0641 orrs.w r6, r0, r1, lsl #1 - 8000738: bf18 it ne - 800073a: ea52 0643 orrsne.w r6, r2, r3, lsl #1 - 800073e: d1d1 bne.n 80006e4 <__aeabi_dmul+0x19c> - 8000740: ea81 0103 eor.w r1, r1, r3 - 8000744: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 - 8000748: f04f 0000 mov.w r0, #0 - 800074c: bd70 pop {r4, r5, r6, pc} - 800074e: ea50 0641 orrs.w r6, r0, r1, lsl #1 - 8000752: bf06 itte eq - 8000754: 4610 moveq r0, r2 - 8000756: 4619 moveq r1, r3 - 8000758: ea52 0643 orrsne.w r6, r2, r3, lsl #1 - 800075c: d019 beq.n 8000792 <__aeabi_dmul+0x24a> - 800075e: ea94 0f0c teq r4, ip - 8000762: d102 bne.n 800076a <__aeabi_dmul+0x222> - 8000764: ea50 3601 orrs.w r6, r0, r1, lsl #12 - 8000768: d113 bne.n 8000792 <__aeabi_dmul+0x24a> - 800076a: ea95 0f0c teq r5, ip - 800076e: d105 bne.n 800077c <__aeabi_dmul+0x234> - 8000770: ea52 3603 orrs.w r6, r2, r3, lsl #12 - 8000774: bf1c itt ne - 8000776: 4610 movne r0, r2 - 8000778: 4619 movne r1, r3 - 800077a: d10a bne.n 8000792 <__aeabi_dmul+0x24a> - 800077c: ea81 0103 eor.w r1, r1, r3 - 8000780: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 - 8000784: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 - 8000788: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 - 800078c: f04f 0000 mov.w r0, #0 - 8000790: bd70 pop {r4, r5, r6, pc} - 8000792: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 - 8000796: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000 - 800079a: bd70 pop {r4, r5, r6, pc} - -0800079c <__aeabi_ddiv>: - 800079c: b570 push {r4, r5, r6, lr} - 800079e: f04f 0cff mov.w ip, #255 ; 0xff - 80007a2: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 - 80007a6: ea1c 5411 ands.w r4, ip, r1, lsr #20 - 80007aa: bf1d ittte ne - 80007ac: ea1c 5513 andsne.w r5, ip, r3, lsr #20 - 80007b0: ea94 0f0c teqne r4, ip - 80007b4: ea95 0f0c teqne r5, ip - 80007b8: f000 f8a7 bleq 800090a <__aeabi_ddiv+0x16e> - 80007bc: eba4 0405 sub.w r4, r4, r5 - 80007c0: ea81 0e03 eor.w lr, r1, r3 - 80007c4: ea52 3503 orrs.w r5, r2, r3, lsl #12 - 80007c8: ea4f 3101 mov.w r1, r1, lsl #12 - 80007cc: f000 8088 beq.w 80008e0 <__aeabi_ddiv+0x144> - 80007d0: ea4f 3303 mov.w r3, r3, lsl #12 - 80007d4: f04f 5580 mov.w r5, #268435456 ; 0x10000000 - 80007d8: ea45 1313 orr.w r3, r5, r3, lsr #4 - 80007dc: ea43 6312 orr.w r3, r3, r2, lsr #24 - 80007e0: ea4f 2202 mov.w r2, r2, lsl #8 - 80007e4: ea45 1511 orr.w r5, r5, r1, lsr #4 - 80007e8: ea45 6510 orr.w r5, r5, r0, lsr #24 - 80007ec: ea4f 2600 mov.w r6, r0, lsl #8 - 80007f0: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000 - 80007f4: 429d cmp r5, r3 - 80007f6: bf08 it eq - 80007f8: 4296 cmpeq r6, r2 - 80007fa: f144 04fd adc.w r4, r4, #253 ; 0xfd - 80007fe: f504 7440 add.w r4, r4, #768 ; 0x300 - 8000802: d202 bcs.n 800080a <__aeabi_ddiv+0x6e> - 8000804: 085b lsrs r3, r3, #1 - 8000806: ea4f 0232 mov.w r2, r2, rrx - 800080a: 1ab6 subs r6, r6, r2 - 800080c: eb65 0503 sbc.w r5, r5, r3 - 8000810: 085b lsrs r3, r3, #1 - 8000812: ea4f 0232 mov.w r2, r2, rrx - 8000816: f44f 1080 mov.w r0, #1048576 ; 0x100000 - 800081a: f44f 2c00 mov.w ip, #524288 ; 0x80000 - 800081e: ebb6 0e02 subs.w lr, r6, r2 - 8000822: eb75 0e03 sbcs.w lr, r5, r3 - 8000826: bf22 ittt cs - 8000828: 1ab6 subcs r6, r6, r2 - 800082a: 4675 movcs r5, lr - 800082c: ea40 000c orrcs.w r0, r0, ip - 8000830: 085b lsrs r3, r3, #1 - 8000832: ea4f 0232 mov.w r2, r2, rrx - 8000836: ebb6 0e02 subs.w lr, r6, r2 - 800083a: eb75 0e03 sbcs.w lr, r5, r3 - 800083e: bf22 ittt cs - 8000840: 1ab6 subcs r6, r6, r2 - 8000842: 4675 movcs r5, lr - 8000844: ea40 005c orrcs.w r0, r0, ip, lsr #1 - 8000848: 085b lsrs r3, r3, #1 - 800084a: ea4f 0232 mov.w r2, r2, rrx - 800084e: ebb6 0e02 subs.w lr, r6, r2 - 8000852: eb75 0e03 sbcs.w lr, r5, r3 - 8000856: bf22 ittt cs - 8000858: 1ab6 subcs r6, r6, r2 - 800085a: 4675 movcs r5, lr - 800085c: ea40 009c orrcs.w r0, r0, ip, lsr #2 - 8000860: 085b lsrs r3, r3, #1 - 8000862: ea4f 0232 mov.w r2, r2, rrx - 8000866: ebb6 0e02 subs.w lr, r6, r2 - 800086a: eb75 0e03 sbcs.w lr, r5, r3 - 800086e: bf22 ittt cs - 8000870: 1ab6 subcs r6, r6, r2 - 8000872: 4675 movcs r5, lr - 8000874: ea40 00dc orrcs.w r0, r0, ip, lsr #3 - 8000878: ea55 0e06 orrs.w lr, r5, r6 - 800087c: d018 beq.n 80008b0 <__aeabi_ddiv+0x114> - 800087e: ea4f 1505 mov.w r5, r5, lsl #4 - 8000882: ea45 7516 orr.w r5, r5, r6, lsr #28 - 8000886: ea4f 1606 mov.w r6, r6, lsl #4 - 800088a: ea4f 03c3 mov.w r3, r3, lsl #3 - 800088e: ea43 7352 orr.w r3, r3, r2, lsr #29 - 8000892: ea4f 02c2 mov.w r2, r2, lsl #3 - 8000896: ea5f 1c1c movs.w ip, ip, lsr #4 - 800089a: d1c0 bne.n 800081e <__aeabi_ddiv+0x82> - 800089c: f411 1f80 tst.w r1, #1048576 ; 0x100000 - 80008a0: d10b bne.n 80008ba <__aeabi_ddiv+0x11e> - 80008a2: ea41 0100 orr.w r1, r1, r0 - 80008a6: f04f 0000 mov.w r0, #0 - 80008aa: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000 - 80008ae: e7b6 b.n 800081e <__aeabi_ddiv+0x82> - 80008b0: f411 1f80 tst.w r1, #1048576 ; 0x100000 - 80008b4: bf04 itt eq - 80008b6: 4301 orreq r1, r0 - 80008b8: 2000 moveq r0, #0 - 80008ba: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd - 80008be: bf88 it hi - 80008c0: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 - 80008c4: f63f aeaf bhi.w 8000626 <__aeabi_dmul+0xde> - 80008c8: ebb5 0c03 subs.w ip, r5, r3 - 80008cc: bf04 itt eq - 80008ce: ebb6 0c02 subseq.w ip, r6, r2 - 80008d2: ea5f 0c50 movseq.w ip, r0, lsr #1 - 80008d6: f150 0000 adcs.w r0, r0, #0 - 80008da: eb41 5104 adc.w r1, r1, r4, lsl #20 - 80008de: bd70 pop {r4, r5, r6, pc} - 80008e0: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000 - 80008e4: ea4e 3111 orr.w r1, lr, r1, lsr #12 - 80008e8: eb14 045c adds.w r4, r4, ip, lsr #1 - 80008ec: bfc2 ittt gt - 80008ee: ebd4 050c rsbsgt r5, r4, ip - 80008f2: ea41 5104 orrgt.w r1, r1, r4, lsl #20 - 80008f6: bd70 popgt {r4, r5, r6, pc} - 80008f8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 - 80008fc: f04f 0e00 mov.w lr, #0 - 8000900: 3c01 subs r4, #1 - 8000902: e690 b.n 8000626 <__aeabi_dmul+0xde> - 8000904: ea45 0e06 orr.w lr, r5, r6 - 8000908: e68d b.n 8000626 <__aeabi_dmul+0xde> - 800090a: ea0c 5513 and.w r5, ip, r3, lsr #20 - 800090e: ea94 0f0c teq r4, ip - 8000912: bf08 it eq - 8000914: ea95 0f0c teqeq r5, ip - 8000918: f43f af3b beq.w 8000792 <__aeabi_dmul+0x24a> - 800091c: ea94 0f0c teq r4, ip - 8000920: d10a bne.n 8000938 <__aeabi_ddiv+0x19c> - 8000922: ea50 3401 orrs.w r4, r0, r1, lsl #12 - 8000926: f47f af34 bne.w 8000792 <__aeabi_dmul+0x24a> - 800092a: ea95 0f0c teq r5, ip - 800092e: f47f af25 bne.w 800077c <__aeabi_dmul+0x234> - 8000932: 4610 mov r0, r2 - 8000934: 4619 mov r1, r3 - 8000936: e72c b.n 8000792 <__aeabi_dmul+0x24a> - 8000938: ea95 0f0c teq r5, ip - 800093c: d106 bne.n 800094c <__aeabi_ddiv+0x1b0> - 800093e: ea52 3503 orrs.w r5, r2, r3, lsl #12 - 8000942: f43f aefd beq.w 8000740 <__aeabi_dmul+0x1f8> - 8000946: 4610 mov r0, r2 - 8000948: 4619 mov r1, r3 - 800094a: e722 b.n 8000792 <__aeabi_dmul+0x24a> - 800094c: ea50 0641 orrs.w r6, r0, r1, lsl #1 - 8000950: bf18 it ne - 8000952: ea52 0643 orrsne.w r6, r2, r3, lsl #1 - 8000956: f47f aec5 bne.w 80006e4 <__aeabi_dmul+0x19c> - 800095a: ea50 0441 orrs.w r4, r0, r1, lsl #1 - 800095e: f47f af0d bne.w 800077c <__aeabi_dmul+0x234> - 8000962: ea52 0543 orrs.w r5, r2, r3, lsl #1 - 8000966: f47f aeeb bne.w 8000740 <__aeabi_dmul+0x1f8> - 800096a: e712 b.n 8000792 <__aeabi_dmul+0x24a> - -0800096c <__aeabi_d2f>: - 800096c: ea4f 0241 mov.w r2, r1, lsl #1 - 8000970: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000 - 8000974: bf24 itt cs - 8000976: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000 - 800097a: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000 - 800097e: d90d bls.n 800099c <__aeabi_d2f+0x30> - 8000980: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 - 8000984: ea4f 02c0 mov.w r2, r0, lsl #3 - 8000988: ea4c 7050 orr.w r0, ip, r0, lsr #29 - 800098c: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000 - 8000990: eb40 0083 adc.w r0, r0, r3, lsl #2 - 8000994: bf08 it eq - 8000996: f020 0001 biceq.w r0, r0, #1 - 800099a: 4770 bx lr - 800099c: f011 4f80 tst.w r1, #1073741824 ; 0x40000000 - 80009a0: d121 bne.n 80009e6 <__aeabi_d2f+0x7a> - 80009a2: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000 - 80009a6: bfbc itt lt - 80009a8: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000 - 80009ac: 4770 bxlt lr - 80009ae: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 - 80009b2: ea4f 5252 mov.w r2, r2, lsr #21 - 80009b6: f1c2 0218 rsb r2, r2, #24 - 80009ba: f1c2 0c20 rsb ip, r2, #32 - 80009be: fa10 f30c lsls.w r3, r0, ip - 80009c2: fa20 f002 lsr.w r0, r0, r2 - 80009c6: bf18 it ne - 80009c8: f040 0001 orrne.w r0, r0, #1 - 80009cc: ea4f 23c1 mov.w r3, r1, lsl #11 - 80009d0: ea4f 23d3 mov.w r3, r3, lsr #11 - 80009d4: fa03 fc0c lsl.w ip, r3, ip - 80009d8: ea40 000c orr.w r0, r0, ip - 80009dc: fa23 f302 lsr.w r3, r3, r2 - 80009e0: ea4f 0343 mov.w r3, r3, lsl #1 - 80009e4: e7cc b.n 8000980 <__aeabi_d2f+0x14> - 80009e6: ea7f 5362 mvns.w r3, r2, asr #21 - 80009ea: d107 bne.n 80009fc <__aeabi_d2f+0x90> - 80009ec: ea50 3301 orrs.w r3, r0, r1, lsl #12 - 80009f0: bf1e ittt ne - 80009f2: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000 - 80009f6: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000 - 80009fa: 4770 bxne lr - 80009fc: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000 - 8000a00: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 - 8000a04: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 - 8000a08: 4770 bx lr - 8000a0a: bf00 nop - -08000a0c : -#include "MESChw_setup.h" - -extern TIM_HandleTypeDef htim1; - - -void BLDCInit(){ - 8000a0c: b580 push {r7, lr} - 8000a0e: af00 add r7, sp, #0 - BLDCVars.ReqCurrent=0; //Start the motor at 0 current - 8000a10: 4b16 ldr r3, [pc, #88] ; (8000a6c ) - 8000a12: f04f 0200 mov.w r2, #0 - 8000a16: 601a str r2, [r3, #0] - BLDCVars.BLDCduty=0; - 8000a18: 4b14 ldr r3, [pc, #80] ; (8000a6c ) - 8000a1a: 2200 movs r2, #0 - 8000a1c: 605a str r2, [r3, #4] - BLDCVars.CurrentChannel=0; - 8000a1e: 4b13 ldr r3, [pc, #76] ; (8000a6c ) - 8000a20: 2200 movs r2, #0 - 8000a22: 60da str r2, [r3, #12] - BLDCVars.currentCurrent=0; - 8000a24: 4b11 ldr r3, [pc, #68] ; (8000a6c ) - 8000a26: f04f 0200 mov.w r2, #0 - 8000a2a: 611a str r2, [r3, #16] - BLDCVars.pGain=1023*motor.Rphase/8; //wtf should I set the gain as by default... V/Amp error...Perhaps base it on Rphase and the bus voltage (nominally 48V)? But we don;t know the exact bus voltage yet... - 8000a2c: 4b10 ldr r3, [pc, #64] ; (8000a70 ) - 8000a2e: edd3 7a00 vldr s15, [r3] - 8000a32: ed9f 7a10 vldr s14, [pc, #64] ; 8000a74 - 8000a36: ee27 7a87 vmul.f32 s14, s15, s14 - 8000a3a: eef2 6a00 vmov.f32 s13, #32 ; 0x41000000 8.0 - 8000a3e: eec7 7a26 vdiv.f32 s15, s14, s13 - 8000a42: eefd 7ae7 vcvt.s32.f32 s15, s15 - 8000a46: ee17 2a90 vmov r2, s15 - 8000a4a: 4b08 ldr r3, [pc, #32] ; (8000a6c ) - 8000a4c: 615a str r2, [r3, #20] - BLDCVars.iGain=BLDCVars.pGain; //Initially, let's just make the iGain the same as the pGain, so after 1 second their contributions will be equal. - 8000a4e: 4b07 ldr r3, [pc, #28] ; (8000a6c ) - 8000a50: 695b ldr r3, [r3, #20] - 8000a52: 4a06 ldr r2, [pc, #24] ; (8000a6c ) - 8000a54: 6193 str r3, [r2, #24] - BLDCVars.BLDCEstate=GetHallState(); - 8000a56: f000 fa89 bl 8000f6c - 8000a5a: 4602 mov r2, r0 - 8000a5c: 4b03 ldr r3, [pc, #12] ; (8000a6c ) - 8000a5e: 609a str r2, [r3, #8] - BLDCState=BLDC_FORWARDS; - 8000a60: 4b05 ldr r3, [pc, #20] ; (8000a78 ) - 8000a62: 2201 movs r2, #1 - 8000a64: 701a strb r2, [r3, #0] - -} - 8000a66: bf00 nop - 8000a68: bd80 pop {r7, pc} - 8000a6a: bf00 nop - 8000a6c: 20000540 .word 0x20000540 - 8000a70: 20000560 .word 0x20000560 - 8000a74: 447fc000 .word 0x447fc000 - 8000a78: 2000055d .word 0x2000055d - -08000a7c : - - -void BLDCCommuteHall(){ - 8000a7c: b580 push {r7, lr} - 8000a7e: b082 sub sp, #8 - 8000a80: af00 add r7, sp, #0 -int CurrentHallState=GetHallState(); //Borrow the hall state detection from the FOC system - 8000a82: f000 fa73 bl 8000f6c - 8000a86: 6078 str r0, [r7, #4] -static int LastHallState=7; - -if(BLDCState==BLDC_FORWARDS){ - 8000a88: 4b3d ldr r3, [pc, #244] ; (8000b80 ) - 8000a8a: 781b ldrb r3, [r3, #0] - 8000a8c: 2b01 cmp r3, #1 - 8000a8e: d110 bne.n 8000ab2 - BLDCVars.BLDCEstate=(CurrentHallState+2)%6; - 8000a90: 687b ldr r3, [r7, #4] - 8000a92: 1c99 adds r1, r3, #2 - 8000a94: 4b3b ldr r3, [pc, #236] ; (8000b84 ) - 8000a96: fb83 3201 smull r3, r2, r3, r1 - 8000a9a: 17cb asrs r3, r1, #31 - 8000a9c: 1ad2 subs r2, r2, r3 - 8000a9e: 4613 mov r3, r2 - 8000aa0: 005b lsls r3, r3, #1 - 8000aa2: 4413 add r3, r2 - 8000aa4: 005b lsls r3, r3, #1 - 8000aa6: 1aca subs r2, r1, r3 - 8000aa8: 4b37 ldr r3, [pc, #220] ; (8000b88 ) - 8000aaa: 609a str r2, [r3, #8] - writeBLDC(); //Write the PWM values for the next state to generate forward torque - 8000aac: f000 f90a bl 8000cc4 -//Disable the drivers, freewheel -phU_Break(); -phV_Break(); -phW_Break(); -} -} - 8000ab0: e062 b.n 8000b78 -else if(BLDCState==BLDC_BACKWARDS){ - 8000ab2: 4b33 ldr r3, [pc, #204] ; (8000b80 ) - 8000ab4: 781b ldrb r3, [r3, #0] - 8000ab6: 2b02 cmp r3, #2 - 8000ab8: d110 bne.n 8000adc - BLDCVars.BLDCEstate=(CurrentHallState+4)%6; - 8000aba: 687b ldr r3, [r7, #4] - 8000abc: 1d19 adds r1, r3, #4 - 8000abe: 4b31 ldr r3, [pc, #196] ; (8000b84 ) - 8000ac0: fb83 3201 smull r3, r2, r3, r1 - 8000ac4: 17cb asrs r3, r1, #31 - 8000ac6: 1ad2 subs r2, r2, r3 - 8000ac8: 4613 mov r3, r2 - 8000aca: 005b lsls r3, r3, #1 - 8000acc: 4413 add r3, r2 - 8000ace: 005b lsls r3, r3, #1 - 8000ad0: 1aca subs r2, r1, r3 - 8000ad2: 4b2d ldr r3, [pc, #180] ; (8000b88 ) - 8000ad4: 609a str r2, [r3, #8] - writeBLDC(); //Write the PWM values for the previous state to generate reverse torque - 8000ad6: f000 f8f5 bl 8000cc4 -} - 8000ada: e04d b.n 8000b78 -else if(BLDCState==BLDC_BRAKE){ - 8000adc: 4b28 ldr r3, [pc, #160] ; (8000b80 ) - 8000ade: 781b ldrb r3, [r3, #0] - 8000ae0: 2b04 cmp r3, #4 - 8000ae2: d143 bne.n 8000b6c - if(((CurrentHallState-LastHallState)%6)>1){ //ToDo this does not cope with the rollover, makign for a very jerky brake - 8000ae4: 4b29 ldr r3, [pc, #164] ; (8000b8c ) - 8000ae6: 681b ldr r3, [r3, #0] - 8000ae8: 687a ldr r2, [r7, #4] - 8000aea: 1ad1 subs r1, r2, r3 - 8000aec: 4b25 ldr r3, [pc, #148] ; (8000b84 ) - 8000aee: fb83 3201 smull r3, r2, r3, r1 - 8000af2: 17cb asrs r3, r1, #31 - 8000af4: 1ad2 subs r2, r2, r3 - 8000af6: 4613 mov r3, r2 - 8000af8: 005b lsls r3, r3, #1 - 8000afa: 4413 add r3, r2 - 8000afc: 005b lsls r3, r3, #1 - 8000afe: 1aca subs r2, r1, r3 - 8000b00: 2a01 cmp r2, #1 - 8000b02: dd0e ble.n 8000b22 - BLDCVars.BLDCEstate=(CurrentHallState+5)%6; - 8000b04: 687b ldr r3, [r7, #4] - 8000b06: 1d59 adds r1, r3, #5 - 8000b08: 4b1e ldr r3, [pc, #120] ; (8000b84 ) - 8000b0a: fb83 3201 smull r3, r2, r3, r1 - 8000b0e: 17cb asrs r3, r1, #31 - 8000b10: 1ad2 subs r2, r2, r3 - 8000b12: 4613 mov r3, r2 - 8000b14: 005b lsls r3, r3, #1 - 8000b16: 4413 add r3, r2 - 8000b18: 005b lsls r3, r3, #1 - 8000b1a: 1aca subs r2, r1, r3 - 8000b1c: 4b1a ldr r3, [pc, #104] ; (8000b88 ) - 8000b1e: 609a str r2, [r3, #8] - 8000b20: e021 b.n 8000b66 - else if(((CurrentHallState-LastHallState)%6)<-1){ - 8000b22: 4b1a ldr r3, [pc, #104] ; (8000b8c ) - 8000b24: 681b ldr r3, [r3, #0] - 8000b26: 687a ldr r2, [r7, #4] - 8000b28: 1ad1 subs r1, r2, r3 - 8000b2a: 4b16 ldr r3, [pc, #88] ; (8000b84 ) - 8000b2c: fb83 3201 smull r3, r2, r3, r1 - 8000b30: 17cb asrs r3, r1, #31 - 8000b32: 1ad2 subs r2, r2, r3 - 8000b34: 4613 mov r3, r2 - 8000b36: 005b lsls r3, r3, #1 - 8000b38: 4413 add r3, r2 - 8000b3a: 005b lsls r3, r3, #1 - 8000b3c: 1aca subs r2, r1, r3 - 8000b3e: f1b2 3fff cmp.w r2, #4294967295 - 8000b42: da10 bge.n 8000b66 - BLDCVars.BLDCEstate=(CurrentHallState+1)%6; - 8000b44: 687b ldr r3, [r7, #4] - 8000b46: 1c59 adds r1, r3, #1 - 8000b48: 4b0e ldr r3, [pc, #56] ; (8000b84 ) - 8000b4a: fb83 3201 smull r3, r2, r3, r1 - 8000b4e: 17cb asrs r3, r1, #31 - 8000b50: 1ad2 subs r2, r2, r3 - 8000b52: 4613 mov r3, r2 - 8000b54: 005b lsls r3, r3, #1 - 8000b56: 4413 add r3, r2 - 8000b58: 005b lsls r3, r3, #1 - 8000b5a: 1aca subs r2, r1, r3 - 8000b5c: 4b0a ldr r3, [pc, #40] ; (8000b88 ) - 8000b5e: 609a str r2, [r3, #8] - LastHallState=CurrentHallState; - 8000b60: 4a0a ldr r2, [pc, #40] ; (8000b8c ) - 8000b62: 687b ldr r3, [r7, #4] - 8000b64: 6013 str r3, [r2, #0] - writeBLDC(); - 8000b66: f000 f8ad bl 8000cc4 -} - 8000b6a: e005 b.n 8000b78 -phU_Break(); - 8000b6c: f000 fa32 bl 8000fd4 -phV_Break(); - 8000b70: f000 faa4 bl 80010bc -phW_Break(); - 8000b74: f000 fb16 bl 80011a4 -} - 8000b78: bf00 nop - 8000b7a: 3708 adds r7, #8 - 8000b7c: 46bd mov sp, r7 - 8000b7e: bd80 pop {r7, pc} - 8000b80: 2000055d .word 0x2000055d - 8000b84: 2aaaaaab .word 0x2aaaaaab - 8000b88: 20000540 .word 0x20000540 - 8000b8c: 20000000 .word 0x20000000 - -08000b90 : - - -void BLDCCurrentController(){ - 8000b90: b5b0 push {r4, r5, r7, lr} - 8000b92: af00 add r7, sp, #0 -//Implement a simple PI controller - static float CurrentError=0; - static float CurrentIntegralError=0; - static int Duty=0; - - BLDCVars.currentCurrent= measurement_buffers.ConvertedADC[BLDCVars.CurrentChannel][0]; - 8000b94: 4b44 ldr r3, [pc, #272] ; (8000ca8 ) - 8000b96: 68da ldr r2, [r3, #12] - 8000b98: 4944 ldr r1, [pc, #272] ; (8000cac ) - 8000b9a: 4613 mov r3, r2 - 8000b9c: 005b lsls r3, r3, #1 - 8000b9e: 4413 add r3, r2 - 8000ba0: 009b lsls r3, r3, #2 - 8000ba2: 440b add r3, r1 - 8000ba4: 332c adds r3, #44 ; 0x2c - 8000ba6: 681b ldr r3, [r3, #0] - 8000ba8: 4a3f ldr r2, [pc, #252] ; (8000ca8 ) - 8000baa: 6113 str r3, [r2, #16] - - CurrentError=(BLDCVars.ReqCurrent-BLDCVars.currentCurrent);//measurement_buffers.ConvertedADC[BLDCVars.CurrentChannel][0]); - 8000bac: 4b3e ldr r3, [pc, #248] ; (8000ca8 ) - 8000bae: ed93 7a00 vldr s14, [r3] - 8000bb2: 4b3d ldr r3, [pc, #244] ; (8000ca8 ) - 8000bb4: edd3 7a04 vldr s15, [r3, #16] - 8000bb8: ee77 7a67 vsub.f32 s15, s14, s15 - 8000bbc: 4b3c ldr r3, [pc, #240] ; (8000cb0 ) - 8000bbe: edc3 7a00 vstr s15, [r3] - - CurrentIntegralError=CurrentIntegralError + CurrentError*0.000027; //37kHz PWM, so the integral portion should be multiplied by 1/37k before accumulating - 8000bc2: 4b3c ldr r3, [pc, #240] ; (8000cb4 ) - 8000bc4: 681b ldr r3, [r3, #0] - 8000bc6: 4618 mov r0, r3 - 8000bc8: f7ff fc66 bl 8000498 <__aeabi_f2d> - 8000bcc: 4604 mov r4, r0 - 8000bce: 460d mov r5, r1 - 8000bd0: 4b37 ldr r3, [pc, #220] ; (8000cb0 ) - 8000bd2: 681b ldr r3, [r3, #0] - 8000bd4: 4618 mov r0, r3 - 8000bd6: f7ff fc5f bl 8000498 <__aeabi_f2d> - 8000bda: a331 add r3, pc, #196 ; (adr r3, 8000ca0 ) - 8000bdc: e9d3 2300 ldrd r2, r3, [r3] - 8000be0: f7ff fcb2 bl 8000548 <__aeabi_dmul> - 8000be4: 4602 mov r2, r0 - 8000be6: 460b mov r3, r1 - 8000be8: 4620 mov r0, r4 - 8000bea: 4629 mov r1, r5 - 8000bec: f7ff faf6 bl 80001dc <__adddf3> - 8000bf0: 4603 mov r3, r0 - 8000bf2: 460c mov r4, r1 - 8000bf4: 4618 mov r0, r3 - 8000bf6: 4621 mov r1, r4 - 8000bf8: f7ff feb8 bl 800096c <__aeabi_d2f> - 8000bfc: 4602 mov r2, r0 - 8000bfe: 4b2d ldr r3, [pc, #180] ; (8000cb4 ) - 8000c00: 601a str r2, [r3, #0] - if(CurrentIntegralError>10) CurrentIntegralError=10; //Magic numbers - 8000c02: 4b2c ldr r3, [pc, #176] ; (8000cb4 ) - 8000c04: edd3 7a00 vldr s15, [r3] - 8000c08: eeb2 7a04 vmov.f32 s14, #36 ; 0x41200000 10.0 - 8000c0c: eef4 7ac7 vcmpe.f32 s15, s14 - 8000c10: eef1 fa10 vmrs APSR_nzcv, fpscr - 8000c14: dd02 ble.n 8000c1c - 8000c16: 4b27 ldr r3, [pc, #156] ; (8000cb4 ) - 8000c18: 4a27 ldr r2, [pc, #156] ; (8000cb8 ) - 8000c1a: 601a str r2, [r3, #0] - if(CurrentIntegralError<-10) CurrentIntegralError=-10; //Magic numbers - 8000c1c: 4b25 ldr r3, [pc, #148] ; (8000cb4 ) - 8000c1e: edd3 7a00 vldr s15, [r3] - 8000c22: eeba 7a04 vmov.f32 s14, #164 ; 0xc1200000 -10.0 - 8000c26: eef4 7ac7 vcmpe.f32 s15, s14 - 8000c2a: eef1 fa10 vmrs APSR_nzcv, fpscr - 8000c2e: d502 bpl.n 8000c36 - 8000c30: 4b20 ldr r3, [pc, #128] ; (8000cb4 ) - 8000c32: 4a22 ldr r2, [pc, #136] ; (8000cbc ) - 8000c34: 601a str r2, [r3, #0] - - Duty=(int)(CurrentError*BLDCVars.pGain + CurrentIntegralError*BLDCVars.iGain); - 8000c36: 4b1c ldr r3, [pc, #112] ; (8000ca8 ) - 8000c38: 695b ldr r3, [r3, #20] - 8000c3a: ee07 3a90 vmov s15, r3 - 8000c3e: eeb8 7ae7 vcvt.f32.s32 s14, s15 - 8000c42: 4b1b ldr r3, [pc, #108] ; (8000cb0 ) - 8000c44: edd3 7a00 vldr s15, [r3] - 8000c48: ee27 7a27 vmul.f32 s14, s14, s15 - 8000c4c: 4b16 ldr r3, [pc, #88] ; (8000ca8 ) - 8000c4e: 699b ldr r3, [r3, #24] - 8000c50: ee07 3a90 vmov s15, r3 - 8000c54: eef8 6ae7 vcvt.f32.s32 s13, s15 - 8000c58: 4b16 ldr r3, [pc, #88] ; (8000cb4 ) - 8000c5a: edd3 7a00 vldr s15, [r3] - 8000c5e: ee66 7aa7 vmul.f32 s15, s13, s15 - 8000c62: ee77 7a27 vadd.f32 s15, s14, s15 - 8000c66: eefd 7ae7 vcvt.s32.f32 s15, s15 - 8000c6a: ee17 2a90 vmov r2, s15 - 8000c6e: 4b14 ldr r3, [pc, #80] ; (8000cc0 ) - 8000c70: 601a str r2, [r3, #0] - - if(Duty>1023){ - 8000c72: 4b13 ldr r3, [pc, #76] ; (8000cc0 ) - 8000c74: 681b ldr r3, [r3, #0] - 8000c76: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8000c7a: db04 blt.n 8000c86 - Duty=1023; - 8000c7c: 4b10 ldr r3, [pc, #64] ; (8000cc0 ) - 8000c7e: f240 32ff movw r2, #1023 ; 0x3ff - 8000c82: 601a str r2, [r3, #0] - 8000c84: e006 b.n 8000c94 - } - else if(Duty<0){ - 8000c86: 4b0e ldr r3, [pc, #56] ; (8000cc0 ) - 8000c88: 681b ldr r3, [r3, #0] - 8000c8a: 2b00 cmp r3, #0 - 8000c8c: da02 bge.n 8000c94 - Duty=0; - 8000c8e: 4b0c ldr r3, [pc, #48] ; (8000cc0 ) - 8000c90: 2200 movs r2, #0 - 8000c92: 601a str r2, [r3, #0] - } - - BLDCVars.BLDCduty=Duty; - 8000c94: 4b0a ldr r3, [pc, #40] ; (8000cc0 ) - 8000c96: 681b ldr r3, [r3, #0] - 8000c98: 4a03 ldr r2, [pc, #12] ; (8000ca8 ) - 8000c9a: 6053 str r3, [r2, #4] - -} - 8000c9c: bf00 nop - 8000c9e: bdb0 pop {r4, r5, r7, pc} - 8000ca0: df3300de .word 0xdf3300de - 8000ca4: 3efc4fc1 .word 0x3efc4fc1 - 8000ca8: 20000540 .word 0x20000540 - 8000cac: 200004ec .word 0x200004ec - 8000cb0: 20000030 .word 0x20000030 - 8000cb4: 20000034 .word 0x20000034 - 8000cb8: 41200000 .word 0x41200000 - 8000cbc: c1200000 .word 0xc1200000 - 8000cc0: 20000038 .word 0x20000038 - -08000cc4 : - -void writeBLDC(){ - 8000cc4: b580 push {r7, lr} - 8000cc6: af00 add r7, sp, #0 - switch(BLDCVars.BLDCEstate){ - 8000cc8: 4b43 ldr r3, [pc, #268] ; (8000dd8 ) - 8000cca: 689b ldr r3, [r3, #8] - 8000ccc: 2b05 cmp r3, #5 - 8000cce: f200 8081 bhi.w 8000dd4 - 8000cd2: a201 add r2, pc, #4 ; (adr r2, 8000cd8 ) - 8000cd4: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000cd8: 08000cf1 .word 0x08000cf1 - 8000cdc: 08000d17 .word 0x08000d17 - 8000ce0: 08000d3d .word 0x08000d3d - 8000ce4: 08000d63 .word 0x08000d63 - 8000ce8: 08000d89 .word 0x08000d89 - 8000cec: 08000daf .word 0x08000daf - case 0: - //disable phase first - phW_Break(); - 8000cf0: f000 fa58 bl 80011a4 - //WritePWM values - htim1.Instance->CCR1=BLDCVars.BLDCduty; - 8000cf4: 4b38 ldr r3, [pc, #224] ; (8000dd8 ) - 8000cf6: 685a ldr r2, [r3, #4] - 8000cf8: 4b38 ldr r3, [pc, #224] ; (8000ddc ) - 8000cfa: 681b ldr r3, [r3, #0] - 8000cfc: 635a str r2, [r3, #52] ; 0x34 - htim1.Instance->CCR2=0; - 8000cfe: 4b37 ldr r3, [pc, #220] ; (8000ddc ) - 8000d00: 681b ldr r3, [r3, #0] - 8000d02: 2200 movs r2, #0 - 8000d04: 639a str r2, [r3, #56] ; 0x38 - phU_Enable(); - 8000d06: f000 f99f bl 8001048 - phV_Enable(); - 8000d0a: f000 fa11 bl 8001130 - BLDCVars.CurrentChannel=1; //Write the field into which the lowside current will flow, to be retrieved from the FOC_measurement_vars - 8000d0e: 4b32 ldr r3, [pc, #200] ; (8000dd8 ) - 8000d10: 2201 movs r2, #1 - 8000d12: 60da str r2, [r3, #12] - break; - 8000d14: e05e b.n 8000dd4 - - case 1: - phV_Break(); - 8000d16: f000 f9d1 bl 80010bc - htim1.Instance->CCR1=BLDCVars.BLDCduty; - 8000d1a: 4b2f ldr r3, [pc, #188] ; (8000dd8 ) - 8000d1c: 685a ldr r2, [r3, #4] - 8000d1e: 4b2f ldr r3, [pc, #188] ; (8000ddc ) - 8000d20: 681b ldr r3, [r3, #0] - 8000d22: 635a str r2, [r3, #52] ; 0x34 - htim1.Instance->CCR3=0; - 8000d24: 4b2d ldr r3, [pc, #180] ; (8000ddc ) - 8000d26: 681b ldr r3, [r3, #0] - 8000d28: 2200 movs r2, #0 - 8000d2a: 63da str r2, [r3, #60] ; 0x3c - phU_Enable(); - 8000d2c: f000 f98c bl 8001048 - phW_Enable(); - 8000d30: f000 fa72 bl 8001218 - BLDCVars.CurrentChannel=2; - 8000d34: 4b28 ldr r3, [pc, #160] ; (8000dd8 ) - 8000d36: 2202 movs r2, #2 - 8000d38: 60da str r2, [r3, #12] - break; - 8000d3a: e04b b.n 8000dd4 - - case 2: - phU_Break(); - 8000d3c: f000 f94a bl 8000fd4 - htim1.Instance->CCR2=BLDCVars.BLDCduty; - 8000d40: 4b25 ldr r3, [pc, #148] ; (8000dd8 ) - 8000d42: 685a ldr r2, [r3, #4] - 8000d44: 4b25 ldr r3, [pc, #148] ; (8000ddc ) - 8000d46: 681b ldr r3, [r3, #0] - 8000d48: 639a str r2, [r3, #56] ; 0x38 - htim1.Instance->CCR3=0; - 8000d4a: 4b24 ldr r3, [pc, #144] ; (8000ddc ) - 8000d4c: 681b ldr r3, [r3, #0] - 8000d4e: 2200 movs r2, #0 - 8000d50: 63da str r2, [r3, #60] ; 0x3c - phV_Enable(); - 8000d52: f000 f9ed bl 8001130 - phW_Enable(); - 8000d56: f000 fa5f bl 8001218 - BLDCVars.CurrentChannel=2; - 8000d5a: 4b1f ldr r3, [pc, #124] ; (8000dd8 ) - 8000d5c: 2202 movs r2, #2 - 8000d5e: 60da str r2, [r3, #12] - break; - 8000d60: e038 b.n 8000dd4 - - case 3: - phW_Break(); - 8000d62: f000 fa1f bl 80011a4 - htim1.Instance->CCR1=0; - 8000d66: 4b1d ldr r3, [pc, #116] ; (8000ddc ) - 8000d68: 681b ldr r3, [r3, #0] - 8000d6a: 2200 movs r2, #0 - 8000d6c: 635a str r2, [r3, #52] ; 0x34 - htim1.Instance->CCR2=BLDCVars.BLDCduty; - 8000d6e: 4b1a ldr r3, [pc, #104] ; (8000dd8 ) - 8000d70: 685a ldr r2, [r3, #4] - 8000d72: 4b1a ldr r3, [pc, #104] ; (8000ddc ) - 8000d74: 681b ldr r3, [r3, #0] - 8000d76: 639a str r2, [r3, #56] ; 0x38 - phU_Enable(); - 8000d78: f000 f966 bl 8001048 - phV_Enable(); - 8000d7c: f000 f9d8 bl 8001130 - BLDCVars.CurrentChannel=0; - 8000d80: 4b15 ldr r3, [pc, #84] ; (8000dd8 ) - 8000d82: 2200 movs r2, #0 - 8000d84: 60da str r2, [r3, #12] - break; - 8000d86: e025 b.n 8000dd4 - - case 4: - phV_Break(); - 8000d88: f000 f998 bl 80010bc - htim1.Instance->CCR1=0; - 8000d8c: 4b13 ldr r3, [pc, #76] ; (8000ddc ) - 8000d8e: 681b ldr r3, [r3, #0] - 8000d90: 2200 movs r2, #0 - 8000d92: 635a str r2, [r3, #52] ; 0x34 - htim1.Instance->CCR3=BLDCVars.BLDCduty; - 8000d94: 4b10 ldr r3, [pc, #64] ; (8000dd8 ) - 8000d96: 685a ldr r2, [r3, #4] - 8000d98: 4b10 ldr r3, [pc, #64] ; (8000ddc ) - 8000d9a: 681b ldr r3, [r3, #0] - 8000d9c: 63da str r2, [r3, #60] ; 0x3c - phU_Enable(); - 8000d9e: f000 f953 bl 8001048 - phW_Enable(); - 8000da2: f000 fa39 bl 8001218 - BLDCVars.CurrentChannel=0; - 8000da6: 4b0c ldr r3, [pc, #48] ; (8000dd8 ) - 8000da8: 2200 movs r2, #0 - 8000daa: 60da str r2, [r3, #12] - break; - 8000dac: e012 b.n 8000dd4 - - case 5: - phU_Break(); - 8000dae: f000 f911 bl 8000fd4 - htim1.Instance->CCR2=0; - 8000db2: 4b0a ldr r3, [pc, #40] ; (8000ddc ) - 8000db4: 681b ldr r3, [r3, #0] - 8000db6: 2200 movs r2, #0 - 8000db8: 639a str r2, [r3, #56] ; 0x38 - htim1.Instance->CCR3=BLDCVars.BLDCduty; - 8000dba: 4b07 ldr r3, [pc, #28] ; (8000dd8 ) - 8000dbc: 685a ldr r2, [r3, #4] - 8000dbe: 4b07 ldr r3, [pc, #28] ; (8000ddc ) - 8000dc0: 681b ldr r3, [r3, #0] - 8000dc2: 63da str r2, [r3, #60] ; 0x3c - phV_Enable(); - 8000dc4: f000 f9b4 bl 8001130 - phW_Enable(); - 8000dc8: f000 fa26 bl 8001218 - BLDCVars.CurrentChannel=1; - 8000dcc: 4b02 ldr r3, [pc, #8] ; (8000dd8 ) - 8000dce: 2201 movs r2, #1 - 8000dd0: 60da str r2, [r3, #12] - break; - 8000dd2: bf00 nop - - } -} - 8000dd4: bf00 nop - 8000dd6: bd80 pop {r7, pc} - 8000dd8: 20000540 .word 0x20000540 - 8000ddc: 20000a60 .word 0x20000a60 - -08000de0 : - GenerateBreak(); - MotorState=ERROR; - } -} - -void ADCConversion(){ - 8000de0: b480 push {r7} - 8000de2: af00 add r7, sp, #0 - //Here we take the raw ADC values, offset, cast to (float) and use the hardware gain values to create volt and amp variables - extern int initing; - if(initing){ - 8000de4: 4b5d ldr r3, [pc, #372] ; (8000f5c ) - 8000de6: 681b ldr r3, [r3, #0] - 8000de8: 2b00 cmp r3, #0 - 8000dea: d037 beq.n 8000e5c - measurement_buffers.ADCOffset[0] = (255*measurement_buffers.ADCOffset[0]+measurement_buffers.RawADC[0][0])/256; - 8000dec: 4b5c ldr r3, [pc, #368] ; (8000f60 ) - 8000dee: 8c9b ldrh r3, [r3, #36] ; 0x24 - 8000df0: 461a mov r2, r3 - 8000df2: 4613 mov r3, r2 - 8000df4: 021b lsls r3, r3, #8 - 8000df6: 1a9b subs r3, r3, r2 - 8000df8: 461a mov r2, r3 - 8000dfa: 4b59 ldr r3, [pc, #356] ; (8000f60 ) - 8000dfc: 681b ldr r3, [r3, #0] - 8000dfe: 4413 add r3, r2 - 8000e00: 0a1b lsrs r3, r3, #8 - 8000e02: b29a uxth r2, r3 - 8000e04: 4b56 ldr r3, [pc, #344] ; (8000f60 ) - 8000e06: 849a strh r2, [r3, #36] ; 0x24 - measurement_buffers.ADCOffset[1] = (255*measurement_buffers.ADCOffset[1]+measurement_buffers.RawADC[1][0])/256; - 8000e08: 4b55 ldr r3, [pc, #340] ; (8000f60 ) - 8000e0a: 8cdb ldrh r3, [r3, #38] ; 0x26 - 8000e0c: 461a mov r2, r3 - 8000e0e: 4613 mov r3, r2 - 8000e10: 021b lsls r3, r3, #8 - 8000e12: 1a9b subs r3, r3, r2 - 8000e14: 461a mov r2, r3 - 8000e16: 4b52 ldr r3, [pc, #328] ; (8000f60 ) - 8000e18: 68db ldr r3, [r3, #12] - 8000e1a: 4413 add r3, r2 - 8000e1c: 0a1b lsrs r3, r3, #8 - 8000e1e: b29a uxth r2, r3 - 8000e20: 4b4f ldr r3, [pc, #316] ; (8000f60 ) - 8000e22: 84da strh r2, [r3, #38] ; 0x26 - measurement_buffers.ADCOffset[2] = (255*measurement_buffers.ADCOffset[2]+measurement_buffers.RawADC[2][0])/256; - 8000e24: 4b4e ldr r3, [pc, #312] ; (8000f60 ) - 8000e26: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8000e28: 461a mov r2, r3 - 8000e2a: 4613 mov r3, r2 - 8000e2c: 021b lsls r3, r3, #8 - 8000e2e: 1a9b subs r3, r3, r2 - 8000e30: 461a mov r2, r3 - 8000e32: 4b4b ldr r3, [pc, #300] ; (8000f60 ) - 8000e34: 699b ldr r3, [r3, #24] - 8000e36: 4413 add r3, r2 - 8000e38: 0a1b lsrs r3, r3, #8 - 8000e3a: b29a uxth r2, r3 - 8000e3c: 4b48 ldr r3, [pc, #288] ; (8000f60 ) - 8000e3e: 851a strh r2, [r3, #40] ; 0x28 - static int initcycles=0; - initcycles=initcycles+1; - 8000e40: 4b48 ldr r3, [pc, #288] ; (8000f64 ) - 8000e42: 681b ldr r3, [r3, #0] - 8000e44: 3301 adds r3, #1 - 8000e46: 4a47 ldr r2, [pc, #284] ; (8000f64 ) - 8000e48: 6013 str r3, [r2, #0] - if(initcycles>1000){ - 8000e4a: 4b46 ldr r3, [pc, #280] ; (8000f64 ) - 8000e4c: 681b ldr r3, [r3, #0] - 8000e4e: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 8000e52: dd7d ble.n 8000f50 - initing=0; - 8000e54: 4b41 ldr r3, [pc, #260] ; (8000f5c ) - 8000e56: 2200 movs r2, #0 - 8000e58: 601a str r2, [r3, #0] - measurement_buffers.ConvertedADC[0][1]=(float)measurement_buffers.RawADC[0][1]*g_hw_setup.VBGain; //Vbus - measurement_buffers.ConvertedADC[0][2]=(float)measurement_buffers.RawADC[0][2]*g_hw_setup.VBGain; //Usw - measurement_buffers.ConvertedADC[1][1]=(float)measurement_buffers.RawADC[1][1]*g_hw_setup.VBGain; //Vsw - measurement_buffers.ConvertedADC[1][2]=(float)measurement_buffers.RawADC[1][2]*g_hw_setup.VBGain; //Wsw - } -} - 8000e5a: e079 b.n 8000f50 - measurement_buffers.ConvertedADC[0][0]=((float)measurement_buffers.RawADC[0][0]-(float)measurement_buffers.ADCOffset[0])*g_hw_setup.Igain; //Currents - 8000e5c: 4b40 ldr r3, [pc, #256] ; (8000f60 ) - 8000e5e: 681b ldr r3, [r3, #0] - 8000e60: ee07 3a90 vmov s15, r3 - 8000e64: eeb8 7a67 vcvt.f32.u32 s14, s15 - 8000e68: 4b3d ldr r3, [pc, #244] ; (8000f60 ) - 8000e6a: 8c9b ldrh r3, [r3, #36] ; 0x24 - 8000e6c: ee07 3a90 vmov s15, r3 - 8000e70: eef8 7a67 vcvt.f32.u32 s15, s15 - 8000e74: ee37 7a67 vsub.f32 s14, s14, s15 - 8000e78: 4b3b ldr r3, [pc, #236] ; (8000f68 ) - 8000e7a: edd3 7a07 vldr s15, [r3, #28] - 8000e7e: ee67 7a27 vmul.f32 s15, s14, s15 - 8000e82: 4b37 ldr r3, [pc, #220] ; (8000f60 ) - 8000e84: edc3 7a0b vstr s15, [r3, #44] ; 0x2c - measurement_buffers.ConvertedADC[1][0]=((float)measurement_buffers.RawADC[1][0]-(float)measurement_buffers.ADCOffset[1])*g_hw_setup.Igain; - 8000e88: 4b35 ldr r3, [pc, #212] ; (8000f60 ) - 8000e8a: 68db ldr r3, [r3, #12] - 8000e8c: ee07 3a90 vmov s15, r3 - 8000e90: eeb8 7a67 vcvt.f32.u32 s14, s15 - 8000e94: 4b32 ldr r3, [pc, #200] ; (8000f60 ) - 8000e96: 8cdb ldrh r3, [r3, #38] ; 0x26 - 8000e98: ee07 3a90 vmov s15, r3 - 8000e9c: eef8 7a67 vcvt.f32.u32 s15, s15 - 8000ea0: ee37 7a67 vsub.f32 s14, s14, s15 - 8000ea4: 4b30 ldr r3, [pc, #192] ; (8000f68 ) - 8000ea6: edd3 7a07 vldr s15, [r3, #28] - 8000eaa: ee67 7a27 vmul.f32 s15, s14, s15 - 8000eae: 4b2c ldr r3, [pc, #176] ; (8000f60 ) - 8000eb0: edc3 7a0e vstr s15, [r3, #56] ; 0x38 - measurement_buffers.ConvertedADC[2][0]=((float)measurement_buffers.RawADC[2][0]-(float)measurement_buffers.ADCOffset[2])*g_hw_setup.Igain; - 8000eb4: 4b2a ldr r3, [pc, #168] ; (8000f60 ) - 8000eb6: 699b ldr r3, [r3, #24] - 8000eb8: ee07 3a90 vmov s15, r3 - 8000ebc: eeb8 7a67 vcvt.f32.u32 s14, s15 - 8000ec0: 4b27 ldr r3, [pc, #156] ; (8000f60 ) - 8000ec2: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8000ec4: ee07 3a90 vmov s15, r3 - 8000ec8: eef8 7a67 vcvt.f32.u32 s15, s15 - 8000ecc: ee37 7a67 vsub.f32 s14, s14, s15 - 8000ed0: 4b25 ldr r3, [pc, #148] ; (8000f68 ) - 8000ed2: edd3 7a07 vldr s15, [r3, #28] - 8000ed6: ee67 7a27 vmul.f32 s15, s14, s15 - 8000eda: 4b21 ldr r3, [pc, #132] ; (8000f60 ) - 8000edc: edc3 7a11 vstr s15, [r3, #68] ; 0x44 - measurement_buffers.ConvertedADC[0][1]=(float)measurement_buffers.RawADC[0][1]*g_hw_setup.VBGain; //Vbus - 8000ee0: 4b1f ldr r3, [pc, #124] ; (8000f60 ) - 8000ee2: 685b ldr r3, [r3, #4] - 8000ee4: ee07 3a90 vmov s15, r3 - 8000ee8: eeb8 7a67 vcvt.f32.u32 s14, s15 - 8000eec: 4b1e ldr r3, [pc, #120] ; (8000f68 ) - 8000eee: edd3 7a03 vldr s15, [r3, #12] - 8000ef2: ee67 7a27 vmul.f32 s15, s14, s15 - 8000ef6: 4b1a ldr r3, [pc, #104] ; (8000f60 ) - 8000ef8: edc3 7a0c vstr s15, [r3, #48] ; 0x30 - measurement_buffers.ConvertedADC[0][2]=(float)measurement_buffers.RawADC[0][2]*g_hw_setup.VBGain; //Usw - 8000efc: 4b18 ldr r3, [pc, #96] ; (8000f60 ) - 8000efe: 689b ldr r3, [r3, #8] - 8000f00: ee07 3a90 vmov s15, r3 - 8000f04: eeb8 7a67 vcvt.f32.u32 s14, s15 - 8000f08: 4b17 ldr r3, [pc, #92] ; (8000f68 ) - 8000f0a: edd3 7a03 vldr s15, [r3, #12] - 8000f0e: ee67 7a27 vmul.f32 s15, s14, s15 - 8000f12: 4b13 ldr r3, [pc, #76] ; (8000f60 ) - 8000f14: edc3 7a0d vstr s15, [r3, #52] ; 0x34 - measurement_buffers.ConvertedADC[1][1]=(float)measurement_buffers.RawADC[1][1]*g_hw_setup.VBGain; //Vsw - 8000f18: 4b11 ldr r3, [pc, #68] ; (8000f60 ) - 8000f1a: 691b ldr r3, [r3, #16] - 8000f1c: ee07 3a90 vmov s15, r3 - 8000f20: eeb8 7a67 vcvt.f32.u32 s14, s15 - 8000f24: 4b10 ldr r3, [pc, #64] ; (8000f68 ) - 8000f26: edd3 7a03 vldr s15, [r3, #12] - 8000f2a: ee67 7a27 vmul.f32 s15, s14, s15 - 8000f2e: 4b0c ldr r3, [pc, #48] ; (8000f60 ) - 8000f30: edc3 7a0f vstr s15, [r3, #60] ; 0x3c - measurement_buffers.ConvertedADC[1][2]=(float)measurement_buffers.RawADC[1][2]*g_hw_setup.VBGain; //Wsw - 8000f34: 4b0a ldr r3, [pc, #40] ; (8000f60 ) - 8000f36: 695b ldr r3, [r3, #20] - 8000f38: ee07 3a90 vmov s15, r3 - 8000f3c: eeb8 7a67 vcvt.f32.u32 s14, s15 - 8000f40: 4b09 ldr r3, [pc, #36] ; (8000f68 ) - 8000f42: edd3 7a03 vldr s15, [r3, #12] - 8000f46: ee67 7a27 vmul.f32 s15, s14, s15 - 8000f4a: 4b05 ldr r3, [pc, #20] ; (8000f60 ) - 8000f4c: edc3 7a10 vstr s15, [r3, #64] ; 0x40 -} - 8000f50: bf00 nop - 8000f52: 46bd mov sp, r7 - 8000f54: f85d 7b04 ldr.w r7, [sp], #4 - 8000f58: 4770 bx lr - 8000f5a: bf00 nop - 8000f5c: 20000004 .word 0x20000004 - 8000f60: 200004ec .word 0x200004ec - 8000f64: 2000003c .word 0x2000003c - 8000f68: 20000570 .word 0x20000570 - -08000f6c : - phU_Break(); - phV_Break(); - phW_Break(); -} - -int GetHallState(){ - 8000f6c: b480 push {r7} - 8000f6e: af00 add r7, sp, #0 - - - //int hallState=0; - //hallState=((HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_6))|((HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_7))<<1)|((HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_8))<<2)); - //ToDo Using these HAL_GPIO_ReadPin functions is very computationally expensive, should replace with a register read->byte mask->rightshift - switch(((GPIOB->IDR>>6)&0x7)) - 8000f70: 4b17 ldr r3, [pc, #92] ; (8000fd0 ) - 8000f72: 691b ldr r3, [r3, #16] - 8000f74: 099b lsrs r3, r3, #6 - 8000f76: f003 0307 and.w r3, r3, #7 - 8000f7a: 2b07 cmp r3, #7 - 8000f7c: d822 bhi.n 8000fc4 - 8000f7e: a201 add r2, pc, #4 ; (adr r2, 8000f84 ) - 8000f80: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000f84: 08000fa5 .word 0x08000fa5 - 8000f88: 08000fad .word 0x08000fad - 8000f8c: 08000fb5 .word 0x08000fb5 - 8000f90: 08000fb1 .word 0x08000fb1 - 8000f94: 08000fbd .word 0x08000fbd - 8000f98: 08000fc1 .word 0x08000fc1 - 8000f9c: 08000fb9 .word 0x08000fb9 - 8000fa0: 08000fa9 .word 0x08000fa9 - //switch(hallState) - { - case 0: - return 7; //7 is the no hall sensor detected state (all low) - 8000fa4: 2307 movs r3, #7 - 8000fa6: e00e b.n 8000fc6 - break; - case 7: - return 6; //6 is the no hall sensor detected state (all high) - 8000fa8: 2306 movs r3, #6 - 8000faa: e00c b.n 8000fc6 - break; -//Implement the hall table order here, depending how the hall sensors are configured - case 1: - return 0; - 8000fac: 2300 movs r3, #0 - 8000fae: e00a b.n 8000fc6 - break; - case 3: - return 1; - 8000fb0: 2301 movs r3, #1 - 8000fb2: e008 b.n 8000fc6 - break; - case 2: - return 2; - 8000fb4: 2302 movs r3, #2 - 8000fb6: e006 b.n 8000fc6 - break; - case 6: - return 3; - 8000fb8: 2303 movs r3, #3 - 8000fba: e004 b.n 8000fc6 - break; - case 4: - return 4; - 8000fbc: 2304 movs r3, #4 - 8000fbe: e002 b.n 8000fc6 - break; - case 5: - return 5; - 8000fc0: 2305 movs r3, #5 - 8000fc2: e000 b.n 8000fc6 - break; - default: - return 8; - 8000fc4: 2308 movs r3, #8 - break; - } -} - 8000fc6: 4618 mov r0, r3 - 8000fc8: 46bd mov sp, r7 - 8000fca: f85d 7b04 ldr.w r7, [sp], #4 - 8000fce: 4770 bx lr - 8000fd0: 48000400 .word 0x48000400 - -08000fd4 : - - -uint32_t tmpccmrx; //Temporary buffer which is used to turn on/off phase PWMs -//Turn all phase U FETs off, Tristate the HBridge output - For BLDC mode mainly, but also used for measuring, software fault detection and recovery -//ToDo TEST THOROUGHLY The register manipulations for the break functions were used previously on an STM32F042K6 for my first BLDC drive, on TIM1, which should be identical, but definitely needs checking -void phU_Break(){ - 8000fd4: b480 push {r7} - 8000fd6: af00 add r7, sp, #0 - tmpccmrx = htim1.Instance->CCMR1; - 8000fd8: 4b19 ldr r3, [pc, #100] ; (8001040 ) - 8000fda: 681b ldr r3, [r3, #0] - 8000fdc: 699b ldr r3, [r3, #24] - 8000fde: 4a19 ldr r2, [pc, #100] ; (8001044 ) - 8000fe0: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR1_OC1M; - 8000fe2: 4b18 ldr r3, [pc, #96] ; (8001044 ) - 8000fe4: 681b ldr r3, [r3, #0] - 8000fe6: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8000fea: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8000fee: 4a15 ldr r2, [pc, #84] ; (8001044 ) - 8000ff0: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR1_CC1S; - 8000ff2: 4b14 ldr r3, [pc, #80] ; (8001044 ) - 8000ff4: 681b ldr r3, [r3, #0] - 8000ff6: f023 0303 bic.w r3, r3, #3 - 8000ffa: 4a12 ldr r2, [pc, #72] ; (8001044 ) - 8000ffc: 6013 str r3, [r2, #0] - tmpccmrx |= TIM_OCMODE_FORCED_INACTIVE; - 8000ffe: 4b11 ldr r3, [pc, #68] ; (8001044 ) - 8001000: 681b ldr r3, [r3, #0] - 8001002: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8001006: 4a0f ldr r2, [pc, #60] ; (8001044 ) - 8001008: 6013 str r3, [r2, #0] - htim1.Instance->CCMR1 = tmpccmrx; - 800100a: 4b0d ldr r3, [pc, #52] ; (8001040 ) - 800100c: 681b ldr r3, [r3, #0] - 800100e: 4a0d ldr r2, [pc, #52] ; (8001044 ) - 8001010: 6812 ldr r2, [r2, #0] - 8001012: 619a str r2, [r3, #24] - htim1.Instance->CCER &= ~TIM_CCER_CC1E; //disable - 8001014: 4b0a ldr r3, [pc, #40] ; (8001040 ) - 8001016: 681b ldr r3, [r3, #0] - 8001018: 6a1a ldr r2, [r3, #32] - 800101a: 4b09 ldr r3, [pc, #36] ; (8001040 ) - 800101c: 681b ldr r3, [r3, #0] - 800101e: f022 0201 bic.w r2, r2, #1 - 8001022: 621a str r2, [r3, #32] - htim1.Instance->CCER &= ~TIM_CCER_CC1NE; //disable - 8001024: 4b06 ldr r3, [pc, #24] ; (8001040 ) - 8001026: 681b ldr r3, [r3, #0] - 8001028: 6a1a ldr r2, [r3, #32] - 800102a: 4b05 ldr r3, [pc, #20] ; (8001040 ) - 800102c: 681b ldr r3, [r3, #0] - 800102e: f022 0204 bic.w r2, r2, #4 - 8001032: 621a str r2, [r3, #32] -} - 8001034: bf00 nop - 8001036: 46bd mov sp, r7 - 8001038: f85d 7b04 ldr.w r7, [sp], #4 - 800103c: 4770 bx lr - 800103e: bf00 nop - 8001040: 20000a60 .word 0x20000a60 - 8001044: 20000594 .word 0x20000594 - -08001048 : -//Basically un-break phase U, opposite of above... -void phU_Enable(){ - 8001048: b480 push {r7} - 800104a: af00 add r7, sp, #0 - tmpccmrx = htim1.Instance->CCMR1; - 800104c: 4b19 ldr r3, [pc, #100] ; (80010b4 ) - 800104e: 681b ldr r3, [r3, #0] - 8001050: 699b ldr r3, [r3, #24] - 8001052: 4a19 ldr r2, [pc, #100] ; (80010b8 ) - 8001054: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR1_OC1M; - 8001056: 4b18 ldr r3, [pc, #96] ; (80010b8 ) - 8001058: 681b ldr r3, [r3, #0] - 800105a: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 800105e: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8001062: 4a15 ldr r2, [pc, #84] ; (80010b8 ) - 8001064: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR1_CC1S; - 8001066: 4b14 ldr r3, [pc, #80] ; (80010b8 ) - 8001068: 681b ldr r3, [r3, #0] - 800106a: f023 0303 bic.w r3, r3, #3 - 800106e: 4a12 ldr r2, [pc, #72] ; (80010b8 ) - 8001070: 6013 str r3, [r2, #0] - tmpccmrx |= TIM_OCMODE_PWM1; - 8001072: 4b11 ldr r3, [pc, #68] ; (80010b8 ) - 8001074: 681b ldr r3, [r3, #0] - 8001076: f043 0360 orr.w r3, r3, #96 ; 0x60 - 800107a: 4a0f ldr r2, [pc, #60] ; (80010b8 ) - 800107c: 6013 str r3, [r2, #0] - htim1.Instance->CCMR1 = tmpccmrx; - 800107e: 4b0d ldr r3, [pc, #52] ; (80010b4 ) - 8001080: 681b ldr r3, [r3, #0] - 8001082: 4a0d ldr r2, [pc, #52] ; (80010b8 ) - 8001084: 6812 ldr r2, [r2, #0] - 8001086: 619a str r2, [r3, #24] - htim1.Instance->CCER |= TIM_CCER_CC1E; //enable - 8001088: 4b0a ldr r3, [pc, #40] ; (80010b4 ) - 800108a: 681b ldr r3, [r3, #0] - 800108c: 6a1a ldr r2, [r3, #32] - 800108e: 4b09 ldr r3, [pc, #36] ; (80010b4 ) - 8001090: 681b ldr r3, [r3, #0] - 8001092: f042 0201 orr.w r2, r2, #1 - 8001096: 621a str r2, [r3, #32] - htim1.Instance->CCER |= TIM_CCER_CC1NE; //enable - 8001098: 4b06 ldr r3, [pc, #24] ; (80010b4 ) - 800109a: 681b ldr r3, [r3, #0] - 800109c: 6a1a ldr r2, [r3, #32] - 800109e: 4b05 ldr r3, [pc, #20] ; (80010b4 ) - 80010a0: 681b ldr r3, [r3, #0] - 80010a2: f042 0204 orr.w r2, r2, #4 - 80010a6: 621a str r2, [r3, #32] -} - 80010a8: bf00 nop - 80010aa: 46bd mov sp, r7 - 80010ac: f85d 7b04 ldr.w r7, [sp], #4 - 80010b0: 4770 bx lr - 80010b2: bf00 nop - 80010b4: 20000a60 .word 0x20000a60 - 80010b8: 20000594 .word 0x20000594 - -080010bc : - -void phV_Break(){ - 80010bc: b480 push {r7} - 80010be: af00 add r7, sp, #0 - tmpccmrx = htim1.Instance->CCMR1; - 80010c0: 4b19 ldr r3, [pc, #100] ; (8001128 ) - 80010c2: 681b ldr r3, [r3, #0] - 80010c4: 699b ldr r3, [r3, #24] - 80010c6: 4a19 ldr r2, [pc, #100] ; (800112c ) - 80010c8: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR1_OC2M; - 80010ca: 4b18 ldr r3, [pc, #96] ; (800112c ) - 80010cc: 681b ldr r3, [r3, #0] - 80010ce: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 80010d2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 80010d6: 4a15 ldr r2, [pc, #84] ; (800112c ) - 80010d8: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR1_CC2S; - 80010da: 4b14 ldr r3, [pc, #80] ; (800112c ) - 80010dc: 681b ldr r3, [r3, #0] - 80010de: f423 7340 bic.w r3, r3, #768 ; 0x300 - 80010e2: 4a12 ldr r2, [pc, #72] ; (800112c ) - 80010e4: 6013 str r3, [r2, #0] - tmpccmrx |= TIM_OCMODE_FORCED_INACTIVE<<8; - 80010e6: 4b11 ldr r3, [pc, #68] ; (800112c ) - 80010e8: 681b ldr r3, [r3, #0] - 80010ea: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 80010ee: 4a0f ldr r2, [pc, #60] ; (800112c ) - 80010f0: 6013 str r3, [r2, #0] - htim1.Instance->CCMR1 = tmpccmrx; - 80010f2: 4b0d ldr r3, [pc, #52] ; (8001128 ) - 80010f4: 681b ldr r3, [r3, #0] - 80010f6: 4a0d ldr r2, [pc, #52] ; (800112c ) - 80010f8: 6812 ldr r2, [r2, #0] - 80010fa: 619a str r2, [r3, #24] - htim1.Instance->CCER &= ~TIM_CCER_CC2E; //disable - 80010fc: 4b0a ldr r3, [pc, #40] ; (8001128 ) - 80010fe: 681b ldr r3, [r3, #0] - 8001100: 6a1a ldr r2, [r3, #32] - 8001102: 4b09 ldr r3, [pc, #36] ; (8001128 ) - 8001104: 681b ldr r3, [r3, #0] - 8001106: f022 0210 bic.w r2, r2, #16 - 800110a: 621a str r2, [r3, #32] - htim1.Instance->CCER &= ~TIM_CCER_CC2NE; //disable - 800110c: 4b06 ldr r3, [pc, #24] ; (8001128 ) - 800110e: 681b ldr r3, [r3, #0] - 8001110: 6a1a ldr r2, [r3, #32] - 8001112: 4b05 ldr r3, [pc, #20] ; (8001128 ) - 8001114: 681b ldr r3, [r3, #0] - 8001116: f022 0240 bic.w r2, r2, #64 ; 0x40 - 800111a: 621a str r2, [r3, #32] -} - 800111c: bf00 nop - 800111e: 46bd mov sp, r7 - 8001120: f85d 7b04 ldr.w r7, [sp], #4 - 8001124: 4770 bx lr - 8001126: bf00 nop - 8001128: 20000a60 .word 0x20000a60 - 800112c: 20000594 .word 0x20000594 - -08001130 : - -void phV_Enable(){ - 8001130: b480 push {r7} - 8001132: af00 add r7, sp, #0 - tmpccmrx = htim1.Instance->CCMR1; - 8001134: 4b19 ldr r3, [pc, #100] ; (800119c ) - 8001136: 681b ldr r3, [r3, #0] - 8001138: 699b ldr r3, [r3, #24] - 800113a: 4a19 ldr r2, [pc, #100] ; (80011a0 ) - 800113c: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR1_OC2M; - 800113e: 4b18 ldr r3, [pc, #96] ; (80011a0 ) - 8001140: 681b ldr r3, [r3, #0] - 8001142: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 8001146: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 800114a: 4a15 ldr r2, [pc, #84] ; (80011a0 ) - 800114c: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR1_CC2S; - 800114e: 4b14 ldr r3, [pc, #80] ; (80011a0 ) - 8001150: 681b ldr r3, [r3, #0] - 8001152: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8001156: 4a12 ldr r2, [pc, #72] ; (80011a0 ) - 8001158: 6013 str r3, [r2, #0] - tmpccmrx |= TIM_OCMODE_PWM1<<8; - 800115a: 4b11 ldr r3, [pc, #68] ; (80011a0 ) - 800115c: 681b ldr r3, [r3, #0] - 800115e: f443 43c0 orr.w r3, r3, #24576 ; 0x6000 - 8001162: 4a0f ldr r2, [pc, #60] ; (80011a0 ) - 8001164: 6013 str r3, [r2, #0] -htim1.Instance->CCMR1 = tmpccmrx; - 8001166: 4b0d ldr r3, [pc, #52] ; (800119c ) - 8001168: 681b ldr r3, [r3, #0] - 800116a: 4a0d ldr r2, [pc, #52] ; (80011a0 ) - 800116c: 6812 ldr r2, [r2, #0] - 800116e: 619a str r2, [r3, #24] -htim1.Instance->CCER |= TIM_CCER_CC2E; //enable - 8001170: 4b0a ldr r3, [pc, #40] ; (800119c ) - 8001172: 681b ldr r3, [r3, #0] - 8001174: 6a1a ldr r2, [r3, #32] - 8001176: 4b09 ldr r3, [pc, #36] ; (800119c ) - 8001178: 681b ldr r3, [r3, #0] - 800117a: f042 0210 orr.w r2, r2, #16 - 800117e: 621a str r2, [r3, #32] -htim1.Instance->CCER |= TIM_CCER_CC2NE; //enable - 8001180: 4b06 ldr r3, [pc, #24] ; (800119c ) - 8001182: 681b ldr r3, [r3, #0] - 8001184: 6a1a ldr r2, [r3, #32] - 8001186: 4b05 ldr r3, [pc, #20] ; (800119c ) - 8001188: 681b ldr r3, [r3, #0] - 800118a: f042 0240 orr.w r2, r2, #64 ; 0x40 - 800118e: 621a str r2, [r3, #32] -} - 8001190: bf00 nop - 8001192: 46bd mov sp, r7 - 8001194: f85d 7b04 ldr.w r7, [sp], #4 - 8001198: 4770 bx lr - 800119a: bf00 nop - 800119c: 20000a60 .word 0x20000a60 - 80011a0: 20000594 .word 0x20000594 - -080011a4 : - -void phW_Break(){ - 80011a4: b480 push {r7} - 80011a6: af00 add r7, sp, #0 - tmpccmrx = htim1.Instance->CCMR2; - 80011a8: 4b19 ldr r3, [pc, #100] ; (8001210 ) - 80011aa: 681b ldr r3, [r3, #0] - 80011ac: 69db ldr r3, [r3, #28] - 80011ae: 4a19 ldr r2, [pc, #100] ; (8001214 ) - 80011b0: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR2_OC3M; - 80011b2: 4b18 ldr r3, [pc, #96] ; (8001214 ) - 80011b4: 681b ldr r3, [r3, #0] - 80011b6: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 80011ba: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80011be: 4a15 ldr r2, [pc, #84] ; (8001214 ) - 80011c0: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR2_CC3S; - 80011c2: 4b14 ldr r3, [pc, #80] ; (8001214 ) - 80011c4: 681b ldr r3, [r3, #0] - 80011c6: f023 0303 bic.w r3, r3, #3 - 80011ca: 4a12 ldr r2, [pc, #72] ; (8001214 ) - 80011cc: 6013 str r3, [r2, #0] - tmpccmrx |= TIM_OCMODE_FORCED_INACTIVE; - 80011ce: 4b11 ldr r3, [pc, #68] ; (8001214 ) - 80011d0: 681b ldr r3, [r3, #0] - 80011d2: f043 0340 orr.w r3, r3, #64 ; 0x40 - 80011d6: 4a0f ldr r2, [pc, #60] ; (8001214 ) - 80011d8: 6013 str r3, [r2, #0] - htim1.Instance->CCMR2 = tmpccmrx; - 80011da: 4b0d ldr r3, [pc, #52] ; (8001210 ) - 80011dc: 681b ldr r3, [r3, #0] - 80011de: 4a0d ldr r2, [pc, #52] ; (8001214 ) - 80011e0: 6812 ldr r2, [r2, #0] - 80011e2: 61da str r2, [r3, #28] - htim1.Instance->CCER &= ~TIM_CCER_CC3E; //disable - 80011e4: 4b0a ldr r3, [pc, #40] ; (8001210 ) - 80011e6: 681b ldr r3, [r3, #0] - 80011e8: 6a1a ldr r2, [r3, #32] - 80011ea: 4b09 ldr r3, [pc, #36] ; (8001210 ) - 80011ec: 681b ldr r3, [r3, #0] - 80011ee: f422 7280 bic.w r2, r2, #256 ; 0x100 - 80011f2: 621a str r2, [r3, #32] - htim1.Instance->CCER &= ~TIM_CCER_CC3NE; //disable - 80011f4: 4b06 ldr r3, [pc, #24] ; (8001210 ) - 80011f6: 681b ldr r3, [r3, #0] - 80011f8: 6a1a ldr r2, [r3, #32] - 80011fa: 4b05 ldr r3, [pc, #20] ; (8001210 ) - 80011fc: 681b ldr r3, [r3, #0] - 80011fe: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 8001202: 621a str r2, [r3, #32] -} - 8001204: bf00 nop - 8001206: 46bd mov sp, r7 - 8001208: f85d 7b04 ldr.w r7, [sp], #4 - 800120c: 4770 bx lr - 800120e: bf00 nop - 8001210: 20000a60 .word 0x20000a60 - 8001214: 20000594 .word 0x20000594 - -08001218 : - -void phW_Enable(){ - 8001218: b480 push {r7} - 800121a: af00 add r7, sp, #0 - tmpccmrx = htim1.Instance->CCMR2; - 800121c: 4b19 ldr r3, [pc, #100] ; (8001284 ) - 800121e: 681b ldr r3, [r3, #0] - 8001220: 69db ldr r3, [r3, #28] - 8001222: 4a19 ldr r2, [pc, #100] ; (8001288 ) - 8001224: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR2_OC3M; - 8001226: 4b18 ldr r3, [pc, #96] ; (8001288 ) - 8001228: 681b ldr r3, [r3, #0] - 800122a: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 800122e: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8001232: 4a15 ldr r2, [pc, #84] ; (8001288 ) - 8001234: 6013 str r3, [r2, #0] - tmpccmrx &= ~TIM_CCMR2_CC3S; - 8001236: 4b14 ldr r3, [pc, #80] ; (8001288 ) - 8001238: 681b ldr r3, [r3, #0] - 800123a: f023 0303 bic.w r3, r3, #3 - 800123e: 4a12 ldr r2, [pc, #72] ; (8001288 ) - 8001240: 6013 str r3, [r2, #0] - tmpccmrx |= TIM_OCMODE_PWM1; - 8001242: 4b11 ldr r3, [pc, #68] ; (8001288 ) - 8001244: 681b ldr r3, [r3, #0] - 8001246: f043 0360 orr.w r3, r3, #96 ; 0x60 - 800124a: 4a0f ldr r2, [pc, #60] ; (8001288 ) - 800124c: 6013 str r3, [r2, #0] - htim1.Instance->CCMR2 = tmpccmrx; - 800124e: 4b0d ldr r3, [pc, #52] ; (8001284 ) - 8001250: 681b ldr r3, [r3, #0] - 8001252: 4a0d ldr r2, [pc, #52] ; (8001288 ) - 8001254: 6812 ldr r2, [r2, #0] - 8001256: 61da str r2, [r3, #28] - htim1.Instance->CCER |= TIM_CCER_CC3E; //enable - 8001258: 4b0a ldr r3, [pc, #40] ; (8001284 ) - 800125a: 681b ldr r3, [r3, #0] - 800125c: 6a1a ldr r2, [r3, #32] - 800125e: 4b09 ldr r3, [pc, #36] ; (8001284 ) - 8001260: 681b ldr r3, [r3, #0] - 8001262: f442 7280 orr.w r2, r2, #256 ; 0x100 - 8001266: 621a str r2, [r3, #32] - htim1.Instance->CCER |= TIM_CCER_CC3NE; //enable - 8001268: 4b06 ldr r3, [pc, #24] ; (8001284 ) - 800126a: 681b ldr r3, [r3, #0] - 800126c: 6a1a ldr r2, [r3, #32] - 800126e: 4b05 ldr r3, [pc, #20] ; (8001284 ) - 8001270: 681b ldr r3, [r3, #0] - 8001272: f442 6280 orr.w r2, r2, #1024 ; 0x400 - 8001276: 621a str r2, [r3, #32] -} - 8001278: bf00 nop - 800127a: 46bd mov sp, r7 - 800127c: f85d 7b04 ldr.w r7, [sp], #4 - 8001280: 4770 bx lr - 8001282: bf00 nop - 8001284: 20000a60 .word 0x20000a60 - 8001288: 20000594 .word 0x20000594 - -0800128c : -/* Includes ------------------------------------------------------------------*/ -#include "MESChw_setup.h" - - - -void motor_init(){ - 800128c: b480 push {r7} - 800128e: af00 add r7, sp, #0 - motor.Rphase=0; //We init at 0 to trigger the measurer to get the vals - 8001290: 4b0b ldr r3, [pc, #44] ; (80012c0 ) - 8001292: f04f 0200 mov.w r2, #0 - 8001296: 601a str r2, [r3, #0] - motor.Lphase=0; //We init at 0 to trigger the measurer to get the vals - 8001298: 4b09 ldr r3, [pc, #36] ; (80012c0 ) - 800129a: f04f 0200 mov.w r2, #0 - 800129e: 609a str r2, [r3, #8] - motor.uncertainty=1; - 80012a0: 4b07 ldr r3, [pc, #28] ; (80012c0 ) - 80012a2: 2201 movs r2, #1 - 80012a4: 711a strb r2, [r3, #4] - motor.RawCurrLim=3000; - 80012a6: 4b06 ldr r3, [pc, #24] ; (80012c0 ) - 80012a8: f640 32b8 movw r2, #3000 ; 0xbb8 - 80012ac: 819a strh r2, [r3, #12] - motor.RawVoltLim=2303; - 80012ae: 4b04 ldr r3, [pc, #16] ; (80012c0 ) - 80012b0: f640 02ff movw r2, #2303 ; 0x8ff - 80012b4: 81da strh r2, [r3, #14] -} - 80012b6: bf00 nop - 80012b8: 46bd mov sp, r7 - 80012ba: f85d 7b04 ldr.w r7, [sp], #4 - 80012be: 4770 bx lr - 80012c0: 20000560 .word 0x20000560 - 80012c4: 00000000 .word 0x00000000 - -080012c8 : - -void hw_init(){ - 80012c8: b598 push {r3, r4, r7, lr} - 80012ca: af00 add r7, sp, #0 - g_hw_setup.Rshunt=0.001; - 80012cc: 4b2c ldr r3, [pc, #176] ; (8001380 ) - 80012ce: 4a2d ldr r2, [pc, #180] ; (8001384 ) - 80012d0: 601a str r2, [r3, #0] - g_hw_setup.RIphPU=4700; - 80012d2: 4b2b ldr r3, [pc, #172] ; (8001380 ) - 80012d4: 4a2c ldr r2, [pc, #176] ; (8001388 ) - 80012d6: 611a str r2, [r3, #16] - g_hw_setup.RIphSR=150; - 80012d8: 4b29 ldr r3, [pc, #164] ; (8001380 ) - 80012da: 4a2c ldr r2, [pc, #176] ; (800138c ) - 80012dc: 615a str r2, [r3, #20] - g_hw_setup.RVBB=1500; - 80012de: 4b28 ldr r3, [pc, #160] ; (8001380 ) - 80012e0: 4a2b ldr r2, [pc, #172] ; (8001390 ) - 80012e2: 609a str r2, [r3, #8] - g_hw_setup.RVBT=47000; - 80012e4: 4b26 ldr r3, [pc, #152] ; (8001380 ) - 80012e6: 4a2b ldr r2, [pc, #172] ; (8001394 ) - 80012e8: 605a str r2, [r3, #4] - g_hw_setup.OpGain=16; //Can this be inferred from the HAL declaration? - 80012ea: 4b25 ldr r3, [pc, #148] ; (8001380 ) - 80012ec: f04f 4283 mov.w r2, #1098907648 ; 0x41800000 - 80012f0: 619a str r2, [r3, #24] - g_hw_setup.VBGain=g_hw_setup.RVBB/(g_hw_setup.RVBB+g_hw_setup.RVBT); - 80012f2: 4b23 ldr r3, [pc, #140] ; (8001380 ) - 80012f4: edd3 6a02 vldr s13, [r3, #8] - 80012f8: 4b21 ldr r3, [pc, #132] ; (8001380 ) - 80012fa: ed93 7a02 vldr s14, [r3, #8] - 80012fe: 4b20 ldr r3, [pc, #128] ; (8001380 ) - 8001300: edd3 7a01 vldr s15, [r3, #4] - 8001304: ee37 7a27 vadd.f32 s14, s14, s15 - 8001308: eec6 7a87 vdiv.f32 s15, s13, s14 - 800130c: 4b1c ldr r3, [pc, #112] ; (8001380 ) - 800130e: edc3 7a03 vstr s15, [r3, #12] - g_hw_setup.Igain=3.3/(g_hw_setup.Rshunt*4096*g_hw_setup.OpGain*g_hw_setup.RIphPU/(g_hw_setup.RIphPU+g_hw_setup.RIphSR));//g_hw_setup.Rshunt*g_hw_setup.OpGain*g_hw_setup.RIphPU/(g_hw_setup.RIphPU+g_hw_setup.RIphSR); - 8001312: 4b1b ldr r3, [pc, #108] ; (8001380 ) - 8001314: edd3 7a00 vldr s15, [r3] - 8001318: ed9f 7a1f vldr s14, [pc, #124] ; 8001398 - 800131c: ee27 7a87 vmul.f32 s14, s15, s14 - 8001320: 4b17 ldr r3, [pc, #92] ; (8001380 ) - 8001322: edd3 7a06 vldr s15, [r3, #24] - 8001326: ee27 7a27 vmul.f32 s14, s14, s15 - 800132a: 4b15 ldr r3, [pc, #84] ; (8001380 ) - 800132c: edd3 7a04 vldr s15, [r3, #16] - 8001330: ee27 7a27 vmul.f32 s14, s14, s15 - 8001334: 4b12 ldr r3, [pc, #72] ; (8001380 ) - 8001336: edd3 6a04 vldr s13, [r3, #16] - 800133a: 4b11 ldr r3, [pc, #68] ; (8001380 ) - 800133c: edd3 7a05 vldr s15, [r3, #20] - 8001340: ee76 7aa7 vadd.f32 s15, s13, s15 - 8001344: eec7 6a27 vdiv.f32 s13, s14, s15 - 8001348: ee16 0a90 vmov r0, s13 - 800134c: f7ff f8a4 bl 8000498 <__aeabi_f2d> - 8001350: 4603 mov r3, r0 - 8001352: 460c mov r4, r1 - 8001354: 461a mov r2, r3 - 8001356: 4623 mov r3, r4 - 8001358: a107 add r1, pc, #28 ; (adr r1, 8001378 ) - 800135a: e9d1 0100 ldrd r0, r1, [r1] - 800135e: f7ff fa1d bl 800079c <__aeabi_ddiv> - 8001362: 4603 mov r3, r0 - 8001364: 460c mov r4, r1 - 8001366: 4618 mov r0, r3 - 8001368: 4621 mov r1, r4 - 800136a: f7ff faff bl 800096c <__aeabi_d2f> - 800136e: 4602 mov r2, r0 - 8001370: 4b03 ldr r3, [pc, #12] ; (8001380 ) - 8001372: 61da str r2, [r3, #28] - -} - 8001374: bf00 nop - 8001376: bd98 pop {r3, r4, r7, pc} - 8001378: 66666666 .word 0x66666666 - 800137c: 400a6666 .word 0x400a6666 - 8001380: 20000570 .word 0x20000570 - 8001384: 3a83126f .word 0x3a83126f - 8001388: 4592e000 .word 0x4592e000 - 800138c: 43160000 .word 0x43160000 - 8001390: 44bb8000 .word 0x44bb8000 - 8001394: 47379800 .word 0x47379800 - 8001398: 45800000 .word 0x45800000 - -0800139c : -/* USER CODE END PFP */ - -/* Private user code ---------------------------------------------------------*/ -/* USER CODE BEGIN 0 */ - -void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim){ - 800139c: b580 push {r7, lr} - 800139e: b082 sub sp, #8 - 80013a0: af00 add r7, sp, #0 - 80013a2: 6078 str r0, [r7, #4] - if(htim->Channel==HAL_TIM_ACTIVE_CHANNEL_1){ - 80013a4: 687b ldr r3, [r7, #4] - 80013a6: 7f1b ldrb r3, [r3, #28] - 80013a8: 2b01 cmp r3, #1 - 80013aa: d17a bne.n 80014a2 - ICVals[0]=HAL_TIM_ReadCapturedValue(&htim3, TIM_CHANNEL_1); - 80013ac: 2100 movs r1, #0 - 80013ae: 483f ldr r0, [pc, #252] ; (80014ac ) - 80013b0: f006 feac bl 800810c - 80013b4: 4602 mov r2, r0 - 80013b6: 4b3e ldr r3, [pc, #248] ; (80014b0 ) - 80013b8: 601a str r2, [r3, #0] - - // Target is 20000 guard is +-10000 - if ((ICVals[0] < 10000) || (30000 < ICVals[0])) - 80013ba: 4b3d ldr r3, [pc, #244] ; (80014b0 ) - 80013bc: 681b ldr r3, [r3, #0] - 80013be: f242 720f movw r2, #9999 ; 0x270f - 80013c2: 4293 cmp r3, r2 - 80013c4: d905 bls.n 80013d2 - 80013c6: 4b3a ldr r3, [pc, #232] ; (80014b0 ) - 80013c8: 681b ldr r3, [r3, #0] - 80013ca: f247 5230 movw r2, #30000 ; 0x7530 - 80013ce: 4293 cmp r3, r2 - 80013d0: d907 bls.n 80013e2 - { - a = 0; - 80013d2: 4b38 ldr r3, [pc, #224] ; (80014b4 ) - 80013d4: 2200 movs r2, #0 - 80013d6: 801a strh r2, [r3, #0] - BLDCVars.ReqCurrent=0; - 80013d8: 4b37 ldr r3, [pc, #220] ; (80014b8 ) - 80013da: f04f 0200 mov.w r2, #0 - 80013de: 601a str r2, [r3, #0] - a=100*(1500-ICVals[1])/1500; - } - }*/ - - } -} - 80013e0: e05f b.n 80014a2 - if(ICVals[0]!=0){ - 80013e2: 4b33 ldr r3, [pc, #204] ; (80014b0 ) - 80013e4: 681b ldr r3, [r3, #0] - 80013e6: 2b00 cmp r3, #0 - 80013e8: d05b beq.n 80014a2 - BLDCState=BLDC_FORWARDS; - 80013ea: 4b34 ldr r3, [pc, #208] ; (80014bc ) - 80013ec: 2201 movs r2, #1 - 80013ee: 701a strb r2, [r3, #0] - ICVals[1]=HAL_TIM_ReadCapturedValue(&htim3, TIM_CHANNEL_2); - 80013f0: 2104 movs r1, #4 - 80013f2: 482e ldr r0, [pc, #184] ; (80014ac ) - 80013f4: f006 fe8a bl 800810c - 80013f8: 4602 mov r2, r0 - 80013fa: 4b2d ldr r3, [pc, #180] ; (80014b0 ) - 80013fc: 605a str r2, [r3, #4] - if (ICVals[1] > 2000) ICVals[1] = 2000; - 80013fe: 4b2c ldr r3, [pc, #176] ; (80014b0 ) - 8001400: 685b ldr r3, [r3, #4] - 8001402: f5b3 6ffa cmp.w r3, #2000 ; 0x7d0 - 8001406: d903 bls.n 8001410 - 8001408: 4b29 ldr r3, [pc, #164] ; (80014b0 ) - 800140a: f44f 62fa mov.w r2, #2000 ; 0x7d0 - 800140e: 605a str r2, [r3, #4] - if (ICVals[1] < 1000) ICVals[1] = 1000; - 8001410: 4b27 ldr r3, [pc, #156] ; (80014b0 ) - 8001412: 685b ldr r3, [r3, #4] - 8001414: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 8001418: d203 bcs.n 8001422 - 800141a: 4b25 ldr r3, [pc, #148] ; (80014b0 ) - 800141c: f44f 727a mov.w r2, #1000 ; 0x3e8 - 8001420: 605a str r2, [r3, #4] - if ((ICVals[1] > 1400) && (1600 > ICVals[1])) - 8001422: 4b23 ldr r3, [pc, #140] ; (80014b0 ) - 8001424: 685b ldr r3, [r3, #4] - 8001426: f5b3 6faf cmp.w r3, #1400 ; 0x578 - 800142a: d908 bls.n 800143e - 800142c: 4b20 ldr r3, [pc, #128] ; (80014b0 ) - 800142e: 685b ldr r3, [r3, #4] - 8001430: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8001434: d203 bcs.n 800143e - ICVals[1] = 1500; - 8001436: 4b1e ldr r3, [pc, #120] ; (80014b0 ) - 8001438: f240 52dc movw r2, #1500 ; 0x5dc - 800143c: 605a str r2, [r3, #4] - if(ICVals[1]>1600) BLDCVars.ReqCurrent=((float)ICVals[1]-1600)/5.0; //Crude hack, which gets current scaled to +/-80A based on 1000-2000us PWM in - 800143e: 4b1c ldr r3, [pc, #112] ; (80014b0 ) - 8001440: 685b ldr r3, [r3, #4] - 8001442: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8001446: d911 bls.n 800146c - 8001448: 4b19 ldr r3, [pc, #100] ; (80014b0 ) - 800144a: 685b ldr r3, [r3, #4] - 800144c: ee07 3a90 vmov s15, r3 - 8001450: eef8 7a67 vcvt.f32.u32 s15, s15 - 8001454: ed9f 7a1a vldr s14, [pc, #104] ; 80014c0 - 8001458: ee37 7ac7 vsub.f32 s14, s15, s14 - 800145c: eef1 6a04 vmov.f32 s13, #20 ; 0x40a00000 5.0 - 8001460: eec7 7a26 vdiv.f32 s15, s14, s13 - 8001464: 4b14 ldr r3, [pc, #80] ; (80014b8 ) - 8001466: edc3 7a00 vstr s15, [r3] -} - 800146a: e01a b.n 80014a2 - else if(ICVals[1]<1400) BLDCVars.ReqCurrent=((float)ICVals[1]-1400)/5.0; //Crude hack, which gets current scaled to +/-80A based on 1000-2000us PWM in - 800146c: 4b10 ldr r3, [pc, #64] ; (80014b0 ) - 800146e: 685b ldr r3, [r3, #4] - 8001470: f5b3 6faf cmp.w r3, #1400 ; 0x578 - 8001474: d211 bcs.n 800149a - 8001476: 4b0e ldr r3, [pc, #56] ; (80014b0 ) - 8001478: 685b ldr r3, [r3, #4] - 800147a: ee07 3a90 vmov s15, r3 - 800147e: eef8 7a67 vcvt.f32.u32 s15, s15 - 8001482: ed9f 7a10 vldr s14, [pc, #64] ; 80014c4 - 8001486: ee37 7ac7 vsub.f32 s14, s15, s14 - 800148a: eef1 6a04 vmov.f32 s13, #20 ; 0x40a00000 5.0 - 800148e: eec7 7a26 vdiv.f32 s15, s14, s13 - 8001492: 4b09 ldr r3, [pc, #36] ; (80014b8 ) - 8001494: edc3 7a00 vstr s15, [r3] -} - 8001498: e003 b.n 80014a2 - else BLDCVars.ReqCurrent=0; - 800149a: 4b07 ldr r3, [pc, #28] ; (80014b8 ) - 800149c: f04f 0200 mov.w r2, #0 - 80014a0: 601a str r2, [r3, #0] -} - 80014a2: bf00 nop - 80014a4: 3708 adds r7, #8 - 80014a6: 46bd mov sp, r7 - 80014a8: bd80 pop {r7, pc} - 80014aa: bf00 nop - 80014ac: 200008a0 .word 0x200008a0 - 80014b0: 20000050 .word 0x20000050 - 80014b4: 20000040 .word 0x20000040 - 80014b8: 20000540 .word 0x20000540 - 80014bc: 2000055d .word 0x2000055d - 80014c0: 44c80000 .word 0x44c80000 - 80014c4: 44af0000 .word 0x44af0000 - -080014c8
: -/** - * @brief The application entry point. - * @retval int - */ -int main(void) -{ - 80014c8: b580 push {r7, lr} - 80014ca: af00 add r7, sp, #0 - /* USER CODE END 1 */ - - /* MCU Configuration--------------------------------------------------------*/ - - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); - 80014cc: f001 fd14 bl 8002ef8 - /* USER CODE BEGIN Init */ - - /* USER CODE END Init */ - - /* Configure the system clock */ - SystemClock_Config(); - 80014d0: f000 f8e2 bl 8001698 - /* USER CODE BEGIN SysInit */ - - /* USER CODE END SysInit */ - - /* Initialize all configured peripherals */ - MX_GPIO_Init(); - 80014d4: f000 febc bl 8002250 - MX_DMA_Init(); - 80014d8: f000 fe60 bl 800219c - MX_ADC1_Init(); - 80014dc: f000 f946 bl 800176c - MX_ADC2_Init(); - 80014e0: f000 f9f6 bl 80018d0 - MX_ADC3_Init(); - 80014e4: f000 fa72 bl 80019cc - MX_COMP1_Init(); - 80014e8: f000 fae2 bl 8001ab0 - MX_COMP2_Init(); - 80014ec: f000 fb10 bl 8001b10 - MX_COMP4_Init(); - 80014f0: f000 fb3e bl 8001b70 - MX_COMP7_Init(); - 80014f4: f000 fb6c bl 8001bd0 - MX_I2C1_Init(); - 80014f8: f000 fb9a bl 8001c30 - MX_OPAMP1_Init(); - 80014fc: f000 fbd6 bl 8001cac - MX_OPAMP2_Init(); - 8001500: f000 fbfa bl 8001cf8 - MX_OPAMP3_Init(); - 8001504: f000 fc1e bl 8001d44 - MX_TIM1_Init(); - 8001508: f000 fc42 bl 8001d90 - MX_TIM3_Init(); - 800150c: f000 fcfa bl 8001f04 - MX_TIM4_Init(); - 8001510: f000 fd7e bl 8002010 - MX_USART3_UART_Init(); - 8001514: f000 fe12 bl 800213c - /* USER CODE BEGIN 2 */ - HAL_TIM_IC_Start_IT(&htim3, TIM_CHANNEL_1); - 8001518: 2100 movs r1, #0 - 800151a: 484c ldr r0, [pc, #304] ; (800164c ) - 800151c: f006 fa56 bl 80079cc - HAL_TIM_IC_Start_IT(&htim3, TIM_CHANNEL_2); - 8001520: 2104 movs r1, #4 - 8001522: 484a ldr r0, [pc, #296] ; (800164c ) - 8001524: f006 fa52 bl 80079cc - //Place to mess about with PWM in - - - HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED); - 8001528: 2100 movs r1, #0 - 800152a: 4849 ldr r0, [pc, #292] ; (8001650 ) - 800152c: f002 fb6c bl 8003c08 - HAL_ADCEx_Calibration_Start(&hadc2, ADC_SINGLE_ENDED); - 8001530: 2100 movs r1, #0 - 8001532: 4848 ldr r0, [pc, #288] ; (8001654 ) - 8001534: f002 fb68 bl 8003c08 - HAL_ADCEx_Calibration_Start(&hadc3, ADC_SINGLE_ENDED); - 8001538: 2100 movs r1, #0 - 800153a: 4847 ldr r0, [pc, #284] ; (8001658 ) - 800153c: f002 fb64 bl 8003c08 - HAL_Delay(3000); - 8001540: f640 30b8 movw r0, #3000 ; 0xbb8 - 8001544: f001 fd0e bl 8002f64 -quickHall=(GPIOB->IDR>>6)&0x7; - 8001548: 4b44 ldr r3, [pc, #272] ; (800165c ) - 800154a: 691b ldr r3, [r3, #16] - 800154c: 099b lsrs r3, r3, #6 - 800154e: f003 0307 and.w r3, r3, #7 - 8001552: 4a43 ldr r2, [pc, #268] ; (8001660 ) - 8001554: 6013 str r3, [r2, #0] - HAL_OPAMP_Init(&hopamp1); -*/ - - - - HAL_Delay(50); - 8001556: 2032 movs r0, #50 ; 0x32 - 8001558: f001 fd04 bl 8002f64 -HAL_OPAMP_Start(&hopamp1); - 800155c: 4841 ldr r0, [pc, #260] ; (8001664 ) - 800155e: f004 f893 bl 8005688 -HAL_OPAMP_Start(&hopamp2); - 8001562: 4841 ldr r0, [pc, #260] ; (8001668 ) - 8001564: f004 f890 bl 8005688 -HAL_OPAMP_Start(&hopamp3); - 8001568: 4840 ldr r0, [pc, #256] ; (800166c ) - 800156a: f004 f88d bl 8005688 - - -motor_init(); - 800156e: f7ff fe8d bl 800128c -hw_init(); - 8001572: f7ff fea9 bl 80012c8 -motor.Rphase=0.1; - 8001576: 4b3e ldr r3, [pc, #248] ; (8001670 ) - 8001578: 4a3e ldr r2, [pc, #248] ; (8001674 ) - 800157a: 601a str r2, [r3, #0] -BLDCInit(); - 800157c: f7ff fa46 bl 8000a0c -measurement_buffers.ADCOffset[0]=1900; - 8001580: 4b3d ldr r3, [pc, #244] ; (8001678 ) - 8001582: f240 726c movw r2, #1900 ; 0x76c - 8001586: 849a strh r2, [r3, #36] ; 0x24 -measurement_buffers.ADCOffset[1]=1900; - 8001588: 4b3b ldr r3, [pc, #236] ; (8001678 ) - 800158a: f240 726c movw r2, #1900 ; 0x76c - 800158e: 84da strh r2, [r3, #38] ; 0x26 -measurement_buffers.ADCOffset[2]=1900; - 8001590: 4b39 ldr r3, [pc, #228] ; (8001678 ) - 8001592: f240 726c movw r2, #1900 ; 0x76c - 8001596: 851a strh r2, [r3, #40] ; 0x28 - - - - - -HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1); - 8001598: 2100 movs r1, #0 - 800159a: 4838 ldr r0, [pc, #224] ; (800167c ) - 800159c: f006 f988 bl 80078b0 -HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_1); - 80015a0: 2100 movs r1, #0 - 80015a2: 4836 ldr r0, [pc, #216] ; (800167c ) - 80015a4: f007 fbc4 bl 8008d30 -__HAL_TIM_SET_COUNTER(&htim1,10); - 80015a8: 4b34 ldr r3, [pc, #208] ; (800167c ) - 80015aa: 681b ldr r3, [r3, #0] - 80015ac: 220a movs r2, #10 - 80015ae: 625a str r2, [r3, #36] ; 0x24 - -HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_2); - 80015b0: 2104 movs r1, #4 - 80015b2: 4832 ldr r0, [pc, #200] ; (800167c ) - 80015b4: f006 f97c bl 80078b0 -HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_2); - 80015b8: 2104 movs r1, #4 - 80015ba: 4830 ldr r0, [pc, #192] ; (800167c ) - 80015bc: f007 fbb8 bl 8008d30 -__HAL_TIM_SET_COUNTER(&htim1,10); - 80015c0: 4b2e ldr r3, [pc, #184] ; (800167c ) - 80015c2: 681b ldr r3, [r3, #0] - 80015c4: 220a movs r2, #10 - 80015c6: 625a str r2, [r3, #36] ; 0x24 - -HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3); - 80015c8: 2108 movs r1, #8 - 80015ca: 482c ldr r0, [pc, #176] ; (800167c ) - 80015cc: f006 f970 bl 80078b0 -HAL_TIMEx_PWMN_Start(&htim1, TIM_CHANNEL_3); - 80015d0: 2108 movs r1, #8 - 80015d2: 482a ldr r0, [pc, #168] ; (800167c ) - 80015d4: f007 fbac bl 8008d30 -__HAL_TIM_SET_COUNTER(&htim1,10); - 80015d8: 4b28 ldr r3, [pc, #160] ; (800167c ) - 80015da: 681b ldr r3, [r3, #0] - 80015dc: 220a movs r2, #10 - 80015de: 625a str r2, [r3, #36] ; 0x24 -/* -HAL_COMP_Start(&hcomp1); -HAL_COMP_Start(&hcomp2); -HAL_COMP_Start(&hcomp4); -HAL_COMP_Start(&hcomp7);*/ -__HAL_TIM_SET_COUNTER(&htim1,10); - 80015e0: 4b26 ldr r3, [pc, #152] ; (800167c ) - 80015e2: 681b ldr r3, [r3, #0] - 80015e4: 220a movs r2, #10 - 80015e6: 625a str r2, [r3, #36] ; 0x24 -HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&measurement_buffers.RawADC[0][0], 3); - 80015e8: 2203 movs r2, #3 - 80015ea: 4923 ldr r1, [pc, #140] ; (8001678 ) - 80015ec: 4818 ldr r0, [pc, #96] ; (8001650 ) - 80015ee: f001 fee3 bl 80033b8 -__HAL_TIM_SET_COUNTER(&htim1,10); - 80015f2: 4b22 ldr r3, [pc, #136] ; (800167c ) - 80015f4: 681b ldr r3, [r3, #0] - 80015f6: 220a movs r2, #10 - 80015f8: 625a str r2, [r3, #36] ; 0x24 - -HAL_ADC_Start_DMA(&hadc2, (uint32_t*)&measurement_buffers.RawADC[1][0], 3); - 80015fa: 2203 movs r2, #3 - 80015fc: 4920 ldr r1, [pc, #128] ; (8001680 ) - 80015fe: 4815 ldr r0, [pc, #84] ; (8001654 ) - 8001600: f001 feda bl 80033b8 -__HAL_TIM_SET_COUNTER(&htim1,10); - 8001604: 4b1d ldr r3, [pc, #116] ; (800167c ) - 8001606: 681b ldr r3, [r3, #0] - 8001608: 220a movs r2, #10 - 800160a: 625a str r2, [r3, #36] ; 0x24 - -HAL_ADC_Start_DMA(&hadc3, (uint32_t*)&measurement_buffers.RawADC[2][0], 1); - 800160c: 2201 movs r2, #1 - 800160e: 491d ldr r1, [pc, #116] ; (8001684 ) - 8001610: 4811 ldr r0, [pc, #68] ; (8001658 ) - 8001612: f001 fed1 bl 80033b8 -//Here we can init the measurement buffer offsets; ADC and timer and interrupts are running... -HAL_Delay(100); - 8001616: 2064 movs r0, #100 ; 0x64 - 8001618: f001 fca4 bl 8002f64 -initing=0; - 800161c: 4b1a ldr r3, [pc, #104] ; (8001688 ) - 800161e: 2200 movs r2, #0 - 8001620: 601a str r2, [r3, #0] - -__HAL_TIM_MOE_ENABLE(&htim1); // initialising the comparators triggers the break state - 8001622: 4b16 ldr r3, [pc, #88] ; (800167c ) - 8001624: 681b ldr r3, [r3, #0] - 8001626: 6c5a ldr r2, [r3, #68] ; 0x44 - 8001628: 4b14 ldr r3, [pc, #80] ; (800167c ) - 800162a: 681b ldr r3, [r3, #0] - 800162c: f442 4200 orr.w r2, r2, #32768 ; 0x8000 - 8001630: 645a str r2, [r3, #68] ; 0x44 - -BLDCVars.BLDCduty=70; - 8001632: 4b16 ldr r3, [pc, #88] ; (800168c ) - 8001634: 2246 movs r2, #70 ; 0x46 - 8001636: 605a str r2, [r3, #4] - - - - //Add a little area in which I can mess about without the RTOS -while(1){ - HAL_Delay(100); - 8001638: 2064 movs r0, #100 ; 0x64 - 800163a: f001 fc93 bl 8002f64 - HAL_UART_Transmit(&huart3, "HelloWorld\r", 12, 10); - 800163e: 230a movs r3, #10 - 8001640: 220c movs r2, #12 - 8001642: 4913 ldr r1, [pc, #76] ; (8001690 ) - 8001644: 4813 ldr r0, [pc, #76] ; (8001694 ) - 8001646: f007 fd32 bl 80090ae - HAL_Delay(100); - 800164a: e7f5 b.n 8001638 - 800164c: 200008a0 .word 0x200008a0 - 8001650: 20000944 .word 0x20000944 - 8001654: 200006d4 .word 0x200006d4 - 8001658: 20000994 .word 0x20000994 - 800165c: 48000400 .word 0x48000400 - 8001660: 20000058 .word 0x20000058 - 8001664: 200008e0 .word 0x200008e0 - 8001668: 2000059c .word 0x2000059c - 800166c: 2000083c .word 0x2000083c - 8001670: 20000560 .word 0x20000560 - 8001674: 3dcccccd .word 0x3dcccccd - 8001678: 200004ec .word 0x200004ec - 800167c: 20000a60 .word 0x20000a60 - 8001680: 200004f8 .word 0x200004f8 - 8001684: 20000504 .word 0x20000504 - 8001688: 20000004 .word 0x20000004 - 800168c: 20000540 .word 0x20000540 - 8001690: 0800bf24 .word 0x0800bf24 - 8001694: 20000654 .word 0x20000654 - -08001698 : -/** - * @brief System Clock Configuration - * @retval None - */ -void SystemClock_Config(void) -{ - 8001698: b580 push {r7, lr} - 800169a: b09e sub sp, #120 ; 0x78 - 800169c: af00 add r7, sp, #0 - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 800169e: f107 0350 add.w r3, r7, #80 ; 0x50 - 80016a2: 2228 movs r2, #40 ; 0x28 - 80016a4: 2100 movs r1, #0 - 80016a6: 4618 mov r0, r3 - 80016a8: f00a fc0c bl 800bec4 - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 80016ac: f107 033c add.w r3, r7, #60 ; 0x3c - 80016b0: 2200 movs r2, #0 - 80016b2: 601a str r2, [r3, #0] - 80016b4: 605a str r2, [r3, #4] - 80016b6: 609a str r2, [r3, #8] - 80016b8: 60da str r2, [r3, #12] - 80016ba: 611a str r2, [r3, #16] - RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 80016bc: 463b mov r3, r7 - 80016be: 223c movs r2, #60 ; 0x3c - 80016c0: 2100 movs r1, #0 - 80016c2: 4618 mov r0, r3 - 80016c4: f00a fbfe bl 800bec4 - - /** Initializes the RCC Oscillators according to the specified parameters - * in the RCC_OscInitTypeDef structure. - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE; - 80016c8: 2303 movs r3, #3 - 80016ca: 653b str r3, [r7, #80] ; 0x50 - RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; - 80016cc: f44f 23a0 mov.w r3, #327680 ; 0x50000 - 80016d0: 657b str r3, [r7, #84] ; 0x54 - RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; - 80016d2: 2300 movs r3, #0 - 80016d4: 65bb str r3, [r7, #88] ; 0x58 - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 80016d6: 2301 movs r3, #1 - 80016d8: 663b str r3, [r7, #96] ; 0x60 - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 80016da: 2310 movs r3, #16 - 80016dc: 667b str r3, [r7, #100] ; 0x64 - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 80016de: 2302 movs r3, #2 - 80016e0: 66fb str r3, [r7, #108] ; 0x6c - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 80016e2: f44f 3380 mov.w r3, #65536 ; 0x10000 - 80016e6: 673b str r3, [r7, #112] ; 0x70 - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; - 80016e8: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000 - 80016ec: 677b str r3, [r7, #116] ; 0x74 - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 80016ee: f107 0350 add.w r3, r7, #80 ; 0x50 - 80016f2: 4618 mov r0, r3 - 80016f4: f004 fd3a bl 800616c - 80016f8: 4603 mov r3, r0 - 80016fa: 2b00 cmp r3, #0 - 80016fc: d001 beq.n 8001702 - { - Error_Handler(); - 80016fe: f000 fde9 bl 80022d4 - } - /** Initializes the CPU, AHB and APB buses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8001702: 230f movs r3, #15 - 8001704: 63fb str r3, [r7, #60] ; 0x3c - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 8001706: 2302 movs r3, #2 - 8001708: 643b str r3, [r7, #64] ; 0x40 - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 800170a: 2300 movs r3, #0 - 800170c: 647b str r3, [r7, #68] ; 0x44 - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - 800170e: f44f 6380 mov.w r3, #1024 ; 0x400 - 8001712: 64bb str r3, [r7, #72] ; 0x48 - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 8001714: 2300 movs r3, #0 - 8001716: 64fb str r3, [r7, #76] ; 0x4c - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) - 8001718: f107 033c add.w r3, r7, #60 ; 0x3c - 800171c: 2102 movs r1, #2 - 800171e: 4618 mov r0, r3 - 8001720: f005 fc2c bl 8006f7c - 8001724: 4603 mov r3, r0 - 8001726: 2b00 cmp r3, #0 - 8001728: d001 beq.n 800172e - { - Error_Handler(); - 800172a: f000 fdd3 bl 80022d4 - } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB|RCC_PERIPHCLK_USART3 - 800172e: 4b0e ldr r3, [pc, #56] ; (8001768 ) - 8001730: 603b str r3, [r7, #0] - |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_TIM1 - |RCC_PERIPHCLK_ADC12|RCC_PERIPHCLK_ADC34; - PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; - 8001732: 2300 movs r3, #0 - 8001734: 613b str r3, [r7, #16] - PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1; - 8001736: f44f 7380 mov.w r3, #256 ; 0x100 - 800173a: 627b str r3, [r7, #36] ; 0x24 - PeriphClkInit.Adc34ClockSelection = RCC_ADC34PLLCLK_DIV1; - 800173c: f44f 5300 mov.w r3, #8192 ; 0x2000 - 8001740: 62bb str r3, [r7, #40] ; 0x28 - PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI; - 8001742: 2300 movs r3, #0 - 8001744: 61fb str r3, [r7, #28] - PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; - 8001746: 2300 movs r3, #0 - 8001748: 63bb str r3, [r7, #56] ; 0x38 - PeriphClkInit.Tim1ClockSelection = RCC_TIM1CLK_HCLK; - 800174a: 2300 movs r3, #0 - 800174c: 633b str r3, [r7, #48] ; 0x30 - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 800174e: 463b mov r3, r7 - 8001750: 4618 mov r0, r3 - 8001752: f005 fe7b bl 800744c - 8001756: 4603 mov r3, r0 - 8001758: 2b00 cmp r3, #0 - 800175a: d001 beq.n 8001760 - { - Error_Handler(); - 800175c: f000 fdba bl 80022d4 - } -} - 8001760: bf00 nop - 8001762: 3778 adds r7, #120 ; 0x78 - 8001764: 46bd mov sp, r7 - 8001766: bd80 pop {r7, pc} - 8001768: 000211a4 .word 0x000211a4 - -0800176c : - * @brief ADC1 Initialization Function - * @param None - * @retval None - */ -static void MX_ADC1_Init(void) -{ - 800176c: b580 push {r7, lr} - 800176e: b090 sub sp, #64 ; 0x40 - 8001770: af00 add r7, sp, #0 - - /* USER CODE BEGIN ADC1_Init 0 */ - - /* USER CODE END ADC1_Init 0 */ - - ADC_MultiModeTypeDef multimode = {0}; - 8001772: f107 0334 add.w r3, r7, #52 ; 0x34 - 8001776: 2200 movs r2, #0 - 8001778: 601a str r2, [r3, #0] - 800177a: 605a str r2, [r3, #4] - 800177c: 609a str r2, [r3, #8] - ADC_AnalogWDGConfTypeDef AnalogWDGConfig = {0}; - 800177e: f107 031c add.w r3, r7, #28 - 8001782: 2200 movs r2, #0 - 8001784: 601a str r2, [r3, #0] - 8001786: 605a str r2, [r3, #4] - 8001788: 609a str r2, [r3, #8] - 800178a: 60da str r2, [r3, #12] - 800178c: 611a str r2, [r3, #16] - 800178e: 615a str r2, [r3, #20] - ADC_ChannelConfTypeDef sConfig = {0}; - 8001790: 1d3b adds r3, r7, #4 - 8001792: 2200 movs r2, #0 - 8001794: 601a str r2, [r3, #0] - 8001796: 605a str r2, [r3, #4] - 8001798: 609a str r2, [r3, #8] - 800179a: 60da str r2, [r3, #12] - 800179c: 611a str r2, [r3, #16] - 800179e: 615a str r2, [r3, #20] - /* USER CODE BEGIN ADC1_Init 1 */ - - /* USER CODE END ADC1_Init 1 */ - /** Common config - */ - hadc1.Instance = ADC1; - 80017a0: 4b4a ldr r3, [pc, #296] ; (80018cc ) - 80017a2: f04f 42a0 mov.w r2, #1342177280 ; 0x50000000 - 80017a6: 601a str r2, [r3, #0] - hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; - 80017a8: 4b48 ldr r3, [pc, #288] ; (80018cc ) - 80017aa: 2200 movs r2, #0 - 80017ac: 605a str r2, [r3, #4] - hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 80017ae: 4b47 ldr r3, [pc, #284] ; (80018cc ) - 80017b0: 2200 movs r2, #0 - 80017b2: 609a str r2, [r3, #8] - hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 80017b4: 4b45 ldr r3, [pc, #276] ; (80018cc ) - 80017b6: 2201 movs r2, #1 - 80017b8: 611a str r2, [r3, #16] - hadc1.Init.ContinuousConvMode = DISABLE; - 80017ba: 4b44 ldr r3, [pc, #272] ; (80018cc ) - 80017bc: 2200 movs r2, #0 - 80017be: 765a strb r2, [r3, #25] - hadc1.Init.DiscontinuousConvMode = DISABLE; - 80017c0: 4b42 ldr r3, [pc, #264] ; (80018cc ) - 80017c2: 2200 movs r2, #0 - 80017c4: f883 2020 strb.w r2, [r3, #32] - hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_FALLING; - 80017c8: 4b40 ldr r3, [pc, #256] ; (80018cc ) - 80017ca: f44f 6200 mov.w r2, #2048 ; 0x800 - 80017ce: 62da str r2, [r3, #44] ; 0x2c - hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_TRGO; - 80017d0: 4b3e ldr r3, [pc, #248] ; (80018cc ) - 80017d2: f44f 7210 mov.w r2, #576 ; 0x240 - 80017d6: 629a str r2, [r3, #40] ; 0x28 - hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 80017d8: 4b3c ldr r3, [pc, #240] ; (80018cc ) - 80017da: 2200 movs r2, #0 - 80017dc: 60da str r2, [r3, #12] - hadc1.Init.NbrOfConversion = 3; - 80017de: 4b3b ldr r3, [pc, #236] ; (80018cc ) - 80017e0: 2203 movs r2, #3 - 80017e2: 61da str r2, [r3, #28] - hadc1.Init.DMAContinuousRequests = ENABLE; - 80017e4: 4b39 ldr r3, [pc, #228] ; (80018cc ) - 80017e6: 2201 movs r2, #1 - 80017e8: f883 2030 strb.w r2, [r3, #48] ; 0x30 - hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 80017ec: 4b37 ldr r3, [pc, #220] ; (80018cc ) - 80017ee: 2204 movs r2, #4 - 80017f0: 615a str r2, [r3, #20] - hadc1.Init.LowPowerAutoWait = DISABLE; - 80017f2: 4b36 ldr r3, [pc, #216] ; (80018cc ) - 80017f4: 2200 movs r2, #0 - 80017f6: 761a strb r2, [r3, #24] - hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; - 80017f8: 4b34 ldr r3, [pc, #208] ; (80018cc ) - 80017fa: 2200 movs r2, #0 - 80017fc: 635a str r2, [r3, #52] ; 0x34 - if (HAL_ADC_Init(&hadc1) != HAL_OK) - 80017fe: 4833 ldr r0, [pc, #204] ; (80018cc ) - 8001800: f001 fbfa bl 8002ff8 - 8001804: 4603 mov r3, r0 - 8001806: 2b00 cmp r3, #0 - 8001808: d001 beq.n 800180e - { - Error_Handler(); - 800180a: f000 fd63 bl 80022d4 - } - /** Configure the ADC multi-mode - */ - multimode.Mode = ADC_MODE_INDEPENDENT; - 800180e: 2300 movs r3, #0 - 8001810: 637b str r3, [r7, #52] ; 0x34 - if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) - 8001812: f107 0334 add.w r3, r7, #52 ; 0x34 - 8001816: 4619 mov r1, r3 - 8001818: 482c ldr r0, [pc, #176] ; (80018cc ) - 800181a: f002 fec3 bl 80045a4 - 800181e: 4603 mov r3, r0 - 8001820: 2b00 cmp r3, #0 - 8001822: d001 beq.n 8001828 - { - Error_Handler(); - 8001824: f000 fd56 bl 80022d4 - } - /** Configure Analog WatchDog 1 - */ - AnalogWDGConfig.WatchdogNumber = ADC_ANALOGWATCHDOG_1; - 8001828: 2301 movs r3, #1 - 800182a: 61fb str r3, [r7, #28] - AnalogWDGConfig.WatchdogMode = ADC_ANALOGWATCHDOG_SINGLE_REG; - 800182c: f44f 0340 mov.w r3, #12582912 ; 0xc00000 - 8001830: 623b str r3, [r7, #32] - AnalogWDGConfig.HighThreshold = 0; - 8001832: 2300 movs r3, #0 - 8001834: 62fb str r3, [r7, #44] ; 0x2c - AnalogWDGConfig.LowThreshold = 0; - 8001836: 2300 movs r3, #0 - 8001838: 633b str r3, [r7, #48] ; 0x30 - AnalogWDGConfig.Channel = ADC_CHANNEL_1; - 800183a: 2301 movs r3, #1 - 800183c: 627b str r3, [r7, #36] ; 0x24 - AnalogWDGConfig.ITMode = DISABLE; - 800183e: 2300 movs r3, #0 - 8001840: f887 3028 strb.w r3, [r7, #40] ; 0x28 - if (HAL_ADC_AnalogWDGConfig(&hadc1, &AnalogWDGConfig) != HAL_OK) - 8001844: f107 031c add.w r3, r7, #28 - 8001848: 4619 mov r1, r3 - 800184a: 4820 ldr r0, [pc, #128] ; (80018cc ) - 800184c: f002 fd5a bl 8004304 - 8001850: 4603 mov r3, r0 - 8001852: 2b00 cmp r3, #0 - 8001854: d001 beq.n 800185a - { - Error_Handler(); - 8001856: f000 fd3d bl 80022d4 - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_3; - 800185a: 2303 movs r3, #3 - 800185c: 607b str r3, [r7, #4] - sConfig.Rank = ADC_REGULAR_RANK_1; - 800185e: 2301 movs r3, #1 - 8001860: 60bb str r3, [r7, #8] - sConfig.SingleDiff = ADC_SINGLE_ENDED; - 8001862: 2300 movs r3, #0 - 8001864: 613b str r3, [r7, #16] - sConfig.SamplingTime = ADC_SAMPLETIME_61CYCLES_5; - 8001866: 2305 movs r3, #5 - 8001868: 60fb str r3, [r7, #12] - sConfig.OffsetNumber = ADC_OFFSET_NONE; - 800186a: 2300 movs r3, #0 - 800186c: 617b str r3, [r7, #20] - sConfig.Offset = 0; - 800186e: 2300 movs r3, #0 - 8001870: 61bb str r3, [r7, #24] - if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001872: 1d3b adds r3, r7, #4 - 8001874: 4619 mov r1, r3 - 8001876: 4815 ldr r0, [pc, #84] ; (80018cc ) - 8001878: f002 fa58 bl 8003d2c - 800187c: 4603 mov r3, r0 - 800187e: 2b00 cmp r3, #0 - 8001880: d001 beq.n 8001886 - { - Error_Handler(); - 8001882: f000 fd27 bl 80022d4 - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_1; - 8001886: 2301 movs r3, #1 - 8001888: 607b str r3, [r7, #4] - sConfig.Rank = ADC_REGULAR_RANK_2; - 800188a: 2302 movs r3, #2 - 800188c: 60bb str r3, [r7, #8] - if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 800188e: 1d3b adds r3, r7, #4 - 8001890: 4619 mov r1, r3 - 8001892: 480e ldr r0, [pc, #56] ; (80018cc ) - 8001894: f002 fa4a bl 8003d2c - 8001898: 4603 mov r3, r0 - 800189a: 2b00 cmp r3, #0 - 800189c: d001 beq.n 80018a2 - { - Error_Handler(); - 800189e: f000 fd19 bl 80022d4 - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_4; - 80018a2: 2304 movs r3, #4 - 80018a4: 607b str r3, [r7, #4] - sConfig.Rank = ADC_REGULAR_RANK_3; - 80018a6: 2303 movs r3, #3 - 80018a8: 60bb str r3, [r7, #8] - sConfig.SamplingTime = ADC_SAMPLETIME_4CYCLES_5; - 80018aa: 2302 movs r3, #2 - 80018ac: 60fb str r3, [r7, #12] - if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 80018ae: 1d3b adds r3, r7, #4 - 80018b0: 4619 mov r1, r3 - 80018b2: 4806 ldr r0, [pc, #24] ; (80018cc ) - 80018b4: f002 fa3a bl 8003d2c - 80018b8: 4603 mov r3, r0 - 80018ba: 2b00 cmp r3, #0 - 80018bc: d001 beq.n 80018c2 - { - Error_Handler(); - 80018be: f000 fd09 bl 80022d4 - } - /* USER CODE BEGIN ADC1_Init 2 */ - - /* USER CODE END ADC1_Init 2 */ - -} - 80018c2: bf00 nop - 80018c4: 3740 adds r7, #64 ; 0x40 - 80018c6: 46bd mov sp, r7 - 80018c8: bd80 pop {r7, pc} - 80018ca: bf00 nop - 80018cc: 20000944 .word 0x20000944 - -080018d0 : - * @brief ADC2 Initialization Function - * @param None - * @retval None - */ -static void MX_ADC2_Init(void) -{ - 80018d0: b580 push {r7, lr} - 80018d2: b086 sub sp, #24 - 80018d4: af00 add r7, sp, #0 - - /* USER CODE BEGIN ADC2_Init 0 */ - - /* USER CODE END ADC2_Init 0 */ - - ADC_ChannelConfTypeDef sConfig = {0}; - 80018d6: 463b mov r3, r7 - 80018d8: 2200 movs r2, #0 - 80018da: 601a str r2, [r3, #0] - 80018dc: 605a str r2, [r3, #4] - 80018de: 609a str r2, [r3, #8] - 80018e0: 60da str r2, [r3, #12] - 80018e2: 611a str r2, [r3, #16] - 80018e4: 615a str r2, [r3, #20] - /* USER CODE BEGIN ADC2_Init 1 */ - - /* USER CODE END ADC2_Init 1 */ - /** Common config - */ - hadc2.Instance = ADC2; - 80018e6: 4b37 ldr r3, [pc, #220] ; (80019c4 ) - 80018e8: 4a37 ldr r2, [pc, #220] ; (80019c8 ) - 80018ea: 601a str r2, [r3, #0] - hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; - 80018ec: 4b35 ldr r3, [pc, #212] ; (80019c4 ) - 80018ee: 2200 movs r2, #0 - 80018f0: 605a str r2, [r3, #4] - hadc2.Init.Resolution = ADC_RESOLUTION_12B; - 80018f2: 4b34 ldr r3, [pc, #208] ; (80019c4 ) - 80018f4: 2200 movs r2, #0 - 80018f6: 609a str r2, [r3, #8] - hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE; - 80018f8: 4b32 ldr r3, [pc, #200] ; (80019c4 ) - 80018fa: 2201 movs r2, #1 - 80018fc: 611a str r2, [r3, #16] - hadc2.Init.ContinuousConvMode = DISABLE; - 80018fe: 4b31 ldr r3, [pc, #196] ; (80019c4 ) - 8001900: 2200 movs r2, #0 - 8001902: 765a strb r2, [r3, #25] - hadc2.Init.DiscontinuousConvMode = DISABLE; - 8001904: 4b2f ldr r3, [pc, #188] ; (80019c4 ) - 8001906: 2200 movs r2, #0 - 8001908: f883 2020 strb.w r2, [r3, #32] - hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_FALLING; - 800190c: 4b2d ldr r3, [pc, #180] ; (80019c4 ) - 800190e: f44f 6200 mov.w r2, #2048 ; 0x800 - 8001912: 62da str r2, [r3, #44] ; 0x2c - hadc2.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_TRGO; - 8001914: 4b2b ldr r3, [pc, #172] ; (80019c4 ) - 8001916: f44f 7210 mov.w r2, #576 ; 0x240 - 800191a: 629a str r2, [r3, #40] ; 0x28 - hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 800191c: 4b29 ldr r3, [pc, #164] ; (80019c4 ) - 800191e: 2200 movs r2, #0 - 8001920: 60da str r2, [r3, #12] - hadc2.Init.NbrOfConversion = 3; - 8001922: 4b28 ldr r3, [pc, #160] ; (80019c4 ) - 8001924: 2203 movs r2, #3 - 8001926: 61da str r2, [r3, #28] - hadc2.Init.DMAContinuousRequests = ENABLE; - 8001928: 4b26 ldr r3, [pc, #152] ; (80019c4 ) - 800192a: 2201 movs r2, #1 - 800192c: f883 2030 strb.w r2, [r3, #48] ; 0x30 - hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV; - 8001930: 4b24 ldr r3, [pc, #144] ; (80019c4 ) - 8001932: 2208 movs r2, #8 - 8001934: 615a str r2, [r3, #20] - hadc2.Init.LowPowerAutoWait = DISABLE; - 8001936: 4b23 ldr r3, [pc, #140] ; (80019c4 ) - 8001938: 2200 movs r2, #0 - 800193a: 761a strb r2, [r3, #24] - hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; - 800193c: 4b21 ldr r3, [pc, #132] ; (80019c4 ) - 800193e: 2200 movs r2, #0 - 8001940: 635a str r2, [r3, #52] ; 0x34 - if (HAL_ADC_Init(&hadc2) != HAL_OK) - 8001942: 4820 ldr r0, [pc, #128] ; (80019c4 ) - 8001944: f001 fb58 bl 8002ff8 - 8001948: 4603 mov r3, r0 - 800194a: 2b00 cmp r3, #0 - 800194c: d001 beq.n 8001952 - { - Error_Handler(); - 800194e: f000 fcc1 bl 80022d4 - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_3; - 8001952: 2303 movs r3, #3 - 8001954: 603b str r3, [r7, #0] - sConfig.Rank = ADC_REGULAR_RANK_1; - 8001956: 2301 movs r3, #1 - 8001958: 607b str r3, [r7, #4] - sConfig.SingleDiff = ADC_SINGLE_ENDED; - 800195a: 2300 movs r3, #0 - 800195c: 60fb str r3, [r7, #12] - sConfig.SamplingTime = ADC_SAMPLETIME_61CYCLES_5; - 800195e: 2305 movs r3, #5 - 8001960: 60bb str r3, [r7, #8] - sConfig.OffsetNumber = ADC_OFFSET_NONE; - 8001962: 2300 movs r3, #0 - 8001964: 613b str r3, [r7, #16] - sConfig.Offset = 0; - 8001966: 2300 movs r3, #0 - 8001968: 617b str r3, [r7, #20] - if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - 800196a: 463b mov r3, r7 - 800196c: 4619 mov r1, r3 - 800196e: 4815 ldr r0, [pc, #84] ; (80019c4 ) - 8001970: f002 f9dc bl 8003d2c - 8001974: 4603 mov r3, r0 - 8001976: 2b00 cmp r3, #0 - 8001978: d001 beq.n 800197e - { - Error_Handler(); - 800197a: f000 fcab bl 80022d4 - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_1; - 800197e: 2301 movs r3, #1 - 8001980: 603b str r3, [r7, #0] - sConfig.Rank = ADC_REGULAR_RANK_2; - 8001982: 2302 movs r3, #2 - 8001984: 607b str r3, [r7, #4] - sConfig.SamplingTime = ADC_SAMPLETIME_4CYCLES_5; - 8001986: 2302 movs r3, #2 - 8001988: 60bb str r3, [r7, #8] - if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - 800198a: 463b mov r3, r7 - 800198c: 4619 mov r1, r3 - 800198e: 480d ldr r0, [pc, #52] ; (80019c4 ) - 8001990: f002 f9cc bl 8003d2c - 8001994: 4603 mov r3, r0 - 8001996: 2b00 cmp r3, #0 - 8001998: d001 beq.n 800199e - { - Error_Handler(); - 800199a: f000 fc9b bl 80022d4 - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_2; - 800199e: 2302 movs r3, #2 - 80019a0: 603b str r3, [r7, #0] - sConfig.Rank = ADC_REGULAR_RANK_3; - 80019a2: 2303 movs r3, #3 - 80019a4: 607b str r3, [r7, #4] - if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - 80019a6: 463b mov r3, r7 - 80019a8: 4619 mov r1, r3 - 80019aa: 4806 ldr r0, [pc, #24] ; (80019c4 ) - 80019ac: f002 f9be bl 8003d2c - 80019b0: 4603 mov r3, r0 - 80019b2: 2b00 cmp r3, #0 - 80019b4: d001 beq.n 80019ba - { - Error_Handler(); - 80019b6: f000 fc8d bl 80022d4 - } - /* USER CODE BEGIN ADC2_Init 2 */ - - /* USER CODE END ADC2_Init 2 */ - -} - 80019ba: bf00 nop - 80019bc: 3718 adds r7, #24 - 80019be: 46bd mov sp, r7 - 80019c0: bd80 pop {r7, pc} - 80019c2: bf00 nop - 80019c4: 200006d4 .word 0x200006d4 - 80019c8: 50000100 .word 0x50000100 - -080019cc : - * @brief ADC3 Initialization Function - * @param None - * @retval None - */ -static void MX_ADC3_Init(void) -{ - 80019cc: b580 push {r7, lr} - 80019ce: b08a sub sp, #40 ; 0x28 - 80019d0: af00 add r7, sp, #0 - - /* USER CODE BEGIN ADC3_Init 0 */ - - /* USER CODE END ADC3_Init 0 */ - - ADC_MultiModeTypeDef multimode = {0}; - 80019d2: f107 031c add.w r3, r7, #28 - 80019d6: 2200 movs r2, #0 - 80019d8: 601a str r2, [r3, #0] - 80019da: 605a str r2, [r3, #4] - 80019dc: 609a str r2, [r3, #8] - ADC_ChannelConfTypeDef sConfig = {0}; - 80019de: 1d3b adds r3, r7, #4 - 80019e0: 2200 movs r2, #0 - 80019e2: 601a str r2, [r3, #0] - 80019e4: 605a str r2, [r3, #4] - 80019e6: 609a str r2, [r3, #8] - 80019e8: 60da str r2, [r3, #12] - 80019ea: 611a str r2, [r3, #16] - 80019ec: 615a str r2, [r3, #20] - /* USER CODE BEGIN ADC3_Init 1 */ - - /* USER CODE END ADC3_Init 1 */ - /** Common config - */ - hadc3.Instance = ADC3; - 80019ee: 4b2e ldr r3, [pc, #184] ; (8001aa8 ) - 80019f0: 4a2e ldr r2, [pc, #184] ; (8001aac ) - 80019f2: 601a str r2, [r3, #0] - hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; - 80019f4: 4b2c ldr r3, [pc, #176] ; (8001aa8 ) - 80019f6: 2200 movs r2, #0 - 80019f8: 605a str r2, [r3, #4] - hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 80019fa: 4b2b ldr r3, [pc, #172] ; (8001aa8 ) - 80019fc: 2200 movs r2, #0 - 80019fe: 609a str r2, [r3, #8] - hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 8001a00: 4b29 ldr r3, [pc, #164] ; (8001aa8 ) - 8001a02: 2200 movs r2, #0 - 8001a04: 611a str r2, [r3, #16] - hadc3.Init.ContinuousConvMode = DISABLE; - 8001a06: 4b28 ldr r3, [pc, #160] ; (8001aa8 ) - 8001a08: 2200 movs r2, #0 - 8001a0a: 765a strb r2, [r3, #25] - hadc3.Init.DiscontinuousConvMode = DISABLE; - 8001a0c: 4b26 ldr r3, [pc, #152] ; (8001aa8 ) - 8001a0e: 2200 movs r2, #0 - 8001a10: f883 2020 strb.w r2, [r3, #32] - hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_FALLING; - 8001a14: 4b24 ldr r3, [pc, #144] ; (8001aa8 ) - 8001a16: f44f 6200 mov.w r2, #2048 ; 0x800 - 8001a1a: 62da str r2, [r3, #44] ; 0x2c - hadc3.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_TRGO; - 8001a1c: 4b22 ldr r3, [pc, #136] ; (8001aa8 ) - 8001a1e: f44f 7210 mov.w r2, #576 ; 0x240 - 8001a22: 629a str r2, [r3, #40] ; 0x28 - hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001a24: 4b20 ldr r3, [pc, #128] ; (8001aa8 ) - 8001a26: 2200 movs r2, #0 - 8001a28: 60da str r2, [r3, #12] - hadc3.Init.NbrOfConversion = 1; - 8001a2a: 4b1f ldr r3, [pc, #124] ; (8001aa8 ) - 8001a2c: 2201 movs r2, #1 - 8001a2e: 61da str r2, [r3, #28] - hadc3.Init.DMAContinuousRequests = ENABLE; - 8001a30: 4b1d ldr r3, [pc, #116] ; (8001aa8 ) - 8001a32: 2201 movs r2, #1 - 8001a34: f883 2030 strb.w r2, [r3, #48] ; 0x30 - hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV; - 8001a38: 4b1b ldr r3, [pc, #108] ; (8001aa8 ) - 8001a3a: 2208 movs r2, #8 - 8001a3c: 615a str r2, [r3, #20] - hadc3.Init.LowPowerAutoWait = DISABLE; - 8001a3e: 4b1a ldr r3, [pc, #104] ; (8001aa8 ) - 8001a40: 2200 movs r2, #0 - 8001a42: 761a strb r2, [r3, #24] - hadc3.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; - 8001a44: 4b18 ldr r3, [pc, #96] ; (8001aa8 ) - 8001a46: 2200 movs r2, #0 - 8001a48: 635a str r2, [r3, #52] ; 0x34 - if (HAL_ADC_Init(&hadc3) != HAL_OK) - 8001a4a: 4817 ldr r0, [pc, #92] ; (8001aa8 ) - 8001a4c: f001 fad4 bl 8002ff8 - 8001a50: 4603 mov r3, r0 - 8001a52: 2b00 cmp r3, #0 - 8001a54: d001 beq.n 8001a5a - { - Error_Handler(); - 8001a56: f000 fc3d bl 80022d4 - } - /** Configure the ADC multi-mode - */ - multimode.Mode = ADC_MODE_INDEPENDENT; - 8001a5a: 2300 movs r3, #0 - 8001a5c: 61fb str r3, [r7, #28] - if (HAL_ADCEx_MultiModeConfigChannel(&hadc3, &multimode) != HAL_OK) - 8001a5e: f107 031c add.w r3, r7, #28 - 8001a62: 4619 mov r1, r3 - 8001a64: 4810 ldr r0, [pc, #64] ; (8001aa8 ) - 8001a66: f002 fd9d bl 80045a4 - 8001a6a: 4603 mov r3, r0 - 8001a6c: 2b00 cmp r3, #0 - 8001a6e: d001 beq.n 8001a74 - { - Error_Handler(); - 8001a70: f000 fc30 bl 80022d4 - } - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_1; - 8001a74: 2301 movs r3, #1 - 8001a76: 607b str r3, [r7, #4] - sConfig.Rank = ADC_REGULAR_RANK_1; - 8001a78: 2301 movs r3, #1 - 8001a7a: 60bb str r3, [r7, #8] - sConfig.SingleDiff = ADC_SINGLE_ENDED; - 8001a7c: 2300 movs r3, #0 - 8001a7e: 613b str r3, [r7, #16] - sConfig.SamplingTime = ADC_SAMPLETIME_61CYCLES_5; - 8001a80: 2305 movs r3, #5 - 8001a82: 60fb str r3, [r7, #12] - sConfig.OffsetNumber = ADC_OFFSET_NONE; - 8001a84: 2300 movs r3, #0 - 8001a86: 617b str r3, [r7, #20] - sConfig.Offset = 0; - 8001a88: 2300 movs r3, #0 - 8001a8a: 61bb str r3, [r7, #24] - if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 8001a8c: 1d3b adds r3, r7, #4 - 8001a8e: 4619 mov r1, r3 - 8001a90: 4805 ldr r0, [pc, #20] ; (8001aa8 ) - 8001a92: f002 f94b bl 8003d2c - 8001a96: 4603 mov r3, r0 - 8001a98: 2b00 cmp r3, #0 - 8001a9a: d001 beq.n 8001aa0 - { - Error_Handler(); - 8001a9c: f000 fc1a bl 80022d4 - } - /* USER CODE BEGIN ADC3_Init 2 */ - - /* USER CODE END ADC3_Init 2 */ - -} - 8001aa0: bf00 nop - 8001aa2: 3728 adds r7, #40 ; 0x28 - 8001aa4: 46bd mov sp, r7 - 8001aa6: bd80 pop {r7, pc} - 8001aa8: 20000994 .word 0x20000994 - 8001aac: 50000400 .word 0x50000400 - -08001ab0 : - * @brief COMP1 Initialization Function - * @param None - * @retval None - */ -static void MX_COMP1_Init(void) -{ - 8001ab0: b580 push {r7, lr} - 8001ab2: af00 add r7, sp, #0 - /* USER CODE END COMP1_Init 0 */ - - /* USER CODE BEGIN COMP1_Init 1 */ - - /* USER CODE END COMP1_Init 1 */ - hcomp1.Instance = COMP1; - 8001ab4: 4b14 ldr r3, [pc, #80] ; (8001b08 ) - 8001ab6: 4a15 ldr r2, [pc, #84] ; (8001b0c ) - 8001ab8: 601a str r2, [r3, #0] - hcomp1.Init.InvertingInput = COMP_INVERTINGINPUT_1_4VREFINT; - 8001aba: 4b13 ldr r3, [pc, #76] ; (8001b08 ) - 8001abc: 2200 movs r2, #0 - 8001abe: 605a str r2, [r3, #4] - hcomp1.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; - 8001ac0: 4b11 ldr r3, [pc, #68] ; (8001b08 ) - 8001ac2: 2200 movs r2, #0 - 8001ac4: 609a str r2, [r3, #8] - hcomp1.Init.Output = COMP_OUTPUT_TIM1BKIN2; - 8001ac6: 4b10 ldr r3, [pc, #64] ; (8001b08 ) - 8001ac8: f640 027f movw r2, #2175 ; 0x87f - 8001acc: 60da str r2, [r3, #12] - hcomp1.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; - 8001ace: 4b0e ldr r3, [pc, #56] ; (8001b08 ) - 8001ad0: 2200 movs r2, #0 - 8001ad2: 611a str r2, [r3, #16] - hcomp1.Init.Hysteresis = COMP_HYSTERESIS_NONE; - 8001ad4: 4b0c ldr r3, [pc, #48] ; (8001b08 ) - 8001ad6: 2200 movs r2, #0 - 8001ad8: 615a str r2, [r3, #20] - hcomp1.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; - 8001ada: 4b0b ldr r3, [pc, #44] ; (8001b08 ) - 8001adc: 2200 movs r2, #0 - 8001ade: 619a str r2, [r3, #24] - hcomp1.Init.Mode = COMP_MODE_HIGHSPEED; - 8001ae0: 4b09 ldr r3, [pc, #36] ; (8001b08 ) - 8001ae2: 2200 movs r2, #0 - 8001ae4: 61da str r2, [r3, #28] - hcomp1.Init.WindowMode = COMP_WINDOWMODE_DISABLE; - 8001ae6: 4b08 ldr r3, [pc, #32] ; (8001b08 ) - 8001ae8: 2200 movs r2, #0 - 8001aea: 621a str r2, [r3, #32] - hcomp1.Init.TriggerMode = COMP_TRIGGERMODE_NONE; - 8001aec: 4b06 ldr r3, [pc, #24] ; (8001b08 ) - 8001aee: 2200 movs r2, #0 - 8001af0: 625a str r2, [r3, #36] ; 0x24 - if (HAL_COMP_Init(&hcomp1) != HAL_OK) - 8001af2: 4805 ldr r0, [pc, #20] ; (8001b08 ) - 8001af4: f002 ff6c bl 80049d0 - 8001af8: 4603 mov r3, r0 - 8001afa: 2b00 cmp r3, #0 - 8001afc: d001 beq.n 8001b02 - { - Error_Handler(); - 8001afe: f000 fbe9 bl 80022d4 - } - /* USER CODE BEGIN COMP1_Init 2 */ - - /* USER CODE END COMP1_Init 2 */ - -} - 8001b02: bf00 nop - 8001b04: bd80 pop {r7, pc} - 8001b06: bf00 nop - 8001b08: 20000870 .word 0x20000870 - 8001b0c: 4001001c .word 0x4001001c - -08001b10 : - * @brief COMP2 Initialization Function - * @param None - * @retval None - */ -static void MX_COMP2_Init(void) -{ - 8001b10: b580 push {r7, lr} - 8001b12: af00 add r7, sp, #0 - /* USER CODE END COMP2_Init 0 */ - - /* USER CODE BEGIN COMP2_Init 1 */ - - /* USER CODE END COMP2_Init 1 */ - hcomp2.Instance = COMP2; - 8001b14: 4b14 ldr r3, [pc, #80] ; (8001b68 ) - 8001b16: 4a15 ldr r2, [pc, #84] ; (8001b6c ) - 8001b18: 601a str r2, [r3, #0] - hcomp2.Init.InvertingInput = COMP_INVERTINGINPUT_1_4VREFINT; - 8001b1a: 4b13 ldr r3, [pc, #76] ; (8001b68 ) - 8001b1c: 2200 movs r2, #0 - 8001b1e: 605a str r2, [r3, #4] - hcomp2.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; - 8001b20: 4b11 ldr r3, [pc, #68] ; (8001b68 ) - 8001b22: 2200 movs r2, #0 - 8001b24: 609a str r2, [r3, #8] - hcomp2.Init.Output = COMP_OUTPUT_TIM1BKIN2; - 8001b26: 4b10 ldr r3, [pc, #64] ; (8001b68 ) - 8001b28: f640 027f movw r2, #2175 ; 0x87f - 8001b2c: 60da str r2, [r3, #12] - hcomp2.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; - 8001b2e: 4b0e ldr r3, [pc, #56] ; (8001b68 ) - 8001b30: 2200 movs r2, #0 - 8001b32: 611a str r2, [r3, #16] - hcomp2.Init.Hysteresis = COMP_HYSTERESIS_NONE; - 8001b34: 4b0c ldr r3, [pc, #48] ; (8001b68 ) - 8001b36: 2200 movs r2, #0 - 8001b38: 615a str r2, [r3, #20] - hcomp2.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; - 8001b3a: 4b0b ldr r3, [pc, #44] ; (8001b68 ) - 8001b3c: 2200 movs r2, #0 - 8001b3e: 619a str r2, [r3, #24] - hcomp2.Init.Mode = COMP_MODE_HIGHSPEED; - 8001b40: 4b09 ldr r3, [pc, #36] ; (8001b68 ) - 8001b42: 2200 movs r2, #0 - 8001b44: 61da str r2, [r3, #28] - hcomp2.Init.WindowMode = COMP_WINDOWMODE_DISABLE; - 8001b46: 4b08 ldr r3, [pc, #32] ; (8001b68 ) - 8001b48: 2200 movs r2, #0 - 8001b4a: 621a str r2, [r3, #32] - hcomp2.Init.TriggerMode = COMP_TRIGGERMODE_NONE; - 8001b4c: 4b06 ldr r3, [pc, #24] ; (8001b68 ) - 8001b4e: 2200 movs r2, #0 - 8001b50: 625a str r2, [r3, #36] ; 0x24 - if (HAL_COMP_Init(&hcomp2) != HAL_OK) - 8001b52: 4805 ldr r0, [pc, #20] ; (8001b68 ) - 8001b54: f002 ff3c bl 80049d0 - 8001b58: 4603 mov r3, r0 - 8001b5a: 2b00 cmp r3, #0 - 8001b5c: d001 beq.n 8001b62 - { - Error_Handler(); - 8001b5e: f000 fbb9 bl 80022d4 - } - /* USER CODE BEGIN COMP2_Init 2 */ - - /* USER CODE END COMP2_Init 2 */ - -} - 8001b62: bf00 nop - 8001b64: bd80 pop {r7, pc} - 8001b66: bf00 nop - 8001b68: 20000ae8 .word 0x20000ae8 - 8001b6c: 40010020 .word 0x40010020 - -08001b70 : - * @brief COMP4 Initialization Function - * @param None - * @retval None - */ -static void MX_COMP4_Init(void) -{ - 8001b70: b580 push {r7, lr} - 8001b72: af00 add r7, sp, #0 - /* USER CODE END COMP4_Init 0 */ - - /* USER CODE BEGIN COMP4_Init 1 */ - - /* USER CODE END COMP4_Init 1 */ - hcomp4.Instance = COMP4; - 8001b74: 4b14 ldr r3, [pc, #80] ; (8001bc8 ) - 8001b76: 4a15 ldr r2, [pc, #84] ; (8001bcc ) - 8001b78: 601a str r2, [r3, #0] - hcomp4.Init.InvertingInput = COMP_INVERTINGINPUT_1_4VREFINT; - 8001b7a: 4b13 ldr r3, [pc, #76] ; (8001bc8 ) - 8001b7c: 2200 movs r2, #0 - 8001b7e: 605a str r2, [r3, #4] - hcomp4.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; - 8001b80: 4b11 ldr r3, [pc, #68] ; (8001bc8 ) - 8001b82: 2200 movs r2, #0 - 8001b84: 609a str r2, [r3, #8] - hcomp4.Init.Output = COMP_OUTPUT_TIM1BKIN2; - 8001b86: 4b10 ldr r3, [pc, #64] ; (8001bc8 ) - 8001b88: f640 027f movw r2, #2175 ; 0x87f - 8001b8c: 60da str r2, [r3, #12] - hcomp4.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; - 8001b8e: 4b0e ldr r3, [pc, #56] ; (8001bc8 ) - 8001b90: 2200 movs r2, #0 - 8001b92: 611a str r2, [r3, #16] - hcomp4.Init.Hysteresis = COMP_HYSTERESIS_NONE; - 8001b94: 4b0c ldr r3, [pc, #48] ; (8001bc8 ) - 8001b96: 2200 movs r2, #0 - 8001b98: 615a str r2, [r3, #20] - hcomp4.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; - 8001b9a: 4b0b ldr r3, [pc, #44] ; (8001bc8 ) - 8001b9c: 2200 movs r2, #0 - 8001b9e: 619a str r2, [r3, #24] - hcomp4.Init.Mode = COMP_MODE_HIGHSPEED; - 8001ba0: 4b09 ldr r3, [pc, #36] ; (8001bc8 ) - 8001ba2: 2200 movs r2, #0 - 8001ba4: 61da str r2, [r3, #28] - hcomp4.Init.WindowMode = COMP_WINDOWMODE_DISABLE; - 8001ba6: 4b08 ldr r3, [pc, #32] ; (8001bc8 ) - 8001ba8: 2200 movs r2, #0 - 8001baa: 621a str r2, [r3, #32] - hcomp4.Init.TriggerMode = COMP_TRIGGERMODE_NONE; - 8001bac: 4b06 ldr r3, [pc, #24] ; (8001bc8 ) - 8001bae: 2200 movs r2, #0 - 8001bb0: 625a str r2, [r3, #36] ; 0x24 - if (HAL_COMP_Init(&hcomp4) != HAL_OK) - 8001bb2: 4805 ldr r0, [pc, #20] ; (8001bc8 ) - 8001bb4: f002 ff0c bl 80049d0 - 8001bb8: 4603 mov r3, r0 - 8001bba: 2b00 cmp r3, #0 - 8001bbc: d001 beq.n 8001bc2 - { - Error_Handler(); - 8001bbe: f000 fb89 bl 80022d4 - } - /* USER CODE BEGIN COMP4_Init 2 */ - - /* USER CODE END COMP4_Init 2 */ - -} - 8001bc2: bf00 nop - 8001bc4: bd80 pop {r7, pc} - 8001bc6: bf00 nop - 8001bc8: 20000914 .word 0x20000914 - 8001bcc: 40010028 .word 0x40010028 - -08001bd0 : - * @brief COMP7 Initialization Function - * @param None - * @retval None - */ -static void MX_COMP7_Init(void) -{ - 8001bd0: b580 push {r7, lr} - 8001bd2: af00 add r7, sp, #0 - /* USER CODE END COMP7_Init 0 */ - - /* USER CODE BEGIN COMP7_Init 1 */ - - /* USER CODE END COMP7_Init 1 */ - hcomp7.Instance = COMP7; - 8001bd4: 4b14 ldr r3, [pc, #80] ; (8001c28 ) - 8001bd6: 4a15 ldr r2, [pc, #84] ; (8001c2c ) - 8001bd8: 601a str r2, [r3, #0] - hcomp7.Init.InvertingInput = COMP_INVERTINGINPUT_3_4VREFINT; - 8001bda: 4b13 ldr r3, [pc, #76] ; (8001c28 ) - 8001bdc: 2220 movs r2, #32 - 8001bde: 605a str r2, [r3, #4] - hcomp7.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_IO1; - 8001be0: 4b11 ldr r3, [pc, #68] ; (8001c28 ) - 8001be2: 2200 movs r2, #0 - 8001be4: 609a str r2, [r3, #8] - hcomp7.Init.Output = COMP_OUTPUT_TIM1BKIN2; - 8001be6: 4b10 ldr r3, [pc, #64] ; (8001c28 ) - 8001be8: f640 027f movw r2, #2175 ; 0x87f - 8001bec: 60da str r2, [r3, #12] - hcomp7.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED; - 8001bee: 4b0e ldr r3, [pc, #56] ; (8001c28 ) - 8001bf0: 2200 movs r2, #0 - 8001bf2: 611a str r2, [r3, #16] - hcomp7.Init.Hysteresis = COMP_HYSTERESIS_NONE; - 8001bf4: 4b0c ldr r3, [pc, #48] ; (8001c28 ) - 8001bf6: 2200 movs r2, #0 - 8001bf8: 615a str r2, [r3, #20] - hcomp7.Init.BlankingSrce = COMP_BLANKINGSRCE_NONE; - 8001bfa: 4b0b ldr r3, [pc, #44] ; (8001c28 ) - 8001bfc: 2200 movs r2, #0 - 8001bfe: 619a str r2, [r3, #24] - hcomp7.Init.Mode = COMP_MODE_HIGHSPEED; - 8001c00: 4b09 ldr r3, [pc, #36] ; (8001c28 ) - 8001c02: 2200 movs r2, #0 - 8001c04: 61da str r2, [r3, #28] - hcomp7.Init.WindowMode = COMP_WINDOWMODE_DISABLE; - 8001c06: 4b08 ldr r3, [pc, #32] ; (8001c28 ) - 8001c08: 2200 movs r2, #0 - 8001c0a: 621a str r2, [r3, #32] - hcomp7.Init.TriggerMode = COMP_TRIGGERMODE_NONE; - 8001c0c: 4b06 ldr r3, [pc, #24] ; (8001c28 ) - 8001c0e: 2200 movs r2, #0 - 8001c10: 625a str r2, [r3, #36] ; 0x24 - if (HAL_COMP_Init(&hcomp7) != HAL_OK) - 8001c12: 4805 ldr r0, [pc, #20] ; (8001c28 ) - 8001c14: f002 fedc bl 80049d0 - 8001c18: 4603 mov r3, r0 - 8001c1a: 2b00 cmp r3, #0 - 8001c1c: d001 beq.n 8001c22 - { - Error_Handler(); - 8001c1e: f000 fb59 bl 80022d4 - } - /* USER CODE BEGIN COMP7_Init 2 */ - - /* USER CODE END COMP7_Init 2 */ - -} - 8001c22: bf00 nop - 8001c24: bd80 pop {r7, pc} - 8001c26: bf00 nop - 8001c28: 200009e4 .word 0x200009e4 - 8001c2c: 40010034 .word 0x40010034 - -08001c30 : - * @brief I2C1 Initialization Function - * @param None - * @retval None - */ -static void MX_I2C1_Init(void) -{ - 8001c30: b580 push {r7, lr} - 8001c32: af00 add r7, sp, #0 - /* USER CODE END I2C1_Init 0 */ - - /* USER CODE BEGIN I2C1_Init 1 */ - - /* USER CODE END I2C1_Init 1 */ - hi2c1.Instance = I2C1; - 8001c34: 4b1b ldr r3, [pc, #108] ; (8001ca4 ) - 8001c36: 4a1c ldr r2, [pc, #112] ; (8001ca8 ) - 8001c38: 601a str r2, [r3, #0] - hi2c1.Init.Timing = 0x0000020B; - 8001c3a: 4b1a ldr r3, [pc, #104] ; (8001ca4 ) - 8001c3c: f240 220b movw r2, #523 ; 0x20b - 8001c40: 605a str r2, [r3, #4] - hi2c1.Init.OwnAddress1 = 0; - 8001c42: 4b18 ldr r3, [pc, #96] ; (8001ca4 ) - 8001c44: 2200 movs r2, #0 - 8001c46: 609a str r2, [r3, #8] - hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 8001c48: 4b16 ldr r3, [pc, #88] ; (8001ca4 ) - 8001c4a: 2201 movs r2, #1 - 8001c4c: 60da str r2, [r3, #12] - hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 8001c4e: 4b15 ldr r3, [pc, #84] ; (8001ca4 ) - 8001c50: 2200 movs r2, #0 - 8001c52: 611a str r2, [r3, #16] - hi2c1.Init.OwnAddress2 = 0; - 8001c54: 4b13 ldr r3, [pc, #76] ; (8001ca4 ) - 8001c56: 2200 movs r2, #0 - 8001c58: 615a str r2, [r3, #20] - hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; - 8001c5a: 4b12 ldr r3, [pc, #72] ; (8001ca4 ) - 8001c5c: 2200 movs r2, #0 - 8001c5e: 619a str r2, [r3, #24] - hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 8001c60: 4b10 ldr r3, [pc, #64] ; (8001ca4 ) - 8001c62: 2200 movs r2, #0 - 8001c64: 61da str r2, [r3, #28] - hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 8001c66: 4b0f ldr r3, [pc, #60] ; (8001ca4 ) - 8001c68: 2200 movs r2, #0 - 8001c6a: 621a str r2, [r3, #32] - if (HAL_I2C_Init(&hi2c1) != HAL_OK) - 8001c6c: 480d ldr r0, [pc, #52] ; (8001ca4 ) - 8001c6e: f003 fb3f bl 80052f0 - 8001c72: 4603 mov r3, r0 - 8001c74: 2b00 cmp r3, #0 - 8001c76: d001 beq.n 8001c7c - { - Error_Handler(); - 8001c78: f000 fb2c bl 80022d4 - } - /** Configure Analogue filter - */ - if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) - 8001c7c: 2100 movs r1, #0 - 8001c7e: 4809 ldr r0, [pc, #36] ; (8001ca4 ) - 8001c80: f003 fbc5 bl 800540e - 8001c84: 4603 mov r3, r0 - 8001c86: 2b00 cmp r3, #0 - 8001c88: d001 beq.n 8001c8e - { - Error_Handler(); - 8001c8a: f000 fb23 bl 80022d4 - } - /** Configure Digital filter - */ - if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) - 8001c8e: 2100 movs r1, #0 - 8001c90: 4804 ldr r0, [pc, #16] ; (8001ca4 ) - 8001c92: f003 fc07 bl 80054a4 - 8001c96: 4603 mov r3, r0 - 8001c98: 2b00 cmp r3, #0 - 8001c9a: d001 beq.n 8001ca0 - { - Error_Handler(); - 8001c9c: f000 fb1a bl 80022d4 - } - /* USER CODE BEGIN I2C1_Init 2 */ - - /* USER CODE END I2C1_Init 2 */ - -} - 8001ca0: bf00 nop - 8001ca2: bd80 pop {r7, pc} - 8001ca4: 20000768 .word 0x20000768 - 8001ca8: 40005400 .word 0x40005400 - -08001cac : - * @brief OPAMP1 Initialization Function - * @param None - * @retval None - */ -static void MX_OPAMP1_Init(void) -{ - 8001cac: b580 push {r7, lr} - 8001cae: af00 add r7, sp, #0 - /* USER CODE END OPAMP1_Init 0 */ - - /* USER CODE BEGIN OPAMP1_Init 1 */ - - /* USER CODE END OPAMP1_Init 1 */ - hopamp1.Instance = OPAMP1; - 8001cb0: 4b0f ldr r3, [pc, #60] ; (8001cf0 ) - 8001cb2: 4a10 ldr r2, [pc, #64] ; (8001cf4 ) - 8001cb4: 601a str r2, [r3, #0] - hopamp1.Init.Mode = OPAMP_PGA_MODE; - 8001cb6: 4b0e ldr r3, [pc, #56] ; (8001cf0 ) - 8001cb8: 2240 movs r2, #64 ; 0x40 - 8001cba: 605a str r2, [r3, #4] - hopamp1.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0; - 8001cbc: 4b0c ldr r3, [pc, #48] ; (8001cf0 ) - 8001cbe: 220c movs r2, #12 - 8001cc0: 60da str r2, [r3, #12] - hopamp1.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE; - 8001cc2: 4b0b ldr r3, [pc, #44] ; (8001cf0 ) - 8001cc4: 2200 movs r2, #0 - 8001cc6: 611a str r2, [r3, #16] - hopamp1.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_NO; - 8001cc8: 4b09 ldr r3, [pc, #36] ; (8001cf0 ) - 8001cca: 2200 movs r2, #0 - 8001ccc: 61da str r2, [r3, #28] - hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_16; - 8001cce: 4b08 ldr r3, [pc, #32] ; (8001cf0 ) - 8001cd0: f44f 4240 mov.w r2, #49152 ; 0xc000 - 8001cd4: 621a str r2, [r3, #32] - hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY; - 8001cd6: 4b06 ldr r3, [pc, #24] ; (8001cf0 ) - 8001cd8: 2200 movs r2, #0 - 8001cda: 625a str r2, [r3, #36] ; 0x24 - if (HAL_OPAMP_Init(&hopamp1) != HAL_OK) - 8001cdc: 4804 ldr r0, [pc, #16] ; (8001cf0 ) - 8001cde: f003 fc2d bl 800553c - 8001ce2: 4603 mov r3, r0 - 8001ce4: 2b00 cmp r3, #0 - 8001ce6: d001 beq.n 8001cec - { - Error_Handler(); - 8001ce8: f000 faf4 bl 80022d4 - } - /* USER CODE BEGIN OPAMP1_Init 2 */ - - /* USER CODE END OPAMP1_Init 2 */ - -} - 8001cec: bf00 nop - 8001cee: bd80 pop {r7, pc} - 8001cf0: 200008e0 .word 0x200008e0 - 8001cf4: 40010038 .word 0x40010038 - -08001cf8 : - * @brief OPAMP2 Initialization Function - * @param None - * @retval None - */ -static void MX_OPAMP2_Init(void) -{ - 8001cf8: b580 push {r7, lr} - 8001cfa: af00 add r7, sp, #0 - /* USER CODE END OPAMP2_Init 0 */ - - /* USER CODE BEGIN OPAMP2_Init 1 */ - - /* USER CODE END OPAMP2_Init 1 */ - hopamp2.Instance = OPAMP2; - 8001cfc: 4b0f ldr r3, [pc, #60] ; (8001d3c ) - 8001cfe: 4a10 ldr r2, [pc, #64] ; (8001d40 ) - 8001d00: 601a str r2, [r3, #0] - hopamp2.Init.Mode = OPAMP_PGA_MODE; - 8001d02: 4b0e ldr r3, [pc, #56] ; (8001d3c ) - 8001d04: 2240 movs r2, #64 ; 0x40 - 8001d06: 605a str r2, [r3, #4] - hopamp2.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0; - 8001d08: 4b0c ldr r3, [pc, #48] ; (8001d3c ) - 8001d0a: 220c movs r2, #12 - 8001d0c: 60da str r2, [r3, #12] - hopamp2.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE; - 8001d0e: 4b0b ldr r3, [pc, #44] ; (8001d3c ) - 8001d10: 2200 movs r2, #0 - 8001d12: 611a str r2, [r3, #16] - hopamp2.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_NO; - 8001d14: 4b09 ldr r3, [pc, #36] ; (8001d3c ) - 8001d16: 2200 movs r2, #0 - 8001d18: 61da str r2, [r3, #28] - hopamp2.Init.PgaGain = OPAMP_PGA_GAIN_16; - 8001d1a: 4b08 ldr r3, [pc, #32] ; (8001d3c ) - 8001d1c: f44f 4240 mov.w r2, #49152 ; 0xc000 - 8001d20: 621a str r2, [r3, #32] - hopamp2.Init.UserTrimming = OPAMP_TRIMMING_FACTORY; - 8001d22: 4b06 ldr r3, [pc, #24] ; (8001d3c ) - 8001d24: 2200 movs r2, #0 - 8001d26: 625a str r2, [r3, #36] ; 0x24 - if (HAL_OPAMP_Init(&hopamp2) != HAL_OK) - 8001d28: 4804 ldr r0, [pc, #16] ; (8001d3c ) - 8001d2a: f003 fc07 bl 800553c - 8001d2e: 4603 mov r3, r0 - 8001d30: 2b00 cmp r3, #0 - 8001d32: d001 beq.n 8001d38 - { - Error_Handler(); - 8001d34: f000 face bl 80022d4 - } - /* USER CODE BEGIN OPAMP2_Init 2 */ - - /* USER CODE END OPAMP2_Init 2 */ - -} - 8001d38: bf00 nop - 8001d3a: bd80 pop {r7, pc} - 8001d3c: 2000059c .word 0x2000059c - 8001d40: 4001003c .word 0x4001003c - -08001d44 : - * @brief OPAMP3 Initialization Function - * @param None - * @retval None - */ -static void MX_OPAMP3_Init(void) -{ - 8001d44: b580 push {r7, lr} - 8001d46: af00 add r7, sp, #0 - /* USER CODE END OPAMP3_Init 0 */ - - /* USER CODE BEGIN OPAMP3_Init 1 */ - - /* USER CODE END OPAMP3_Init 1 */ - hopamp3.Instance = OPAMP3; - 8001d48: 4b0f ldr r3, [pc, #60] ; (8001d88 ) - 8001d4a: 4a10 ldr r2, [pc, #64] ; (8001d8c ) - 8001d4c: 601a str r2, [r3, #0] - hopamp3.Init.Mode = OPAMP_PGA_MODE; - 8001d4e: 4b0e ldr r3, [pc, #56] ; (8001d88 ) - 8001d50: 2240 movs r2, #64 ; 0x40 - 8001d52: 605a str r2, [r3, #4] - hopamp3.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0; - 8001d54: 4b0c ldr r3, [pc, #48] ; (8001d88 ) - 8001d56: 220c movs r2, #12 - 8001d58: 60da str r2, [r3, #12] - hopamp3.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE; - 8001d5a: 4b0b ldr r3, [pc, #44] ; (8001d88 ) - 8001d5c: 2200 movs r2, #0 - 8001d5e: 611a str r2, [r3, #16] - hopamp3.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_NO; - 8001d60: 4b09 ldr r3, [pc, #36] ; (8001d88 ) - 8001d62: 2200 movs r2, #0 - 8001d64: 61da str r2, [r3, #28] - hopamp3.Init.PgaGain = OPAMP_PGA_GAIN_16; - 8001d66: 4b08 ldr r3, [pc, #32] ; (8001d88 ) - 8001d68: f44f 4240 mov.w r2, #49152 ; 0xc000 - 8001d6c: 621a str r2, [r3, #32] - hopamp3.Init.UserTrimming = OPAMP_TRIMMING_FACTORY; - 8001d6e: 4b06 ldr r3, [pc, #24] ; (8001d88 ) - 8001d70: 2200 movs r2, #0 - 8001d72: 625a str r2, [r3, #36] ; 0x24 - if (HAL_OPAMP_Init(&hopamp3) != HAL_OK) - 8001d74: 4804 ldr r0, [pc, #16] ; (8001d88 ) - 8001d76: f003 fbe1 bl 800553c - 8001d7a: 4603 mov r3, r0 - 8001d7c: 2b00 cmp r3, #0 - 8001d7e: d001 beq.n 8001d84 - { - Error_Handler(); - 8001d80: f000 faa8 bl 80022d4 - } - /* USER CODE BEGIN OPAMP3_Init 2 */ - - /* USER CODE END OPAMP3_Init 2 */ - -} - 8001d84: bf00 nop - 8001d86: bd80 pop {r7, pc} - 8001d88: 2000083c .word 0x2000083c - 8001d8c: 40010040 .word 0x40010040 - -08001d90 : - * @brief TIM1 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM1_Init(void) -{ - 8001d90: b580 push {r7, lr} - 8001d92: b096 sub sp, #88 ; 0x58 - 8001d94: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM1_Init 0 */ - - /* USER CODE END TIM1_Init 0 */ - - TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8001d96: f107 034c add.w r3, r7, #76 ; 0x4c - 8001d9a: 2200 movs r2, #0 - 8001d9c: 601a str r2, [r3, #0] - 8001d9e: 605a str r2, [r3, #4] - 8001da0: 609a str r2, [r3, #8] - TIM_OC_InitTypeDef sConfigOC = {0}; - 8001da2: f107 0330 add.w r3, r7, #48 ; 0x30 - 8001da6: 2200 movs r2, #0 - 8001da8: 601a str r2, [r3, #0] - 8001daa: 605a str r2, [r3, #4] - 8001dac: 609a str r2, [r3, #8] - 8001dae: 60da str r2, [r3, #12] - 8001db0: 611a str r2, [r3, #16] - 8001db2: 615a str r2, [r3, #20] - 8001db4: 619a str r2, [r3, #24] - TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; - 8001db6: 1d3b adds r3, r7, #4 - 8001db8: 222c movs r2, #44 ; 0x2c - 8001dba: 2100 movs r1, #0 - 8001dbc: 4618 mov r0, r3 - 8001dbe: f00a f881 bl 800bec4 - - /* USER CODE BEGIN TIM1_Init 1 */ - - /* USER CODE END TIM1_Init 1 */ - htim1.Instance = TIM1; - 8001dc2: 4b4e ldr r3, [pc, #312] ; (8001efc ) - 8001dc4: 4a4e ldr r2, [pc, #312] ; (8001f00 ) - 8001dc6: 601a str r2, [r3, #0] - htim1.Init.Prescaler = 0; - 8001dc8: 4b4c ldr r3, [pc, #304] ; (8001efc ) - 8001dca: 2200 movs r2, #0 - 8001dcc: 605a str r2, [r3, #4] - htim1.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED1; - 8001dce: 4b4b ldr r3, [pc, #300] ; (8001efc ) - 8001dd0: 2220 movs r2, #32 - 8001dd2: 609a str r2, [r3, #8] - htim1.Init.Period = 1023; - 8001dd4: 4b49 ldr r3, [pc, #292] ; (8001efc ) - 8001dd6: f240 32ff movw r2, #1023 ; 0x3ff - 8001dda: 60da str r2, [r3, #12] - htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8001ddc: 4b47 ldr r3, [pc, #284] ; (8001efc ) - 8001dde: 2200 movs r2, #0 - 8001de0: 611a str r2, [r3, #16] - htim1.Init.RepetitionCounter = 0; - 8001de2: 4b46 ldr r3, [pc, #280] ; (8001efc ) - 8001de4: 2200 movs r2, #0 - 8001de6: 615a str r2, [r3, #20] - htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8001de8: 4b44 ldr r3, [pc, #272] ; (8001efc ) - 8001dea: 2200 movs r2, #0 - 8001dec: 619a str r2, [r3, #24] - if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) - 8001dee: 4843 ldr r0, [pc, #268] ; (8001efc ) - 8001df0: f005 fd32 bl 8007858 - 8001df4: 4603 mov r3, r0 - 8001df6: 2b00 cmp r3, #0 - 8001df8: d001 beq.n 8001dfe - { - Error_Handler(); - 8001dfa: f000 fa6b bl 80022d4 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_OC4REF; - 8001dfe: 2370 movs r3, #112 ; 0x70 - 8001e00: 64fb str r3, [r7, #76] ; 0x4c - sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 8001e02: 2300 movs r3, #0 - 8001e04: 653b str r3, [r7, #80] ; 0x50 - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8001e06: 2300 movs r3, #0 - 8001e08: 657b str r3, [r7, #84] ; 0x54 - if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) - 8001e0a: f107 034c add.w r3, r7, #76 ; 0x4c - 8001e0e: 4619 mov r1, r3 - 8001e10: 483a ldr r0, [pc, #232] ; (8001efc ) - 8001e12: f006 ffbd bl 8008d90 - 8001e16: 4603 mov r3, r0 - 8001e18: 2b00 cmp r3, #0 - 8001e1a: d001 beq.n 8001e20 - { - Error_Handler(); - 8001e1c: f000 fa5a bl 80022d4 - } - sConfigOC.OCMode = TIM_OCMODE_PWM1; - 8001e20: 2360 movs r3, #96 ; 0x60 - 8001e22: 633b str r3, [r7, #48] ; 0x30 - sConfigOC.Pulse = 512; - 8001e24: f44f 7300 mov.w r3, #512 ; 0x200 - 8001e28: 637b str r3, [r7, #52] ; 0x34 - sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 8001e2a: 2300 movs r3, #0 - 8001e2c: 63bb str r3, [r7, #56] ; 0x38 - sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; - 8001e2e: 2300 movs r3, #0 - 8001e30: 63fb str r3, [r7, #60] ; 0x3c - sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8001e32: 2300 movs r3, #0 - 8001e34: 643b str r3, [r7, #64] ; 0x40 - sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; - 8001e36: 2300 movs r3, #0 - 8001e38: 647b str r3, [r7, #68] ; 0x44 - sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; - 8001e3a: 2300 movs r3, #0 - 8001e3c: 64bb str r3, [r7, #72] ; 0x48 - if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 8001e3e: f107 0330 add.w r3, r7, #48 ; 0x30 - 8001e42: 2200 movs r2, #0 - 8001e44: 4619 mov r1, r3 - 8001e46: 482d ldr r0, [pc, #180] ; (8001efc ) - 8001e48: f005 ffea bl 8007e20 - 8001e4c: 4603 mov r3, r0 - 8001e4e: 2b00 cmp r3, #0 - 8001e50: d001 beq.n 8001e56 - { - Error_Handler(); - 8001e52: f000 fa3f bl 80022d4 - } - if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) - 8001e56: f107 0330 add.w r3, r7, #48 ; 0x30 - 8001e5a: 2204 movs r2, #4 - 8001e5c: 4619 mov r1, r3 - 8001e5e: 4827 ldr r0, [pc, #156] ; (8001efc ) - 8001e60: f005 ffde bl 8007e20 - 8001e64: 4603 mov r3, r0 - 8001e66: 2b00 cmp r3, #0 - 8001e68: d001 beq.n 8001e6e - { - Error_Handler(); - 8001e6a: f000 fa33 bl 80022d4 - } - if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 8001e6e: f107 0330 add.w r3, r7, #48 ; 0x30 - 8001e72: 2208 movs r2, #8 - 8001e74: 4619 mov r1, r3 - 8001e76: 4821 ldr r0, [pc, #132] ; (8001efc ) - 8001e78: f005 ffd2 bl 8007e20 - 8001e7c: 4603 mov r3, r0 - 8001e7e: 2b00 cmp r3, #0 - 8001e80: d001 beq.n 8001e86 - { - Error_Handler(); - 8001e82: f000 fa27 bl 80022d4 - } - sConfigOC.Pulse = 5; - 8001e86: 2305 movs r3, #5 - 8001e88: 637b str r3, [r7, #52] ; 0x34 - if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) - 8001e8a: f107 0330 add.w r3, r7, #48 ; 0x30 - 8001e8e: 220c movs r2, #12 - 8001e90: 4619 mov r1, r3 - 8001e92: 481a ldr r0, [pc, #104] ; (8001efc ) - 8001e94: f005 ffc4 bl 8007e20 - 8001e98: 4603 mov r3, r0 - 8001e9a: 2b00 cmp r3, #0 - 8001e9c: d001 beq.n 8001ea2 - { - Error_Handler(); - 8001e9e: f000 fa19 bl 80022d4 - } - sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_ENABLE; - 8001ea2: f44f 6300 mov.w r3, #2048 ; 0x800 - 8001ea6: 607b str r3, [r7, #4] - sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_ENABLE; - 8001ea8: f44f 6380 mov.w r3, #1024 ; 0x400 - 8001eac: 60bb str r3, [r7, #8] - sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - 8001eae: 2300 movs r3, #0 - 8001eb0: 60fb str r3, [r7, #12] - sBreakDeadTimeConfig.DeadTime = 30; - 8001eb2: 231e movs r3, #30 - 8001eb4: 613b str r3, [r7, #16] - sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; - 8001eb6: 2300 movs r3, #0 - 8001eb8: 617b str r3, [r7, #20] - sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - 8001eba: f44f 5300 mov.w r3, #8192 ; 0x2000 - 8001ebe: 61bb str r3, [r7, #24] - sBreakDeadTimeConfig.BreakFilter = 0; - 8001ec0: 2300 movs r3, #0 - 8001ec2: 61fb str r3, [r7, #28] - sBreakDeadTimeConfig.Break2State = TIM_BREAK2_ENABLE; - 8001ec4: f04f 7380 mov.w r3, #16777216 ; 0x1000000 - 8001ec8: 623b str r3, [r7, #32] - sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; - 8001eca: f04f 7300 mov.w r3, #33554432 ; 0x2000000 - 8001ece: 627b str r3, [r7, #36] ; 0x24 - sBreakDeadTimeConfig.Break2Filter = 6; - 8001ed0: 2306 movs r3, #6 - 8001ed2: 62bb str r3, [r7, #40] ; 0x28 - sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - 8001ed4: 2300 movs r3, #0 - 8001ed6: 62fb str r3, [r7, #44] ; 0x2c - if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) - 8001ed8: 1d3b adds r3, r7, #4 - 8001eda: 4619 mov r1, r3 - 8001edc: 4807 ldr r0, [pc, #28] ; (8001efc ) - 8001ede: f006 ffd7 bl 8008e90 - 8001ee2: 4603 mov r3, r0 - 8001ee4: 2b00 cmp r3, #0 - 8001ee6: d001 beq.n 8001eec - { - Error_Handler(); - 8001ee8: f000 f9f4 bl 80022d4 - } - /* USER CODE BEGIN TIM1_Init 2 */ - - /* USER CODE END TIM1_Init 2 */ - HAL_TIM_MspPostInit(&htim1); - 8001eec: 4803 ldr r0, [pc, #12] ; (8001efc ) - 8001eee: f000 fda9 bl 8002a44 - -} - 8001ef2: bf00 nop - 8001ef4: 3758 adds r7, #88 ; 0x58 - 8001ef6: 46bd mov sp, r7 - 8001ef8: bd80 pop {r7, pc} - 8001efa: bf00 nop - 8001efc: 20000a60 .word 0x20000a60 - 8001f00: 40012c00 .word 0x40012c00 - -08001f04 : - * @brief TIM3 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM3_Init(void) -{ - 8001f04: b580 push {r7, lr} - 8001f06: b08c sub sp, #48 ; 0x30 - 8001f08: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM3_Init 0 */ - - /* USER CODE END TIM3_Init 0 */ - - TIM_SlaveConfigTypeDef sSlaveConfig = {0}; - 8001f0a: f107 031c add.w r3, r7, #28 - 8001f0e: 2200 movs r2, #0 - 8001f10: 601a str r2, [r3, #0] - 8001f12: 605a str r2, [r3, #4] - 8001f14: 609a str r2, [r3, #8] - 8001f16: 60da str r2, [r3, #12] - 8001f18: 611a str r2, [r3, #16] - TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8001f1a: f107 0310 add.w r3, r7, #16 - 8001f1e: 2200 movs r2, #0 - 8001f20: 601a str r2, [r3, #0] - 8001f22: 605a str r2, [r3, #4] - 8001f24: 609a str r2, [r3, #8] - TIM_IC_InitTypeDef sConfigIC = {0}; - 8001f26: 463b mov r3, r7 - 8001f28: 2200 movs r2, #0 - 8001f2a: 601a str r2, [r3, #0] - 8001f2c: 605a str r2, [r3, #4] - 8001f2e: 609a str r2, [r3, #8] - 8001f30: 60da str r2, [r3, #12] - - /* USER CODE BEGIN TIM3_Init 1 */ - - /* USER CODE END TIM3_Init 1 */ - htim3.Instance = TIM3; - 8001f32: 4b35 ldr r3, [pc, #212] ; (8002008 ) - 8001f34: 4a35 ldr r2, [pc, #212] ; (800200c ) - 8001f36: 601a str r2, [r3, #0] - htim3.Init.Prescaler = 71; - 8001f38: 4b33 ldr r3, [pc, #204] ; (8002008 ) - 8001f3a: 2247 movs r2, #71 ; 0x47 - 8001f3c: 605a str r2, [r3, #4] - htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - 8001f3e: 4b32 ldr r3, [pc, #200] ; (8002008 ) - 8001f40: 2200 movs r2, #0 - 8001f42: 609a str r2, [r3, #8] - htim3.Init.Period = 65535; - 8001f44: 4b30 ldr r3, [pc, #192] ; (8002008 ) - 8001f46: f64f 72ff movw r2, #65535 ; 0xffff - 8001f4a: 60da str r2, [r3, #12] - htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8001f4c: 4b2e ldr r3, [pc, #184] ; (8002008 ) - 8001f4e: 2200 movs r2, #0 - 8001f50: 611a str r2, [r3, #16] - htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8001f52: 4b2d ldr r3, [pc, #180] ; (8002008 ) - 8001f54: 2200 movs r2, #0 - 8001f56: 619a str r2, [r3, #24] - if (HAL_TIM_Base_Init(&htim3) != HAL_OK) - 8001f58: 482b ldr r0, [pc, #172] ; (8002008 ) - 8001f5a: f005 fc27 bl 80077ac - 8001f5e: 4603 mov r3, r0 - 8001f60: 2b00 cmp r3, #0 - 8001f62: d001 beq.n 8001f68 - { - Error_Handler(); - 8001f64: f000 f9b6 bl 80022d4 - } - if (HAL_TIM_IC_Init(&htim3) != HAL_OK) - 8001f68: 4827 ldr r0, [pc, #156] ; (8002008 ) - 8001f6a: f005 fcf9 bl 8007960 - 8001f6e: 4603 mov r3, r0 - 8001f70: 2b00 cmp r3, #0 - 8001f72: d001 beq.n 8001f78 - { - Error_Handler(); - 8001f74: f000 f9ae bl 80022d4 - } - sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET; - 8001f78: 2304 movs r3, #4 - 8001f7a: 61fb str r3, [r7, #28] - sSlaveConfig.InputTrigger = TIM_TS_TI1FP1; - 8001f7c: 2350 movs r3, #80 ; 0x50 - 8001f7e: 623b str r3, [r7, #32] - sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - 8001f80: 2300 movs r3, #0 - 8001f82: 627b str r3, [r7, #36] ; 0x24 - sSlaveConfig.TriggerFilter = 0; - 8001f84: 2300 movs r3, #0 - 8001f86: 62fb str r3, [r7, #44] ; 0x2c - if (HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig) != HAL_OK) - 8001f88: f107 031c add.w r3, r7, #28 - 8001f8c: 4619 mov r1, r3 - 8001f8e: 481e ldr r0, [pc, #120] ; (8002008 ) - 8001f90: f006 f87a bl 8008088 - 8001f94: 4603 mov r3, r0 - 8001f96: 2b00 cmp r3, #0 - 8001f98: d001 beq.n 8001f9e - { - Error_Handler(); - 8001f9a: f000 f99b bl 80022d4 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8001f9e: 2300 movs r3, #0 - 8001fa0: 613b str r3, [r7, #16] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8001fa2: 2300 movs r3, #0 - 8001fa4: 61bb str r3, [r7, #24] - if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 8001fa6: f107 0310 add.w r3, r7, #16 - 8001faa: 4619 mov r1, r3 - 8001fac: 4816 ldr r0, [pc, #88] ; (8002008 ) - 8001fae: f006 feef bl 8008d90 - 8001fb2: 4603 mov r3, r0 - 8001fb4: 2b00 cmp r3, #0 - 8001fb6: d001 beq.n 8001fbc - { - Error_Handler(); - 8001fb8: f000 f98c bl 80022d4 - } - sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - 8001fbc: 2300 movs r3, #0 - 8001fbe: 603b str r3, [r7, #0] - sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI; - 8001fc0: 2301 movs r3, #1 - 8001fc2: 607b str r3, [r7, #4] - sConfigIC.ICPrescaler = TIM_ICPSC_DIV1; - 8001fc4: 2300 movs r3, #0 - 8001fc6: 60bb str r3, [r7, #8] - sConfigIC.ICFilter = 0; - 8001fc8: 2300 movs r3, #0 - 8001fca: 60fb str r3, [r7, #12] - if (HAL_TIM_IC_ConfigChannel(&htim3, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) - 8001fcc: 463b mov r3, r7 - 8001fce: 2200 movs r2, #0 - 8001fd0: 4619 mov r1, r3 - 8001fd2: 480d ldr r0, [pc, #52] ; (8002008 ) - 8001fd4: f005 fe87 bl 8007ce6 - 8001fd8: 4603 mov r3, r0 - 8001fda: 2b00 cmp r3, #0 - 8001fdc: d001 beq.n 8001fe2 - { - Error_Handler(); - 8001fde: f000 f979 bl 80022d4 - } - sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING; - 8001fe2: 2302 movs r3, #2 - 8001fe4: 603b str r3, [r7, #0] - sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI; - 8001fe6: 2302 movs r3, #2 - 8001fe8: 607b str r3, [r7, #4] - if (HAL_TIM_IC_ConfigChannel(&htim3, &sConfigIC, TIM_CHANNEL_2) != HAL_OK) - 8001fea: 463b mov r3, r7 - 8001fec: 2204 movs r2, #4 - 8001fee: 4619 mov r1, r3 - 8001ff0: 4805 ldr r0, [pc, #20] ; (8002008 ) - 8001ff2: f005 fe78 bl 8007ce6 - 8001ff6: 4603 mov r3, r0 - 8001ff8: 2b00 cmp r3, #0 - 8001ffa: d001 beq.n 8002000 - { - Error_Handler(); - 8001ffc: f000 f96a bl 80022d4 - } - /* USER CODE BEGIN TIM3_Init 2 */ - - /* USER CODE END TIM3_Init 2 */ - -} - 8002000: bf00 nop - 8002002: 3730 adds r7, #48 ; 0x30 - 8002004: 46bd mov sp, r7 - 8002006: bd80 pop {r7, pc} - 8002008: 200008a0 .word 0x200008a0 - 800200c: 40000400 .word 0x40000400 - -08002010 : - * @brief TIM4 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM4_Init(void) -{ - 8002010: b580 push {r7, lr} - 8002012: b08c sub sp, #48 ; 0x30 - 8002014: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM4_Init 0 */ - - /* USER CODE END TIM4_Init 0 */ - - TIM_SlaveConfigTypeDef sSlaveConfig = {0}; - 8002016: f107 031c add.w r3, r7, #28 - 800201a: 2200 movs r2, #0 - 800201c: 601a str r2, [r3, #0] - 800201e: 605a str r2, [r3, #4] - 8002020: 609a str r2, [r3, #8] - 8002022: 60da str r2, [r3, #12] - 8002024: 611a str r2, [r3, #16] - TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8002026: f107 0310 add.w r3, r7, #16 - 800202a: 2200 movs r2, #0 - 800202c: 601a str r2, [r3, #0] - 800202e: 605a str r2, [r3, #4] - 8002030: 609a str r2, [r3, #8] - TIM_IC_InitTypeDef sConfigIC = {0}; - 8002032: 463b mov r3, r7 - 8002034: 2200 movs r2, #0 - 8002036: 601a str r2, [r3, #0] - 8002038: 605a str r2, [r3, #4] - 800203a: 609a str r2, [r3, #8] - 800203c: 60da str r2, [r3, #12] - - /* USER CODE BEGIN TIM4_Init 1 */ - - /* USER CODE END TIM4_Init 1 */ - htim4.Instance = TIM4; - 800203e: 4b3d ldr r3, [pc, #244] ; (8002134 ) - 8002040: 4a3d ldr r2, [pc, #244] ; (8002138 ) - 8002042: 601a str r2, [r3, #0] - htim4.Init.Prescaler = 109; - 8002044: 4b3b ldr r3, [pc, #236] ; (8002134 ) - 8002046: 226d movs r2, #109 ; 0x6d - 8002048: 605a str r2, [r3, #4] - htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 800204a: 4b3a ldr r3, [pc, #232] ; (8002134 ) - 800204c: 2200 movs r2, #0 - 800204e: 609a str r2, [r3, #8] - htim4.Init.Period = 65535; - 8002050: 4b38 ldr r3, [pc, #224] ; (8002134 ) - 8002052: f64f 72ff movw r2, #65535 ; 0xffff - 8002056: 60da str r2, [r3, #12] - htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8002058: 4b36 ldr r3, [pc, #216] ; (8002134 ) - 800205a: 2200 movs r2, #0 - 800205c: 611a str r2, [r3, #16] - htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 800205e: 4b35 ldr r3, [pc, #212] ; (8002134 ) - 8002060: 2200 movs r2, #0 - 8002062: 619a str r2, [r3, #24] - if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 8002064: 4833 ldr r0, [pc, #204] ; (8002134 ) - 8002066: f005 fba1 bl 80077ac - 800206a: 4603 mov r3, r0 - 800206c: 2b00 cmp r3, #0 - 800206e: d001 beq.n 8002074 - { - Error_Handler(); - 8002070: f000 f930 bl 80022d4 - } - if (HAL_TIM_IC_Init(&htim4) != HAL_OK) - 8002074: 482f ldr r0, [pc, #188] ; (8002134 ) - 8002076: f005 fc73 bl 8007960 - 800207a: 4603 mov r3, r0 - 800207c: 2b00 cmp r3, #0 - 800207e: d001 beq.n 8002084 - { - Error_Handler(); - 8002080: f000 f928 bl 80022d4 - } - sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET; - 8002084: 2304 movs r3, #4 - 8002086: 61fb str r3, [r7, #28] - sSlaveConfig.InputTrigger = TIM_TS_TI1F_ED; - 8002088: 2340 movs r3, #64 ; 0x40 - 800208a: 623b str r3, [r7, #32] - sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - 800208c: 2300 movs r3, #0 - 800208e: 627b str r3, [r7, #36] ; 0x24 - sSlaveConfig.TriggerFilter = 0; - 8002090: 2300 movs r3, #0 - 8002092: 62fb str r3, [r7, #44] ; 0x2c - if (HAL_TIM_SlaveConfigSynchro(&htim4, &sSlaveConfig) != HAL_OK) - 8002094: f107 031c add.w r3, r7, #28 - 8002098: 4619 mov r1, r3 - 800209a: 4826 ldr r0, [pc, #152] ; (8002134 ) - 800209c: f005 fff4 bl 8008088 - 80020a0: 4603 mov r3, r0 - 80020a2: 2b00 cmp r3, #0 - 80020a4: d001 beq.n 80020aa - { - Error_Handler(); - 80020a6: f000 f915 bl 80022d4 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 80020aa: 2300 movs r3, #0 - 80020ac: 613b str r3, [r7, #16] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 80020ae: 2300 movs r3, #0 - 80020b0: 61bb str r3, [r7, #24] - if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 80020b2: f107 0310 add.w r3, r7, #16 - 80020b6: 4619 mov r1, r3 - 80020b8: 481e ldr r0, [pc, #120] ; (8002134 ) - 80020ba: f006 fe69 bl 8008d90 - 80020be: 4603 mov r3, r0 - 80020c0: 2b00 cmp r3, #0 - 80020c2: d001 beq.n 80020c8 - { - Error_Handler(); - 80020c4: f000 f906 bl 80022d4 - } - sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - 80020c8: 2300 movs r3, #0 - 80020ca: 603b str r3, [r7, #0] - sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI; - 80020cc: 2301 movs r3, #1 - 80020ce: 607b str r3, [r7, #4] - sConfigIC.ICPrescaler = TIM_ICPSC_DIV1; - 80020d0: 2300 movs r3, #0 - 80020d2: 60bb str r3, [r7, #8] - sConfigIC.ICFilter = 0; - 80020d4: 2300 movs r3, #0 - 80020d6: 60fb str r3, [r7, #12] - if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) - 80020d8: 463b mov r3, r7 - 80020da: 2200 movs r2, #0 - 80020dc: 4619 mov r1, r3 - 80020de: 4815 ldr r0, [pc, #84] ; (8002134 ) - 80020e0: f005 fe01 bl 8007ce6 - 80020e4: 4603 mov r3, r0 - 80020e6: 2b00 cmp r3, #0 - 80020e8: d001 beq.n 80020ee - { - Error_Handler(); - 80020ea: f000 f8f3 bl 80022d4 - } - if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_2) != HAL_OK) - 80020ee: 463b mov r3, r7 - 80020f0: 2204 movs r2, #4 - 80020f2: 4619 mov r1, r3 - 80020f4: 480f ldr r0, [pc, #60] ; (8002134 ) - 80020f6: f005 fdf6 bl 8007ce6 - 80020fa: 4603 mov r3, r0 - 80020fc: 2b00 cmp r3, #0 - 80020fe: d001 beq.n 8002104 - { - Error_Handler(); - 8002100: f000 f8e8 bl 80022d4 - } - if (HAL_TIM_IC_ConfigChannel(&htim4, &sConfigIC, TIM_CHANNEL_3) != HAL_OK) - 8002104: 463b mov r3, r7 - 8002106: 2208 movs r2, #8 - 8002108: 4619 mov r1, r3 - 800210a: 480a ldr r0, [pc, #40] ; (8002134 ) - 800210c: f005 fdeb bl 8007ce6 - 8002110: 4603 mov r3, r0 - 8002112: 2b00 cmp r3, #0 - 8002114: d001 beq.n 800211a - { - Error_Handler(); - 8002116: f000 f8dd bl 80022d4 - } - if (HAL_TIM_ConfigTI1Input(&htim4, TIM_TI1SELECTION_XORCOMBINATION) != HAL_OK) - 800211a: 2180 movs r1, #128 ; 0x80 - 800211c: 4805 ldr r0, [pc, #20] ; (8002134 ) - 800211e: f005 ff97 bl 8008050 - 8002122: 4603 mov r3, r0 - 8002124: 2b00 cmp r3, #0 - 8002126: d001 beq.n 800212c - { - Error_Handler(); - 8002128: f000 f8d4 bl 80022d4 - } - /* USER CODE BEGIN TIM4_Init 2 */ - - /* USER CODE END TIM4_Init 2 */ - -} - 800212c: bf00 nop - 800212e: 3730 adds r7, #48 ; 0x30 - 8002130: 46bd mov sp, r7 - 8002132: bd80 pop {r7, pc} - 8002134: 200005d0 .word 0x200005d0 - 8002138: 40000800 .word 0x40000800 - -0800213c : - * @brief USART3 Initialization Function - * @param None - * @retval None - */ -static void MX_USART3_UART_Init(void) -{ - 800213c: b580 push {r7, lr} - 800213e: af00 add r7, sp, #0 - /* USER CODE END USART3_Init 0 */ - - /* USER CODE BEGIN USART3_Init 1 */ - - /* USER CODE END USART3_Init 1 */ - huart3.Instance = USART3; - 8002140: 4b14 ldr r3, [pc, #80] ; (8002194 ) - 8002142: 4a15 ldr r2, [pc, #84] ; (8002198 ) - 8002144: 601a str r2, [r3, #0] - huart3.Init.BaudRate = 115200; - 8002146: 4b13 ldr r3, [pc, #76] ; (8002194 ) - 8002148: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 800214c: 605a str r2, [r3, #4] - huart3.Init.WordLength = UART_WORDLENGTH_8B; - 800214e: 4b11 ldr r3, [pc, #68] ; (8002194 ) - 8002150: 2200 movs r2, #0 - 8002152: 609a str r2, [r3, #8] - huart3.Init.StopBits = UART_STOPBITS_1; - 8002154: 4b0f ldr r3, [pc, #60] ; (8002194 ) - 8002156: 2200 movs r2, #0 - 8002158: 60da str r2, [r3, #12] - huart3.Init.Parity = UART_PARITY_NONE; - 800215a: 4b0e ldr r3, [pc, #56] ; (8002194 ) - 800215c: 2200 movs r2, #0 - 800215e: 611a str r2, [r3, #16] - huart3.Init.Mode = UART_MODE_TX_RX; - 8002160: 4b0c ldr r3, [pc, #48] ; (8002194 ) - 8002162: 220c movs r2, #12 - 8002164: 615a str r2, [r3, #20] - huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8002166: 4b0b ldr r3, [pc, #44] ; (8002194 ) - 8002168: 2200 movs r2, #0 - 800216a: 619a str r2, [r3, #24] - huart3.Init.OverSampling = UART_OVERSAMPLING_16; - 800216c: 4b09 ldr r3, [pc, #36] ; (8002194 ) - 800216e: 2200 movs r2, #0 - 8002170: 61da str r2, [r3, #28] - huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8002172: 4b08 ldr r3, [pc, #32] ; (8002194 ) - 8002174: 2200 movs r2, #0 - 8002176: 621a str r2, [r3, #32] - huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 8002178: 4b06 ldr r3, [pc, #24] ; (8002194 ) - 800217a: 2200 movs r2, #0 - 800217c: 625a str r2, [r3, #36] ; 0x24 - if (HAL_UART_Init(&huart3) != HAL_OK) - 800217e: 4805 ldr r0, [pc, #20] ; (8002194 ) - 8002180: f006 ff47 bl 8009012 - 8002184: 4603 mov r3, r0 - 8002186: 2b00 cmp r3, #0 - 8002188: d001 beq.n 800218e - { - Error_Handler(); - 800218a: f000 f8a3 bl 80022d4 - } - /* USER CODE BEGIN USART3_Init 2 */ - - /* USER CODE END USART3_Init 2 */ - -} - 800218e: bf00 nop - 8002190: bd80 pop {r7, pc} - 8002192: bf00 nop - 8002194: 20000654 .word 0x20000654 - 8002198: 40004800 .word 0x40004800 - -0800219c : - -/** - * Enable DMA controller clock - */ -static void MX_DMA_Init(void) -{ - 800219c: b580 push {r7, lr} - 800219e: b082 sub sp, #8 - 80021a0: af00 add r7, sp, #0 - - /* DMA controller clock enable */ - __HAL_RCC_DMA1_CLK_ENABLE(); - 80021a2: 4b2a ldr r3, [pc, #168] ; (800224c ) - 80021a4: 695b ldr r3, [r3, #20] - 80021a6: 4a29 ldr r2, [pc, #164] ; (800224c ) - 80021a8: f043 0301 orr.w r3, r3, #1 - 80021ac: 6153 str r3, [r2, #20] - 80021ae: 4b27 ldr r3, [pc, #156] ; (800224c ) - 80021b0: 695b ldr r3, [r3, #20] - 80021b2: f003 0301 and.w r3, r3, #1 - 80021b6: 607b str r3, [r7, #4] - 80021b8: 687b ldr r3, [r7, #4] - __HAL_RCC_DMA2_CLK_ENABLE(); - 80021ba: 4b24 ldr r3, [pc, #144] ; (800224c ) - 80021bc: 695b ldr r3, [r3, #20] - 80021be: 4a23 ldr r2, [pc, #140] ; (800224c ) - 80021c0: f043 0302 orr.w r3, r3, #2 - 80021c4: 6153 str r3, [r2, #20] - 80021c6: 4b21 ldr r3, [pc, #132] ; (800224c ) - 80021c8: 695b ldr r3, [r3, #20] - 80021ca: f003 0302 and.w r3, r3, #2 - 80021ce: 603b str r3, [r7, #0] - 80021d0: 683b ldr r3, [r7, #0] - - /* DMA interrupt init */ - /* DMA1_Channel1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); - 80021d2: 2200 movs r2, #0 - 80021d4: 2100 movs r1, #0 - 80021d6: 200b movs r0, #11 - 80021d8: f002 fd32 bl 8004c40 - HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); - 80021dc: 200b movs r0, #11 - 80021de: f002 fd4b bl 8004c78 - /* DMA1_Channel2_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0); - 80021e2: 2200 movs r2, #0 - 80021e4: 2100 movs r1, #0 - 80021e6: 200c movs r0, #12 - 80021e8: f002 fd2a bl 8004c40 - HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn); - 80021ec: 200c movs r0, #12 - 80021ee: f002 fd43 bl 8004c78 - /* DMA1_Channel3_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0); - 80021f2: 2200 movs r2, #0 - 80021f4: 2100 movs r1, #0 - 80021f6: 200d movs r0, #13 - 80021f8: f002 fd22 bl 8004c40 - HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn); - 80021fc: 200d movs r0, #13 - 80021fe: f002 fd3b bl 8004c78 - /* DMA1_Channel6_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0); - 8002202: 2200 movs r2, #0 - 8002204: 2100 movs r1, #0 - 8002206: 2010 movs r0, #16 - 8002208: f002 fd1a bl 8004c40 - HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn); - 800220c: 2010 movs r0, #16 - 800220e: f002 fd33 bl 8004c78 - /* DMA1_Channel7_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0); - 8002212: 2200 movs r2, #0 - 8002214: 2100 movs r1, #0 - 8002216: 2011 movs r0, #17 - 8002218: f002 fd12 bl 8004c40 - HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn); - 800221c: 2011 movs r0, #17 - 800221e: f002 fd2b bl 8004c78 - /* DMA2_Channel1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Channel1_IRQn, 0, 0); - 8002222: 2200 movs r2, #0 - 8002224: 2100 movs r1, #0 - 8002226: 2038 movs r0, #56 ; 0x38 - 8002228: f002 fd0a bl 8004c40 - HAL_NVIC_EnableIRQ(DMA2_Channel1_IRQn); - 800222c: 2038 movs r0, #56 ; 0x38 - 800222e: f002 fd23 bl 8004c78 - /* DMA2_Channel5_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Channel5_IRQn, 0, 0); - 8002232: 2200 movs r2, #0 - 8002234: 2100 movs r1, #0 - 8002236: 203c movs r0, #60 ; 0x3c - 8002238: f002 fd02 bl 8004c40 - HAL_NVIC_EnableIRQ(DMA2_Channel5_IRQn); - 800223c: 203c movs r0, #60 ; 0x3c - 800223e: f002 fd1b bl 8004c78 - -} - 8002242: bf00 nop - 8002244: 3708 adds r7, #8 - 8002246: 46bd mov sp, r7 - 8002248: bd80 pop {r7, pc} - 800224a: bf00 nop - 800224c: 40021000 .word 0x40021000 - -08002250 : - * @brief GPIO Initialization Function - * @param None - * @retval None - */ -static void MX_GPIO_Init(void) -{ - 8002250: b480 push {r7} - 8002252: b085 sub sp, #20 - 8002254: af00 add r7, sp, #0 - - /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOF_CLK_ENABLE(); - 8002256: 4b15 ldr r3, [pc, #84] ; (80022ac ) - 8002258: 695b ldr r3, [r3, #20] - 800225a: 4a14 ldr r2, [pc, #80] ; (80022ac ) - 800225c: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 - 8002260: 6153 str r3, [r2, #20] - 8002262: 4b12 ldr r3, [pc, #72] ; (80022ac ) - 8002264: 695b ldr r3, [r3, #20] - 8002266: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 800226a: 60fb str r3, [r7, #12] - 800226c: 68fb ldr r3, [r7, #12] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 800226e: 4b0f ldr r3, [pc, #60] ; (80022ac ) - 8002270: 695b ldr r3, [r3, #20] - 8002272: 4a0e ldr r2, [pc, #56] ; (80022ac ) - 8002274: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8002278: 6153 str r3, [r2, #20] - 800227a: 4b0c ldr r3, [pc, #48] ; (80022ac ) - 800227c: 695b ldr r3, [r3, #20] - 800227e: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8002282: 60bb str r3, [r7, #8] - 8002284: 68bb ldr r3, [r7, #8] - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002286: 4b09 ldr r3, [pc, #36] ; (80022ac ) - 8002288: 695b ldr r3, [r3, #20] - 800228a: 4a08 ldr r2, [pc, #32] ; (80022ac ) - 800228c: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8002290: 6153 str r3, [r2, #20] - 8002292: 4b06 ldr r3, [pc, #24] ; (80022ac ) - 8002294: 695b ldr r3, [r3, #20] - 8002296: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 800229a: 607b str r3, [r7, #4] - 800229c: 687b ldr r3, [r7, #4] - -} - 800229e: bf00 nop - 80022a0: 3714 adds r7, #20 - 80022a2: 46bd mov sp, r7 - 80022a4: f85d 7b04 ldr.w r7, [sp], #4 - 80022a8: 4770 bx lr - 80022aa: bf00 nop - 80022ac: 40021000 .word 0x40021000 - -080022b0 : - * a global variable "uwTick" used as application time base. - * @param htim : TIM handle - * @retval None - */ -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) -{ - 80022b0: b580 push {r7, lr} - 80022b2: b082 sub sp, #8 - 80022b4: af00 add r7, sp, #0 - 80022b6: 6078 str r0, [r7, #4] - /* USER CODE BEGIN Callback 0 */ - - /* USER CODE END Callback 0 */ - if (htim->Instance == TIM7) { - 80022b8: 687b ldr r3, [r7, #4] - 80022ba: 681b ldr r3, [r3, #0] - 80022bc: 4a04 ldr r2, [pc, #16] ; (80022d0 ) - 80022be: 4293 cmp r3, r2 - 80022c0: d101 bne.n 80022c6 - HAL_IncTick(); - 80022c2: f000 fe2f bl 8002f24 - } - /* USER CODE BEGIN Callback 1 */ - - /* USER CODE END Callback 1 */ -} - 80022c6: bf00 nop - 80022c8: 3708 adds r7, #8 - 80022ca: 46bd mov sp, r7 - 80022cc: bd80 pop {r7, pc} - 80022ce: bf00 nop - 80022d0: 40001400 .word 0x40001400 - -080022d4 : -/** - * @brief This function is executed in case of error occurrence. - * @retval None - */ -void Error_Handler(void) -{ - 80022d4: b480 push {r7} - 80022d6: af00 add r7, sp, #0 - /* USER CODE BEGIN Error_Handler_Debug */ - /* User can add his own implementation to report the HAL error return state */ - - /* USER CODE END Error_Handler_Debug */ -} - 80022d8: bf00 nop - 80022da: 46bd mov sp, r7 - 80022dc: f85d 7b04 ldr.w r7, [sp], #4 - 80022e0: 4770 bx lr - ... - -080022e4 : -void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); - /** - * Initializes the Global MSP. - */ -void HAL_MspInit(void) -{ - 80022e4: b580 push {r7, lr} - 80022e6: b082 sub sp, #8 - 80022e8: af00 add r7, sp, #0 - /* USER CODE BEGIN MspInit 0 */ - - /* USER CODE END MspInit 0 */ - - __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80022ea: 4b11 ldr r3, [pc, #68] ; (8002330 ) - 80022ec: 699b ldr r3, [r3, #24] - 80022ee: 4a10 ldr r2, [pc, #64] ; (8002330 ) - 80022f0: f043 0301 orr.w r3, r3, #1 - 80022f4: 6193 str r3, [r2, #24] - 80022f6: 4b0e ldr r3, [pc, #56] ; (8002330 ) - 80022f8: 699b ldr r3, [r3, #24] - 80022fa: f003 0301 and.w r3, r3, #1 - 80022fe: 607b str r3, [r7, #4] - 8002300: 687b ldr r3, [r7, #4] - __HAL_RCC_PWR_CLK_ENABLE(); - 8002302: 4b0b ldr r3, [pc, #44] ; (8002330 ) - 8002304: 69db ldr r3, [r3, #28] - 8002306: 4a0a ldr r2, [pc, #40] ; (8002330 ) - 8002308: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 800230c: 61d3 str r3, [r2, #28] - 800230e: 4b08 ldr r3, [pc, #32] ; (8002330 ) - 8002310: 69db ldr r3, [r3, #28] - 8002312: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8002316: 603b str r3, [r7, #0] - 8002318: 683b ldr r3, [r7, #0] - - /* System interrupt init*/ - /* PendSV_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0); - 800231a: 2200 movs r2, #0 - 800231c: 210f movs r1, #15 - 800231e: f06f 0001 mvn.w r0, #1 - 8002322: f002 fc8d bl 8004c40 - - /* USER CODE BEGIN MspInit 1 */ - - /* USER CODE END MspInit 1 */ -} - 8002326: bf00 nop - 8002328: 3708 adds r7, #8 - 800232a: 46bd mov sp, r7 - 800232c: bd80 pop {r7, pc} - 800232e: bf00 nop - 8002330: 40021000 .word 0x40021000 - -08002334 : -* This function configures the hardware resources used in this example -* @param hadc: ADC handle pointer -* @retval None -*/ -void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) -{ - 8002334: b580 push {r7, lr} - 8002336: b08c sub sp, #48 ; 0x30 - 8002338: af00 add r7, sp, #0 - 800233a: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800233c: f107 031c add.w r3, r7, #28 - 8002340: 2200 movs r2, #0 - 8002342: 601a str r2, [r3, #0] - 8002344: 605a str r2, [r3, #4] - 8002346: 609a str r2, [r3, #8] - 8002348: 60da str r2, [r3, #12] - 800234a: 611a str r2, [r3, #16] - if(hadc->Instance==ADC1) - 800234c: 687b ldr r3, [r7, #4] - 800234e: 681b ldr r3, [r3, #0] - 8002350: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8002354: d15f bne.n 8002416 - { - /* USER CODE BEGIN ADC1_MspInit 0 */ - - /* USER CODE END ADC1_MspInit 0 */ - /* Peripheral clock enable */ - HAL_RCC_ADC12_CLK_ENABLED++; - 8002356: 4b81 ldr r3, [pc, #516] ; (800255c ) - 8002358: 681b ldr r3, [r3, #0] - 800235a: 3301 adds r3, #1 - 800235c: 4a7f ldr r2, [pc, #508] ; (800255c ) - 800235e: 6013 str r3, [r2, #0] - if(HAL_RCC_ADC12_CLK_ENABLED==1){ - 8002360: 4b7e ldr r3, [pc, #504] ; (800255c ) - 8002362: 681b ldr r3, [r3, #0] - 8002364: 2b01 cmp r3, #1 - 8002366: d10b bne.n 8002380 - __HAL_RCC_ADC12_CLK_ENABLE(); - 8002368: 4b7d ldr r3, [pc, #500] ; (8002560 ) - 800236a: 695b ldr r3, [r3, #20] - 800236c: 4a7c ldr r2, [pc, #496] ; (8002560 ) - 800236e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8002372: 6153 str r3, [r2, #20] - 8002374: 4b7a ldr r3, [pc, #488] ; (8002560 ) - 8002376: 695b ldr r3, [r3, #20] - 8002378: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800237c: 61bb str r3, [r7, #24] - 800237e: 69bb ldr r3, [r7, #24] - } - - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002380: 4b77 ldr r3, [pc, #476] ; (8002560 ) - 8002382: 695b ldr r3, [r3, #20] - 8002384: 4a76 ldr r2, [pc, #472] ; (8002560 ) - 8002386: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 800238a: 6153 str r3, [r2, #20] - 800238c: 4b74 ldr r3, [pc, #464] ; (8002560 ) - 800238e: 695b ldr r3, [r3, #20] - 8002390: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8002394: 617b str r3, [r7, #20] - 8002396: 697b ldr r3, [r7, #20] - /**ADC1 GPIO Configuration - PA0 ------> ADC1_IN1 - PA3 ------> ADC1_IN4 - */ - GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_3; - 8002398: 2309 movs r3, #9 - 800239a: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 800239c: 2303 movs r3, #3 - 800239e: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 80023a0: 2300 movs r3, #0 - 80023a2: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80023a4: f107 031c add.w r3, r7, #28 - 80023a8: 4619 mov r1, r3 - 80023aa: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 80023ae: f002 fe25 bl 8004ffc - - /* ADC1 DMA Init */ - /* ADC1 Init */ - hdma_adc1.Instance = DMA1_Channel1; - 80023b2: 4b6c ldr r3, [pc, #432] ; (8002564 ) - 80023b4: 4a6c ldr r2, [pc, #432] ; (8002568 ) - 80023b6: 601a str r2, [r3, #0] - hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; - 80023b8: 4b6a ldr r3, [pc, #424] ; (8002564 ) - 80023ba: 2200 movs r2, #0 - 80023bc: 605a str r2, [r3, #4] - hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; - 80023be: 4b69 ldr r3, [pc, #420] ; (8002564 ) - 80023c0: 2200 movs r2, #0 - 80023c2: 609a str r2, [r3, #8] - hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; - 80023c4: 4b67 ldr r3, [pc, #412] ; (8002564 ) - 80023c6: 2280 movs r2, #128 ; 0x80 - 80023c8: 60da str r2, [r3, #12] - hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; - 80023ca: 4b66 ldr r3, [pc, #408] ; (8002564 ) - 80023cc: f44f 7200 mov.w r2, #512 ; 0x200 - 80023d0: 611a str r2, [r3, #16] - hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; - 80023d2: 4b64 ldr r3, [pc, #400] ; (8002564 ) - 80023d4: f44f 6200 mov.w r2, #2048 ; 0x800 - 80023d8: 615a str r2, [r3, #20] - hdma_adc1.Init.Mode = DMA_CIRCULAR; - 80023da: 4b62 ldr r3, [pc, #392] ; (8002564 ) - 80023dc: 2220 movs r2, #32 - 80023de: 619a str r2, [r3, #24] - hdma_adc1.Init.Priority = DMA_PRIORITY_HIGH; - 80023e0: 4b60 ldr r3, [pc, #384] ; (8002564 ) - 80023e2: f44f 5200 mov.w r2, #8192 ; 0x2000 - 80023e6: 61da str r2, [r3, #28] - if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) - 80023e8: 485e ldr r0, [pc, #376] ; (8002564 ) - 80023ea: f002 fc53 bl 8004c94 - 80023ee: 4603 mov r3, r0 - 80023f0: 2b00 cmp r3, #0 - 80023f2: d001 beq.n 80023f8 - { - Error_Handler(); - 80023f4: f7ff ff6e bl 80022d4 - } - - __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); - 80023f8: 687b ldr r3, [r7, #4] - 80023fa: 4a5a ldr r2, [pc, #360] ; (8002564 ) - 80023fc: 639a str r2, [r3, #56] ; 0x38 - 80023fe: 4a59 ldr r2, [pc, #356] ; (8002564 ) - 8002400: 687b ldr r3, [r7, #4] - 8002402: 6253 str r3, [r2, #36] ; 0x24 - - /* ADC1 interrupt Init */ - HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0); - 8002404: 2200 movs r2, #0 - 8002406: 2100 movs r1, #0 - 8002408: 2012 movs r0, #18 - 800240a: f002 fc19 bl 8004c40 - HAL_NVIC_EnableIRQ(ADC1_2_IRQn); - 800240e: 2012 movs r0, #18 - 8002410: f002 fc32 bl 8004c78 - /* USER CODE BEGIN ADC3_MspInit 1 */ - - /* USER CODE END ADC3_MspInit 1 */ - } - -} - 8002414: e09e b.n 8002554 - else if(hadc->Instance==ADC2) - 8002416: 687b ldr r3, [r7, #4] - 8002418: 681b ldr r3, [r3, #0] - 800241a: 4a54 ldr r2, [pc, #336] ; (800256c ) - 800241c: 4293 cmp r3, r2 - 800241e: d15f bne.n 80024e0 - HAL_RCC_ADC12_CLK_ENABLED++; - 8002420: 4b4e ldr r3, [pc, #312] ; (800255c ) - 8002422: 681b ldr r3, [r3, #0] - 8002424: 3301 adds r3, #1 - 8002426: 4a4d ldr r2, [pc, #308] ; (800255c ) - 8002428: 6013 str r3, [r2, #0] - if(HAL_RCC_ADC12_CLK_ENABLED==1){ - 800242a: 4b4c ldr r3, [pc, #304] ; (800255c ) - 800242c: 681b ldr r3, [r3, #0] - 800242e: 2b01 cmp r3, #1 - 8002430: d10b bne.n 800244a - __HAL_RCC_ADC12_CLK_ENABLE(); - 8002432: 4b4b ldr r3, [pc, #300] ; (8002560 ) - 8002434: 695b ldr r3, [r3, #20] - 8002436: 4a4a ldr r2, [pc, #296] ; (8002560 ) - 8002438: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 800243c: 6153 str r3, [r2, #20] - 800243e: 4b48 ldr r3, [pc, #288] ; (8002560 ) - 8002440: 695b ldr r3, [r3, #20] - 8002442: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8002446: 613b str r3, [r7, #16] - 8002448: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 800244a: 4b45 ldr r3, [pc, #276] ; (8002560 ) - 800244c: 695b ldr r3, [r3, #20] - 800244e: 4a44 ldr r2, [pc, #272] ; (8002560 ) - 8002450: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8002454: 6153 str r3, [r2, #20] - 8002456: 4b42 ldr r3, [pc, #264] ; (8002560 ) - 8002458: 695b ldr r3, [r3, #20] - 800245a: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 800245e: 60fb str r3, [r7, #12] - 8002460: 68fb ldr r3, [r7, #12] - GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; - 8002462: 2330 movs r3, #48 ; 0x30 - 8002464: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8002466: 2303 movs r3, #3 - 8002468: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 800246a: 2300 movs r3, #0 - 800246c: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800246e: f107 031c add.w r3, r7, #28 - 8002472: 4619 mov r1, r3 - 8002474: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 8002478: f002 fdc0 bl 8004ffc - hdma_adc2.Instance = DMA2_Channel1; - 800247c: 4b3c ldr r3, [pc, #240] ; (8002570 ) - 800247e: 4a3d ldr r2, [pc, #244] ; (8002574 ) - 8002480: 601a str r2, [r3, #0] - hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY; - 8002482: 4b3b ldr r3, [pc, #236] ; (8002570 ) - 8002484: 2200 movs r2, #0 - 8002486: 605a str r2, [r3, #4] - hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE; - 8002488: 4b39 ldr r3, [pc, #228] ; (8002570 ) - 800248a: 2200 movs r2, #0 - 800248c: 609a str r2, [r3, #8] - hdma_adc2.Init.MemInc = DMA_MINC_ENABLE; - 800248e: 4b38 ldr r3, [pc, #224] ; (8002570 ) - 8002490: 2280 movs r2, #128 ; 0x80 - 8002492: 60da str r2, [r3, #12] - hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; - 8002494: 4b36 ldr r3, [pc, #216] ; (8002570 ) - 8002496: f44f 7200 mov.w r2, #512 ; 0x200 - 800249a: 611a str r2, [r3, #16] - hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; - 800249c: 4b34 ldr r3, [pc, #208] ; (8002570 ) - 800249e: f44f 6200 mov.w r2, #2048 ; 0x800 - 80024a2: 615a str r2, [r3, #20] - hdma_adc2.Init.Mode = DMA_CIRCULAR; - 80024a4: 4b32 ldr r3, [pc, #200] ; (8002570 ) - 80024a6: 2220 movs r2, #32 - 80024a8: 619a str r2, [r3, #24] - hdma_adc2.Init.Priority = DMA_PRIORITY_HIGH; - 80024aa: 4b31 ldr r3, [pc, #196] ; (8002570 ) - 80024ac: f44f 5200 mov.w r2, #8192 ; 0x2000 - 80024b0: 61da str r2, [r3, #28] - if (HAL_DMA_Init(&hdma_adc2) != HAL_OK) - 80024b2: 482f ldr r0, [pc, #188] ; (8002570 ) - 80024b4: f002 fbee bl 8004c94 - 80024b8: 4603 mov r3, r0 - 80024ba: 2b00 cmp r3, #0 - 80024bc: d001 beq.n 80024c2 - Error_Handler(); - 80024be: f7ff ff09 bl 80022d4 - __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc2); - 80024c2: 687b ldr r3, [r7, #4] - 80024c4: 4a2a ldr r2, [pc, #168] ; (8002570 ) - 80024c6: 639a str r2, [r3, #56] ; 0x38 - 80024c8: 4a29 ldr r2, [pc, #164] ; (8002570 ) - 80024ca: 687b ldr r3, [r7, #4] - 80024cc: 6253 str r3, [r2, #36] ; 0x24 - HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0); - 80024ce: 2200 movs r2, #0 - 80024d0: 2100 movs r1, #0 - 80024d2: 2012 movs r0, #18 - 80024d4: f002 fbb4 bl 8004c40 - HAL_NVIC_EnableIRQ(ADC1_2_IRQn); - 80024d8: 2012 movs r0, #18 - 80024da: f002 fbcd bl 8004c78 -} - 80024de: e039 b.n 8002554 - else if(hadc->Instance==ADC3) - 80024e0: 687b ldr r3, [r7, #4] - 80024e2: 681b ldr r3, [r3, #0] - 80024e4: 4a24 ldr r2, [pc, #144] ; (8002578 ) - 80024e6: 4293 cmp r3, r2 - 80024e8: d134 bne.n 8002554 - __HAL_RCC_ADC34_CLK_ENABLE(); - 80024ea: 4b1d ldr r3, [pc, #116] ; (8002560 ) - 80024ec: 695b ldr r3, [r3, #20] - 80024ee: 4a1c ldr r2, [pc, #112] ; (8002560 ) - 80024f0: f043 5300 orr.w r3, r3, #536870912 ; 0x20000000 - 80024f4: 6153 str r3, [r2, #20] - 80024f6: 4b1a ldr r3, [pc, #104] ; (8002560 ) - 80024f8: 695b ldr r3, [r3, #20] - 80024fa: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 80024fe: 60bb str r3, [r7, #8] - 8002500: 68bb ldr r3, [r7, #8] - hdma_adc3.Instance = DMA2_Channel5; - 8002502: 4b1e ldr r3, [pc, #120] ; (800257c ) - 8002504: 4a1e ldr r2, [pc, #120] ; (8002580 ) - 8002506: 601a str r2, [r3, #0] - hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY; - 8002508: 4b1c ldr r3, [pc, #112] ; (800257c ) - 800250a: 2200 movs r2, #0 - 800250c: 605a str r2, [r3, #4] - hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE; - 800250e: 4b1b ldr r3, [pc, #108] ; (800257c ) - 8002510: 2200 movs r2, #0 - 8002512: 609a str r2, [r3, #8] - hdma_adc3.Init.MemInc = DMA_MINC_ENABLE; - 8002514: 4b19 ldr r3, [pc, #100] ; (800257c ) - 8002516: 2280 movs r2, #128 ; 0x80 - 8002518: 60da str r2, [r3, #12] - hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; - 800251a: 4b18 ldr r3, [pc, #96] ; (800257c ) - 800251c: f44f 7200 mov.w r2, #512 ; 0x200 - 8002520: 611a str r2, [r3, #16] - hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; - 8002522: 4b16 ldr r3, [pc, #88] ; (800257c ) - 8002524: f44f 6200 mov.w r2, #2048 ; 0x800 - 8002528: 615a str r2, [r3, #20] - hdma_adc3.Init.Mode = DMA_CIRCULAR; - 800252a: 4b14 ldr r3, [pc, #80] ; (800257c ) - 800252c: 2220 movs r2, #32 - 800252e: 619a str r2, [r3, #24] - hdma_adc3.Init.Priority = DMA_PRIORITY_HIGH; - 8002530: 4b12 ldr r3, [pc, #72] ; (800257c ) - 8002532: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8002536: 61da str r2, [r3, #28] - if (HAL_DMA_Init(&hdma_adc3) != HAL_OK) - 8002538: 4810 ldr r0, [pc, #64] ; (800257c ) - 800253a: f002 fbab bl 8004c94 - 800253e: 4603 mov r3, r0 - 8002540: 2b00 cmp r3, #0 - 8002542: d001 beq.n 8002548 - Error_Handler(); - 8002544: f7ff fec6 bl 80022d4 - __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc3); - 8002548: 687b ldr r3, [r7, #4] - 800254a: 4a0c ldr r2, [pc, #48] ; (800257c ) - 800254c: 639a str r2, [r3, #56] ; 0x38 - 800254e: 4a0b ldr r2, [pc, #44] ; (800257c ) - 8002550: 687b ldr r3, [r7, #4] - 8002552: 6253 str r3, [r2, #36] ; 0x24 -} - 8002554: bf00 nop - 8002556: 3730 adds r7, #48 ; 0x30 - 8002558: 46bd mov sp, r7 - 800255a: bd80 pop {r7, pc} - 800255c: 2000005c .word 0x2000005c - 8002560: 40021000 .word 0x40021000 - 8002564: 20000a14 .word 0x20000a14 - 8002568: 40020008 .word 0x40020008 - 800256c: 50000100 .word 0x50000100 - 8002570: 20000b18 .word 0x20000b18 - 8002574: 40020408 .word 0x40020408 - 8002578: 50000400 .word 0x50000400 - 800257c: 200007b4 .word 0x200007b4 - 8002580: 40020458 .word 0x40020458 - -08002584 : -* This function configures the hardware resources used in this example -* @param hcomp: COMP handle pointer -* @retval None -*/ -void HAL_COMP_MspInit(COMP_HandleTypeDef* hcomp) -{ - 8002584: b580 push {r7, lr} - 8002586: b08c sub sp, #48 ; 0x30 - 8002588: af00 add r7, sp, #0 - 800258a: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800258c: f107 031c add.w r3, r7, #28 - 8002590: 2200 movs r2, #0 - 8002592: 601a str r2, [r3, #0] - 8002594: 605a str r2, [r3, #4] - 8002596: 609a str r2, [r3, #8] - 8002598: 60da str r2, [r3, #12] - 800259a: 611a str r2, [r3, #16] - if(hcomp->Instance==COMP1) - 800259c: 687b ldr r3, [r7, #4] - 800259e: 681b ldr r3, [r3, #0] - 80025a0: 4a3d ldr r2, [pc, #244] ; (8002698 ) - 80025a2: 4293 cmp r3, r2 - 80025a4: d119 bne.n 80025da - { - /* USER CODE BEGIN COMP1_MspInit 0 */ - - /* USER CODE END COMP1_MspInit 0 */ - - __HAL_RCC_GPIOA_CLK_ENABLE(); - 80025a6: 4b3d ldr r3, [pc, #244] ; (800269c ) - 80025a8: 695b ldr r3, [r3, #20] - 80025aa: 4a3c ldr r2, [pc, #240] ; (800269c ) - 80025ac: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80025b0: 6153 str r3, [r2, #20] - 80025b2: 4b3a ldr r3, [pc, #232] ; (800269c ) - 80025b4: 695b ldr r3, [r3, #20] - 80025b6: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80025ba: 61bb str r3, [r7, #24] - 80025bc: 69bb ldr r3, [r7, #24] - /**COMP1 GPIO Configuration - PA1 ------> COMP1_INP - */ - GPIO_InitStruct.Pin = GPIO_PIN_1; - 80025be: 2302 movs r3, #2 - 80025c0: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 80025c2: 2303 movs r3, #3 - 80025c4: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 80025c6: 2300 movs r3, #0 - 80025c8: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80025ca: f107 031c add.w r3, r7, #28 - 80025ce: 4619 mov r1, r3 - 80025d0: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 80025d4: f002 fd12 bl 8004ffc - /* USER CODE BEGIN COMP7_MspInit 1 */ - - /* USER CODE END COMP7_MspInit 1 */ - } - -} - 80025d8: e05a b.n 8002690 - else if(hcomp->Instance==COMP2) - 80025da: 687b ldr r3, [r7, #4] - 80025dc: 681b ldr r3, [r3, #0] - 80025de: 4a30 ldr r2, [pc, #192] ; (80026a0 ) - 80025e0: 4293 cmp r3, r2 - 80025e2: d119 bne.n 8002618 - __HAL_RCC_GPIOA_CLK_ENABLE(); - 80025e4: 4b2d ldr r3, [pc, #180] ; (800269c ) - 80025e6: 695b ldr r3, [r3, #20] - 80025e8: 4a2c ldr r2, [pc, #176] ; (800269c ) - 80025ea: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80025ee: 6153 str r3, [r2, #20] - 80025f0: 4b2a ldr r3, [pc, #168] ; (800269c ) - 80025f2: 695b ldr r3, [r3, #20] - 80025f4: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80025f8: 617b str r3, [r7, #20] - 80025fa: 697b ldr r3, [r7, #20] - GPIO_InitStruct.Pin = GPIO_PIN_7; - 80025fc: 2380 movs r3, #128 ; 0x80 - 80025fe: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8002600: 2303 movs r3, #3 - 8002602: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002604: 2300 movs r3, #0 - 8002606: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002608: f107 031c add.w r3, r7, #28 - 800260c: 4619 mov r1, r3 - 800260e: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 8002612: f002 fcf3 bl 8004ffc -} - 8002616: e03b b.n 8002690 - else if(hcomp->Instance==COMP4) - 8002618: 687b ldr r3, [r7, #4] - 800261a: 681b ldr r3, [r3, #0] - 800261c: 4a21 ldr r2, [pc, #132] ; (80026a4 ) - 800261e: 4293 cmp r3, r2 - 8002620: d118 bne.n 8002654 - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002622: 4b1e ldr r3, [pc, #120] ; (800269c ) - 8002624: 695b ldr r3, [r3, #20] - 8002626: 4a1d ldr r2, [pc, #116] ; (800269c ) - 8002628: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 800262c: 6153 str r3, [r2, #20] - 800262e: 4b1b ldr r3, [pc, #108] ; (800269c ) - 8002630: 695b ldr r3, [r3, #20] - 8002632: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8002636: 613b str r3, [r7, #16] - 8002638: 693b ldr r3, [r7, #16] - GPIO_InitStruct.Pin = GPIO_PIN_0; - 800263a: 2301 movs r3, #1 - 800263c: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 800263e: 2303 movs r3, #3 - 8002640: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002642: 2300 movs r3, #0 - 8002644: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002646: f107 031c add.w r3, r7, #28 - 800264a: 4619 mov r1, r3 - 800264c: 4816 ldr r0, [pc, #88] ; (80026a8 ) - 800264e: f002 fcd5 bl 8004ffc -} - 8002652: e01d b.n 8002690 - else if(hcomp->Instance==COMP7) - 8002654: 687b ldr r3, [r7, #4] - 8002656: 681b ldr r3, [r3, #0] - 8002658: 4a14 ldr r2, [pc, #80] ; (80026ac ) - 800265a: 4293 cmp r3, r2 - 800265c: d118 bne.n 8002690 - __HAL_RCC_GPIOA_CLK_ENABLE(); - 800265e: 4b0f ldr r3, [pc, #60] ; (800269c ) - 8002660: 695b ldr r3, [r3, #20] - 8002662: 4a0e ldr r2, [pc, #56] ; (800269c ) - 8002664: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8002668: 6153 str r3, [r2, #20] - 800266a: 4b0c ldr r3, [pc, #48] ; (800269c ) - 800266c: 695b ldr r3, [r3, #20] - 800266e: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8002672: 60fb str r3, [r7, #12] - 8002674: 68fb ldr r3, [r7, #12] - GPIO_InitStruct.Pin = GPIO_PIN_0; - 8002676: 2301 movs r3, #1 - 8002678: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 800267a: 2303 movs r3, #3 - 800267c: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 800267e: 2300 movs r3, #0 - 8002680: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002682: f107 031c add.w r3, r7, #28 - 8002686: 4619 mov r1, r3 - 8002688: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 800268c: f002 fcb6 bl 8004ffc -} - 8002690: bf00 nop - 8002692: 3730 adds r7, #48 ; 0x30 - 8002694: 46bd mov sp, r7 - 8002696: bd80 pop {r7, pc} - 8002698: 4001001c .word 0x4001001c - 800269c: 40021000 .word 0x40021000 - 80026a0: 40010020 .word 0x40010020 - 80026a4: 40010028 .word 0x40010028 - 80026a8: 48000400 .word 0x48000400 - 80026ac: 40010034 .word 0x40010034 - -080026b0 : -* This function configures the hardware resources used in this example -* @param hi2c: I2C handle pointer -* @retval None -*/ -void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) -{ - 80026b0: b580 push {r7, lr} - 80026b2: b08a sub sp, #40 ; 0x28 - 80026b4: af00 add r7, sp, #0 - 80026b6: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80026b8: f107 0314 add.w r3, r7, #20 - 80026bc: 2200 movs r2, #0 - 80026be: 601a str r2, [r3, #0] - 80026c0: 605a str r2, [r3, #4] - 80026c2: 609a str r2, [r3, #8] - 80026c4: 60da str r2, [r3, #12] - 80026c6: 611a str r2, [r3, #16] - if(hi2c->Instance==I2C1) - 80026c8: 687b ldr r3, [r7, #4] - 80026ca: 681b ldr r3, [r3, #0] - 80026cc: 4a4d ldr r2, [pc, #308] ; (8002804 ) - 80026ce: 4293 cmp r3, r2 - 80026d0: f040 8093 bne.w 80027fa - { - /* USER CODE BEGIN I2C1_MspInit 0 */ - - /* USER CODE END I2C1_MspInit 0 */ - - __HAL_RCC_GPIOA_CLK_ENABLE(); - 80026d4: 4b4c ldr r3, [pc, #304] ; (8002808 ) - 80026d6: 695b ldr r3, [r3, #20] - 80026d8: 4a4b ldr r2, [pc, #300] ; (8002808 ) - 80026da: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80026de: 6153 str r3, [r2, #20] - 80026e0: 4b49 ldr r3, [pc, #292] ; (8002808 ) - 80026e2: 695b ldr r3, [r3, #20] - 80026e4: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80026e8: 613b str r3, [r7, #16] - 80026ea: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOB_CLK_ENABLE(); - 80026ec: 4b46 ldr r3, [pc, #280] ; (8002808 ) - 80026ee: 695b ldr r3, [r3, #20] - 80026f0: 4a45 ldr r2, [pc, #276] ; (8002808 ) - 80026f2: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 80026f6: 6153 str r3, [r2, #20] - 80026f8: 4b43 ldr r3, [pc, #268] ; (8002808 ) - 80026fa: 695b ldr r3, [r3, #20] - 80026fc: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8002700: 60fb str r3, [r7, #12] - 8002702: 68fb ldr r3, [r7, #12] - /**I2C1 GPIO Configuration - PA15 ------> I2C1_SCL - PB9 ------> I2C1_SDA - */ - GPIO_InitStruct.Pin = GPIO_PIN_15; - 8002704: f44f 4300 mov.w r3, #32768 ; 0x8000 - 8002708: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 800270a: 2312 movs r3, #18 - 800270c: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_PULLUP; - 800270e: 2301 movs r3, #1 - 8002710: 61fb str r3, [r7, #28] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - 8002712: 2303 movs r3, #3 - 8002714: 623b str r3, [r7, #32] - GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; - 8002716: 2304 movs r3, #4 - 8002718: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800271a: f107 0314 add.w r3, r7, #20 - 800271e: 4619 mov r1, r3 - 8002720: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 8002724: f002 fc6a bl 8004ffc - - GPIO_InitStruct.Pin = GPIO_PIN_9; - 8002728: f44f 7300 mov.w r3, #512 ; 0x200 - 800272c: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 800272e: 2312 movs r3, #18 - 8002730: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_PULLUP; - 8002732: 2301 movs r3, #1 - 8002734: 61fb str r3, [r7, #28] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - 8002736: 2303 movs r3, #3 - 8002738: 623b str r3, [r7, #32] - GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; - 800273a: 2304 movs r3, #4 - 800273c: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 800273e: f107 0314 add.w r3, r7, #20 - 8002742: 4619 mov r1, r3 - 8002744: 4831 ldr r0, [pc, #196] ; (800280c ) - 8002746: f002 fc59 bl 8004ffc - - /* Peripheral clock enable */ - __HAL_RCC_I2C1_CLK_ENABLE(); - 800274a: 4b2f ldr r3, [pc, #188] ; (8002808 ) - 800274c: 69db ldr r3, [r3, #28] - 800274e: 4a2e ldr r2, [pc, #184] ; (8002808 ) - 8002750: f443 1300 orr.w r3, r3, #2097152 ; 0x200000 - 8002754: 61d3 str r3, [r2, #28] - 8002756: 4b2c ldr r3, [pc, #176] ; (8002808 ) - 8002758: 69db ldr r3, [r3, #28] - 800275a: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 800275e: 60bb str r3, [r7, #8] - 8002760: 68bb ldr r3, [r7, #8] - - /* I2C1 DMA Init */ - /* I2C1_RX Init */ - hdma_i2c1_rx.Instance = DMA1_Channel7; - 8002762: 4b2b ldr r3, [pc, #172] ; (8002810 ) - 8002764: 4a2b ldr r2, [pc, #172] ; (8002814 ) - 8002766: 601a str r2, [r3, #0] - hdma_i2c1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - 8002768: 4b29 ldr r3, [pc, #164] ; (8002810 ) - 800276a: 2200 movs r2, #0 - 800276c: 605a str r2, [r3, #4] - hdma_i2c1_rx.Init.PeriphInc = DMA_PINC_DISABLE; - 800276e: 4b28 ldr r3, [pc, #160] ; (8002810 ) - 8002770: 2200 movs r2, #0 - 8002772: 609a str r2, [r3, #8] - hdma_i2c1_rx.Init.MemInc = DMA_MINC_ENABLE; - 8002774: 4b26 ldr r3, [pc, #152] ; (8002810 ) - 8002776: 2280 movs r2, #128 ; 0x80 - 8002778: 60da str r2, [r3, #12] - hdma_i2c1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 800277a: 4b25 ldr r3, [pc, #148] ; (8002810 ) - 800277c: 2200 movs r2, #0 - 800277e: 611a str r2, [r3, #16] - hdma_i2c1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8002780: 4b23 ldr r3, [pc, #140] ; (8002810 ) - 8002782: 2200 movs r2, #0 - 8002784: 615a str r2, [r3, #20] - hdma_i2c1_rx.Init.Mode = DMA_NORMAL; - 8002786: 4b22 ldr r3, [pc, #136] ; (8002810 ) - 8002788: 2200 movs r2, #0 - 800278a: 619a str r2, [r3, #24] - hdma_i2c1_rx.Init.Priority = DMA_PRIORITY_LOW; - 800278c: 4b20 ldr r3, [pc, #128] ; (8002810 ) - 800278e: 2200 movs r2, #0 - 8002790: 61da str r2, [r3, #28] - if (HAL_DMA_Init(&hdma_i2c1_rx) != HAL_OK) - 8002792: 481f ldr r0, [pc, #124] ; (8002810 ) - 8002794: f002 fa7e bl 8004c94 - 8002798: 4603 mov r3, r0 - 800279a: 2b00 cmp r3, #0 - 800279c: d001 beq.n 80027a2 - { - Error_Handler(); - 800279e: f7ff fd99 bl 80022d4 - } - - __HAL_LINKDMA(hi2c,hdmarx,hdma_i2c1_rx); - 80027a2: 687b ldr r3, [r7, #4] - 80027a4: 4a1a ldr r2, [pc, #104] ; (8002810 ) - 80027a6: 63da str r2, [r3, #60] ; 0x3c - 80027a8: 4a19 ldr r2, [pc, #100] ; (8002810 ) - 80027aa: 687b ldr r3, [r7, #4] - 80027ac: 6253 str r3, [r2, #36] ; 0x24 - - /* I2C1_TX Init */ - hdma_i2c1_tx.Instance = DMA1_Channel6; - 80027ae: 4b1a ldr r3, [pc, #104] ; (8002818 ) - 80027b0: 4a1a ldr r2, [pc, #104] ; (800281c ) - 80027b2: 601a str r2, [r3, #0] - hdma_i2c1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 80027b4: 4b18 ldr r3, [pc, #96] ; (8002818 ) - 80027b6: 2210 movs r2, #16 - 80027b8: 605a str r2, [r3, #4] - hdma_i2c1_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 80027ba: 4b17 ldr r3, [pc, #92] ; (8002818 ) - 80027bc: 2200 movs r2, #0 - 80027be: 609a str r2, [r3, #8] - hdma_i2c1_tx.Init.MemInc = DMA_MINC_ENABLE; - 80027c0: 4b15 ldr r3, [pc, #84] ; (8002818 ) - 80027c2: 2280 movs r2, #128 ; 0x80 - 80027c4: 60da str r2, [r3, #12] - hdma_i2c1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 80027c6: 4b14 ldr r3, [pc, #80] ; (8002818 ) - 80027c8: 2200 movs r2, #0 - 80027ca: 611a str r2, [r3, #16] - hdma_i2c1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 80027cc: 4b12 ldr r3, [pc, #72] ; (8002818 ) - 80027ce: 2200 movs r2, #0 - 80027d0: 615a str r2, [r3, #20] - hdma_i2c1_tx.Init.Mode = DMA_NORMAL; - 80027d2: 4b11 ldr r3, [pc, #68] ; (8002818 ) - 80027d4: 2200 movs r2, #0 - 80027d6: 619a str r2, [r3, #24] - hdma_i2c1_tx.Init.Priority = DMA_PRIORITY_LOW; - 80027d8: 4b0f ldr r3, [pc, #60] ; (8002818 ) - 80027da: 2200 movs r2, #0 - 80027dc: 61da str r2, [r3, #28] - if (HAL_DMA_Init(&hdma_i2c1_tx) != HAL_OK) - 80027de: 480e ldr r0, [pc, #56] ; (8002818 ) - 80027e0: f002 fa58 bl 8004c94 - 80027e4: 4603 mov r3, r0 - 80027e6: 2b00 cmp r3, #0 - 80027e8: d001 beq.n 80027ee - { - Error_Handler(); - 80027ea: f7ff fd73 bl 80022d4 - } - - __HAL_LINKDMA(hi2c,hdmatx,hdma_i2c1_tx); - 80027ee: 687b ldr r3, [r7, #4] - 80027f0: 4a09 ldr r2, [pc, #36] ; (8002818 ) - 80027f2: 639a str r2, [r3, #56] ; 0x38 - 80027f4: 4a08 ldr r2, [pc, #32] ; (8002818 ) - 80027f6: 687b ldr r3, [r7, #4] - 80027f8: 6253 str r3, [r2, #36] ; 0x24 - /* USER CODE BEGIN I2C1_MspInit 1 */ - - /* USER CODE END I2C1_MspInit 1 */ - } - -} - 80027fa: bf00 nop - 80027fc: 3728 adds r7, #40 ; 0x28 - 80027fe: 46bd mov sp, r7 - 8002800: bd80 pop {r7, pc} - 8002802: bf00 nop - 8002804: 40005400 .word 0x40005400 - 8002808: 40021000 .word 0x40021000 - 800280c: 48000400 .word 0x48000400 - 8002810: 20000aa4 .word 0x20000aa4 - 8002814: 40020080 .word 0x40020080 - 8002818: 20000724 .word 0x20000724 - 800281c: 4002006c .word 0x4002006c - -08002820 : -* This function configures the hardware resources used in this example -* @param hopamp: OPAMP handle pointer -* @retval None -*/ -void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef* hopamp) -{ - 8002820: b580 push {r7, lr} - 8002822: b08a sub sp, #40 ; 0x28 - 8002824: af00 add r7, sp, #0 - 8002826: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002828: f107 0314 add.w r3, r7, #20 - 800282c: 2200 movs r2, #0 - 800282e: 601a str r2, [r3, #0] - 8002830: 605a str r2, [r3, #4] - 8002832: 609a str r2, [r3, #8] - 8002834: 60da str r2, [r3, #12] - 8002836: 611a str r2, [r3, #16] - if(hopamp->Instance==OPAMP1) - 8002838: 687b ldr r3, [r7, #4] - 800283a: 681b ldr r3, [r3, #0] - 800283c: 4a2e ldr r2, [pc, #184] ; (80028f8 ) - 800283e: 4293 cmp r3, r2 - 8002840: d119 bne.n 8002876 - { - /* USER CODE BEGIN OPAMP1_MspInit 0 */ - - /* USER CODE END OPAMP1_MspInit 0 */ - - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002842: 4b2e ldr r3, [pc, #184] ; (80028fc ) - 8002844: 695b ldr r3, [r3, #20] - 8002846: 4a2d ldr r2, [pc, #180] ; (80028fc ) - 8002848: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 800284c: 6153 str r3, [r2, #20] - 800284e: 4b2b ldr r3, [pc, #172] ; (80028fc ) - 8002850: 695b ldr r3, [r3, #20] - 8002852: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8002856: 613b str r3, [r7, #16] - 8002858: 693b ldr r3, [r7, #16] - /**OPAMP1 GPIO Configuration - PA1 ------> OPAMP1_VINP - PA2 ------> OPAMP1_VOUT - */ - GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2; - 800285a: 2306 movs r3, #6 - 800285c: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 800285e: 2303 movs r3, #3 - 8002860: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002862: 2300 movs r3, #0 - 8002864: 61fb str r3, [r7, #28] - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002866: f107 0314 add.w r3, r7, #20 - 800286a: 4619 mov r1, r3 - 800286c: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 8002870: f002 fbc4 bl 8004ffc - /* USER CODE BEGIN OPAMP3_MspInit 1 */ - - /* USER CODE END OPAMP3_MspInit 1 */ - } - -} - 8002874: e03b b.n 80028ee - else if(hopamp->Instance==OPAMP2) - 8002876: 687b ldr r3, [r7, #4] - 8002878: 681b ldr r3, [r3, #0] - 800287a: 4a21 ldr r2, [pc, #132] ; (8002900 ) - 800287c: 4293 cmp r3, r2 - 800287e: d119 bne.n 80028b4 - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002880: 4b1e ldr r3, [pc, #120] ; (80028fc ) - 8002882: 695b ldr r3, [r3, #20] - 8002884: 4a1d ldr r2, [pc, #116] ; (80028fc ) - 8002886: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 800288a: 6153 str r3, [r2, #20] - 800288c: 4b1b ldr r3, [pc, #108] ; (80028fc ) - 800288e: 695b ldr r3, [r3, #20] - 8002890: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8002894: 60fb str r3, [r7, #12] - 8002896: 68fb ldr r3, [r7, #12] - GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; - 8002898: 23c0 movs r3, #192 ; 0xc0 - 800289a: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 800289c: 2303 movs r3, #3 - 800289e: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 80028a0: 2300 movs r3, #0 - 80028a2: 61fb str r3, [r7, #28] - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80028a4: f107 0314 add.w r3, r7, #20 - 80028a8: 4619 mov r1, r3 - 80028aa: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 80028ae: f002 fba5 bl 8004ffc -} - 80028b2: e01c b.n 80028ee - else if(hopamp->Instance==OPAMP3) - 80028b4: 687b ldr r3, [r7, #4] - 80028b6: 681b ldr r3, [r3, #0] - 80028b8: 4a12 ldr r2, [pc, #72] ; (8002904 ) - 80028ba: 4293 cmp r3, r2 - 80028bc: d117 bne.n 80028ee - __HAL_RCC_GPIOB_CLK_ENABLE(); - 80028be: 4b0f ldr r3, [pc, #60] ; (80028fc ) - 80028c0: 695b ldr r3, [r3, #20] - 80028c2: 4a0e ldr r2, [pc, #56] ; (80028fc ) - 80028c4: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 80028c8: 6153 str r3, [r2, #20] - 80028ca: 4b0c ldr r3, [pc, #48] ; (80028fc ) - 80028cc: 695b ldr r3, [r3, #20] - 80028ce: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 80028d2: 60bb str r3, [r7, #8] - 80028d4: 68bb ldr r3, [r7, #8] - GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; - 80028d6: 2303 movs r3, #3 - 80028d8: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 80028da: 2303 movs r3, #3 - 80028dc: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 80028de: 2300 movs r3, #0 - 80028e0: 61fb str r3, [r7, #28] - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80028e2: f107 0314 add.w r3, r7, #20 - 80028e6: 4619 mov r1, r3 - 80028e8: 4807 ldr r0, [pc, #28] ; (8002908 ) - 80028ea: f002 fb87 bl 8004ffc -} - 80028ee: bf00 nop - 80028f0: 3728 adds r7, #40 ; 0x28 - 80028f2: 46bd mov sp, r7 - 80028f4: bd80 pop {r7, pc} - 80028f6: bf00 nop - 80028f8: 40010038 .word 0x40010038 - 80028fc: 40021000 .word 0x40021000 - 8002900: 4001003c .word 0x4001003c - 8002904: 40010040 .word 0x40010040 - 8002908: 48000400 .word 0x48000400 - -0800290c : -* This function configures the hardware resources used in this example -* @param htim_pwm: TIM_PWM handle pointer -* @retval None -*/ -void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm) -{ - 800290c: b480 push {r7} - 800290e: b085 sub sp, #20 - 8002910: af00 add r7, sp, #0 - 8002912: 6078 str r0, [r7, #4] - if(htim_pwm->Instance==TIM1) - 8002914: 687b ldr r3, [r7, #4] - 8002916: 681b ldr r3, [r3, #0] - 8002918: 4a0a ldr r2, [pc, #40] ; (8002944 ) - 800291a: 4293 cmp r3, r2 - 800291c: d10b bne.n 8002936 - { - /* USER CODE BEGIN TIM1_MspInit 0 */ - - /* USER CODE END TIM1_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_TIM1_CLK_ENABLE(); - 800291e: 4b0a ldr r3, [pc, #40] ; (8002948 ) - 8002920: 699b ldr r3, [r3, #24] - 8002922: 4a09 ldr r2, [pc, #36] ; (8002948 ) - 8002924: f443 6300 orr.w r3, r3, #2048 ; 0x800 - 8002928: 6193 str r3, [r2, #24] - 800292a: 4b07 ldr r3, [pc, #28] ; (8002948 ) - 800292c: 699b ldr r3, [r3, #24] - 800292e: f403 6300 and.w r3, r3, #2048 ; 0x800 - 8002932: 60fb str r3, [r7, #12] - 8002934: 68fb ldr r3, [r7, #12] - /* USER CODE BEGIN TIM1_MspInit 1 */ - - /* USER CODE END TIM1_MspInit 1 */ - } - -} - 8002936: bf00 nop - 8002938: 3714 adds r7, #20 - 800293a: 46bd mov sp, r7 - 800293c: f85d 7b04 ldr.w r7, [sp], #4 - 8002940: 4770 bx lr - 8002942: bf00 nop - 8002944: 40012c00 .word 0x40012c00 - 8002948: 40021000 .word 0x40021000 - -0800294c : -* This function configures the hardware resources used in this example -* @param htim_base: TIM_Base handle pointer -* @retval None -*/ -void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) -{ - 800294c: b580 push {r7, lr} - 800294e: b08c sub sp, #48 ; 0x30 - 8002950: af00 add r7, sp, #0 - 8002952: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002954: f107 031c add.w r3, r7, #28 - 8002958: 2200 movs r2, #0 - 800295a: 601a str r2, [r3, #0] - 800295c: 605a str r2, [r3, #4] - 800295e: 609a str r2, [r3, #8] - 8002960: 60da str r2, [r3, #12] - 8002962: 611a str r2, [r3, #16] - if(htim_base->Instance==TIM3) - 8002964: 687b ldr r3, [r7, #4] - 8002966: 681b ldr r3, [r3, #0] - 8002968: 4a32 ldr r2, [pc, #200] ; (8002a34 ) - 800296a: 4293 cmp r3, r2 - 800296c: d130 bne.n 80029d0 - { - /* USER CODE BEGIN TIM3_MspInit 0 */ - - /* USER CODE END TIM3_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_TIM3_CLK_ENABLE(); - 800296e: 4b32 ldr r3, [pc, #200] ; (8002a38 ) - 8002970: 69db ldr r3, [r3, #28] - 8002972: 4a31 ldr r2, [pc, #196] ; (8002a38 ) - 8002974: f043 0302 orr.w r3, r3, #2 - 8002978: 61d3 str r3, [r2, #28] - 800297a: 4b2f ldr r3, [pc, #188] ; (8002a38 ) - 800297c: 69db ldr r3, [r3, #28] - 800297e: f003 0302 and.w r3, r3, #2 - 8002982: 61bb str r3, [r7, #24] - 8002984: 69bb ldr r3, [r7, #24] - - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002986: 4b2c ldr r3, [pc, #176] ; (8002a38 ) - 8002988: 695b ldr r3, [r3, #20] - 800298a: 4a2b ldr r2, [pc, #172] ; (8002a38 ) - 800298c: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8002990: 6153 str r3, [r2, #20] - 8002992: 4b29 ldr r3, [pc, #164] ; (8002a38 ) - 8002994: 695b ldr r3, [r3, #20] - 8002996: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 800299a: 617b str r3, [r7, #20] - 800299c: 697b ldr r3, [r7, #20] - /**TIM3 GPIO Configuration - PB4 ------> TIM3_CH1 - */ - GPIO_InitStruct.Pin = GPIO_PIN_4; - 800299e: 2310 movs r3, #16 - 80029a0: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80029a2: 2302 movs r3, #2 - 80029a4: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 80029a6: 2300 movs r3, #0 - 80029a8: 627b str r3, [r7, #36] ; 0x24 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80029aa: 2300 movs r3, #0 - 80029ac: 62bb str r3, [r7, #40] ; 0x28 - GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; - 80029ae: 2302 movs r3, #2 - 80029b0: 62fb str r3, [r7, #44] ; 0x2c - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80029b2: f107 031c add.w r3, r7, #28 - 80029b6: 4619 mov r1, r3 - 80029b8: 4820 ldr r0, [pc, #128] ; (8002a3c ) - 80029ba: f002 fb1f bl 8004ffc - - /* TIM3 interrupt Init */ - HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); - 80029be: 2200 movs r2, #0 - 80029c0: 2100 movs r1, #0 - 80029c2: 201d movs r0, #29 - 80029c4: f002 f93c bl 8004c40 - HAL_NVIC_EnableIRQ(TIM3_IRQn); - 80029c8: 201d movs r0, #29 - 80029ca: f002 f955 bl 8004c78 - /* USER CODE BEGIN TIM4_MspInit 1 */ - - /* USER CODE END TIM4_MspInit 1 */ - } - -} - 80029ce: e02d b.n 8002a2c - else if(htim_base->Instance==TIM4) - 80029d0: 687b ldr r3, [r7, #4] - 80029d2: 681b ldr r3, [r3, #0] - 80029d4: 4a1a ldr r2, [pc, #104] ; (8002a40 ) - 80029d6: 4293 cmp r3, r2 - 80029d8: d128 bne.n 8002a2c - __HAL_RCC_TIM4_CLK_ENABLE(); - 80029da: 4b17 ldr r3, [pc, #92] ; (8002a38 ) - 80029dc: 69db ldr r3, [r3, #28] - 80029de: 4a16 ldr r2, [pc, #88] ; (8002a38 ) - 80029e0: f043 0304 orr.w r3, r3, #4 - 80029e4: 61d3 str r3, [r2, #28] - 80029e6: 4b14 ldr r3, [pc, #80] ; (8002a38 ) - 80029e8: 69db ldr r3, [r3, #28] - 80029ea: f003 0304 and.w r3, r3, #4 - 80029ee: 613b str r3, [r7, #16] - 80029f0: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOB_CLK_ENABLE(); - 80029f2: 4b11 ldr r3, [pc, #68] ; (8002a38 ) - 80029f4: 695b ldr r3, [r3, #20] - 80029f6: 4a10 ldr r2, [pc, #64] ; (8002a38 ) - 80029f8: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 80029fc: 6153 str r3, [r2, #20] - 80029fe: 4b0e ldr r3, [pc, #56] ; (8002a38 ) - 8002a00: 695b ldr r3, [r3, #20] - 8002a02: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8002a06: 60fb str r3, [r7, #12] - 8002a08: 68fb ldr r3, [r7, #12] - GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8; - 8002a0a: f44f 73e0 mov.w r3, #448 ; 0x1c0 - 8002a0e: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002a10: 2302 movs r3, #2 - 8002a12: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002a14: 2300 movs r3, #0 - 8002a16: 627b str r3, [r7, #36] ; 0x24 - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002a18: 2300 movs r3, #0 - 8002a1a: 62bb str r3, [r7, #40] ; 0x28 - GPIO_InitStruct.Alternate = GPIO_AF2_TIM4; - 8002a1c: 2302 movs r3, #2 - 8002a1e: 62fb str r3, [r7, #44] ; 0x2c - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002a20: f107 031c add.w r3, r7, #28 - 8002a24: 4619 mov r1, r3 - 8002a26: 4805 ldr r0, [pc, #20] ; (8002a3c ) - 8002a28: f002 fae8 bl 8004ffc -} - 8002a2c: bf00 nop - 8002a2e: 3730 adds r7, #48 ; 0x30 - 8002a30: 46bd mov sp, r7 - 8002a32: bd80 pop {r7, pc} - 8002a34: 40000400 .word 0x40000400 - 8002a38: 40021000 .word 0x40021000 - 8002a3c: 48000400 .word 0x48000400 - 8002a40: 40000800 .word 0x40000800 - -08002a44 : - -void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) -{ - 8002a44: b580 push {r7, lr} - 8002a46: b08a sub sp, #40 ; 0x28 - 8002a48: af00 add r7, sp, #0 - 8002a4a: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002a4c: f107 0314 add.w r3, r7, #20 - 8002a50: 2200 movs r2, #0 - 8002a52: 601a str r2, [r3, #0] - 8002a54: 605a str r2, [r3, #4] - 8002a56: 609a str r2, [r3, #8] - 8002a58: 60da str r2, [r3, #12] - 8002a5a: 611a str r2, [r3, #16] - if(htim->Instance==TIM1) - 8002a5c: 687b ldr r3, [r7, #4] - 8002a5e: 681b ldr r3, [r3, #0] - 8002a60: 4a29 ldr r2, [pc, #164] ; (8002b08 ) - 8002a62: 4293 cmp r3, r2 - 8002a64: d14b bne.n 8002afe - { - /* USER CODE BEGIN TIM1_MspPostInit 0 */ - - /* USER CODE END TIM1_MspPostInit 0 */ - - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002a66: 4b29 ldr r3, [pc, #164] ; (8002b0c ) - 8002a68: 695b ldr r3, [r3, #20] - 8002a6a: 4a28 ldr r2, [pc, #160] ; (8002b0c ) - 8002a6c: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8002a70: 6153 str r3, [r2, #20] - 8002a72: 4b26 ldr r3, [pc, #152] ; (8002b0c ) - 8002a74: 695b ldr r3, [r3, #20] - 8002a76: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8002a7a: 613b str r3, [r7, #16] - 8002a7c: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002a7e: 4b23 ldr r3, [pc, #140] ; (8002b0c ) - 8002a80: 695b ldr r3, [r3, #20] - 8002a82: 4a22 ldr r2, [pc, #136] ; (8002b0c ) - 8002a84: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8002a88: 6153 str r3, [r2, #20] - 8002a8a: 4b20 ldr r3, [pc, #128] ; (8002b0c ) - 8002a8c: 695b ldr r3, [r3, #20] - 8002a8e: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8002a92: 60fb str r3, [r7, #12] - 8002a94: 68fb ldr r3, [r7, #12] - PB15 ------> TIM1_CH3N - PA8 ------> TIM1_CH1 - PA9 ------> TIM1_CH2 - PA10 ------> TIM1_CH3 - */ - GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14; - 8002a96: f44f 43c0 mov.w r3, #24576 ; 0x6000 - 8002a9a: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002a9c: 2302 movs r3, #2 - 8002a9e: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002aa0: 2300 movs r3, #0 - 8002aa2: 61fb str r3, [r7, #28] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002aa4: 2300 movs r3, #0 - 8002aa6: 623b str r3, [r7, #32] - GPIO_InitStruct.Alternate = GPIO_AF6_TIM1; - 8002aa8: 2306 movs r3, #6 - 8002aaa: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002aac: f107 0314 add.w r3, r7, #20 - 8002ab0: 4619 mov r1, r3 - 8002ab2: 4817 ldr r0, [pc, #92] ; (8002b10 ) - 8002ab4: f002 faa2 bl 8004ffc - - GPIO_InitStruct.Pin = GPIO_PIN_15; - 8002ab8: f44f 4300 mov.w r3, #32768 ; 0x8000 - 8002abc: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002abe: 2302 movs r3, #2 - 8002ac0: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002ac2: 2300 movs r3, #0 - 8002ac4: 61fb str r3, [r7, #28] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002ac6: 2300 movs r3, #0 - 8002ac8: 623b str r3, [r7, #32] - GPIO_InitStruct.Alternate = GPIO_AF4_TIM1; - 8002aca: 2304 movs r3, #4 - 8002acc: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002ace: f107 0314 add.w r3, r7, #20 - 8002ad2: 4619 mov r1, r3 - 8002ad4: 480e ldr r0, [pc, #56] ; (8002b10 ) - 8002ad6: f002 fa91 bl 8004ffc - - GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10; - 8002ada: f44f 63e0 mov.w r3, #1792 ; 0x700 - 8002ade: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002ae0: 2302 movs r3, #2 - 8002ae2: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002ae4: 2300 movs r3, #0 - 8002ae6: 61fb str r3, [r7, #28] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002ae8: 2300 movs r3, #0 - 8002aea: 623b str r3, [r7, #32] - GPIO_InitStruct.Alternate = GPIO_AF6_TIM1; - 8002aec: 2306 movs r3, #6 - 8002aee: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002af0: f107 0314 add.w r3, r7, #20 - 8002af4: 4619 mov r1, r3 - 8002af6: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 - 8002afa: f002 fa7f bl 8004ffc - /* USER CODE BEGIN TIM1_MspPostInit 1 */ - - /* USER CODE END TIM1_MspPostInit 1 */ - } - -} - 8002afe: bf00 nop - 8002b00: 3728 adds r7, #40 ; 0x28 - 8002b02: 46bd mov sp, r7 - 8002b04: bd80 pop {r7, pc} - 8002b06: bf00 nop - 8002b08: 40012c00 .word 0x40012c00 - 8002b0c: 40021000 .word 0x40021000 - 8002b10: 48000400 .word 0x48000400 - -08002b14 : -* This function configures the hardware resources used in this example -* @param huart: UART handle pointer -* @retval None -*/ -void HAL_UART_MspInit(UART_HandleTypeDef* huart) -{ - 8002b14: b580 push {r7, lr} - 8002b16: b08a sub sp, #40 ; 0x28 - 8002b18: af00 add r7, sp, #0 - 8002b1a: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002b1c: f107 0314 add.w r3, r7, #20 - 8002b20: 2200 movs r2, #0 - 8002b22: 601a str r2, [r3, #0] - 8002b24: 605a str r2, [r3, #4] - 8002b26: 609a str r2, [r3, #8] - 8002b28: 60da str r2, [r3, #12] - 8002b2a: 611a str r2, [r3, #16] - if(huart->Instance==USART3) - 8002b2c: 687b ldr r3, [r7, #4] - 8002b2e: 681b ldr r3, [r3, #0] - 8002b30: 4a46 ldr r2, [pc, #280] ; (8002c4c ) - 8002b32: 4293 cmp r3, r2 - 8002b34: f040 8086 bne.w 8002c44 - { - /* USER CODE BEGIN USART3_MspInit 0 */ - - /* USER CODE END USART3_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_USART3_CLK_ENABLE(); - 8002b38: 4b45 ldr r3, [pc, #276] ; (8002c50 ) - 8002b3a: 69db ldr r3, [r3, #28] - 8002b3c: 4a44 ldr r2, [pc, #272] ; (8002c50 ) - 8002b3e: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8002b42: 61d3 str r3, [r2, #28] - 8002b44: 4b42 ldr r3, [pc, #264] ; (8002c50 ) - 8002b46: 69db ldr r3, [r3, #28] - 8002b48: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8002b4c: 613b str r3, [r7, #16] - 8002b4e: 693b ldr r3, [r7, #16] - - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002b50: 4b3f ldr r3, [pc, #252] ; (8002c50 ) - 8002b52: 695b ldr r3, [r3, #20] - 8002b54: 4a3e ldr r2, [pc, #248] ; (8002c50 ) - 8002b56: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8002b5a: 6153 str r3, [r2, #20] - 8002b5c: 4b3c ldr r3, [pc, #240] ; (8002c50 ) - 8002b5e: 695b ldr r3, [r3, #20] - 8002b60: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8002b64: 60fb str r3, [r7, #12] - 8002b66: 68fb ldr r3, [r7, #12] - /**USART3 GPIO Configuration - PB10 ------> USART3_TX - PB11 ------> USART3_RX - */ - GPIO_InitStruct.Pin = GPIO_PIN_10; - 8002b68: f44f 6380 mov.w r3, #1024 ; 0x400 - 8002b6c: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002b6e: 2302 movs r3, #2 - 8002b70: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002b72: 2300 movs r3, #0 - 8002b74: 61fb str r3, [r7, #28] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - 8002b76: 2303 movs r3, #3 - 8002b78: 623b str r3, [r7, #32] - GPIO_InitStruct.Alternate = GPIO_AF7_USART3; - 8002b7a: 2307 movs r3, #7 - 8002b7c: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002b7e: f107 0314 add.w r3, r7, #20 - 8002b82: 4619 mov r1, r3 - 8002b84: 4833 ldr r0, [pc, #204] ; (8002c54 ) - 8002b86: f002 fa39 bl 8004ffc - - GPIO_InitStruct.Pin = GPIO_PIN_11; - 8002b8a: f44f 6300 mov.w r3, #2048 ; 0x800 - 8002b8e: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002b90: 2302 movs r3, #2 - 8002b92: 61bb str r3, [r7, #24] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002b94: 2300 movs r3, #0 - 8002b96: 61fb str r3, [r7, #28] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002b98: 2300 movs r3, #0 - 8002b9a: 623b str r3, [r7, #32] - GPIO_InitStruct.Alternate = GPIO_AF7_USART3; - 8002b9c: 2307 movs r3, #7 - 8002b9e: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002ba0: f107 0314 add.w r3, r7, #20 - 8002ba4: 4619 mov r1, r3 - 8002ba6: 482b ldr r0, [pc, #172] ; (8002c54 ) - 8002ba8: f002 fa28 bl 8004ffc - - /* USART3 DMA Init */ - /* USART3_RX Init */ - hdma_usart3_rx.Instance = DMA1_Channel3; - 8002bac: 4b2a ldr r3, [pc, #168] ; (8002c58 ) - 8002bae: 4a2b ldr r2, [pc, #172] ; (8002c5c ) - 8002bb0: 601a str r2, [r3, #0] - hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - 8002bb2: 4b29 ldr r3, [pc, #164] ; (8002c58 ) - 8002bb4: 2200 movs r2, #0 - 8002bb6: 605a str r2, [r3, #4] - hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE; - 8002bb8: 4b27 ldr r3, [pc, #156] ; (8002c58 ) - 8002bba: 2200 movs r2, #0 - 8002bbc: 609a str r2, [r3, #8] - hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE; - 8002bbe: 4b26 ldr r3, [pc, #152] ; (8002c58 ) - 8002bc0: 2280 movs r2, #128 ; 0x80 - 8002bc2: 60da str r2, [r3, #12] - hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8002bc4: 4b24 ldr r3, [pc, #144] ; (8002c58 ) - 8002bc6: 2200 movs r2, #0 - 8002bc8: 611a str r2, [r3, #16] - hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8002bca: 4b23 ldr r3, [pc, #140] ; (8002c58 ) - 8002bcc: 2200 movs r2, #0 - 8002bce: 615a str r2, [r3, #20] - hdma_usart3_rx.Init.Mode = DMA_NORMAL; - 8002bd0: 4b21 ldr r3, [pc, #132] ; (8002c58 ) - 8002bd2: 2200 movs r2, #0 - 8002bd4: 619a str r2, [r3, #24] - hdma_usart3_rx.Init.Priority = DMA_PRIORITY_LOW; - 8002bd6: 4b20 ldr r3, [pc, #128] ; (8002c58 ) - 8002bd8: 2200 movs r2, #0 - 8002bda: 61da str r2, [r3, #28] - if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK) - 8002bdc: 481e ldr r0, [pc, #120] ; (8002c58 ) - 8002bde: f002 f859 bl 8004c94 - 8002be2: 4603 mov r3, r0 - 8002be4: 2b00 cmp r3, #0 - 8002be6: d001 beq.n 8002bec - { - Error_Handler(); - 8002be8: f7ff fb74 bl 80022d4 - } - - __HAL_LINKDMA(huart,hdmarx,hdma_usart3_rx); - 8002bec: 687b ldr r3, [r7, #4] - 8002bee: 4a1a ldr r2, [pc, #104] ; (8002c58 ) - 8002bf0: 66da str r2, [r3, #108] ; 0x6c - 8002bf2: 4a19 ldr r2, [pc, #100] ; (8002c58 ) - 8002bf4: 687b ldr r3, [r7, #4] - 8002bf6: 6253 str r3, [r2, #36] ; 0x24 - - /* USART3_TX Init */ - hdma_usart3_tx.Instance = DMA1_Channel2; - 8002bf8: 4b19 ldr r3, [pc, #100] ; (8002c60 ) - 8002bfa: 4a1a ldr r2, [pc, #104] ; (8002c64 ) - 8002bfc: 601a str r2, [r3, #0] - hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 8002bfe: 4b18 ldr r3, [pc, #96] ; (8002c60 ) - 8002c00: 2210 movs r2, #16 - 8002c02: 605a str r2, [r3, #4] - hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8002c04: 4b16 ldr r3, [pc, #88] ; (8002c60 ) - 8002c06: 2200 movs r2, #0 - 8002c08: 609a str r2, [r3, #8] - hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE; - 8002c0a: 4b15 ldr r3, [pc, #84] ; (8002c60 ) - 8002c0c: 2280 movs r2, #128 ; 0x80 - 8002c0e: 60da str r2, [r3, #12] - hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8002c10: 4b13 ldr r3, [pc, #76] ; (8002c60 ) - 8002c12: 2200 movs r2, #0 - 8002c14: 611a str r2, [r3, #16] - hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8002c16: 4b12 ldr r3, [pc, #72] ; (8002c60 ) - 8002c18: 2200 movs r2, #0 - 8002c1a: 615a str r2, [r3, #20] - hdma_usart3_tx.Init.Mode = DMA_NORMAL; - 8002c1c: 4b10 ldr r3, [pc, #64] ; (8002c60 ) - 8002c1e: 2200 movs r2, #0 - 8002c20: 619a str r2, [r3, #24] - hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW; - 8002c22: 4b0f ldr r3, [pc, #60] ; (8002c60 ) - 8002c24: 2200 movs r2, #0 - 8002c26: 61da str r2, [r3, #28] - if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK) - 8002c28: 480d ldr r0, [pc, #52] ; (8002c60 ) - 8002c2a: f002 f833 bl 8004c94 - 8002c2e: 4603 mov r3, r0 - 8002c30: 2b00 cmp r3, #0 - 8002c32: d001 beq.n 8002c38 - { - Error_Handler(); - 8002c34: f7ff fb4e bl 80022d4 - } - - __HAL_LINKDMA(huart,hdmatx,hdma_usart3_tx); - 8002c38: 687b ldr r3, [r7, #4] - 8002c3a: 4a09 ldr r2, [pc, #36] ; (8002c60 ) - 8002c3c: 669a str r2, [r3, #104] ; 0x68 - 8002c3e: 4a08 ldr r2, [pc, #32] ; (8002c60 ) - 8002c40: 687b ldr r3, [r7, #4] - 8002c42: 6253 str r3, [r2, #36] ; 0x24 - /* USER CODE BEGIN USART3_MspInit 1 */ - - /* USER CODE END USART3_MspInit 1 */ - } - -} - 8002c44: bf00 nop - 8002c46: 3728 adds r7, #40 ; 0x28 - 8002c48: 46bd mov sp, r7 - 8002c4a: bd80 pop {r7, pc} - 8002c4c: 40004800 .word 0x40004800 - 8002c50: 40021000 .word 0x40021000 - 8002c54: 48000400 .word 0x48000400 - 8002c58: 20000610 .word 0x20000610 - 8002c5c: 40020030 .word 0x40020030 - 8002c60: 200007f8 .word 0x200007f8 - 8002c64: 4002001c .word 0x4002001c - -08002c68 : - * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). - * @param TickPriority: Tick interrupt priority. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) -{ - 8002c68: b580 push {r7, lr} - 8002c6a: b08c sub sp, #48 ; 0x30 - 8002c6c: af00 add r7, sp, #0 - 8002c6e: 6078 str r0, [r7, #4] - RCC_ClkInitTypeDef clkconfig; - uint32_t uwTimclock = 0; - 8002c70: 2300 movs r3, #0 - 8002c72: 62fb str r3, [r7, #44] ; 0x2c - uint32_t uwPrescalerValue = 0; - 8002c74: 2300 movs r3, #0 - 8002c76: 62bb str r3, [r7, #40] ; 0x28 - uint32_t pFLatency; - /*Configure the TIM7 IRQ priority */ - HAL_NVIC_SetPriority(TIM7_IRQn, TickPriority ,0); - 8002c78: 2200 movs r2, #0 - 8002c7a: 6879 ldr r1, [r7, #4] - 8002c7c: 2037 movs r0, #55 ; 0x37 - 8002c7e: f001 ffdf bl 8004c40 - - /* Enable the TIM7 global Interrupt */ - HAL_NVIC_EnableIRQ(TIM7_IRQn); - 8002c82: 2037 movs r0, #55 ; 0x37 - 8002c84: f001 fff8 bl 8004c78 - /* Enable TIM7 clock */ - __HAL_RCC_TIM7_CLK_ENABLE(); - 8002c88: 4b1f ldr r3, [pc, #124] ; (8002d08 ) - 8002c8a: 69db ldr r3, [r3, #28] - 8002c8c: 4a1e ldr r2, [pc, #120] ; (8002d08 ) - 8002c8e: f043 0320 orr.w r3, r3, #32 - 8002c92: 61d3 str r3, [r2, #28] - 8002c94: 4b1c ldr r3, [pc, #112] ; (8002d08 ) - 8002c96: 69db ldr r3, [r3, #28] - 8002c98: f003 0320 and.w r3, r3, #32 - 8002c9c: 60fb str r3, [r7, #12] - 8002c9e: 68fb ldr r3, [r7, #12] - - /* Get clock configuration */ - HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); - 8002ca0: f107 0210 add.w r2, r7, #16 - 8002ca4: f107 0314 add.w r3, r7, #20 - 8002ca8: 4611 mov r1, r2 - 8002caa: 4618 mov r0, r3 - 8002cac: f004 fb9c bl 80073e8 - - /* Compute TIM7 clock */ - uwTimclock = 2*HAL_RCC_GetPCLK1Freq(); - 8002cb0: f004 fb56 bl 8007360 - 8002cb4: 4603 mov r3, r0 - 8002cb6: 005b lsls r3, r3, #1 - 8002cb8: 62fb str r3, [r7, #44] ; 0x2c - - /* Compute the prescaler value to have TIM7 counter clock equal to 1MHz */ - uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000) - 1); - 8002cba: 6afb ldr r3, [r7, #44] ; 0x2c - 8002cbc: 4a13 ldr r2, [pc, #76] ; (8002d0c ) - 8002cbe: fba2 2303 umull r2, r3, r2, r3 - 8002cc2: 0c9b lsrs r3, r3, #18 - 8002cc4: 3b01 subs r3, #1 - 8002cc6: 62bb str r3, [r7, #40] ; 0x28 - - /* Initialize TIM7 */ - htim7.Instance = TIM7; - 8002cc8: 4b11 ldr r3, [pc, #68] ; (8002d10 ) - 8002cca: 4a12 ldr r2, [pc, #72] ; (8002d14 ) - 8002ccc: 601a str r2, [r3, #0] - + Period = [(TIM7CLK/1000) - 1]. to have a (1/1000) s time base. - + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. - + ClockDivision = 0 - + Counter direction = Up - */ - htim7.Init.Period = (1000000 / 1000) - 1; - 8002cce: 4b10 ldr r3, [pc, #64] ; (8002d10 ) - 8002cd0: f240 32e7 movw r2, #999 ; 0x3e7 - 8002cd4: 60da str r2, [r3, #12] - htim7.Init.Prescaler = uwPrescalerValue; - 8002cd6: 4a0e ldr r2, [pc, #56] ; (8002d10 ) - 8002cd8: 6abb ldr r3, [r7, #40] ; 0x28 - 8002cda: 6053 str r3, [r2, #4] - htim7.Init.ClockDivision = 0; - 8002cdc: 4b0c ldr r3, [pc, #48] ; (8002d10 ) - 8002cde: 2200 movs r2, #0 - 8002ce0: 611a str r2, [r3, #16] - htim7.Init.CounterMode = TIM_COUNTERMODE_UP; - 8002ce2: 4b0b ldr r3, [pc, #44] ; (8002d10 ) - 8002ce4: 2200 movs r2, #0 - 8002ce6: 609a str r2, [r3, #8] - if(HAL_TIM_Base_Init(&htim7) == HAL_OK) - 8002ce8: 4809 ldr r0, [pc, #36] ; (8002d10 ) - 8002cea: f004 fd5f bl 80077ac - 8002cee: 4603 mov r3, r0 - 8002cf0: 2b00 cmp r3, #0 - 8002cf2: d104 bne.n 8002cfe - { - /* Start the TIM time Base generation in interrupt mode */ - return HAL_TIM_Base_Start_IT(&htim7); - 8002cf4: 4806 ldr r0, [pc, #24] ; (8002d10 ) - 8002cf6: f004 fd85 bl 8007804 - 8002cfa: 4603 mov r3, r0 - 8002cfc: e000 b.n 8002d00 - } - - /* Return function status */ - return HAL_ERROR; - 8002cfe: 2301 movs r3, #1 -} - 8002d00: 4618 mov r0, r3 - 8002d02: 3730 adds r7, #48 ; 0x30 - 8002d04: 46bd mov sp, r7 - 8002d06: bd80 pop {r7, pc} - 8002d08: 40021000 .word 0x40021000 - 8002d0c: 431bde83 .word 0x431bde83 - 8002d10: 20000b5c .word 0x20000b5c - 8002d14: 40001400 .word 0x40001400 - -08002d18 : -/******************************************************************************/ -/** - * @brief This function handles Non maskable interrupt. - */ -void NMI_Handler(void) -{ - 8002d18: b480 push {r7} - 8002d1a: af00 add r7, sp, #0 - - /* USER CODE END NonMaskableInt_IRQn 0 */ - /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ - - /* USER CODE END NonMaskableInt_IRQn 1 */ -} - 8002d1c: bf00 nop - 8002d1e: 46bd mov sp, r7 - 8002d20: f85d 7b04 ldr.w r7, [sp], #4 - 8002d24: 4770 bx lr - -08002d26 : - -/** - * @brief This function handles Hard fault interrupt. - */ -void HardFault_Handler(void) -{ - 8002d26: b480 push {r7} - 8002d28: af00 add r7, sp, #0 - /* USER CODE BEGIN HardFault_IRQn 0 */ - - /* USER CODE END HardFault_IRQn 0 */ - while (1) - 8002d2a: e7fe b.n 8002d2a - -08002d2c : - -/** - * @brief This function handles Memory management fault. - */ -void MemManage_Handler(void) -{ - 8002d2c: b480 push {r7} - 8002d2e: af00 add r7, sp, #0 - /* USER CODE BEGIN MemoryManagement_IRQn 0 */ - - /* USER CODE END MemoryManagement_IRQn 0 */ - while (1) - 8002d30: e7fe b.n 8002d30 - -08002d32 : - -/** - * @brief This function handles Pre-fetch fault, memory access fault. - */ -void BusFault_Handler(void) -{ - 8002d32: b480 push {r7} - 8002d34: af00 add r7, sp, #0 - /* USER CODE BEGIN BusFault_IRQn 0 */ - - /* USER CODE END BusFault_IRQn 0 */ - while (1) - 8002d36: e7fe b.n 8002d36 - -08002d38 : - -/** - * @brief This function handles Undefined instruction or illegal state. - */ -void UsageFault_Handler(void) -{ - 8002d38: b480 push {r7} - 8002d3a: af00 add r7, sp, #0 - /* USER CODE BEGIN UsageFault_IRQn 0 */ - - /* USER CODE END UsageFault_IRQn 0 */ - while (1) - 8002d3c: e7fe b.n 8002d3c - -08002d3e : - -/** - * @brief This function handles Debug monitor. - */ -void DebugMon_Handler(void) -{ - 8002d3e: b480 push {r7} - 8002d40: af00 add r7, sp, #0 - - /* USER CODE END DebugMonitor_IRQn 0 */ - /* USER CODE BEGIN DebugMonitor_IRQn 1 */ - - /* USER CODE END DebugMonitor_IRQn 1 */ -} - 8002d42: bf00 nop - 8002d44: 46bd mov sp, r7 - 8002d46: f85d 7b04 ldr.w r7, [sp], #4 - 8002d4a: 4770 bx lr - -08002d4c : - -/** - * @brief This function handles DMA1 channel1 global interrupt. - */ -void DMA1_Channel1_IRQHandler(void) -{ - 8002d4c: b580 push {r7, lr} - 8002d4e: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ - - /* USER CODE END DMA1_Channel1_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_adc1); - 8002d50: 4812 ldr r0, [pc, #72] ; (8002d9c ) - 8002d52: f002 f845 bl 8004de0 - /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ - ADCConversion(); - 8002d56: f7fe f843 bl 8000de0 - BLDCCurrentController(); - 8002d5a: f7fd ff19 bl 8000b90 - BLDCCommuteHall(); - 8002d5e: f7fd fe8d bl 8000a7c - extern float adcBuff1[3]; - adcBuff1[0]=(float)measurement_buffers.RawADC[0][0]; - 8002d62: 4b0f ldr r3, [pc, #60] ; (8002da0 ) - 8002d64: 681b ldr r3, [r3, #0] - 8002d66: ee07 3a90 vmov s15, r3 - 8002d6a: eef8 7a67 vcvt.f32.u32 s15, s15 - 8002d6e: 4b0d ldr r3, [pc, #52] ; (8002da4 ) - 8002d70: edc3 7a00 vstr s15, [r3] - adcBuff1[1]=(float)measurement_buffers.RawADC[0][1]; - 8002d74: 4b0a ldr r3, [pc, #40] ; (8002da0 ) - 8002d76: 685b ldr r3, [r3, #4] - 8002d78: ee07 3a90 vmov s15, r3 - 8002d7c: eef8 7a67 vcvt.f32.u32 s15, s15 - 8002d80: 4b08 ldr r3, [pc, #32] ; (8002da4 ) - 8002d82: edc3 7a01 vstr s15, [r3, #4] - adcBuff1[2]=(float)measurement_buffers.RawADC[0][2]; - 8002d86: 4b06 ldr r3, [pc, #24] ; (8002da0 ) - 8002d88: 689b ldr r3, [r3, #8] - 8002d8a: ee07 3a90 vmov s15, r3 - 8002d8e: eef8 7a67 vcvt.f32.u32 s15, s15 - 8002d92: 4b04 ldr r3, [pc, #16] ; (8002da4 ) - 8002d94: edc3 7a02 vstr s15, [r3, #8] - /* USER CODE END DMA1_Channel1_IRQn 1 */ -} - 8002d98: bf00 nop - 8002d9a: bd80 pop {r7, pc} - 8002d9c: 20000a14 .word 0x20000a14 - 8002da0: 200004ec .word 0x200004ec - 8002da4: 20000044 .word 0x20000044 - -08002da8 : - -/** - * @brief This function handles DMA1 channel2 global interrupt. - */ -void DMA1_Channel2_IRQHandler(void) -{ - 8002da8: b580 push {r7, lr} - 8002daa: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */ - - /* USER CODE END DMA1_Channel2_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart3_tx); - 8002dac: 4802 ldr r0, [pc, #8] ; (8002db8 ) - 8002dae: f002 f817 bl 8004de0 - /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */ - - /* USER CODE END DMA1_Channel2_IRQn 1 */ -} - 8002db2: bf00 nop - 8002db4: bd80 pop {r7, pc} - 8002db6: bf00 nop - 8002db8: 200007f8 .word 0x200007f8 - -08002dbc : - -/** - * @brief This function handles DMA1 channel3 global interrupt. - */ -void DMA1_Channel3_IRQHandler(void) -{ - 8002dbc: b580 push {r7, lr} - 8002dbe: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA1_Channel3_IRQn 0 */ - - /* USER CODE END DMA1_Channel3_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart3_rx); - 8002dc0: 4802 ldr r0, [pc, #8] ; (8002dcc ) - 8002dc2: f002 f80d bl 8004de0 - /* USER CODE BEGIN DMA1_Channel3_IRQn 1 */ - - /* USER CODE END DMA1_Channel3_IRQn 1 */ -} - 8002dc6: bf00 nop - 8002dc8: bd80 pop {r7, pc} - 8002dca: bf00 nop - 8002dcc: 20000610 .word 0x20000610 - -08002dd0 : - -/** - * @brief This function handles DMA1 channel6 global interrupt. - */ -void DMA1_Channel6_IRQHandler(void) -{ - 8002dd0: b580 push {r7, lr} - 8002dd2: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA1_Channel6_IRQn 0 */ - - /* USER CODE END DMA1_Channel6_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_i2c1_tx); - 8002dd4: 4802 ldr r0, [pc, #8] ; (8002de0 ) - 8002dd6: f002 f803 bl 8004de0 - /* USER CODE BEGIN DMA1_Channel6_IRQn 1 */ - - /* USER CODE END DMA1_Channel6_IRQn 1 */ -} - 8002dda: bf00 nop - 8002ddc: bd80 pop {r7, pc} - 8002dde: bf00 nop - 8002de0: 20000724 .word 0x20000724 - -08002de4 : - -/** - * @brief This function handles DMA1 channel7 global interrupt. - */ -void DMA1_Channel7_IRQHandler(void) -{ - 8002de4: b580 push {r7, lr} - 8002de6: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA1_Channel7_IRQn 0 */ - - /* USER CODE END DMA1_Channel7_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_i2c1_rx); - 8002de8: 4802 ldr r0, [pc, #8] ; (8002df4 ) - 8002dea: f001 fff9 bl 8004de0 - /* USER CODE BEGIN DMA1_Channel7_IRQn 1 */ - - /* USER CODE END DMA1_Channel7_IRQn 1 */ -} - 8002dee: bf00 nop - 8002df0: bd80 pop {r7, pc} - 8002df2: bf00 nop - 8002df4: 20000aa4 .word 0x20000aa4 - -08002df8 : - -/** - * @brief This function handles ADC1 and ADC2 interrupts. - */ -void ADC1_2_IRQHandler(void) -{ - 8002df8: b580 push {r7, lr} - 8002dfa: af00 add r7, sp, #0 - /* USER CODE BEGIN ADC1_2_IRQn 0 */ - - - /* USER CODE END ADC1_2_IRQn 0 */ - HAL_ADC_IRQHandler(&hadc1); - 8002dfc: 4803 ldr r0, [pc, #12] ; (8002e0c ) - 8002dfe: f000 fbf7 bl 80035f0 - HAL_ADC_IRQHandler(&hadc2); - 8002e02: 4803 ldr r0, [pc, #12] ; (8002e10 ) - 8002e04: f000 fbf4 bl 80035f0 - /* USER CODE BEGIN ADC1_2_IRQn 1 */ - - /* USER CODE END ADC1_2_IRQn 1 */ -} - 8002e08: bf00 nop - 8002e0a: bd80 pop {r7, pc} - 8002e0c: 20000944 .word 0x20000944 - 8002e10: 200006d4 .word 0x200006d4 - -08002e14 : - -/** - * @brief This function handles USB low priority or CAN_RX0 interrupts. - */ -void USB_LP_CAN_RX0_IRQHandler(void) -{ - 8002e14: b580 push {r7, lr} - 8002e16: af00 add r7, sp, #0 - /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 0 */ - - /* USER CODE END USB_LP_CAN_RX0_IRQn 0 */ - HAL_PCD_IRQHandler(&hpcd_USB_FS); - 8002e18: 4802 ldr r0, [pc, #8] ; (8002e24 ) - 8002e1a: f002 fc66 bl 80056ea - /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 1 */ - - /* USER CODE END USB_LP_CAN_RX0_IRQn 1 */ -} - 8002e1e: bf00 nop - 8002e20: bd80 pop {r7, pc} - 8002e22: bf00 nop - 8002e24: 20000ba0 .word 0x20000ba0 - -08002e28 : - -/** - * @brief This function handles TIM3 global interrupt. - */ -void TIM3_IRQHandler(void) -{ - 8002e28: b580 push {r7, lr} - 8002e2a: af00 add r7, sp, #0 - /* USER CODE BEGIN TIM3_IRQn 0 */ - - /* USER CODE END TIM3_IRQn 0 */ - HAL_TIM_IRQHandler(&htim3); - 8002e2c: 4802 ldr r0, [pc, #8] ; (8002e38 ) - 8002e2e: f004 fe3b bl 8007aa8 - /* USER CODE BEGIN TIM3_IRQn 1 */ - - /* USER CODE END TIM3_IRQn 1 */ -} - 8002e32: bf00 nop - 8002e34: bd80 pop {r7, pc} - 8002e36: bf00 nop - 8002e38: 200008a0 .word 0x200008a0 - -08002e3c : - -/** - * @brief This function handles TIM7 global interrupt. - */ -void TIM7_IRQHandler(void) -{ - 8002e3c: b580 push {r7, lr} - 8002e3e: af00 add r7, sp, #0 - /* USER CODE BEGIN TIM7_IRQn 0 */ - - /* USER CODE END TIM7_IRQn 0 */ - HAL_TIM_IRQHandler(&htim7); - 8002e40: 4802 ldr r0, [pc, #8] ; (8002e4c ) - 8002e42: f004 fe31 bl 8007aa8 - /* USER CODE BEGIN TIM7_IRQn 1 */ - - /* USER CODE END TIM7_IRQn 1 */ -} - 8002e46: bf00 nop - 8002e48: bd80 pop {r7, pc} - 8002e4a: bf00 nop - 8002e4c: 20000b5c .word 0x20000b5c - -08002e50 : - -/** - * @brief This function handles DMA2 channel1 global interrupt. - */ -void DMA2_Channel1_IRQHandler(void) -{ - 8002e50: b580 push {r7, lr} - 8002e52: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA2_Channel1_IRQn 0 */ - - /* USER CODE END DMA2_Channel1_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_adc2); - 8002e54: 4802 ldr r0, [pc, #8] ; (8002e60 ) - 8002e56: f001 ffc3 bl 8004de0 - /* USER CODE BEGIN DMA2_Channel1_IRQn 1 */ - - /* USER CODE END DMA2_Channel1_IRQn 1 */ -} - 8002e5a: bf00 nop - 8002e5c: bd80 pop {r7, pc} - 8002e5e: bf00 nop - 8002e60: 20000b18 .word 0x20000b18 - -08002e64 : - -/** - * @brief This function handles DMA2 channel5 global interrupt. - */ -void DMA2_Channel5_IRQHandler(void) -{ - 8002e64: b580 push {r7, lr} - 8002e66: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA2_Channel5_IRQn 0 */ - - /* USER CODE END DMA2_Channel5_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_adc3); - 8002e68: 4802 ldr r0, [pc, #8] ; (8002e74 ) - 8002e6a: f001 ffb9 bl 8004de0 - /* USER CODE BEGIN DMA2_Channel5_IRQn 1 */ - - /* USER CODE END DMA2_Channel5_IRQn 1 */ -} - 8002e6e: bf00 nop - 8002e70: bd80 pop {r7, pc} - 8002e72: bf00 nop - 8002e74: 200007b4 .word 0x200007b4 - -08002e78 : - * @brief Setup the microcontroller system - * @param None - * @retval None - */ -void SystemInit(void) -{ - 8002e78: b480 push {r7} - 8002e7a: af00 add r7, sp, #0 -/* FPU settings --------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 8002e7c: 4b08 ldr r3, [pc, #32] ; (8002ea0 ) - 8002e7e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8002e82: 4a07 ldr r2, [pc, #28] ; (8002ea0 ) - 8002e84: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 8002e88: f8c2 3088 str.w r3, [r2, #136] ; 0x88 -#endif - -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ - 8002e8c: 4b04 ldr r3, [pc, #16] ; (8002ea0 ) - 8002e8e: f04f 6200 mov.w r2, #134217728 ; 0x8000000 - 8002e92: 609a str r2, [r3, #8] -#endif -} - 8002e94: bf00 nop - 8002e96: 46bd mov sp, r7 - 8002e98: f85d 7b04 ldr.w r7, [sp], #4 - 8002e9c: 4770 bx lr - 8002e9e: bf00 nop - 8002ea0: e000ed00 .word 0xe000ed00 - -08002ea4 : - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* Atollic update: set stack pointer */ - 8002ea4: f8df d034 ldr.w sp, [pc, #52] ; 8002edc - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - 8002ea8: 2100 movs r1, #0 - b LoopCopyDataInit - 8002eaa: e003 b.n 8002eb4 - -08002eac : - -CopyDataInit: - ldr r3, =_sidata - 8002eac: 4b0c ldr r3, [pc, #48] ; (8002ee0 ) - ldr r3, [r3, r1] - 8002eae: 585b ldr r3, [r3, r1] - str r3, [r0, r1] - 8002eb0: 5043 str r3, [r0, r1] - adds r1, r1, #4 - 8002eb2: 3104 adds r1, #4 - -08002eb4 : - -LoopCopyDataInit: - ldr r0, =_sdata - 8002eb4: 480b ldr r0, [pc, #44] ; (8002ee4 ) - ldr r3, =_edata - 8002eb6: 4b0c ldr r3, [pc, #48] ; (8002ee8 ) - adds r2, r0, r1 - 8002eb8: 1842 adds r2, r0, r1 - cmp r2, r3 - 8002eba: 429a cmp r2, r3 - bcc CopyDataInit - 8002ebc: d3f6 bcc.n 8002eac - ldr r2, =_sbss - 8002ebe: 4a0b ldr r2, [pc, #44] ; (8002eec ) - b LoopFillZerobss - 8002ec0: e002 b.n 8002ec8 - -08002ec2 : -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - 8002ec2: 2300 movs r3, #0 - str r3, [r2], #4 - 8002ec4: f842 3b04 str.w r3, [r2], #4 - -08002ec8 : - -LoopFillZerobss: - ldr r3, = _ebss - 8002ec8: 4b09 ldr r3, [pc, #36] ; (8002ef0 ) - cmp r2, r3 - 8002eca: 429a cmp r2, r3 - bcc FillZerobss - 8002ecc: d3f9 bcc.n 8002ec2 - -/* Call the clock system intitialization function.*/ - bl SystemInit - 8002ece: f7ff ffd3 bl 8002e78 -/* Call static constructors */ - bl __libc_init_array - 8002ed2: f008 ffd3 bl 800be7c <__libc_init_array> -/* Call the application's entry point.*/ - bl main - 8002ed6: f7fe faf7 bl 80014c8
- -08002eda : - -LoopForever: - b LoopForever - 8002eda: e7fe b.n 8002eda - ldr sp, =_estack /* Atollic update: set stack pointer */ - 8002edc: 20008000 .word 0x20008000 - ldr r3, =_sidata - 8002ee0: 0800bf70 .word 0x0800bf70 - ldr r0, =_sdata - 8002ee4: 20000000 .word 0x20000000 - ldr r3, =_edata - 8002ee8: 20000014 .word 0x20000014 - ldr r2, =_sbss - 8002eec: 20000014 .word 0x20000014 - ldr r3, = _ebss - 8002ef0: 20000e0c .word 0x20000e0c - -08002ef4 : - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - 8002ef4: e7fe b.n 8002ef4 - ... - -08002ef8 : - * In the default implementation,Systick is used as source of time base. - * The tick variable is incremented each 1ms in its ISR. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_Init(void) -{ - 8002ef8: b580 push {r7, lr} - 8002efa: af00 add r7, sp, #0 - /* Configure Flash prefetch */ -#if (PREFETCH_ENABLE != 0U) - __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8002efc: 4b08 ldr r3, [pc, #32] ; (8002f20 ) - 8002efe: 681b ldr r3, [r3, #0] - 8002f00: 4a07 ldr r2, [pc, #28] ; (8002f20 ) - 8002f02: f043 0310 orr.w r3, r3, #16 - 8002f06: 6013 str r3, [r2, #0] -#endif /* PREFETCH_ENABLE */ - - /* Set Interrupt Group Priority */ - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8002f08: 2003 movs r0, #3 - 8002f0a: f001 fe8e bl 8004c2a - - /* Enable systick and configure 1ms tick (default clock after Reset is HSI) */ - HAL_InitTick(TICK_INT_PRIORITY); - 8002f0e: 2000 movs r0, #0 - 8002f10: f7ff feaa bl 8002c68 - - /* Init the low level hardware */ - HAL_MspInit(); - 8002f14: f7ff f9e6 bl 80022e4 - - /* Return function status */ - return HAL_OK; - 8002f18: 2300 movs r3, #0 -} - 8002f1a: 4618 mov r0, r3 - 8002f1c: bd80 pop {r7, pc} - 8002f1e: bf00 nop - 8002f20: 40022000 .word 0x40022000 - -08002f24 : - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval None - */ -__weak void HAL_IncTick(void) -{ - 8002f24: b480 push {r7} - 8002f26: af00 add r7, sp, #0 - uwTick += uwTickFreq; - 8002f28: 4b06 ldr r3, [pc, #24] ; (8002f44 ) - 8002f2a: 781b ldrb r3, [r3, #0] - 8002f2c: 461a mov r2, r3 - 8002f2e: 4b06 ldr r3, [pc, #24] ; (8002f48 ) - 8002f30: 681b ldr r3, [r3, #0] - 8002f32: 4413 add r3, r2 - 8002f34: 4a04 ldr r2, [pc, #16] ; (8002f48 ) - 8002f36: 6013 str r3, [r2, #0] -} - 8002f38: bf00 nop - 8002f3a: 46bd mov sp, r7 - 8002f3c: f85d 7b04 ldr.w r7, [sp], #4 - 8002f40: 4770 bx lr - 8002f42: bf00 nop - 8002f44: 20000010 .word 0x20000010 - 8002f48: 20000b9c .word 0x20000b9c - -08002f4c : - * @note The function is declared as __Weak to be overwritten in case of other - * implementations in user file. - * @retval tick value - */ -__weak uint32_t HAL_GetTick(void) -{ - 8002f4c: b480 push {r7} - 8002f4e: af00 add r7, sp, #0 - return uwTick; - 8002f50: 4b03 ldr r3, [pc, #12] ; (8002f60 ) - 8002f52: 681b ldr r3, [r3, #0] -} - 8002f54: 4618 mov r0, r3 - 8002f56: 46bd mov sp, r7 - 8002f58: f85d 7b04 ldr.w r7, [sp], #4 - 8002f5c: 4770 bx lr - 8002f5e: bf00 nop - 8002f60: 20000b9c .word 0x20000b9c - -08002f64 : - * implementations in user file. - * @param Delay specifies the delay time length, in milliseconds. - * @retval None - */ -__weak void HAL_Delay(uint32_t Delay) -{ - 8002f64: b580 push {r7, lr} - 8002f66: b084 sub sp, #16 - 8002f68: af00 add r7, sp, #0 - 8002f6a: 6078 str r0, [r7, #4] - uint32_t tickstart = HAL_GetTick(); - 8002f6c: f7ff ffee bl 8002f4c - 8002f70: 60b8 str r0, [r7, #8] - uint32_t wait = Delay; - 8002f72: 687b ldr r3, [r7, #4] - 8002f74: 60fb str r3, [r7, #12] - - /* Add freq to guarantee minimum wait */ - if (wait < HAL_MAX_DELAY) - 8002f76: 68fb ldr r3, [r7, #12] - 8002f78: f1b3 3fff cmp.w r3, #4294967295 - 8002f7c: d005 beq.n 8002f8a - { - wait += (uint32_t)(uwTickFreq); - 8002f7e: 4b09 ldr r3, [pc, #36] ; (8002fa4 ) - 8002f80: 781b ldrb r3, [r3, #0] - 8002f82: 461a mov r2, r3 - 8002f84: 68fb ldr r3, [r7, #12] - 8002f86: 4413 add r3, r2 - 8002f88: 60fb str r3, [r7, #12] - } - - while((HAL_GetTick() - tickstart) < wait) - 8002f8a: bf00 nop - 8002f8c: f7ff ffde bl 8002f4c - 8002f90: 4602 mov r2, r0 - 8002f92: 68bb ldr r3, [r7, #8] - 8002f94: 1ad3 subs r3, r2, r3 - 8002f96: 68fa ldr r2, [r7, #12] - 8002f98: 429a cmp r2, r3 - 8002f9a: d8f7 bhi.n 8002f8c - { - } -} - 8002f9c: bf00 nop - 8002f9e: 3710 adds r7, #16 - 8002fa0: 46bd mov sp, r7 - 8002fa2: bd80 pop {r7, pc} - 8002fa4: 20000010 .word 0x20000010 - -08002fa8 : - * @brief Conversion complete callback in non blocking mode - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) -{ - 8002fa8: b480 push {r7} - 8002faa: b083 sub sp, #12 - 8002fac: af00 add r7, sp, #0 - 8002fae: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ConvCpltCallback must be implemented in the user file. - */ -} - 8002fb0: bf00 nop - 8002fb2: 370c adds r7, #12 - 8002fb4: 46bd mov sp, r7 - 8002fb6: f85d 7b04 ldr.w r7, [sp], #4 - 8002fba: 4770 bx lr - -08002fbc : - * @brief Conversion DMA half-transfer callback in non blocking mode - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) -{ - 8002fbc: b480 push {r7} - 8002fbe: b083 sub sp, #12 - 8002fc0: af00 add r7, sp, #0 - 8002fc2: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. - */ -} - 8002fc4: bf00 nop - 8002fc6: 370c adds r7, #12 - 8002fc8: 46bd mov sp, r7 - 8002fca: f85d 7b04 ldr.w r7, [sp], #4 - 8002fce: 4770 bx lr - -08002fd0 : - * @brief Analog watchdog callback in non blocking mode. - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) -{ - 8002fd0: b480 push {r7} - 8002fd2: b083 sub sp, #12 - 8002fd4: af00 add r7, sp, #0 - 8002fd6: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file. - */ -} - 8002fd8: bf00 nop - 8002fda: 370c adds r7, #12 - 8002fdc: 46bd mov sp, r7 - 8002fde: f85d 7b04 ldr.w r7, [sp], #4 - 8002fe2: 4770 bx lr - -08002fe4 : - * (ADC conversion with interruption or transfer by DMA) - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) -{ - 8002fe4: b480 push {r7} - 8002fe6: b083 sub sp, #12 - 8002fe8: af00 add r7, sp, #0 - 8002fea: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ErrorCallback must be implemented in the user file. - */ -} - 8002fec: bf00 nop - 8002fee: 370c adds r7, #12 - 8002ff0: 46bd mov sp, r7 - 8002ff2: f85d 7b04 ldr.w r7, [sp], #4 - 8002ff6: 4770 bx lr - -08002ff8 : - * without disabling the other ADCs sharing the same common group. - * @param hadc ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) -{ - 8002ff8: b580 push {r7, lr} - 8002ffa: b09a sub sp, #104 ; 0x68 - 8002ffc: af00 add r7, sp, #0 - 8002ffe: 6078 str r0, [r7, #4] - HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8003000: 2300 movs r3, #0 - 8003002: f887 3067 strb.w r3, [r7, #103] ; 0x67 - ADC_Common_TypeDef *tmpADC_Common; - ADC_HandleTypeDef tmphadcSharingSameCommonRegister; - uint32_t tmpCFGR = 0U; - 8003006: 2300 movs r3, #0 - 8003008: 663b str r3, [r7, #96] ; 0x60 - __IO uint32_t wait_loop_index = 0U; - 800300a: 2300 movs r3, #0 - 800300c: 60bb str r3, [r7, #8] - - /* Check ADC handle */ - if(hadc == NULL) - 800300e: 687b ldr r3, [r7, #4] - 8003010: 2b00 cmp r3, #0 - 8003012: d101 bne.n 8003018 - { - return HAL_ERROR; - 8003014: 2301 movs r3, #1 - 8003016: e1c9 b.n 80033ac - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); - assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); - assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); - - if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - 8003018: 687b ldr r3, [r7, #4] - 800301a: 691b ldr r3, [r3, #16] - 800301c: 2b00 cmp r3, #0 - assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion)); - } - } - - /* Configuration of ADC core parameters and ADC MSP related parameters */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - 800301e: 687b ldr r3, [r7, #4] - 8003020: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003022: f003 0310 and.w r3, r3, #16 - 8003026: 2b00 cmp r3, #0 - 8003028: d176 bne.n 8003118 - /* procedure. */ - - /* Actions performed only if ADC is coming from state reset: */ - /* - Initialization of ADC MSP */ - /* - ADC voltage regulator enable */ - if (hadc->State == HAL_ADC_STATE_RESET) - 800302a: 687b ldr r3, [r7, #4] - 800302c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800302e: 2b00 cmp r3, #0 - 8003030: d152 bne.n 80030d8 - { - /* Initialize ADC error code */ - ADC_CLEAR_ERRORCODE(hadc); - 8003032: 687b ldr r3, [r7, #4] - 8003034: 2200 movs r2, #0 - 8003036: 645a str r2, [r3, #68] ; 0x44 - - /* Initialize HAL ADC API internal variables */ - hadc->InjectionConfig.ChannelCount = 0U; - 8003038: 687b ldr r3, [r7, #4] - 800303a: 2200 movs r2, #0 - 800303c: 64da str r2, [r3, #76] ; 0x4c - hadc->InjectionConfig.ContextQueue = 0U; - 800303e: 687b ldr r3, [r7, #4] - 8003040: 2200 movs r2, #0 - 8003042: 649a str r2, [r3, #72] ; 0x48 - - /* Allocate lock resource and initialize it */ - hadc->Lock = HAL_UNLOCKED; - 8003044: 687b ldr r3, [r7, #4] - 8003046: 2200 movs r2, #0 - 8003048: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Init the low level hardware */ - hadc->MspInitCallback(hadc); -#else - /* Init the low level hardware */ - HAL_ADC_MspInit(hadc); - 800304c: 6878 ldr r0, [r7, #4] - 800304e: f7ff f971 bl 8002334 -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ - - /* Enable voltage regulator (if disabled at this step) */ - if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN_0)) - 8003052: 687b ldr r3, [r7, #4] - 8003054: 681b ldr r3, [r3, #0] - 8003056: 689b ldr r3, [r3, #8] - 8003058: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800305c: 2b00 cmp r3, #0 - 800305e: d13b bne.n 80030d8 - /* enabling the ADC. This temporization must be implemented by */ - /* software and is equal to 10 us in the worst case */ - /* process/temperature/power supply. */ - - /* Disable the ADC (if not already disabled) */ - tmp_hal_status = ADC_Disable(hadc); - 8003060: 6878 ldr r0, [r7, #4] - 8003062: f001 fc55 bl 8004910 - 8003066: 4603 mov r3, r0 - 8003068: f887 3067 strb.w r3, [r7, #103] ; 0x67 - - /* Check if ADC is effectively disabled */ - /* Configuration of ADC parameters if previous preliminary actions */ - /* are correctly completed. */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && - 800306c: 687b ldr r3, [r7, #4] - 800306e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003070: f003 0310 and.w r3, r3, #16 - 8003074: 2b00 cmp r3, #0 - 8003076: d12f bne.n 80030d8 - 8003078: f897 3067 ldrb.w r3, [r7, #103] ; 0x67 - 800307c: 2b00 cmp r3, #0 - 800307e: d12b bne.n 80030d8 - (tmp_hal_status == HAL_OK) ) - { - /* Set ADC state */ - ADC_STATE_CLR_SET(hadc->State, - 8003080: 687b ldr r3, [r7, #4] - 8003082: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003084: f423 5388 bic.w r3, r3, #4352 ; 0x1100 - 8003088: f023 0302 bic.w r3, r3, #2 - 800308c: f043 0202 orr.w r2, r3, #2 - 8003090: 687b ldr r3, [r7, #4] - 8003092: 641a str r2, [r3, #64] ; 0x40 - HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, - HAL_ADC_STATE_BUSY_INTERNAL); - - /* Set the intermediate state before moving the ADC voltage */ - /* regulator to state enable. */ - CLEAR_BIT(hadc->Instance->CR, (ADC_CR_ADVREGEN_1 | ADC_CR_ADVREGEN_0)); - 8003094: 687b ldr r3, [r7, #4] - 8003096: 681b ldr r3, [r3, #0] - 8003098: 689a ldr r2, [r3, #8] - 800309a: 687b ldr r3, [r7, #4] - 800309c: 681b ldr r3, [r3, #0] - 800309e: f022 5240 bic.w r2, r2, #805306368 ; 0x30000000 - 80030a2: 609a str r2, [r3, #8] - /* Set ADVREGEN bits to 0x01U */ - SET_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN_0); - 80030a4: 687b ldr r3, [r7, #4] - 80030a6: 681b ldr r3, [r3, #0] - 80030a8: 689a ldr r2, [r3, #8] - 80030aa: 687b ldr r3, [r7, #4] - 80030ac: 681b ldr r3, [r3, #0] - 80030ae: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 - 80030b2: 609a str r2, [r3, #8] - - /* Delay for ADC stabilization time. */ - /* Compute number of CPU cycles to wait for */ - wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); - 80030b4: 4b86 ldr r3, [pc, #536] ; (80032d0 ) - 80030b6: 681b ldr r3, [r3, #0] - 80030b8: 4a86 ldr r2, [pc, #536] ; (80032d4 ) - 80030ba: fba2 2303 umull r2, r3, r2, r3 - 80030be: 0c9a lsrs r2, r3, #18 - 80030c0: 4613 mov r3, r2 - 80030c2: 009b lsls r3, r3, #2 - 80030c4: 4413 add r3, r2 - 80030c6: 005b lsls r3, r3, #1 - 80030c8: 60bb str r3, [r7, #8] - while(wait_loop_index != 0U) - 80030ca: e002 b.n 80030d2 - { - wait_loop_index--; - 80030cc: 68bb ldr r3, [r7, #8] - 80030ce: 3b01 subs r3, #1 - 80030d0: 60bb str r3, [r7, #8] - while(wait_loop_index != 0U) - 80030d2: 68bb ldr r3, [r7, #8] - 80030d4: 2b00 cmp r3, #0 - 80030d6: d1f9 bne.n 80030cc - } - - /* Verification that ADC voltage regulator is correctly enabled, whether */ - /* or not ADC is coming from state reset (if any potential problem of */ - /* clocking, voltage regulator would not be enabled). */ - if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN_0) || - 80030d8: 687b ldr r3, [r7, #4] - 80030da: 681b ldr r3, [r3, #0] - 80030dc: 689b ldr r3, [r3, #8] - 80030de: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 80030e2: 2b00 cmp r3, #0 - 80030e4: d007 beq.n 80030f6 - HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADVREGEN_1) ) - 80030e6: 687b ldr r3, [r7, #4] - 80030e8: 681b ldr r3, [r3, #0] - 80030ea: 689b ldr r3, [r3, #8] - 80030ec: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN_0) || - 80030f0: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80030f4: d110 bne.n 8003118 - { - /* Update ADC state machine to error */ - ADC_STATE_CLR_SET(hadc->State, - 80030f6: 687b ldr r3, [r7, #4] - 80030f8: 6c1b ldr r3, [r3, #64] ; 0x40 - 80030fa: f023 0312 bic.w r3, r3, #18 - 80030fe: f043 0210 orr.w r2, r3, #16 - 8003102: 687b ldr r3, [r7, #4] - 8003104: 641a str r2, [r3, #64] ; 0x40 - HAL_ADC_STATE_BUSY_INTERNAL, - HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8003106: 687b ldr r3, [r7, #4] - 8003108: 6c5b ldr r3, [r3, #68] ; 0x44 - 800310a: f043 0201 orr.w r2, r3, #1 - 800310e: 687b ldr r3, [r7, #4] - 8003110: 645a str r2, [r3, #68] ; 0x44 - - tmp_hal_status = HAL_ERROR; - 8003112: 2301 movs r3, #1 - 8003114: f887 3067 strb.w r3, [r7, #103] ; 0x67 - - /* Configuration of ADC parameters if previous preliminary actions are */ - /* correctly completed and if there is no conversion on going on regular */ - /* group (ADC may already be enabled at this point if HAL_ADC_Init() is */ - /* called to update a parameter on the fly). */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && - 8003118: 687b ldr r3, [r7, #4] - 800311a: 6c1b ldr r3, [r3, #64] ; 0x40 - 800311c: f003 0310 and.w r3, r3, #16 - 8003120: 2b00 cmp r3, #0 - 8003122: f040 8136 bne.w 8003392 - 8003126: f897 3067 ldrb.w r3, [r7, #103] ; 0x67 - 800312a: 2b00 cmp r3, #0 - 800312c: f040 8131 bne.w 8003392 - (tmp_hal_status == HAL_OK) && - (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) - 8003130: 687b ldr r3, [r7, #4] - 8003132: 681b ldr r3, [r3, #0] - 8003134: 689b ldr r3, [r3, #8] - 8003136: f003 0304 and.w r3, r3, #4 - (tmp_hal_status == HAL_OK) && - 800313a: 2b00 cmp r3, #0 - 800313c: f040 8129 bne.w 8003392 - { - /* Set ADC state */ - ADC_STATE_CLR_SET(hadc->State, - 8003140: 687b ldr r3, [r7, #4] - 8003142: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003144: f423 7381 bic.w r3, r3, #258 ; 0x102 - 8003148: f043 0202 orr.w r2, r3, #2 - 800314c: 687b ldr r3, [r7, #4] - 800314e: 641a str r2, [r3, #64] ; 0x40 - /* Configuration of common ADC parameters */ - - /* Pointer to the common control register to which is belonging hadc */ - /* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */ - /* control registers) */ - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - 8003150: 687b ldr r3, [r7, #4] - 8003152: 681b ldr r3, [r3, #0] - 8003154: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8003158: d004 beq.n 8003164 - 800315a: 687b ldr r3, [r7, #4] - 800315c: 681b ldr r3, [r3, #0] - 800315e: 4a5e ldr r2, [pc, #376] ; (80032d8 ) - 8003160: 4293 cmp r3, r2 - 8003162: d101 bne.n 8003168 - 8003164: 4b5d ldr r3, [pc, #372] ; (80032dc ) - 8003166: e000 b.n 800316a - 8003168: 4b5d ldr r3, [pc, #372] ; (80032e0 ) - 800316a: 65fb str r3, [r7, #92] ; 0x5c - - /* Set handle of the other ADC sharing the same common register */ - ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister); - 800316c: 687b ldr r3, [r7, #4] - 800316e: 681b ldr r3, [r3, #0] - 8003170: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8003174: d102 bne.n 800317c - 8003176: 4b58 ldr r3, [pc, #352] ; (80032d8 ) - 8003178: 60fb str r3, [r7, #12] - 800317a: e01a b.n 80031b2 - 800317c: 687b ldr r3, [r7, #4] - 800317e: 681b ldr r3, [r3, #0] - 8003180: 4a55 ldr r2, [pc, #340] ; (80032d8 ) - 8003182: 4293 cmp r3, r2 - 8003184: d103 bne.n 800318e - 8003186: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000 - 800318a: 60fb str r3, [r7, #12] - 800318c: e011 b.n 80031b2 - 800318e: 687b ldr r3, [r7, #4] - 8003190: 681b ldr r3, [r3, #0] - 8003192: 4a54 ldr r2, [pc, #336] ; (80032e4 ) - 8003194: 4293 cmp r3, r2 - 8003196: d102 bne.n 800319e - 8003198: 4b53 ldr r3, [pc, #332] ; (80032e8 ) - 800319a: 60fb str r3, [r7, #12] - 800319c: e009 b.n 80031b2 - 800319e: 687b ldr r3, [r7, #4] - 80031a0: 681b ldr r3, [r3, #0] - 80031a2: 4a51 ldr r2, [pc, #324] ; (80032e8 ) - 80031a4: 4293 cmp r3, r2 - 80031a6: d102 bne.n 80031ae - 80031a8: 4b4e ldr r3, [pc, #312] ; (80032e4 ) - 80031aa: 60fb str r3, [r7, #12] - 80031ac: e001 b.n 80031b2 - 80031ae: 2300 movs r3, #0 - 80031b0: 60fb str r3, [r7, #12] - - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated only when ADC is disabled: */ - /* - Multimode clock configuration */ - if ((ADC_IS_ENABLE(hadc) == RESET) && - 80031b2: 687b ldr r3, [r7, #4] - 80031b4: 681b ldr r3, [r3, #0] - 80031b6: 689b ldr r3, [r3, #8] - 80031b8: f003 0303 and.w r3, r3, #3 - 80031bc: 2b01 cmp r3, #1 - 80031be: d108 bne.n 80031d2 - 80031c0: 687b ldr r3, [r7, #4] - 80031c2: 681b ldr r3, [r3, #0] - 80031c4: 681b ldr r3, [r3, #0] - 80031c6: f003 0301 and.w r3, r3, #1 - 80031ca: 2b01 cmp r3, #1 - 80031cc: d101 bne.n 80031d2 - 80031ce: 2301 movs r3, #1 - 80031d0: e000 b.n 80031d4 - 80031d2: 2300 movs r3, #0 - 80031d4: 2b00 cmp r3, #0 - 80031d6: d11c bne.n 8003212 - ((tmphadcSharingSameCommonRegister.Instance == NULL) || - 80031d8: 68fb ldr r3, [r7, #12] - if ((ADC_IS_ENABLE(hadc) == RESET) && - 80031da: 2b00 cmp r3, #0 - 80031dc: d010 beq.n 8003200 - (ADC_IS_ENABLE(&tmphadcSharingSameCommonRegister) == RESET) ) ) - 80031de: 68fb ldr r3, [r7, #12] - 80031e0: 689b ldr r3, [r3, #8] - 80031e2: f003 0303 and.w r3, r3, #3 - 80031e6: 2b01 cmp r3, #1 - 80031e8: d107 bne.n 80031fa - 80031ea: 68fb ldr r3, [r7, #12] - 80031ec: 681b ldr r3, [r3, #0] - 80031ee: f003 0301 and.w r3, r3, #1 - 80031f2: 2b01 cmp r3, #1 - 80031f4: d101 bne.n 80031fa - 80031f6: 2301 movs r3, #1 - 80031f8: e000 b.n 80031fc - 80031fa: 2300 movs r3, #0 - ((tmphadcSharingSameCommonRegister.Instance == NULL) || - 80031fc: 2b00 cmp r3, #0 - 80031fe: d108 bne.n 8003212 - /* into HAL_ADCEx_MultiModeConfigChannel() ) */ - /* - internal measurement paths: Vbat, temperature sensor, Vref */ - /* (set into HAL_ADC_ConfigChannel() or */ - /* HAL_ADCEx_InjectedConfigChannel() ) */ - - MODIFY_REG(tmpADC_Common->CCR , - 8003200: 6dfb ldr r3, [r7, #92] ; 0x5c - 8003202: 689b ldr r3, [r3, #8] - 8003204: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 8003208: 687b ldr r3, [r7, #4] - 800320a: 685b ldr r3, [r3, #4] - 800320c: 431a orrs r2, r3 - 800320e: 6dfb ldr r3, [r7, #92] ; 0x5c - 8003210: 609a str r2, [r3, #8] - /* - external trigger to start conversion */ - /* - external trigger polarity */ - /* - continuous conversion mode */ - /* - overrun */ - /* - discontinuous mode */ - SET_BIT(tmpCFGR, ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8003212: 687b ldr r3, [r7, #4] - 8003214: 7e5b ldrb r3, [r3, #25] - 8003216: 035b lsls r3, r3, #13 - 8003218: 687a ldr r2, [r7, #4] - 800321a: 6b52 ldr r2, [r2, #52] ; 0x34 - 800321c: 2a01 cmp r2, #1 - 800321e: d002 beq.n 8003226 - 8003220: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8003224: e000 b.n 8003228 - 8003226: 2200 movs r2, #0 - 8003228: 431a orrs r2, r3 - 800322a: 687b ldr r3, [r7, #4] - 800322c: 68db ldr r3, [r3, #12] - 800322e: 431a orrs r2, r3 - 8003230: 687b ldr r3, [r7, #4] - 8003232: 689b ldr r3, [r3, #8] - 8003234: 4313 orrs r3, r2 - 8003236: 6e3a ldr r2, [r7, #96] ; 0x60 - 8003238: 4313 orrs r3, r2 - 800323a: 663b str r3, [r7, #96] ; 0x60 - ADC_CFGR_OVERRUN(hadc->Init.Overrun) | - hadc->Init.DataAlign | - hadc->Init.Resolution ); - - /* Enable discontinuous mode only if continuous mode is disabled */ - if (hadc->Init.DiscontinuousConvMode == ENABLE) - 800323c: 687b ldr r3, [r7, #4] - 800323e: f893 3020 ldrb.w r3, [r3, #32] - 8003242: 2b01 cmp r3, #1 - 8003244: d11b bne.n 800327e - { - if (hadc->Init.ContinuousConvMode == DISABLE) - 8003246: 687b ldr r3, [r7, #4] - 8003248: 7e5b ldrb r3, [r3, #25] - 800324a: 2b00 cmp r3, #0 - 800324c: d109 bne.n 8003262 - { - /* Enable the selected ADC regular discontinuous mode */ - /* Set the number of channels to be converted in discontinuous mode */ - SET_BIT(tmpCFGR, ADC_CFGR_DISCEN | - 800324e: 687b ldr r3, [r7, #4] - 8003250: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003252: 3b01 subs r3, #1 - 8003254: 045a lsls r2, r3, #17 - 8003256: 6e3b ldr r3, [r7, #96] ; 0x60 - 8003258: 4313 orrs r3, r2 - 800325a: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 800325e: 663b str r3, [r7, #96] ; 0x60 - 8003260: e00d b.n 800327e - /* ADC regular group discontinuous was intended to be enabled, */ - /* but ADC regular group modes continuous and sequencer discontinuous */ - /* cannot be enabled simultaneously. */ - - /* Update ADC state machine to error */ - ADC_STATE_CLR_SET(hadc->State, - 8003262: 687b ldr r3, [r7, #4] - 8003264: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003266: f023 0322 bic.w r3, r3, #34 ; 0x22 - 800326a: f043 0220 orr.w r2, r3, #32 - 800326e: 687b ldr r3, [r7, #4] - 8003270: 641a str r2, [r3, #64] ; 0x40 - HAL_ADC_STATE_BUSY_INTERNAL, - HAL_ADC_STATE_ERROR_CONFIG); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8003272: 687b ldr r3, [r7, #4] - 8003274: 6c5b ldr r3, [r3, #68] ; 0x44 - 8003276: f043 0201 orr.w r2, r3, #1 - 800327a: 687b ldr r3, [r7, #4] - 800327c: 645a str r2, [r3, #68] ; 0x44 - /* Enable external trigger if trigger selection is different of software */ - /* start. */ - /* Note: This configuration keeps the hardware feature of parameter */ - /* ExternalTrigConvEdge "trigger edge none" equivalent to */ - /* software start. */ - if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) - 800327e: 687b ldr r3, [r7, #4] - 8003280: 6a9b ldr r3, [r3, #40] ; 0x28 - 8003282: 2b01 cmp r3, #1 - 8003284: d03a beq.n 80032fc - { - SET_BIT(tmpCFGR, ADC_CFGR_EXTSEL_SET(hadc, hadc->Init.ExternalTrigConv) | - 8003286: 687b ldr r3, [r7, #4] - 8003288: 681b ldr r3, [r3, #0] - 800328a: 4a16 ldr r2, [pc, #88] ; (80032e4 ) - 800328c: 4293 cmp r3, r2 - 800328e: d004 beq.n 800329a - 8003290: 687b ldr r3, [r7, #4] - 8003292: 681b ldr r3, [r3, #0] - 8003294: 4a14 ldr r2, [pc, #80] ; (80032e8 ) - 8003296: 4293 cmp r3, r2 - 8003298: d128 bne.n 80032ec - 800329a: 687b ldr r3, [r7, #4] - 800329c: 6a9b ldr r3, [r3, #40] ; 0x28 - 800329e: f5b3 7f30 cmp.w r3, #704 ; 0x2c0 - 80032a2: d012 beq.n 80032ca - 80032a4: 687b ldr r3, [r7, #4] - 80032a6: 6a9b ldr r3, [r3, #40] ; 0x28 - 80032a8: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80032ac: d00a beq.n 80032c4 - 80032ae: 687b ldr r3, [r7, #4] - 80032b0: 6a9b ldr r3, [r3, #40] ; 0x28 - 80032b2: f5b3 7fe0 cmp.w r3, #448 ; 0x1c0 - 80032b6: d002 beq.n 80032be - 80032b8: 687b ldr r3, [r7, #4] - 80032ba: 6a9b ldr r3, [r3, #40] ; 0x28 - 80032bc: e018 b.n 80032f0 - 80032be: f44f 7380 mov.w r3, #256 ; 0x100 - 80032c2: e015 b.n 80032f0 - 80032c4: f44f 7330 mov.w r3, #704 ; 0x2c0 - 80032c8: e012 b.n 80032f0 - 80032ca: f44f 73e0 mov.w r3, #448 ; 0x1c0 - 80032ce: e00f b.n 80032f0 - 80032d0: 20000008 .word 0x20000008 - 80032d4: 431bde83 .word 0x431bde83 - 80032d8: 50000100 .word 0x50000100 - 80032dc: 50000300 .word 0x50000300 - 80032e0: 50000700 .word 0x50000700 - 80032e4: 50000400 .word 0x50000400 - 80032e8: 50000500 .word 0x50000500 - 80032ec: 687b ldr r3, [r7, #4] - 80032ee: 6a9b ldr r3, [r3, #40] ; 0x28 - 80032f0: 687a ldr r2, [r7, #4] - 80032f2: 6ad2 ldr r2, [r2, #44] ; 0x2c - 80032f4: 4313 orrs r3, r2 - 80032f6: 6e3a ldr r2, [r7, #96] ; 0x60 - 80032f8: 4313 orrs r3, r2 - 80032fa: 663b str r3, [r7, #96] ; 0x60 - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular and injected groups: */ - /* - DMA continuous request */ - /* - LowPowerAutoWait feature */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) - 80032fc: 687b ldr r3, [r7, #4] - 80032fe: 681b ldr r3, [r3, #0] - 8003300: 689b ldr r3, [r3, #8] - 8003302: f003 030c and.w r3, r3, #12 - 8003306: 2b00 cmp r3, #0 - 8003308: d114 bne.n 8003334 - { - CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_AUTDLY | - 800330a: 687b ldr r3, [r7, #4] - 800330c: 681b ldr r3, [r3, #0] - 800330e: 68db ldr r3, [r3, #12] - 8003310: 687a ldr r2, [r7, #4] - 8003312: 6812 ldr r2, [r2, #0] - 8003314: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 8003318: f023 0302 bic.w r3, r3, #2 - 800331c: 60d3 str r3, [r2, #12] - ADC_CFGR_DMACFG ); - - SET_BIT(tmpCFGR, ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | - 800331e: 687b ldr r3, [r7, #4] - 8003320: 7e1b ldrb r3, [r3, #24] - 8003322: 039a lsls r2, r3, #14 - 8003324: 687b ldr r3, [r7, #4] - 8003326: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 800332a: 005b lsls r3, r3, #1 - 800332c: 4313 orrs r3, r2 - 800332e: 6e3a ldr r2, [r7, #96] ; 0x60 - 8003330: 4313 orrs r3, r2 - 8003332: 663b str r3, [r7, #96] ; 0x60 - ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); - } - - /* Update ADC configuration register with previous settings */ - MODIFY_REG(hadc->Instance->CFGR, - 8003334: 687b ldr r3, [r7, #4] - 8003336: 681b ldr r3, [r3, #0] - 8003338: 68da ldr r2, [r3, #12] - 800333a: 4b1e ldr r3, [pc, #120] ; (80033b4 ) - 800333c: 4013 ands r3, r2 - 800333e: 687a ldr r2, [r7, #4] - 8003340: 6812 ldr r2, [r2, #0] - 8003342: 6e39 ldr r1, [r7, #96] ; 0x60 - 8003344: 430b orrs r3, r1 - 8003346: 60d3 str r3, [r2, #12] - /* Parameter "NbrOfConversion" is discarded. */ - /* Note: Scan mode is not present by hardware on this device, but */ - /* emulated by software for alignment over all STM32 devices. */ - /* - if scan mode is enabled, regular channels sequence length is set to */ - /* parameter "NbrOfConversion" */ - if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE) - 8003348: 687b ldr r3, [r7, #4] - 800334a: 691b ldr r3, [r3, #16] - 800334c: 2b01 cmp r3, #1 - 800334e: d10c bne.n 800336a - { - /* Set number of ranks in regular group sequencer */ - MODIFY_REG(hadc->Instance->SQR1 , - 8003350: 687b ldr r3, [r7, #4] - 8003352: 681b ldr r3, [r3, #0] - 8003354: 6b1b ldr r3, [r3, #48] ; 0x30 - 8003356: f023 010f bic.w r1, r3, #15 - 800335a: 687b ldr r3, [r7, #4] - 800335c: 69db ldr r3, [r3, #28] - 800335e: 1e5a subs r2, r3, #1 - 8003360: 687b ldr r3, [r7, #4] - 8003362: 681b ldr r3, [r3, #0] - 8003364: 430a orrs r2, r1 - 8003366: 631a str r2, [r3, #48] ; 0x30 - 8003368: e007 b.n 800337a - ADC_SQR1_L , - (hadc->Init.NbrOfConversion - (uint8_t)1U) ); - } - else - { - CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L); - 800336a: 687b ldr r3, [r7, #4] - 800336c: 681b ldr r3, [r3, #0] - 800336e: 6b1a ldr r2, [r3, #48] ; 0x30 - 8003370: 687b ldr r3, [r7, #4] - 8003372: 681b ldr r3, [r3, #0] - 8003374: f022 020f bic.w r2, r2, #15 - 8003378: 631a str r2, [r3, #48] ; 0x30 - } - - /* Set ADC error code to none */ - ADC_CLEAR_ERRORCODE(hadc); - 800337a: 687b ldr r3, [r7, #4] - 800337c: 2200 movs r2, #0 - 800337e: 645a str r2, [r3, #68] ; 0x44 - - /* Set the ADC state */ - ADC_STATE_CLR_SET(hadc->State, - 8003380: 687b ldr r3, [r7, #4] - 8003382: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003384: f023 0303 bic.w r3, r3, #3 - 8003388: f043 0201 orr.w r2, r3, #1 - 800338c: 687b ldr r3, [r7, #4] - 800338e: 641a str r2, [r3, #64] ; 0x40 - 8003390: e00a b.n 80033a8 - HAL_ADC_STATE_READY); - } - else - { - /* Update ADC state machine to error */ - ADC_STATE_CLR_SET(hadc->State, - 8003392: 687b ldr r3, [r7, #4] - 8003394: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003396: f023 0312 bic.w r3, r3, #18 - 800339a: f043 0210 orr.w r2, r3, #16 - 800339e: 687b ldr r3, [r7, #4] - 80033a0: 641a str r2, [r3, #64] ; 0x40 - HAL_ADC_STATE_BUSY_INTERNAL, - HAL_ADC_STATE_ERROR_INTERNAL); - - tmp_hal_status = HAL_ERROR; - 80033a2: 2301 movs r3, #1 - 80033a4: f887 3067 strb.w r3, [r7, #103] ; 0x67 - } - - - /* Return function status */ - return tmp_hal_status; - 80033a8: f897 3067 ldrb.w r3, [r7, #103] ; 0x67 -} - 80033ac: 4618 mov r0, r3 - 80033ae: 3768 adds r7, #104 ; 0x68 - 80033b0: 46bd mov sp, r7 - 80033b2: bd80 pop {r7, pc} - 80033b4: fff0c007 .word 0xfff0c007 - -080033b8 : - * @param pData The destination Buffer address. - * @param Length The length of data to be transferred from ADC peripheral to memory. - * @retval None - */ -HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) -{ - 80033b8: b580 push {r7, lr} - 80033ba: b086 sub sp, #24 - 80033bc: af00 add r7, sp, #0 - 80033be: 60f8 str r0, [r7, #12] - 80033c0: 60b9 str r1, [r7, #8] - 80033c2: 607a str r2, [r7, #4] - HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80033c4: 2300 movs r3, #0 - 80033c6: 75fb strb r3, [r7, #23] - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Perform ADC enable and conversion start if no conversion is on going */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - 80033c8: 68fb ldr r3, [r7, #12] - 80033ca: 681b ldr r3, [r3, #0] - 80033cc: 689b ldr r3, [r3, #8] - 80033ce: f003 0304 and.w r3, r3, #4 - 80033d2: 2b00 cmp r3, #0 - 80033d4: f040 80f7 bne.w 80035c6 - { - /* Process locked */ - __HAL_LOCK(hadc); - 80033d8: 68fb ldr r3, [r7, #12] - 80033da: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 80033de: 2b01 cmp r3, #1 - 80033e0: d101 bne.n 80033e6 - 80033e2: 2302 movs r3, #2 - 80033e4: e0f2 b.n 80035cc - 80033e6: 68fb ldr r3, [r7, #12] - 80033e8: 2201 movs r2, #1 - 80033ea: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Verification if multimode is disabled (for devices with several ADC) */ - /* If multimode is enabled, dedicated function multimode conversion */ - /* start DMA must be used. */ - if(ADC_COMMON_CCR_MULTI(hadc) == RESET) - 80033ee: 68fb ldr r3, [r7, #12] - 80033f0: 681b ldr r3, [r3, #0] - 80033f2: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80033f6: d004 beq.n 8003402 - 80033f8: 68fb ldr r3, [r7, #12] - 80033fa: 681b ldr r3, [r3, #0] - 80033fc: 4a75 ldr r2, [pc, #468] ; (80035d4 ) - 80033fe: 4293 cmp r3, r2 - 8003400: d109 bne.n 8003416 - 8003402: 4b75 ldr r3, [pc, #468] ; (80035d8 ) - 8003404: 689b ldr r3, [r3, #8] - 8003406: f003 031f and.w r3, r3, #31 - 800340a: 2b00 cmp r3, #0 - 800340c: bf0c ite eq - 800340e: 2301 moveq r3, #1 - 8003410: 2300 movne r3, #0 - 8003412: b2db uxtb r3, r3 - 8003414: e008 b.n 8003428 - 8003416: 4b71 ldr r3, [pc, #452] ; (80035dc ) - 8003418: 689b ldr r3, [r3, #8] - 800341a: f003 031f and.w r3, r3, #31 - 800341e: 2b00 cmp r3, #0 - 8003420: bf0c ite eq - 8003422: 2301 moveq r3, #1 - 8003424: 2300 movne r3, #0 - 8003426: b2db uxtb r3, r3 - 8003428: 2b00 cmp r3, #0 - 800342a: f000 80c5 beq.w 80035b8 - { - /* Enable the ADC peripheral */ - tmp_hal_status = ADC_Enable(hadc); - 800342e: 68f8 ldr r0, [r7, #12] - 8003430: f001 fa10 bl 8004854 - 8003434: 4603 mov r3, r0 - 8003436: 75fb strb r3, [r7, #23] - - /* Start conversion if ADC is effectively enabled */ - if (tmp_hal_status == HAL_OK) - 8003438: 7dfb ldrb r3, [r7, #23] - 800343a: 2b00 cmp r3, #0 - 800343c: f040 80b7 bne.w 80035ae - { - /* Set ADC state */ - /* - Clear state bitfield related to regular group conversion results */ - /* - Set state bitfield related to regular operation */ - ADC_STATE_CLR_SET(hadc->State, - 8003440: 68fb ldr r3, [r7, #12] - 8003442: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003444: f423 6370 bic.w r3, r3, #3840 ; 0xf00 - 8003448: f023 0301 bic.w r3, r3, #1 - 800344c: f443 7280 orr.w r2, r3, #256 ; 0x100 - 8003450: 68fb ldr r3, [r7, #12] - 8003452: 641a str r2, [r3, #64] ; 0x40 - HAL_ADC_STATE_REG_BUSY); - - /* Set group injected state (from auto-injection) and multimode state */ - /* for all cases of multimode: independent mode, multimode ADC master */ - /* or multimode ADC slave (for devices with several ADCs): */ - if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) - 8003454: 68fb ldr r3, [r7, #12] - 8003456: 681b ldr r3, [r3, #0] - 8003458: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800345c: d004 beq.n 8003468 - 800345e: 68fb ldr r3, [r7, #12] - 8003460: 681b ldr r3, [r3, #0] - 8003462: 4a5c ldr r2, [pc, #368] ; (80035d4 ) - 8003464: 4293 cmp r3, r2 - 8003466: d106 bne.n 8003476 - 8003468: 4b5b ldr r3, [pc, #364] ; (80035d8 ) - 800346a: 689b ldr r3, [r3, #8] - 800346c: f003 031f and.w r3, r3, #31 - 8003470: 2b00 cmp r3, #0 - 8003472: d010 beq.n 8003496 - 8003474: e005 b.n 8003482 - 8003476: 4b59 ldr r3, [pc, #356] ; (80035dc ) - 8003478: 689b ldr r3, [r3, #8] - 800347a: f003 031f and.w r3, r3, #31 - 800347e: 2b00 cmp r3, #0 - 8003480: d009 beq.n 8003496 - 8003482: 68fb ldr r3, [r7, #12] - 8003484: 681b ldr r3, [r3, #0] - 8003486: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800348a: d004 beq.n 8003496 - 800348c: 68fb ldr r3, [r7, #12] - 800348e: 681b ldr r3, [r3, #0] - 8003490: 4a53 ldr r2, [pc, #332] ; (80035e0 ) - 8003492: 4293 cmp r3, r2 - 8003494: d115 bne.n 80034c2 - { - /* Set ADC state (ADC independent or master) */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - 8003496: 68fb ldr r3, [r7, #12] - 8003498: 6c1b ldr r3, [r3, #64] ; 0x40 - 800349a: f423 1280 bic.w r2, r3, #1048576 ; 0x100000 - 800349e: 68fb ldr r3, [r7, #12] - 80034a0: 641a str r2, [r3, #64] ; 0x40 - - /* If conversions on group regular are also triggering group injected,*/ - /* update ADC state. */ - if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != RESET) - 80034a2: 68fb ldr r3, [r7, #12] - 80034a4: 681b ldr r3, [r3, #0] - 80034a6: 68db ldr r3, [r3, #12] - 80034a8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80034ac: 2b00 cmp r3, #0 - 80034ae: d036 beq.n 800351e - { - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - 80034b0: 68fb ldr r3, [r7, #12] - 80034b2: 6c1b ldr r3, [r3, #64] ; 0x40 - 80034b4: f423 5340 bic.w r3, r3, #12288 ; 0x3000 - 80034b8: f443 5280 orr.w r2, r3, #4096 ; 0x1000 - 80034bc: 68fb ldr r3, [r7, #12] - 80034be: 641a str r2, [r3, #64] ; 0x40 - if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != RESET) - 80034c0: e02d b.n 800351e - } - } - else - { - /* Set ADC state (ADC slave) */ - SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - 80034c2: 68fb ldr r3, [r7, #12] - 80034c4: 6c1b ldr r3, [r3, #64] ; 0x40 - 80034c6: f443 1280 orr.w r2, r3, #1048576 ; 0x100000 - 80034ca: 68fb ldr r3, [r7, #12] - 80034cc: 641a str r2, [r3, #64] ; 0x40 - - /* If conversions on group regular are also triggering group injected,*/ - /* update ADC state. */ - if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) - 80034ce: 68fb ldr r3, [r7, #12] - 80034d0: 681b ldr r3, [r3, #0] - 80034d2: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80034d6: d004 beq.n 80034e2 - 80034d8: 68fb ldr r3, [r7, #12] - 80034da: 681b ldr r3, [r3, #0] - 80034dc: 4a3d ldr r2, [pc, #244] ; (80035d4 ) - 80034de: 4293 cmp r3, r2 - 80034e0: d10a bne.n 80034f8 - 80034e2: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000 - 80034e6: 68db ldr r3, [r3, #12] - 80034e8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80034ec: 2b00 cmp r3, #0 - 80034ee: bf14 ite ne - 80034f0: 2301 movne r3, #1 - 80034f2: 2300 moveq r3, #0 - 80034f4: b2db uxtb r3, r3 - 80034f6: e008 b.n 800350a - 80034f8: 4b39 ldr r3, [pc, #228] ; (80035e0 ) - 80034fa: 68db ldr r3, [r3, #12] - 80034fc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8003500: 2b00 cmp r3, #0 - 8003502: bf14 ite ne - 8003504: 2301 movne r3, #1 - 8003506: 2300 moveq r3, #0 - 8003508: b2db uxtb r3, r3 - 800350a: 2b00 cmp r3, #0 - 800350c: d007 beq.n 800351e - { - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - 800350e: 68fb ldr r3, [r7, #12] - 8003510: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003512: f423 5340 bic.w r3, r3, #12288 ; 0x3000 - 8003516: f443 5280 orr.w r2, r3, #4096 ; 0x1000 - 800351a: 68fb ldr r3, [r7, #12] - 800351c: 641a str r2, [r3, #64] ; 0x40 - } - } - - /* State machine update: Check if an injected conversion is ongoing */ - if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 800351e: 68fb ldr r3, [r7, #12] - 8003520: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003522: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8003526: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 800352a: d106 bne.n 800353a - { - /* Reset ADC error code fields related to conversions on group regular*/ - CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); - 800352c: 68fb ldr r3, [r7, #12] - 800352e: 6c5b ldr r3, [r3, #68] ; 0x44 - 8003530: f023 0206 bic.w r2, r3, #6 - 8003534: 68fb ldr r3, [r7, #12] - 8003536: 645a str r2, [r3, #68] ; 0x44 - 8003538: e002 b.n 8003540 - } - else - { - /* Reset ADC all error code fields */ - ADC_CLEAR_ERRORCODE(hadc); - 800353a: 68fb ldr r3, [r7, #12] - 800353c: 2200 movs r2, #0 - 800353e: 645a str r2, [r3, #68] ; 0x44 - } - - /* Process unlocked */ - /* Unlock before starting ADC conversions: in case of potential */ - /* interruption, to let the process to ADC IRQ Handler. */ - __HAL_UNLOCK(hadc); - 8003540: 68fb ldr r3, [r7, #12] - 8003542: 2200 movs r2, #0 - 8003544: f883 203c strb.w r2, [r3, #60] ; 0x3c - - - /* Set the DMA transfer complete callback */ - hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; - 8003548: 68fb ldr r3, [r7, #12] - 800354a: 6b9b ldr r3, [r3, #56] ; 0x38 - 800354c: 4a25 ldr r2, [pc, #148] ; (80035e4 ) - 800354e: 629a str r2, [r3, #40] ; 0x28 - - /* Set the DMA half transfer complete callback */ - hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; - 8003550: 68fb ldr r3, [r7, #12] - 8003552: 6b9b ldr r3, [r3, #56] ; 0x38 - 8003554: 4a24 ldr r2, [pc, #144] ; (80035e8 ) - 8003556: 62da str r2, [r3, #44] ; 0x2c - - /* Set the DMA error callback */ - hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; - 8003558: 68fb ldr r3, [r7, #12] - 800355a: 6b9b ldr r3, [r3, #56] ; 0x38 - 800355c: 4a23 ldr r2, [pc, #140] ; (80035ec ) - 800355e: 631a str r2, [r3, #48] ; 0x30 - /* start (in case of SW start): */ - - /* Clear regular group conversion flag and overrun flag */ - /* (To ensure of no unknown state from potential previous ADC */ - /* operations) */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); - 8003560: 68fb ldr r3, [r7, #12] - 8003562: 681b ldr r3, [r3, #0] - 8003564: 221c movs r2, #28 - 8003566: 601a str r2, [r3, #0] - - /* Enable ADC overrun interrupt */ - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); - 8003568: 68fb ldr r3, [r7, #12] - 800356a: 681b ldr r3, [r3, #0] - 800356c: 685a ldr r2, [r3, #4] - 800356e: 68fb ldr r3, [r7, #12] - 8003570: 681b ldr r3, [r3, #0] - 8003572: f042 0210 orr.w r2, r2, #16 - 8003576: 605a str r2, [r3, #4] - - /* Enable ADC DMA mode */ - SET_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); - 8003578: 68fb ldr r3, [r7, #12] - 800357a: 681b ldr r3, [r3, #0] - 800357c: 68da ldr r2, [r3, #12] - 800357e: 68fb ldr r3, [r7, #12] - 8003580: 681b ldr r3, [r3, #0] - 8003582: f042 0201 orr.w r2, r2, #1 - 8003586: 60da str r2, [r3, #12] - - /* Start the DMA channel */ - HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); - 8003588: 68fb ldr r3, [r7, #12] - 800358a: 6b98 ldr r0, [r3, #56] ; 0x38 - 800358c: 68fb ldr r3, [r7, #12] - 800358e: 681b ldr r3, [r3, #0] - 8003590: 3340 adds r3, #64 ; 0x40 - 8003592: 4619 mov r1, r3 - 8003594: 68ba ldr r2, [r7, #8] - 8003596: 687b ldr r3, [r7, #4] - 8003598: f001 fbc3 bl 8004d22 - - /* Enable conversion of regular group. */ - /* If software start has been selected, conversion starts immediately.*/ - /* If external trigger has been selected, conversion will start at */ - /* next trigger event. */ - SET_BIT(hadc->Instance->CR, ADC_CR_ADSTART); - 800359c: 68fb ldr r3, [r7, #12] - 800359e: 681b ldr r3, [r3, #0] - 80035a0: 689a ldr r2, [r3, #8] - 80035a2: 68fb ldr r3, [r7, #12] - 80035a4: 681b ldr r3, [r3, #0] - 80035a6: f042 0204 orr.w r2, r2, #4 - 80035aa: 609a str r2, [r3, #8] - 80035ac: e00d b.n 80035ca - - } - else - { - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 80035ae: 68fb ldr r3, [r7, #12] - 80035b0: 2200 movs r2, #0 - 80035b2: f883 203c strb.w r2, [r3, #60] ; 0x3c - 80035b6: e008 b.n 80035ca - } - } - else - { - tmp_hal_status = HAL_ERROR; - 80035b8: 2301 movs r3, #1 - 80035ba: 75fb strb r3, [r7, #23] - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 80035bc: 68fb ldr r3, [r7, #12] - 80035be: 2200 movs r2, #0 - 80035c0: f883 203c strb.w r2, [r3, #60] ; 0x3c - 80035c4: e001 b.n 80035ca - } - } - else - { - tmp_hal_status = HAL_BUSY; - 80035c6: 2302 movs r3, #2 - 80035c8: 75fb strb r3, [r7, #23] - } - - /* Return function status */ - return tmp_hal_status; - 80035ca: 7dfb ldrb r3, [r7, #23] -} - 80035cc: 4618 mov r0, r3 - 80035ce: 3718 adds r7, #24 - 80035d0: 46bd mov sp, r7 - 80035d2: bd80 pop {r7, pc} - 80035d4: 50000100 .word 0x50000100 - 80035d8: 50000300 .word 0x50000300 - 80035dc: 50000700 .word 0x50000700 - 80035e0: 50000400 .word 0x50000400 - 80035e4: 08004789 .word 0x08004789 - 80035e8: 08004803 .word 0x08004803 - 80035ec: 0800481f .word 0x0800481f - -080035f0 : - * @brief Handles ADC interrupt request. - * @param hadc ADC handle - * @retval None - */ -void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) -{ - 80035f0: b580 push {r7, lr} - 80035f2: b086 sub sp, #24 - 80035f4: af00 add r7, sp, #0 - 80035f6: 6078 str r0, [r7, #4] - uint32_t overrun_error = 0U; /* flag set if overrun occurrence has to be considered as an error */ - 80035f8: 2300 movs r3, #0 - 80035fa: 617b str r3, [r7, #20] - ADC_Common_TypeDef *tmpADC_Common; - uint32_t tmp_cfgr = 0x0U; - 80035fc: 2300 movs r3, #0 - 80035fe: 613b str r3, [r7, #16] - uint32_t tmp_cfgr_jqm = 0x0U; - 8003600: 2300 movs r3, #0 - 8003602: 60fb str r3, [r7, #12] - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); - assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); - - /* ========== Check End of Conversion flag for regular group ========== */ - if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) || - 8003604: 687b ldr r3, [r7, #4] - 8003606: 681b ldr r3, [r3, #0] - 8003608: 681b ldr r3, [r3, #0] - 800360a: f003 0304 and.w r3, r3, #4 - 800360e: 2b04 cmp r3, #4 - 8003610: d106 bne.n 8003620 - 8003612: 687b ldr r3, [r7, #4] - 8003614: 681b ldr r3, [r3, #0] - 8003616: 685b ldr r3, [r3, #4] - 8003618: f003 0304 and.w r3, r3, #4 - 800361c: 2b04 cmp r3, #4 - 800361e: d00f beq.n 8003640 - (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) - 8003620: 687b ldr r3, [r7, #4] - 8003622: 681b ldr r3, [r3, #0] - 8003624: 681b ldr r3, [r3, #0] - 8003626: f003 0308 and.w r3, r3, #8 - if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) || - 800362a: 2b08 cmp r3, #8 - 800362c: f040 80c0 bne.w 80037b0 - (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) - 8003630: 687b ldr r3, [r7, #4] - 8003632: 681b ldr r3, [r3, #0] - 8003634: 685b ldr r3, [r3, #4] - 8003636: f003 0308 and.w r3, r3, #8 - 800363a: 2b08 cmp r3, #8 - 800363c: f040 80b8 bne.w 80037b0 - { - /* Update state machine on conversion status if not in error state */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - 8003640: 687b ldr r3, [r7, #4] - 8003642: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003644: f003 0310 and.w r3, r3, #16 - 8003648: 2b00 cmp r3, #0 - 800364a: d105 bne.n 8003658 - { - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - 800364c: 687b ldr r3, [r7, #4] - 800364e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003650: f443 7200 orr.w r2, r3, #512 ; 0x200 - 8003654: 687b ldr r3, [r7, #4] - 8003656: 641a str r2, [r3, #64] ; 0x40 - } - - /* Get relevant register CFGR in ADC instance of ADC master or slave */ - /* in function of multimode state (for devices with multimode */ - /* available). */ - if (ADC_NONMULTIMODE_REG_OR_MULTIMODEMASTER(hadc)) - 8003658: 687b ldr r3, [r7, #4] - 800365a: 681b ldr r3, [r3, #0] - 800365c: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8003660: d004 beq.n 800366c - 8003662: 687b ldr r3, [r7, #4] - 8003664: 681b ldr r3, [r3, #0] - 8003666: 4a95 ldr r2, [pc, #596] ; (80038bc ) - 8003668: 4293 cmp r3, r2 - 800366a: d106 bne.n 800367a - 800366c: 4b94 ldr r3, [pc, #592] ; (80038c0 ) - 800366e: 689b ldr r3, [r3, #8] - 8003670: f003 031f and.w r3, r3, #31 - 8003674: 2b00 cmp r3, #0 - 8003676: d03e beq.n 80036f6 - 8003678: e005 b.n 8003686 - 800367a: 4b92 ldr r3, [pc, #584] ; (80038c4 ) - 800367c: 689b ldr r3, [r3, #8] - 800367e: f003 031f and.w r3, r3, #31 - 8003682: 2b00 cmp r3, #0 - 8003684: d037 beq.n 80036f6 - 8003686: 687b ldr r3, [r7, #4] - 8003688: 681b ldr r3, [r3, #0] - 800368a: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800368e: d004 beq.n 800369a - 8003690: 687b ldr r3, [r7, #4] - 8003692: 681b ldr r3, [r3, #0] - 8003694: 4a89 ldr r2, [pc, #548] ; (80038bc ) - 8003696: 4293 cmp r3, r2 - 8003698: d106 bne.n 80036a8 - 800369a: 4b89 ldr r3, [pc, #548] ; (80038c0 ) - 800369c: 689b ldr r3, [r3, #8] - 800369e: f003 031f and.w r3, r3, #31 - 80036a2: 2b05 cmp r3, #5 - 80036a4: d027 beq.n 80036f6 - 80036a6: e005 b.n 80036b4 - 80036a8: 4b86 ldr r3, [pc, #536] ; (80038c4 ) - 80036aa: 689b ldr r3, [r3, #8] - 80036ac: f003 031f and.w r3, r3, #31 - 80036b0: 2b05 cmp r3, #5 - 80036b2: d020 beq.n 80036f6 - 80036b4: 687b ldr r3, [r7, #4] - 80036b6: 681b ldr r3, [r3, #0] - 80036b8: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80036bc: d004 beq.n 80036c8 - 80036be: 687b ldr r3, [r7, #4] - 80036c0: 681b ldr r3, [r3, #0] - 80036c2: 4a7e ldr r2, [pc, #504] ; (80038bc ) - 80036c4: 4293 cmp r3, r2 - 80036c6: d106 bne.n 80036d6 - 80036c8: 4b7d ldr r3, [pc, #500] ; (80038c0 ) - 80036ca: 689b ldr r3, [r3, #8] - 80036cc: f003 031f and.w r3, r3, #31 - 80036d0: 2b09 cmp r3, #9 - 80036d2: d010 beq.n 80036f6 - 80036d4: e005 b.n 80036e2 - 80036d6: 4b7b ldr r3, [pc, #492] ; (80038c4 ) - 80036d8: 689b ldr r3, [r3, #8] - 80036da: f003 031f and.w r3, r3, #31 - 80036de: 2b09 cmp r3, #9 - 80036e0: d009 beq.n 80036f6 - 80036e2: 687b ldr r3, [r7, #4] - 80036e4: 681b ldr r3, [r3, #0] - 80036e6: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80036ea: d004 beq.n 80036f6 - 80036ec: 687b ldr r3, [r7, #4] - 80036ee: 681b ldr r3, [r3, #0] - 80036f0: 4a75 ldr r2, [pc, #468] ; (80038c8 ) - 80036f2: 4293 cmp r3, r2 - 80036f4: d104 bne.n 8003700 - { - tmp_cfgr = READ_REG(hadc->Instance->CFGR); - 80036f6: 687b ldr r3, [r7, #4] - 80036f8: 681b ldr r3, [r3, #0] - 80036fa: 68db ldr r3, [r3, #12] - 80036fc: 613b str r3, [r7, #16] - 80036fe: e00f b.n 8003720 - } - else - { - tmp_cfgr = READ_REG(ADC_MASTER_INSTANCE(hadc)->CFGR); - 8003700: 687b ldr r3, [r7, #4] - 8003702: 681b ldr r3, [r3, #0] - 8003704: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8003708: d004 beq.n 8003714 - 800370a: 687b ldr r3, [r7, #4] - 800370c: 681b ldr r3, [r3, #0] - 800370e: 4a6b ldr r2, [pc, #428] ; (80038bc ) - 8003710: 4293 cmp r3, r2 - 8003712: d102 bne.n 800371a - 8003714: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000 - 8003718: e000 b.n 800371c - 800371a: 4b6b ldr r3, [pc, #428] ; (80038c8 ) - 800371c: 68db ldr r3, [r3, #12] - 800371e: 613b str r3, [r7, #16] - } - - /* Disable interruption if no further conversion upcoming by regular */ - /* external trigger or by continuous mode, */ - /* and if scan sequence if completed. */ - if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8003720: 687b ldr r3, [r7, #4] - 8003722: 681b ldr r3, [r3, #0] - 8003724: 68db ldr r3, [r3, #12] - 8003726: f403 6340 and.w r3, r3, #3072 ; 0xc00 - 800372a: 2b00 cmp r3, #0 - 800372c: d139 bne.n 80037a2 - (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == RESET) ) - 800372e: 693b ldr r3, [r7, #16] - 8003730: f403 5300 and.w r3, r3, #8192 ; 0x2000 - if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8003734: 2b00 cmp r3, #0 - 8003736: d134 bne.n 80037a2 - { - /* If End of Sequence is reached, disable interrupts */ - if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) - 8003738: 687b ldr r3, [r7, #4] - 800373a: 681b ldr r3, [r3, #0] - 800373c: 681b ldr r3, [r3, #0] - 800373e: f003 0308 and.w r3, r3, #8 - 8003742: 2b08 cmp r3, #8 - 8003744: d12d bne.n 80037a2 - { - /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ - /* ADSTART==0 (no conversion on going) */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - 8003746: 687b ldr r3, [r7, #4] - 8003748: 681b ldr r3, [r3, #0] - 800374a: 689b ldr r3, [r3, #8] - 800374c: f003 0304 and.w r3, r3, #4 - 8003750: 2b00 cmp r3, #0 - 8003752: d11a bne.n 800378a - { - /* Disable ADC end of sequence conversion interrupt */ - /* Note: Overrun interrupt was enabled with EOC interrupt in */ - /* HAL_Start_IT(), but is not disabled here because can be used */ - /* by overrun IRQ process below. */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); - 8003754: 687b ldr r3, [r7, #4] - 8003756: 681b ldr r3, [r3, #0] - 8003758: 685a ldr r2, [r3, #4] - 800375a: 687b ldr r3, [r7, #4] - 800375c: 681b ldr r3, [r3, #0] - 800375e: f022 020c bic.w r2, r2, #12 - 8003762: 605a str r2, [r3, #4] - - /* Set ADC state */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - 8003764: 687b ldr r3, [r7, #4] - 8003766: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003768: f423 7280 bic.w r2, r3, #256 ; 0x100 - 800376c: 687b ldr r3, [r7, #4] - 800376e: 641a str r2, [r3, #64] ; 0x40 - - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 8003770: 687b ldr r3, [r7, #4] - 8003772: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003774: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8003778: 2b00 cmp r3, #0 - 800377a: d112 bne.n 80037a2 - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - 800377c: 687b ldr r3, [r7, #4] - 800377e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003780: f043 0201 orr.w r2, r3, #1 - 8003784: 687b ldr r3, [r7, #4] - 8003786: 641a str r2, [r3, #64] ; 0x40 - 8003788: e00b b.n 80037a2 - } - } - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 800378a: 687b ldr r3, [r7, #4] - 800378c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800378e: f043 0210 orr.w r2, r3, #16 - 8003792: 687b ldr r3, [r7, #4] - 8003794: 641a str r2, [r3, #64] ; 0x40 - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8003796: 687b ldr r3, [r7, #4] - 8003798: 6c5b ldr r3, [r3, #68] ; 0x44 - 800379a: f043 0201 orr.w r2, r3, #1 - 800379e: 687b ldr r3, [r7, #4] - 80037a0: 645a str r2, [r3, #68] ; 0x44 - /* from EOC or EOS, possibility to use: */ - /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ConvCpltCallback(hadc); -#else - HAL_ADC_ConvCpltCallback(hadc); - 80037a2: 6878 ldr r0, [r7, #4] - 80037a4: f7ff fc00 bl 8002fa8 - /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */ - /* conversion flags clear induces the release of the preserved */ - /* data. */ - /* Therefore, if the preserved data value is needed, it must be */ - /* read preliminarily into HAL_ADC_ConvCpltCallback(). */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); - 80037a8: 687b ldr r3, [r7, #4] - 80037aa: 681b ldr r3, [r3, #0] - 80037ac: 220c movs r2, #12 - 80037ae: 601a str r2, [r3, #0] - } - - - /* ========== Check End of Conversion flag for injected group ========== */ - if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC)) || - 80037b0: 687b ldr r3, [r7, #4] - 80037b2: 681b ldr r3, [r3, #0] - 80037b4: 681b ldr r3, [r3, #0] - 80037b6: f003 0320 and.w r3, r3, #32 - 80037ba: 2b20 cmp r3, #32 - 80037bc: d106 bne.n 80037cc - 80037be: 687b ldr r3, [r7, #4] - 80037c0: 681b ldr r3, [r3, #0] - 80037c2: 685b ldr r3, [r3, #4] - 80037c4: f003 0320 and.w r3, r3, #32 - 80037c8: 2b20 cmp r3, #32 - 80037ca: d00f beq.n 80037ec - (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOS)) ) - 80037cc: 687b ldr r3, [r7, #4] - 80037ce: 681b ldr r3, [r3, #0] - 80037d0: 681b ldr r3, [r3, #0] - 80037d2: f003 0340 and.w r3, r3, #64 ; 0x40 - if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC)) || - 80037d6: 2b40 cmp r3, #64 ; 0x40 - 80037d8: f040 813c bne.w 8003a54 - (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOS)) ) - 80037dc: 687b ldr r3, [r7, #4] - 80037de: 681b ldr r3, [r3, #0] - 80037e0: 685b ldr r3, [r3, #4] - 80037e2: f003 0340 and.w r3, r3, #64 ; 0x40 - 80037e6: 2b40 cmp r3, #64 ; 0x40 - 80037e8: f040 8134 bne.w 8003a54 - { - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); - 80037ec: 687b ldr r3, [r7, #4] - 80037ee: 6c1b ldr r3, [r3, #64] ; 0x40 - 80037f0: f443 5200 orr.w r2, r3, #8192 ; 0x2000 - 80037f4: 687b ldr r3, [r7, #4] - 80037f6: 641a str r2, [r3, #64] ; 0x40 - - /* Get relevant register CFGR in ADC instance of ADC master or slave */ - /* in function of multimode state (for devices with multimode */ - /* available). */ - if (ADC_NONMULTIMODE_REG_OR_MULTIMODEMASTER(hadc)) - 80037f8: 687b ldr r3, [r7, #4] - 80037fa: 681b ldr r3, [r3, #0] - 80037fc: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8003800: d004 beq.n 800380c - 8003802: 687b ldr r3, [r7, #4] - 8003804: 681b ldr r3, [r3, #0] - 8003806: 4a2d ldr r2, [pc, #180] ; (80038bc ) - 8003808: 4293 cmp r3, r2 - 800380a: d106 bne.n 800381a - 800380c: 4b2c ldr r3, [pc, #176] ; (80038c0 ) - 800380e: 689b ldr r3, [r3, #8] - 8003810: f003 031f and.w r3, r3, #31 - 8003814: 2b00 cmp r3, #0 - 8003816: d03e beq.n 8003896 - 8003818: e005 b.n 8003826 - 800381a: 4b2a ldr r3, [pc, #168] ; (80038c4 ) - 800381c: 689b ldr r3, [r3, #8] - 800381e: f003 031f and.w r3, r3, #31 - 8003822: 2b00 cmp r3, #0 - 8003824: d037 beq.n 8003896 - 8003826: 687b ldr r3, [r7, #4] - 8003828: 681b ldr r3, [r3, #0] - 800382a: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800382e: d004 beq.n 800383a - 8003830: 687b ldr r3, [r7, #4] - 8003832: 681b ldr r3, [r3, #0] - 8003834: 4a21 ldr r2, [pc, #132] ; (80038bc ) - 8003836: 4293 cmp r3, r2 - 8003838: d106 bne.n 8003848 - 800383a: 4b21 ldr r3, [pc, #132] ; (80038c0 ) - 800383c: 689b ldr r3, [r3, #8] - 800383e: f003 031f and.w r3, r3, #31 - 8003842: 2b05 cmp r3, #5 - 8003844: d027 beq.n 8003896 - 8003846: e005 b.n 8003854 - 8003848: 4b1e ldr r3, [pc, #120] ; (80038c4 ) - 800384a: 689b ldr r3, [r3, #8] - 800384c: f003 031f and.w r3, r3, #31 - 8003850: 2b05 cmp r3, #5 - 8003852: d020 beq.n 8003896 - 8003854: 687b ldr r3, [r7, #4] - 8003856: 681b ldr r3, [r3, #0] - 8003858: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800385c: d004 beq.n 8003868 - 800385e: 687b ldr r3, [r7, #4] - 8003860: 681b ldr r3, [r3, #0] - 8003862: 4a16 ldr r2, [pc, #88] ; (80038bc ) - 8003864: 4293 cmp r3, r2 - 8003866: d106 bne.n 8003876 - 8003868: 4b15 ldr r3, [pc, #84] ; (80038c0 ) - 800386a: 689b ldr r3, [r3, #8] - 800386c: f003 031f and.w r3, r3, #31 - 8003870: 2b09 cmp r3, #9 - 8003872: d010 beq.n 8003896 - 8003874: e005 b.n 8003882 - 8003876: 4b13 ldr r3, [pc, #76] ; (80038c4 ) - 8003878: 689b ldr r3, [r3, #8] - 800387a: f003 031f and.w r3, r3, #31 - 800387e: 2b09 cmp r3, #9 - 8003880: d009 beq.n 8003896 - 8003882: 687b ldr r3, [r7, #4] - 8003884: 681b ldr r3, [r3, #0] - 8003886: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800388a: d004 beq.n 8003896 - 800388c: 687b ldr r3, [r7, #4] - 800388e: 681b ldr r3, [r3, #0] - 8003890: 4a0d ldr r2, [pc, #52] ; (80038c8 ) - 8003892: 4293 cmp r3, r2 - 8003894: d104 bne.n 80038a0 - { - tmp_cfgr = READ_REG(hadc->Instance->CFGR); - 8003896: 687b ldr r3, [r7, #4] - 8003898: 681b ldr r3, [r3, #0] - 800389a: 68db ldr r3, [r3, #12] - 800389c: 613b str r3, [r7, #16] - 800389e: e018 b.n 80038d2 - } - else - { - tmp_cfgr = READ_REG(ADC_MASTER_INSTANCE(hadc)->CFGR); - 80038a0: 687b ldr r3, [r7, #4] - 80038a2: 681b ldr r3, [r3, #0] - 80038a4: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80038a8: d004 beq.n 80038b4 - 80038aa: 687b ldr r3, [r7, #4] - 80038ac: 681b ldr r3, [r3, #0] - 80038ae: 4a03 ldr r2, [pc, #12] ; (80038bc ) - 80038b0: 4293 cmp r3, r2 - 80038b2: d10b bne.n 80038cc - 80038b4: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000 - 80038b8: e009 b.n 80038ce - 80038ba: bf00 nop - 80038bc: 50000100 .word 0x50000100 - 80038c0: 50000300 .word 0x50000300 - 80038c4: 50000700 .word 0x50000700 - 80038c8: 50000400 .word 0x50000400 - 80038cc: 4b9d ldr r3, [pc, #628] ; (8003b44 ) - 80038ce: 68db ldr r3, [r3, #12] - 80038d0: 613b str r3, [r7, #16] - /* Disable interruption if no further conversion upcoming by injected */ - /* external trigger or by automatic injected conversion with regular */ - /* group having no further conversion upcoming (same conditions as */ - /* regular group interruption disabling above), */ - /* and if injected scan sequence is completed. */ - if(ADC_IS_SOFTWARE_START_INJECTED(hadc) || - 80038d2: 687b ldr r3, [r7, #4] - 80038d4: 681b ldr r3, [r3, #0] - 80038d6: 6cdb ldr r3, [r3, #76] ; 0x4c - 80038d8: f003 03c0 and.w r3, r3, #192 ; 0xc0 - 80038dc: 2b00 cmp r3, #0 - 80038de: d013 beq.n 8003908 - ((READ_BIT (tmp_cfgr, ADC_CFGR_JAUTO) == RESET) && - 80038e0: 693b ldr r3, [r7, #16] - 80038e2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - if(ADC_IS_SOFTWARE_START_INJECTED(hadc) || - 80038e6: 2b00 cmp r3, #0 - 80038e8: f040 80ad bne.w 8003a46 - (ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 80038ec: 687b ldr r3, [r7, #4] - 80038ee: 681b ldr r3, [r3, #0] - 80038f0: 68db ldr r3, [r3, #12] - 80038f2: f403 6340 and.w r3, r3, #3072 ; 0xc00 - ((READ_BIT (tmp_cfgr, ADC_CFGR_JAUTO) == RESET) && - 80038f6: 2b00 cmp r3, #0 - 80038f8: f040 80a5 bne.w 8003a46 - (READ_BIT (tmp_cfgr, ADC_CFGR_CONT) == RESET) ) ) ) - 80038fc: 693b ldr r3, [r7, #16] - 80038fe: f403 5300 and.w r3, r3, #8192 ; 0x2000 - (ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8003902: 2b00 cmp r3, #0 - 8003904: f040 809f bne.w 8003a46 - { - /* If End of Sequence is reached, disable interrupts */ - if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS)) - 8003908: 687b ldr r3, [r7, #4] - 800390a: 681b ldr r3, [r3, #0] - 800390c: 681b ldr r3, [r3, #0] - 800390e: f003 0340 and.w r3, r3, #64 ; 0x40 - 8003912: 2b40 cmp r3, #64 ; 0x40 - 8003914: f040 8097 bne.w 8003a46 - { - - /* Get relevant register CFGR in ADC instance of ADC master or slave */ - /* in function of multimode state (for devices with multimode */ - /* available). */ - if (ADC_NONMULTIMODE_INJ_OR_MULTIMODEMASTER(hadc)) - 8003918: 687b ldr r3, [r7, #4] - 800391a: 681b ldr r3, [r3, #0] - 800391c: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8003920: d004 beq.n 800392c - 8003922: 687b ldr r3, [r7, #4] - 8003924: 681b ldr r3, [r3, #0] - 8003926: 4a88 ldr r2, [pc, #544] ; (8003b48 ) - 8003928: 4293 cmp r3, r2 - 800392a: d106 bne.n 800393a - 800392c: 4b87 ldr r3, [pc, #540] ; (8003b4c ) - 800392e: 689b ldr r3, [r3, #8] - 8003930: f003 031f and.w r3, r3, #31 - 8003934: 2b00 cmp r3, #0 - 8003936: d03e beq.n 80039b6 - 8003938: e005 b.n 8003946 - 800393a: 4b85 ldr r3, [pc, #532] ; (8003b50 ) - 800393c: 689b ldr r3, [r3, #8] - 800393e: f003 031f and.w r3, r3, #31 - 8003942: 2b00 cmp r3, #0 - 8003944: d037 beq.n 80039b6 - 8003946: 687b ldr r3, [r7, #4] - 8003948: 681b ldr r3, [r3, #0] - 800394a: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800394e: d004 beq.n 800395a - 8003950: 687b ldr r3, [r7, #4] - 8003952: 681b ldr r3, [r3, #0] - 8003954: 4a7c ldr r2, [pc, #496] ; (8003b48 ) - 8003956: 4293 cmp r3, r2 - 8003958: d106 bne.n 8003968 - 800395a: 4b7c ldr r3, [pc, #496] ; (8003b4c ) - 800395c: 689b ldr r3, [r3, #8] - 800395e: f003 031f and.w r3, r3, #31 - 8003962: 2b06 cmp r3, #6 - 8003964: d027 beq.n 80039b6 - 8003966: e005 b.n 8003974 - 8003968: 4b79 ldr r3, [pc, #484] ; (8003b50 ) - 800396a: 689b ldr r3, [r3, #8] - 800396c: f003 031f and.w r3, r3, #31 - 8003970: 2b06 cmp r3, #6 - 8003972: d020 beq.n 80039b6 - 8003974: 687b ldr r3, [r7, #4] - 8003976: 681b ldr r3, [r3, #0] - 8003978: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800397c: d004 beq.n 8003988 - 800397e: 687b ldr r3, [r7, #4] - 8003980: 681b ldr r3, [r3, #0] - 8003982: 4a71 ldr r2, [pc, #452] ; (8003b48 ) - 8003984: 4293 cmp r3, r2 - 8003986: d106 bne.n 8003996 - 8003988: 4b70 ldr r3, [pc, #448] ; (8003b4c ) - 800398a: 689b ldr r3, [r3, #8] - 800398c: f003 031f and.w r3, r3, #31 - 8003990: 2b07 cmp r3, #7 - 8003992: d010 beq.n 80039b6 - 8003994: e005 b.n 80039a2 - 8003996: 4b6e ldr r3, [pc, #440] ; (8003b50 ) - 8003998: 689b ldr r3, [r3, #8] - 800399a: f003 031f and.w r3, r3, #31 - 800399e: 2b07 cmp r3, #7 - 80039a0: d009 beq.n 80039b6 - 80039a2: 687b ldr r3, [r7, #4] - 80039a4: 681b ldr r3, [r3, #0] - 80039a6: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80039aa: d004 beq.n 80039b6 - 80039ac: 687b ldr r3, [r7, #4] - 80039ae: 681b ldr r3, [r3, #0] - 80039b0: 4a64 ldr r2, [pc, #400] ; (8003b44 ) - 80039b2: 4293 cmp r3, r2 - 80039b4: d104 bne.n 80039c0 - { - tmp_cfgr_jqm = READ_REG(hadc->Instance->CFGR); - 80039b6: 687b ldr r3, [r7, #4] - 80039b8: 681b ldr r3, [r3, #0] - 80039ba: 68db ldr r3, [r3, #12] - 80039bc: 60fb str r3, [r7, #12] - 80039be: e00f b.n 80039e0 - } - else - { - tmp_cfgr_jqm = READ_REG(ADC_MASTER_INSTANCE(hadc)->CFGR); - 80039c0: 687b ldr r3, [r7, #4] - 80039c2: 681b ldr r3, [r3, #0] - 80039c4: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80039c8: d004 beq.n 80039d4 - 80039ca: 687b ldr r3, [r7, #4] - 80039cc: 681b ldr r3, [r3, #0] - 80039ce: 4a5e ldr r2, [pc, #376] ; (8003b48 ) - 80039d0: 4293 cmp r3, r2 - 80039d2: d102 bne.n 80039da - 80039d4: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000 - 80039d8: e000 b.n 80039dc - 80039da: 4b5a ldr r3, [pc, #360] ; (8003b44 ) - 80039dc: 68db ldr r3, [r3, #12] - 80039de: 60fb str r3, [r7, #12] - /* when the last context has been fully processed, JSQR is reset */ - /* by the hardware. Even if no injected conversion is planned to come */ - /* (queue empty, triggers are ignored), it can start again */ - /* immediately after setting a new context (JADSTART is still set). */ - /* Therefore, state of HAL ADC injected group is kept to busy. */ - if(READ_BIT(tmp_cfgr_jqm, ADC_CFGR_JQM) == RESET) - 80039e0: 68fb ldr r3, [r7, #12] - 80039e2: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 80039e6: 2b00 cmp r3, #0 - 80039e8: d12d bne.n 8003a46 - { - /* Allowed to modify bits ADC_IT_JEOC/ADC_IT_JEOS only if bit */ - /* JADSTART==0 (no conversion on going) */ - if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET) - 80039ea: 687b ldr r3, [r7, #4] - 80039ec: 681b ldr r3, [r3, #0] - 80039ee: 689b ldr r3, [r3, #8] - 80039f0: f003 0308 and.w r3, r3, #8 - 80039f4: 2b00 cmp r3, #0 - 80039f6: d11a bne.n 8003a2e - { - /* Disable ADC end of sequence conversion interrupt */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC | ADC_IT_JEOS); - 80039f8: 687b ldr r3, [r7, #4] - 80039fa: 681b ldr r3, [r3, #0] - 80039fc: 685a ldr r2, [r3, #4] - 80039fe: 687b ldr r3, [r7, #4] - 8003a00: 681b ldr r3, [r3, #0] - 8003a02: f022 0260 bic.w r2, r2, #96 ; 0x60 - 8003a06: 605a str r2, [r3, #4] - - /* Set ADC state */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); - 8003a08: 687b ldr r3, [r7, #4] - 8003a0a: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003a0c: f423 5280 bic.w r2, r3, #4096 ; 0x1000 - 8003a10: 687b ldr r3, [r7, #4] - 8003a12: 641a str r2, [r3, #64] ; 0x40 - - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) - 8003a14: 687b ldr r3, [r7, #4] - 8003a16: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003a18: f403 7380 and.w r3, r3, #256 ; 0x100 - 8003a1c: 2b00 cmp r3, #0 - 8003a1e: d112 bne.n 8003a46 - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - 8003a20: 687b ldr r3, [r7, #4] - 8003a22: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003a24: f043 0201 orr.w r2, r3, #1 - 8003a28: 687b ldr r3, [r7, #4] - 8003a2a: 641a str r2, [r3, #64] ; 0x40 - 8003a2c: e00b b.n 8003a46 - } - } - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8003a2e: 687b ldr r3, [r7, #4] - 8003a30: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003a32: f043 0210 orr.w r2, r3, #16 - 8003a36: 687b ldr r3, [r7, #4] - 8003a38: 641a str r2, [r3, #64] ; 0x40 - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8003a3a: 687b ldr r3, [r7, #4] - 8003a3c: 6c5b ldr r3, [r3, #68] ; 0x44 - 8003a3e: f043 0201 orr.w r2, r3, #1 - 8003a42: 687b ldr r3, [r7, #4] - 8003a44: 645a str r2, [r3, #68] ; 0x44 - /* from JEOC or JEOS, possibility to use: */ - /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOS)) " */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->InjectedConvCpltCallback(hadc); -#else - HAL_ADCEx_InjectedConvCpltCallback(hadc); - 8003a46: 6878 ldr r0, [r7, #4] - 8003a48: f000 f948 bl 8003cdc -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ - - /* Clear injected group conversion flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC | ADC_FLAG_JEOS); - 8003a4c: 687b ldr r3, [r7, #4] - 8003a4e: 681b ldr r3, [r3, #0] - 8003a50: 2260 movs r2, #96 ; 0x60 - 8003a52: 601a str r2, [r3, #0] - } - - /* ========== Check analog watchdog 1 flag ========== */ - if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD1) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD1)) - 8003a54: 687b ldr r3, [r7, #4] - 8003a56: 681b ldr r3, [r3, #0] - 8003a58: 681b ldr r3, [r3, #0] - 8003a5a: f003 0380 and.w r3, r3, #128 ; 0x80 - 8003a5e: 2b80 cmp r3, #128 ; 0x80 - 8003a60: d113 bne.n 8003a8a - 8003a62: 687b ldr r3, [r7, #4] - 8003a64: 681b ldr r3, [r3, #0] - 8003a66: 685b ldr r3, [r3, #4] - 8003a68: f003 0380 and.w r3, r3, #128 ; 0x80 - 8003a6c: 2b80 cmp r3, #128 ; 0x80 - 8003a6e: d10c bne.n 8003a8a - { - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); - 8003a70: 687b ldr r3, [r7, #4] - 8003a72: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003a74: f443 3280 orr.w r2, r3, #65536 ; 0x10000 - 8003a78: 687b ldr r3, [r7, #4] - 8003a7a: 641a str r2, [r3, #64] ; 0x40 - - /* Level out of window 1 callback */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->LevelOutOfWindowCallback(hadc); -#else - HAL_ADC_LevelOutOfWindowCallback(hadc); - 8003a7c: 6878 ldr r0, [r7, #4] - 8003a7e: f7ff faa7 bl 8002fd0 -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ - /* Clear ADC analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1); - 8003a82: 687b ldr r3, [r7, #4] - 8003a84: 681b ldr r3, [r3, #0] - 8003a86: 2280 movs r2, #128 ; 0x80 - 8003a88: 601a str r2, [r3, #0] - } - - /* ========== Check analog watchdog 2 flag ========== */ - if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD2) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD2)) - 8003a8a: 687b ldr r3, [r7, #4] - 8003a8c: 681b ldr r3, [r3, #0] - 8003a8e: 681b ldr r3, [r3, #0] - 8003a90: f403 7380 and.w r3, r3, #256 ; 0x100 - 8003a94: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8003a98: d115 bne.n 8003ac6 - 8003a9a: 687b ldr r3, [r7, #4] - 8003a9c: 681b ldr r3, [r3, #0] - 8003a9e: 685b ldr r3, [r3, #4] - 8003aa0: f403 7380 and.w r3, r3, #256 ; 0x100 - 8003aa4: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8003aa8: d10d bne.n 8003ac6 - { - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD2); - 8003aaa: 687b ldr r3, [r7, #4] - 8003aac: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003aae: f443 3200 orr.w r2, r3, #131072 ; 0x20000 - 8003ab2: 687b ldr r3, [r7, #4] - 8003ab4: 641a str r2, [r3, #64] ; 0x40 - - /* Level out of window 2 callback */ - HAL_ADCEx_LevelOutOfWindow2Callback(hadc); - 8003ab6: 6878 ldr r0, [r7, #4] - 8003ab8: f000 f924 bl 8003d04 - /* Clear ADC analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2); - 8003abc: 687b ldr r3, [r7, #4] - 8003abe: 681b ldr r3, [r3, #0] - 8003ac0: f44f 7280 mov.w r2, #256 ; 0x100 - 8003ac4: 601a str r2, [r3, #0] - } - - /* ========== Check analog watchdog 3 flag ========== */ - if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD3) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD3)) - 8003ac6: 687b ldr r3, [r7, #4] - 8003ac8: 681b ldr r3, [r3, #0] - 8003aca: 681b ldr r3, [r3, #0] - 8003acc: f403 7300 and.w r3, r3, #512 ; 0x200 - 8003ad0: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8003ad4: d115 bne.n 8003b02 - 8003ad6: 687b ldr r3, [r7, #4] - 8003ad8: 681b ldr r3, [r3, #0] - 8003ada: 685b ldr r3, [r3, #4] - 8003adc: f403 7300 and.w r3, r3, #512 ; 0x200 - 8003ae0: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8003ae4: d10d bne.n 8003b02 - { - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD3); - 8003ae6: 687b ldr r3, [r7, #4] - 8003ae8: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003aea: f443 2280 orr.w r2, r3, #262144 ; 0x40000 - 8003aee: 687b ldr r3, [r7, #4] - 8003af0: 641a str r2, [r3, #64] ; 0x40 - - /* Level out of window 3 callback */ - HAL_ADCEx_LevelOutOfWindow3Callback(hadc); - 8003af2: 6878 ldr r0, [r7, #4] - 8003af4: f000 f910 bl 8003d18 - /* Clear ADC analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3); - 8003af8: 687b ldr r3, [r7, #4] - 8003afa: 681b ldr r3, [r3, #0] - 8003afc: f44f 7200 mov.w r2, #512 ; 0x200 - 8003b00: 601a str r2, [r3, #0] - } - - /* ========== Check Overrun flag ========== */ - if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR)) - 8003b02: 687b ldr r3, [r7, #4] - 8003b04: 681b ldr r3, [r3, #0] - 8003b06: 681b ldr r3, [r3, #0] - 8003b08: f003 0310 and.w r3, r3, #16 - 8003b0c: 2b10 cmp r3, #16 - 8003b0e: d151 bne.n 8003bb4 - 8003b10: 687b ldr r3, [r7, #4] - 8003b12: 681b ldr r3, [r3, #0] - 8003b14: 685b ldr r3, [r3, #4] - 8003b16: f003 0310 and.w r3, r3, #16 - 8003b1a: 2b10 cmp r3, #16 - 8003b1c: d14a bne.n 8003bb4 - /* overrun event is not considered as an error. */ - /* (cf ref manual "Managing conversions without using the DMA and */ - /* without overrun ") */ - /* Exception for usage with DMA overrun event always considered as an */ - /* error. */ - if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) - 8003b1e: 687b ldr r3, [r7, #4] - 8003b20: 6b5b ldr r3, [r3, #52] ; 0x34 - 8003b22: 2b01 cmp r3, #1 - 8003b24: d102 bne.n 8003b2c - { - overrun_error = 1U; - 8003b26: 2301 movs r3, #1 - 8003b28: 617b str r3, [r7, #20] - 8003b2a: e02d b.n 8003b88 - else - { - /* Pointer to the common control register to which is belonging hadc */ - /* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */ - /* control registers) */ - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - 8003b2c: 687b ldr r3, [r7, #4] - 8003b2e: 681b ldr r3, [r3, #0] - 8003b30: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8003b34: d004 beq.n 8003b40 - 8003b36: 687b ldr r3, [r7, #4] - 8003b38: 681b ldr r3, [r3, #0] - 8003b3a: 4a03 ldr r2, [pc, #12] ; (8003b48 ) - 8003b3c: 4293 cmp r3, r2 - 8003b3e: d109 bne.n 8003b54 - 8003b40: 4b02 ldr r3, [pc, #8] ; (8003b4c ) - 8003b42: e008 b.n 8003b56 - 8003b44: 50000400 .word 0x50000400 - 8003b48: 50000100 .word 0x50000100 - 8003b4c: 50000300 .word 0x50000300 - 8003b50: 50000700 .word 0x50000700 - 8003b54: 4b2b ldr r3, [pc, #172] ; (8003c04 ) - 8003b56: 60bb str r3, [r7, #8] - - /* Check DMA configuration, depending on MultiMode set or not */ - if (READ_BIT(tmpADC_Common->CCR, ADC_CCR_MULTI) == ADC_MODE_INDEPENDENT) - 8003b58: 68bb ldr r3, [r7, #8] - 8003b5a: 689b ldr r3, [r3, #8] - 8003b5c: f003 031f and.w r3, r3, #31 - 8003b60: 2b00 cmp r3, #0 - 8003b62: d109 bne.n 8003b78 - { - if (HAL_IS_BIT_SET(hadc->Instance->CFGR, ADC_CFGR_DMAEN)) - 8003b64: 687b ldr r3, [r7, #4] - 8003b66: 681b ldr r3, [r3, #0] - 8003b68: 68db ldr r3, [r3, #12] - 8003b6a: f003 0301 and.w r3, r3, #1 - 8003b6e: 2b01 cmp r3, #1 - 8003b70: d10a bne.n 8003b88 - { - overrun_error = 1U; - 8003b72: 2301 movs r3, #1 - 8003b74: 617b str r3, [r7, #20] - 8003b76: e007 b.n 8003b88 - } - } - else - { - /* MultiMode is enabled, Common Control Register MDMA bits must be checked */ - if (READ_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA) != RESET) - 8003b78: 68bb ldr r3, [r7, #8] - 8003b7a: 689b ldr r3, [r3, #8] - 8003b7c: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8003b80: 2b00 cmp r3, #0 - 8003b82: d001 beq.n 8003b88 - { - overrun_error = 1U; - 8003b84: 2301 movs r3, #1 - 8003b86: 617b str r3, [r7, #20] - } - } - } - - if (overrun_error == 1U) - 8003b88: 697b ldr r3, [r7, #20] - 8003b8a: 2b01 cmp r3, #1 - 8003b8c: d10e bne.n 8003bac - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); - 8003b8e: 687b ldr r3, [r7, #4] - 8003b90: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003b92: f443 6280 orr.w r2, r3, #1024 ; 0x400 - 8003b96: 687b ldr r3, [r7, #4] - 8003b98: 641a str r2, [r3, #64] ; 0x40 - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); - 8003b9a: 687b ldr r3, [r7, #4] - 8003b9c: 6c5b ldr r3, [r3, #68] ; 0x44 - 8003b9e: f043 0202 orr.w r2, r3, #2 - 8003ba2: 687b ldr r3, [r7, #4] - 8003ba4: 645a str r2, [r3, #68] ; 0x44 - - /* Error callback */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ErrorCallback(hadc); -#else - HAL_ADC_ErrorCallback(hadc); - 8003ba6: 6878 ldr r0, [r7, #4] - 8003ba8: f7ff fa1c bl 8002fe4 -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ - } - - /* Clear the Overrun flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); - 8003bac: 687b ldr r3, [r7, #4] - 8003bae: 681b ldr r3, [r3, #0] - 8003bb0: 2210 movs r2, #16 - 8003bb2: 601a str r2, [r3, #0] - - } - - - /* ========== Check Injected context queue overflow flag ========== */ - if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JQOVF) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JQOVF)) - 8003bb4: 687b ldr r3, [r7, #4] - 8003bb6: 681b ldr r3, [r3, #0] - 8003bb8: 681b ldr r3, [r3, #0] - 8003bba: f403 6380 and.w r3, r3, #1024 ; 0x400 - 8003bbe: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8003bc2: d11b bne.n 8003bfc - 8003bc4: 687b ldr r3, [r7, #4] - 8003bc6: 681b ldr r3, [r3, #0] - 8003bc8: 685b ldr r3, [r3, #4] - 8003bca: f403 6380 and.w r3, r3, #1024 ; 0x400 - 8003bce: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8003bd2: d113 bne.n 8003bfc - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); - 8003bd4: 687b ldr r3, [r7, #4] - 8003bd6: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003bd8: f443 4280 orr.w r2, r3, #16384 ; 0x4000 - 8003bdc: 687b ldr r3, [r7, #4] - 8003bde: 641a str r2, [r3, #64] ; 0x40 - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); - 8003be0: 687b ldr r3, [r7, #4] - 8003be2: 6c5b ldr r3, [r3, #68] ; 0x44 - 8003be4: f043 0208 orr.w r2, r3, #8 - 8003be8: 687b ldr r3, [r7, #4] - 8003bea: 645a str r2, [r3, #68] ; 0x44 - - /* Clear the Injected context queue overflow flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF); - 8003bec: 687b ldr r3, [r7, #4] - 8003bee: 681b ldr r3, [r3, #0] - 8003bf0: f44f 6280 mov.w r2, #1024 ; 0x400 - 8003bf4: 601a str r2, [r3, #0] - - /* Error callback */ - HAL_ADCEx_InjectedQueueOverflowCallback(hadc); - 8003bf6: 6878 ldr r0, [r7, #4] - 8003bf8: f000 f87a bl 8003cf0 - } - -} - 8003bfc: bf00 nop - 8003bfe: 3718 adds r7, #24 - 8003c00: 46bd mov sp, r7 - 8003c02: bd80 pop {r7, pc} - 8003c04: 50000700 .word 0x50000700 - -08003c08 : - * @arg ADC_SINGLE_ENDED: Channel in mode input single ended - * @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff) -{ - 8003c08: b580 push {r7, lr} - 8003c0a: b084 sub sp, #16 - 8003c0c: af00 add r7, sp, #0 - 8003c0e: 6078 str r0, [r7, #4] - 8003c10: 6039 str r1, [r7, #0] - HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8003c12: 2300 movs r3, #0 - 8003c14: 73fb strb r3, [r7, #15] - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); - - /* Process locked */ - __HAL_LOCK(hadc); - 8003c16: 687b ldr r3, [r7, #4] - 8003c18: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8003c1c: 2b01 cmp r3, #1 - 8003c1e: d101 bne.n 8003c24 - 8003c20: 2302 movs r3, #2 - 8003c22: e057 b.n 8003cd4 - 8003c24: 687b ldr r3, [r7, #4] - 8003c26: 2201 movs r2, #1 - 8003c28: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Calibration prerequisite: ADC must be disabled. */ - - /* Disable the ADC (if not already disabled) */ - tmp_hal_status = ADC_Disable(hadc); - 8003c2c: 6878 ldr r0, [r7, #4] - 8003c2e: f000 fe6f bl 8004910 - 8003c32: 4603 mov r3, r0 - 8003c34: 73fb strb r3, [r7, #15] - - /* Check if ADC is effectively disabled */ - if (tmp_hal_status == HAL_OK) - 8003c36: 7bfb ldrb r3, [r7, #15] - 8003c38: 2b00 cmp r3, #0 - 8003c3a: d146 bne.n 8003cca - { - /* Change ADC state */ - hadc->State = HAL_ADC_STATE_READY; - 8003c3c: 687b ldr r3, [r7, #4] - 8003c3e: 2201 movs r2, #1 - 8003c40: 641a str r2, [r3, #64] ; 0x40 - - /* Select calibration mode single ended or differential ended */ - hadc->Instance->CR &= (~ADC_CR_ADCALDIF); - 8003c42: 687b ldr r3, [r7, #4] - 8003c44: 681b ldr r3, [r3, #0] - 8003c46: 689a ldr r2, [r3, #8] - 8003c48: 687b ldr r3, [r7, #4] - 8003c4a: 681b ldr r3, [r3, #0] - 8003c4c: f022 4280 bic.w r2, r2, #1073741824 ; 0x40000000 - 8003c50: 609a str r2, [r3, #8] - if (SingleDiff == ADC_DIFFERENTIAL_ENDED) - 8003c52: 683b ldr r3, [r7, #0] - 8003c54: 2b01 cmp r3, #1 - 8003c56: d107 bne.n 8003c68 - { - hadc->Instance->CR |= ADC_CR_ADCALDIF; - 8003c58: 687b ldr r3, [r7, #4] - 8003c5a: 681b ldr r3, [r3, #0] - 8003c5c: 689a ldr r2, [r3, #8] - 8003c5e: 687b ldr r3, [r7, #4] - 8003c60: 681b ldr r3, [r3, #0] - 8003c62: f042 4280 orr.w r2, r2, #1073741824 ; 0x40000000 - 8003c66: 609a str r2, [r3, #8] - } - - /* Start ADC calibration */ - hadc->Instance->CR |= ADC_CR_ADCAL; - 8003c68: 687b ldr r3, [r7, #4] - 8003c6a: 681b ldr r3, [r3, #0] - 8003c6c: 689a ldr r2, [r3, #8] - 8003c6e: 687b ldr r3, [r7, #4] - 8003c70: 681b ldr r3, [r3, #0] - 8003c72: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000 - 8003c76: 609a str r2, [r3, #8] - - tickstart = HAL_GetTick(); - 8003c78: f7ff f968 bl 8002f4c - 8003c7c: 60b8 str r0, [r7, #8] - - /* Wait for calibration completion */ - while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) - 8003c7e: e014 b.n 8003caa - { - if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) - 8003c80: f7ff f964 bl 8002f4c - 8003c84: 4602 mov r2, r0 - 8003c86: 68bb ldr r3, [r7, #8] - 8003c88: 1ad3 subs r3, r2, r3 - 8003c8a: 2b0a cmp r3, #10 - 8003c8c: d90d bls.n 8003caa - { - /* Update ADC state machine to error */ - ADC_STATE_CLR_SET(hadc->State, - 8003c8e: 687b ldr r3, [r7, #4] - 8003c90: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003c92: f023 0312 bic.w r3, r3, #18 - 8003c96: f043 0210 orr.w r2, r3, #16 - 8003c9a: 687b ldr r3, [r7, #4] - 8003c9c: 641a str r2, [r3, #64] ; 0x40 - HAL_ADC_STATE_BUSY_INTERNAL, - HAL_ADC_STATE_ERROR_INTERNAL); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 8003c9e: 687b ldr r3, [r7, #4] - 8003ca0: 2200 movs r2, #0 - 8003ca2: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_ERROR; - 8003ca6: 2301 movs r3, #1 - 8003ca8: e014 b.n 8003cd4 - while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) - 8003caa: 687b ldr r3, [r7, #4] - 8003cac: 681b ldr r3, [r3, #0] - 8003cae: 689b ldr r3, [r3, #8] - 8003cb0: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 - 8003cb4: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 8003cb8: d0e2 beq.n 8003c80 - } - } - - /* Set ADC state */ - ADC_STATE_CLR_SET(hadc->State, - 8003cba: 687b ldr r3, [r7, #4] - 8003cbc: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003cbe: f023 0303 bic.w r3, r3, #3 - 8003cc2: f043 0201 orr.w r2, r3, #1 - 8003cc6: 687b ldr r3, [r7, #4] - 8003cc8: 641a str r2, [r3, #64] ; 0x40 - HAL_ADC_STATE_BUSY_INTERNAL, - HAL_ADC_STATE_READY); - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 8003cca: 687b ldr r3, [r7, #4] - 8003ccc: 2200 movs r2, #0 - 8003cce: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Return function status */ - return tmp_hal_status; - 8003cd2: 7bfb ldrb r3, [r7, #15] -} - 8003cd4: 4618 mov r0, r3 - 8003cd6: 3710 adds r7, #16 - 8003cd8: 46bd mov sp, r7 - 8003cda: bd80 pop {r7, pc} - -08003cdc : - * @brief Injected conversion complete callback in non blocking mode - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc) -{ - 8003cdc: b480 push {r7} - 8003cde: b083 sub sp, #12 - 8003ce0: af00 add r7, sp, #0 - 8003ce2: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function Should not be modified, when the callback is needed, - the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file - */ -} - 8003ce4: bf00 nop - 8003ce6: 370c adds r7, #12 - 8003ce8: 46bd mov sp, r7 - 8003cea: f85d 7b04 ldr.w r7, [sp], #4 - 8003cee: 4770 bx lr - -08003cf0 : - contexts). - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc) -{ - 8003cf0: b480 push {r7} - 8003cf2: b083 sub sp, #12 - 8003cf4: af00 add r7, sp, #0 - 8003cf6: 6078 str r0, [r7, #4] - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented - in the user file. - */ -} - 8003cf8: bf00 nop - 8003cfa: 370c adds r7, #12 - 8003cfc: 46bd mov sp, r7 - 8003cfe: f85d 7b04 ldr.w r7, [sp], #4 - 8003d02: 4770 bx lr - -08003d04 : - * @brief Analog watchdog 2 callback in non blocking mode. - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef* hadc) -{ - 8003d04: b480 push {r7} - 8003d06: b083 sub sp, #12 - 8003d08: af00 add r7, sp, #0 - 8003d0a: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_LevelOoutOfWindow2Callback must be implemented in the user file. - */ -} - 8003d0c: bf00 nop - 8003d0e: 370c adds r7, #12 - 8003d10: 46bd mov sp, r7 - 8003d12: f85d 7b04 ldr.w r7, [sp], #4 - 8003d16: 4770 bx lr - -08003d18 : - * @brief Analog watchdog 3 callback in non blocking mode. - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef* hadc) -{ - 8003d18: b480 push {r7} - 8003d1a: b083 sub sp, #12 - 8003d1c: af00 add r7, sp, #0 - 8003d1e: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_LevelOoutOfWindow3Callback must be implemented in the user file. - */ -} - 8003d20: bf00 nop - 8003d22: 370c adds r7, #12 - 8003d24: 46bd mov sp, r7 - 8003d26: f85d 7b04 ldr.w r7, [sp], #4 - 8003d2a: 4770 bx lr - -08003d2c : - * @param hadc ADC handle - * @param sConfig Structure ADC channel for regular group. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) -{ - 8003d2c: b480 push {r7} - 8003d2e: b09b sub sp, #108 ; 0x6c - 8003d30: af00 add r7, sp, #0 - 8003d32: 6078 str r0, [r7, #4] - 8003d34: 6039 str r1, [r7, #0] - HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8003d36: 2300 movs r3, #0 - 8003d38: f887 3067 strb.w r3, [r7, #103] ; 0x67 - ADC_Common_TypeDef *tmpADC_Common; - ADC_HandleTypeDef tmphadcSharingSameCommonRegister; - uint32_t tmpOffsetShifted; - __IO uint32_t wait_loop_index = 0U; - 8003d3c: 2300 movs r3, #0 - 8003d3e: 60bb str r3, [r7, #8] - { - assert_param(IS_ADC_DIFF_CHANNEL(sConfig->Channel)); - } - - /* Process locked */ - __HAL_LOCK(hadc); - 8003d40: 687b ldr r3, [r7, #4] - 8003d42: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8003d46: 2b01 cmp r3, #1 - 8003d48: d101 bne.n 8003d4e - 8003d4a: 2302 movs r3, #2 - 8003d4c: e2cb b.n 80042e6 - 8003d4e: 687b ldr r3, [r7, #4] - 8003d50: 2201 movs r2, #1 - 8003d52: f883 203c strb.w r2, [r3, #60] ; 0x3c - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular group: */ - /* - Channel number */ - /* - Channel rank */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - 8003d56: 687b ldr r3, [r7, #4] - 8003d58: 681b ldr r3, [r3, #0] - 8003d5a: 689b ldr r3, [r3, #8] - 8003d5c: f003 0304 and.w r3, r3, #4 - 8003d60: 2b00 cmp r3, #0 - 8003d62: f040 82af bne.w 80042c4 - { - /* Regular sequence configuration */ - /* For Rank 1 to 4U */ - if (sConfig->Rank < 5U) - 8003d66: 683b ldr r3, [r7, #0] - 8003d68: 685b ldr r3, [r3, #4] - 8003d6a: 2b04 cmp r3, #4 - 8003d6c: d81c bhi.n 8003da8 - { - MODIFY_REG(hadc->Instance->SQR1, - 8003d6e: 687b ldr r3, [r7, #4] - 8003d70: 681b ldr r3, [r3, #0] - 8003d72: 6b19 ldr r1, [r3, #48] ; 0x30 - 8003d74: 683b ldr r3, [r7, #0] - 8003d76: 685a ldr r2, [r3, #4] - 8003d78: 4613 mov r3, r2 - 8003d7a: 005b lsls r3, r3, #1 - 8003d7c: 4413 add r3, r2 - 8003d7e: 005b lsls r3, r3, #1 - 8003d80: 461a mov r2, r3 - 8003d82: 231f movs r3, #31 - 8003d84: 4093 lsls r3, r2 - 8003d86: 43db mvns r3, r3 - 8003d88: 4019 ands r1, r3 - 8003d8a: 683b ldr r3, [r7, #0] - 8003d8c: 6818 ldr r0, [r3, #0] - 8003d8e: 683b ldr r3, [r7, #0] - 8003d90: 685a ldr r2, [r3, #4] - 8003d92: 4613 mov r3, r2 - 8003d94: 005b lsls r3, r3, #1 - 8003d96: 4413 add r3, r2 - 8003d98: 005b lsls r3, r3, #1 - 8003d9a: fa00 f203 lsl.w r2, r0, r3 - 8003d9e: 687b ldr r3, [r7, #4] - 8003da0: 681b ldr r3, [r3, #0] - 8003da2: 430a orrs r2, r1 - 8003da4: 631a str r2, [r3, #48] ; 0x30 - 8003da6: e063 b.n 8003e70 - ADC_SQR1_RK(ADC_SQR2_SQ5, sConfig->Rank) , - ADC_SQR1_RK(sConfig->Channel, sConfig->Rank) ); - } - /* For Rank 5 to 9U */ - else if (sConfig->Rank < 10U) - 8003da8: 683b ldr r3, [r7, #0] - 8003daa: 685b ldr r3, [r3, #4] - 8003dac: 2b09 cmp r3, #9 - 8003dae: d81e bhi.n 8003dee - { - MODIFY_REG(hadc->Instance->SQR2, - 8003db0: 687b ldr r3, [r7, #4] - 8003db2: 681b ldr r3, [r3, #0] - 8003db4: 6b59 ldr r1, [r3, #52] ; 0x34 - 8003db6: 683b ldr r3, [r7, #0] - 8003db8: 685a ldr r2, [r3, #4] - 8003dba: 4613 mov r3, r2 - 8003dbc: 005b lsls r3, r3, #1 - 8003dbe: 4413 add r3, r2 - 8003dc0: 005b lsls r3, r3, #1 - 8003dc2: 3b1e subs r3, #30 - 8003dc4: 221f movs r2, #31 - 8003dc6: fa02 f303 lsl.w r3, r2, r3 - 8003dca: 43db mvns r3, r3 - 8003dcc: 4019 ands r1, r3 - 8003dce: 683b ldr r3, [r7, #0] - 8003dd0: 6818 ldr r0, [r3, #0] - 8003dd2: 683b ldr r3, [r7, #0] - 8003dd4: 685a ldr r2, [r3, #4] - 8003dd6: 4613 mov r3, r2 - 8003dd8: 005b lsls r3, r3, #1 - 8003dda: 4413 add r3, r2 - 8003ddc: 005b lsls r3, r3, #1 - 8003dde: 3b1e subs r3, #30 - 8003de0: fa00 f203 lsl.w r2, r0, r3 - 8003de4: 687b ldr r3, [r7, #4] - 8003de6: 681b ldr r3, [r3, #0] - 8003de8: 430a orrs r2, r1 - 8003dea: 635a str r2, [r3, #52] ; 0x34 - 8003dec: e040 b.n 8003e70 - ADC_SQR2_RK(ADC_SQR2_SQ5, sConfig->Rank) , - ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); - } - /* For Rank 10 to 14U */ - else if (sConfig->Rank < 15U) - 8003dee: 683b ldr r3, [r7, #0] - 8003df0: 685b ldr r3, [r3, #4] - 8003df2: 2b0e cmp r3, #14 - 8003df4: d81e bhi.n 8003e34 - { - MODIFY_REG(hadc->Instance->SQR3 , - 8003df6: 687b ldr r3, [r7, #4] - 8003df8: 681b ldr r3, [r3, #0] - 8003dfa: 6b99 ldr r1, [r3, #56] ; 0x38 - 8003dfc: 683b ldr r3, [r7, #0] - 8003dfe: 685a ldr r2, [r3, #4] - 8003e00: 4613 mov r3, r2 - 8003e02: 005b lsls r3, r3, #1 - 8003e04: 4413 add r3, r2 - 8003e06: 005b lsls r3, r3, #1 - 8003e08: 3b3c subs r3, #60 ; 0x3c - 8003e0a: 221f movs r2, #31 - 8003e0c: fa02 f303 lsl.w r3, r2, r3 - 8003e10: 43db mvns r3, r3 - 8003e12: 4019 ands r1, r3 - 8003e14: 683b ldr r3, [r7, #0] - 8003e16: 6818 ldr r0, [r3, #0] - 8003e18: 683b ldr r3, [r7, #0] - 8003e1a: 685a ldr r2, [r3, #4] - 8003e1c: 4613 mov r3, r2 - 8003e1e: 005b lsls r3, r3, #1 - 8003e20: 4413 add r3, r2 - 8003e22: 005b lsls r3, r3, #1 - 8003e24: 3b3c subs r3, #60 ; 0x3c - 8003e26: fa00 f203 lsl.w r2, r0, r3 - 8003e2a: 687b ldr r3, [r7, #4] - 8003e2c: 681b ldr r3, [r3, #0] - 8003e2e: 430a orrs r2, r1 - 8003e30: 639a str r2, [r3, #56] ; 0x38 - 8003e32: e01d b.n 8003e70 - ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); - } - /* For Rank 15 to 16U */ - else - { - MODIFY_REG(hadc->Instance->SQR4 , - 8003e34: 687b ldr r3, [r7, #4] - 8003e36: 681b ldr r3, [r3, #0] - 8003e38: 6bd9 ldr r1, [r3, #60] ; 0x3c - 8003e3a: 683b ldr r3, [r7, #0] - 8003e3c: 685a ldr r2, [r3, #4] - 8003e3e: 4613 mov r3, r2 - 8003e40: 005b lsls r3, r3, #1 - 8003e42: 4413 add r3, r2 - 8003e44: 005b lsls r3, r3, #1 - 8003e46: 3b5a subs r3, #90 ; 0x5a - 8003e48: 221f movs r2, #31 - 8003e4a: fa02 f303 lsl.w r3, r2, r3 - 8003e4e: 43db mvns r3, r3 - 8003e50: 4019 ands r1, r3 - 8003e52: 683b ldr r3, [r7, #0] - 8003e54: 6818 ldr r0, [r3, #0] - 8003e56: 683b ldr r3, [r7, #0] - 8003e58: 685a ldr r2, [r3, #4] - 8003e5a: 4613 mov r3, r2 - 8003e5c: 005b lsls r3, r3, #1 - 8003e5e: 4413 add r3, r2 - 8003e60: 005b lsls r3, r3, #1 - 8003e62: 3b5a subs r3, #90 ; 0x5a - 8003e64: fa00 f203 lsl.w r2, r0, r3 - 8003e68: 687b ldr r3, [r7, #4] - 8003e6a: 681b ldr r3, [r3, #0] - 8003e6c: 430a orrs r2, r1 - 8003e6e: 63da str r2, [r3, #60] ; 0x3c - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular group: */ - /* - Channel sampling time */ - /* - Channel offset */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) - 8003e70: 687b ldr r3, [r7, #4] - 8003e72: 681b ldr r3, [r3, #0] - 8003e74: 689b ldr r3, [r3, #8] - 8003e76: f003 030c and.w r3, r3, #12 - 8003e7a: 2b00 cmp r3, #0 - 8003e7c: f040 80e5 bne.w 800404a - { - /* Channel sampling time configuration */ - /* For channels 10 to 18U */ - if (sConfig->Channel >= ADC_CHANNEL_10) - 8003e80: 683b ldr r3, [r7, #0] - 8003e82: 681b ldr r3, [r3, #0] - 8003e84: 2b09 cmp r3, #9 - 8003e86: d91c bls.n 8003ec2 - { - MODIFY_REG(hadc->Instance->SMPR2 , - 8003e88: 687b ldr r3, [r7, #4] - 8003e8a: 681b ldr r3, [r3, #0] - 8003e8c: 6999 ldr r1, [r3, #24] - 8003e8e: 683b ldr r3, [r7, #0] - 8003e90: 681a ldr r2, [r3, #0] - 8003e92: 4613 mov r3, r2 - 8003e94: 005b lsls r3, r3, #1 - 8003e96: 4413 add r3, r2 - 8003e98: 3b1e subs r3, #30 - 8003e9a: 2207 movs r2, #7 - 8003e9c: fa02 f303 lsl.w r3, r2, r3 - 8003ea0: 43db mvns r3, r3 - 8003ea2: 4019 ands r1, r3 - 8003ea4: 683b ldr r3, [r7, #0] - 8003ea6: 6898 ldr r0, [r3, #8] - 8003ea8: 683b ldr r3, [r7, #0] - 8003eaa: 681a ldr r2, [r3, #0] - 8003eac: 4613 mov r3, r2 - 8003eae: 005b lsls r3, r3, #1 - 8003eb0: 4413 add r3, r2 - 8003eb2: 3b1e subs r3, #30 - 8003eb4: fa00 f203 lsl.w r2, r0, r3 - 8003eb8: 687b ldr r3, [r7, #4] - 8003eba: 681b ldr r3, [r3, #0] - 8003ebc: 430a orrs r2, r1 - 8003ebe: 619a str r2, [r3, #24] - 8003ec0: e019 b.n 8003ef6 - ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel) , - ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); - } - else /* For channels 1 to 9U */ - { - MODIFY_REG(hadc->Instance->SMPR1 , - 8003ec2: 687b ldr r3, [r7, #4] - 8003ec4: 681b ldr r3, [r3, #0] - 8003ec6: 6959 ldr r1, [r3, #20] - 8003ec8: 683b ldr r3, [r7, #0] - 8003eca: 681a ldr r2, [r3, #0] - 8003ecc: 4613 mov r3, r2 - 8003ece: 005b lsls r3, r3, #1 - 8003ed0: 4413 add r3, r2 - 8003ed2: 2207 movs r2, #7 - 8003ed4: fa02 f303 lsl.w r3, r2, r3 - 8003ed8: 43db mvns r3, r3 - 8003eda: 4019 ands r1, r3 - 8003edc: 683b ldr r3, [r7, #0] - 8003ede: 6898 ldr r0, [r3, #8] - 8003ee0: 683b ldr r3, [r7, #0] - 8003ee2: 681a ldr r2, [r3, #0] - 8003ee4: 4613 mov r3, r2 - 8003ee6: 005b lsls r3, r3, #1 - 8003ee8: 4413 add r3, r2 - 8003eea: fa00 f203 lsl.w r2, r0, r3 - 8003eee: 687b ldr r3, [r7, #4] - 8003ef0: 681b ldr r3, [r3, #0] - 8003ef2: 430a orrs r2, r1 - 8003ef4: 615a str r2, [r3, #20] - /* Configure the offset: offset enable/disable, channel, offset value */ - - /* Shift the offset in function of the selected ADC resolution. */ - /* Offset has to be left-aligned on bit 11U, the LSB (right bits) are set */ - /* to 0. */ - tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfig->Offset); - 8003ef6: 683b ldr r3, [r7, #0] - 8003ef8: 695a ldr r2, [r3, #20] - 8003efa: 687b ldr r3, [r7, #4] - 8003efc: 681b ldr r3, [r3, #0] - 8003efe: 68db ldr r3, [r3, #12] - 8003f00: 08db lsrs r3, r3, #3 - 8003f02: f003 0303 and.w r3, r3, #3 - 8003f06: 005b lsls r3, r3, #1 - 8003f08: fa02 f303 lsl.w r3, r2, r3 - 8003f0c: 663b str r3, [r7, #96] ; 0x60 - - /* Configure the selected offset register: */ - /* - Enable offset */ - /* - Set channel number */ - /* - Set offset value */ - switch (sConfig->OffsetNumber) - 8003f0e: 683b ldr r3, [r7, #0] - 8003f10: 691b ldr r3, [r3, #16] - 8003f12: 3b01 subs r3, #1 - 8003f14: 2b03 cmp r3, #3 - 8003f16: d84f bhi.n 8003fb8 - 8003f18: a201 add r2, pc, #4 ; (adr r2, 8003f20 ) - 8003f1a: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8003f1e: bf00 nop - 8003f20: 08003f31 .word 0x08003f31 - 8003f24: 08003f53 .word 0x08003f53 - 8003f28: 08003f75 .word 0x08003f75 - 8003f2c: 08003f97 .word 0x08003f97 - { - case ADC_OFFSET_1: - /* Configure offset register 1U */ - MODIFY_REG(hadc->Instance->OFR1 , - 8003f30: 687b ldr r3, [r7, #4] - 8003f32: 681b ldr r3, [r3, #0] - 8003f34: 6e1a ldr r2, [r3, #96] ; 0x60 - 8003f36: 4b9f ldr r3, [pc, #636] ; (80041b4 ) - 8003f38: 4013 ands r3, r2 - 8003f3a: 683a ldr r2, [r7, #0] - 8003f3c: 6812 ldr r2, [r2, #0] - 8003f3e: 0691 lsls r1, r2, #26 - 8003f40: 6e3a ldr r2, [r7, #96] ; 0x60 - 8003f42: 430a orrs r2, r1 - 8003f44: 431a orrs r2, r3 - 8003f46: 687b ldr r3, [r7, #4] - 8003f48: 681b ldr r3, [r3, #0] - 8003f4a: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000 - 8003f4e: 661a str r2, [r3, #96] ; 0x60 - ADC_OFR1_OFFSET1_CH | - ADC_OFR1_OFFSET1 , - ADC_OFR1_OFFSET1_EN | - ADC_OFR_CHANNEL(sConfig->Channel) | - tmpOffsetShifted ); - break; - 8003f50: e07e b.n 8004050 - - case ADC_OFFSET_2: - /* Configure offset register 2U */ - MODIFY_REG(hadc->Instance->OFR2 , - 8003f52: 687b ldr r3, [r7, #4] - 8003f54: 681b ldr r3, [r3, #0] - 8003f56: 6e5a ldr r2, [r3, #100] ; 0x64 - 8003f58: 4b96 ldr r3, [pc, #600] ; (80041b4 ) - 8003f5a: 4013 ands r3, r2 - 8003f5c: 683a ldr r2, [r7, #0] - 8003f5e: 6812 ldr r2, [r2, #0] - 8003f60: 0691 lsls r1, r2, #26 - 8003f62: 6e3a ldr r2, [r7, #96] ; 0x60 - 8003f64: 430a orrs r2, r1 - 8003f66: 431a orrs r2, r3 - 8003f68: 687b ldr r3, [r7, #4] - 8003f6a: 681b ldr r3, [r3, #0] - 8003f6c: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000 - 8003f70: 665a str r2, [r3, #100] ; 0x64 - ADC_OFR2_OFFSET2_CH | - ADC_OFR2_OFFSET2 , - ADC_OFR2_OFFSET2_EN | - ADC_OFR_CHANNEL(sConfig->Channel) | - tmpOffsetShifted ); - break; - 8003f72: e06d b.n 8004050 - - case ADC_OFFSET_3: - /* Configure offset register 3U */ - MODIFY_REG(hadc->Instance->OFR3 , - 8003f74: 687b ldr r3, [r7, #4] - 8003f76: 681b ldr r3, [r3, #0] - 8003f78: 6e9a ldr r2, [r3, #104] ; 0x68 - 8003f7a: 4b8e ldr r3, [pc, #568] ; (80041b4 ) - 8003f7c: 4013 ands r3, r2 - 8003f7e: 683a ldr r2, [r7, #0] - 8003f80: 6812 ldr r2, [r2, #0] - 8003f82: 0691 lsls r1, r2, #26 - 8003f84: 6e3a ldr r2, [r7, #96] ; 0x60 - 8003f86: 430a orrs r2, r1 - 8003f88: 431a orrs r2, r3 - 8003f8a: 687b ldr r3, [r7, #4] - 8003f8c: 681b ldr r3, [r3, #0] - 8003f8e: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000 - 8003f92: 669a str r2, [r3, #104] ; 0x68 - ADC_OFR3_OFFSET3_CH | - ADC_OFR3_OFFSET3 , - ADC_OFR3_OFFSET3_EN | - ADC_OFR_CHANNEL(sConfig->Channel) | - tmpOffsetShifted ); - break; - 8003f94: e05c b.n 8004050 - - case ADC_OFFSET_4: - /* Configure offset register 4U */ - MODIFY_REG(hadc->Instance->OFR4 , - 8003f96: 687b ldr r3, [r7, #4] - 8003f98: 681b ldr r3, [r3, #0] - 8003f9a: 6eda ldr r2, [r3, #108] ; 0x6c - 8003f9c: 4b85 ldr r3, [pc, #532] ; (80041b4 ) - 8003f9e: 4013 ands r3, r2 - 8003fa0: 683a ldr r2, [r7, #0] - 8003fa2: 6812 ldr r2, [r2, #0] - 8003fa4: 0691 lsls r1, r2, #26 - 8003fa6: 6e3a ldr r2, [r7, #96] ; 0x60 - 8003fa8: 430a orrs r2, r1 - 8003faa: 431a orrs r2, r3 - 8003fac: 687b ldr r3, [r7, #4] - 8003fae: 681b ldr r3, [r3, #0] - 8003fb0: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000 - 8003fb4: 66da str r2, [r3, #108] ; 0x6c - ADC_OFR4_OFFSET4_CH | - ADC_OFR4_OFFSET4 , - ADC_OFR4_OFFSET4_EN | - ADC_OFR_CHANNEL(sConfig->Channel) | - tmpOffsetShifted ); - break; - 8003fb6: e04b b.n 8004050 - - /* Case ADC_OFFSET_NONE */ - default : - /* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is */ - /* enabled. If this is the case, offset OFRx is disabled. */ - if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8003fb8: 687b ldr r3, [r7, #4] - 8003fba: 681b ldr r3, [r3, #0] - 8003fbc: 6e1b ldr r3, [r3, #96] ; 0x60 - 8003fbe: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8003fc2: 683b ldr r3, [r7, #0] - 8003fc4: 681b ldr r3, [r3, #0] - 8003fc6: 069b lsls r3, r3, #26 - 8003fc8: 429a cmp r2, r3 - 8003fca: d107 bne.n 8003fdc - { - /* Disable offset OFR1*/ - CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_OFFSET1_EN); - 8003fcc: 687b ldr r3, [r7, #4] - 8003fce: 681b ldr r3, [r3, #0] - 8003fd0: 6e1a ldr r2, [r3, #96] ; 0x60 - 8003fd2: 687b ldr r3, [r7, #4] - 8003fd4: 681b ldr r3, [r3, #0] - 8003fd6: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8003fda: 661a str r2, [r3, #96] ; 0x60 - } - if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8003fdc: 687b ldr r3, [r7, #4] - 8003fde: 681b ldr r3, [r3, #0] - 8003fe0: 6e5b ldr r3, [r3, #100] ; 0x64 - 8003fe2: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8003fe6: 683b ldr r3, [r7, #0] - 8003fe8: 681b ldr r3, [r3, #0] - 8003fea: 069b lsls r3, r3, #26 - 8003fec: 429a cmp r2, r3 - 8003fee: d107 bne.n 8004000 - { - /* Disable offset OFR2*/ - CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_OFFSET2_EN); - 8003ff0: 687b ldr r3, [r7, #4] - 8003ff2: 681b ldr r3, [r3, #0] - 8003ff4: 6e5a ldr r2, [r3, #100] ; 0x64 - 8003ff6: 687b ldr r3, [r7, #4] - 8003ff8: 681b ldr r3, [r3, #0] - 8003ffa: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8003ffe: 665a str r2, [r3, #100] ; 0x64 - } - if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8004000: 687b ldr r3, [r7, #4] - 8004002: 681b ldr r3, [r3, #0] - 8004004: 6e9b ldr r3, [r3, #104] ; 0x68 - 8004006: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 800400a: 683b ldr r3, [r7, #0] - 800400c: 681b ldr r3, [r3, #0] - 800400e: 069b lsls r3, r3, #26 - 8004010: 429a cmp r2, r3 - 8004012: d107 bne.n 8004024 - { - /* Disable offset OFR3*/ - CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_OFFSET3_EN); - 8004014: 687b ldr r3, [r7, #4] - 8004016: 681b ldr r3, [r3, #0] - 8004018: 6e9a ldr r2, [r3, #104] ; 0x68 - 800401a: 687b ldr r3, [r7, #4] - 800401c: 681b ldr r3, [r3, #0] - 800401e: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8004022: 669a str r2, [r3, #104] ; 0x68 - } - if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8004024: 687b ldr r3, [r7, #4] - 8004026: 681b ldr r3, [r3, #0] - 8004028: 6edb ldr r3, [r3, #108] ; 0x6c - 800402a: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 800402e: 683b ldr r3, [r7, #0] - 8004030: 681b ldr r3, [r3, #0] - 8004032: 069b lsls r3, r3, #26 - 8004034: 429a cmp r2, r3 - 8004036: d10a bne.n 800404e - { - /* Disable offset OFR4*/ - CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_OFFSET4_EN); - 8004038: 687b ldr r3, [r7, #4] - 800403a: 681b ldr r3, [r3, #0] - 800403c: 6eda ldr r2, [r3, #108] ; 0x6c - 800403e: 687b ldr r3, [r7, #4] - 8004040: 681b ldr r3, [r3, #0] - 8004042: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8004046: 66da str r2, [r3, #108] ; 0x6c - } - break; - 8004048: e001 b.n 800404e - } - - } - 800404a: bf00 nop - 800404c: e000 b.n 8004050 - break; - 800404e: bf00 nop - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated only when ADC is disabled: */ - /* - Single or differential mode */ - /* - Internal measurement channels: Vbat/VrefInt/TempSensor */ - if (ADC_IS_ENABLE(hadc) == RESET) - 8004050: 687b ldr r3, [r7, #4] - 8004052: 681b ldr r3, [r3, #0] - 8004054: 689b ldr r3, [r3, #8] - 8004056: f003 0303 and.w r3, r3, #3 - 800405a: 2b01 cmp r3, #1 - 800405c: d108 bne.n 8004070 - 800405e: 687b ldr r3, [r7, #4] - 8004060: 681b ldr r3, [r3, #0] - 8004062: 681b ldr r3, [r3, #0] - 8004064: f003 0301 and.w r3, r3, #1 - 8004068: 2b01 cmp r3, #1 - 800406a: d101 bne.n 8004070 - 800406c: 2301 movs r3, #1 - 800406e: e000 b.n 8004072 - 8004070: 2300 movs r3, #0 - 8004072: 2b00 cmp r3, #0 - 8004074: f040 8131 bne.w 80042da - { - /* Configuration of differential mode */ - if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED) - 8004078: 683b ldr r3, [r7, #0] - 800407a: 68db ldr r3, [r3, #12] - 800407c: 2b01 cmp r3, #1 - 800407e: d00f beq.n 80040a0 - { - /* Disable differential mode (default mode: single-ended) */ - CLEAR_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfig->Channel)); - 8004080: 687b ldr r3, [r7, #4] - 8004082: 681b ldr r3, [r3, #0] - 8004084: f8d3 10b0 ldr.w r1, [r3, #176] ; 0xb0 - 8004088: 683b ldr r3, [r7, #0] - 800408a: 681b ldr r3, [r3, #0] - 800408c: 2201 movs r2, #1 - 800408e: fa02 f303 lsl.w r3, r2, r3 - 8004092: 43da mvns r2, r3 - 8004094: 687b ldr r3, [r7, #4] - 8004096: 681b ldr r3, [r3, #0] - 8004098: 400a ands r2, r1 - 800409a: f8c3 20b0 str.w r2, [r3, #176] ; 0xb0 - 800409e: e049 b.n 8004134 - } - else - { - /* Enable differential mode */ - SET_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfig->Channel)); - 80040a0: 687b ldr r3, [r7, #4] - 80040a2: 681b ldr r3, [r3, #0] - 80040a4: f8d3 10b0 ldr.w r1, [r3, #176] ; 0xb0 - 80040a8: 683b ldr r3, [r7, #0] - 80040aa: 681b ldr r3, [r3, #0] - 80040ac: 2201 movs r2, #1 - 80040ae: 409a lsls r2, r3 - 80040b0: 687b ldr r3, [r7, #4] - 80040b2: 681b ldr r3, [r3, #0] - 80040b4: 430a orrs r2, r1 - 80040b6: f8c3 20b0 str.w r2, [r3, #176] ; 0xb0 - - /* Channel sampling time configuration (channel ADC_INx +1 */ - /* corresponding to differential negative input). */ - /* For channels 10 to 18U */ - if (sConfig->Channel >= ADC_CHANNEL_10) - 80040ba: 683b ldr r3, [r7, #0] - 80040bc: 681b ldr r3, [r3, #0] - 80040be: 2b09 cmp r3, #9 - 80040c0: d91c bls.n 80040fc - { - MODIFY_REG(hadc->Instance->SMPR2, - 80040c2: 687b ldr r3, [r7, #4] - 80040c4: 681b ldr r3, [r3, #0] - 80040c6: 6999 ldr r1, [r3, #24] - 80040c8: 683b ldr r3, [r7, #0] - 80040ca: 681a ldr r2, [r3, #0] - 80040cc: 4613 mov r3, r2 - 80040ce: 005b lsls r3, r3, #1 - 80040d0: 4413 add r3, r2 - 80040d2: 3b1b subs r3, #27 - 80040d4: 2207 movs r2, #7 - 80040d6: fa02 f303 lsl.w r3, r2, r3 - 80040da: 43db mvns r3, r3 - 80040dc: 4019 ands r1, r3 - 80040de: 683b ldr r3, [r7, #0] - 80040e0: 6898 ldr r0, [r3, #8] - 80040e2: 683b ldr r3, [r7, #0] - 80040e4: 681a ldr r2, [r3, #0] - 80040e6: 4613 mov r3, r2 - 80040e8: 005b lsls r3, r3, #1 - 80040ea: 4413 add r3, r2 - 80040ec: 3b1b subs r3, #27 - 80040ee: fa00 f203 lsl.w r2, r0, r3 - 80040f2: 687b ldr r3, [r7, #4] - 80040f4: 681b ldr r3, [r3, #0] - 80040f6: 430a orrs r2, r1 - 80040f8: 619a str r2, [r3, #24] - 80040fa: e01b b.n 8004134 - ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel +1U) , - ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel +1U) ); - } - else /* For channels 1 to 9U */ - { - MODIFY_REG(hadc->Instance->SMPR1, - 80040fc: 687b ldr r3, [r7, #4] - 80040fe: 681b ldr r3, [r3, #0] - 8004100: 6959 ldr r1, [r3, #20] - 8004102: 683b ldr r3, [r7, #0] - 8004104: 681b ldr r3, [r3, #0] - 8004106: 1c5a adds r2, r3, #1 - 8004108: 4613 mov r3, r2 - 800410a: 005b lsls r3, r3, #1 - 800410c: 4413 add r3, r2 - 800410e: 2207 movs r2, #7 - 8004110: fa02 f303 lsl.w r3, r2, r3 - 8004114: 43db mvns r3, r3 - 8004116: 4019 ands r1, r3 - 8004118: 683b ldr r3, [r7, #0] - 800411a: 6898 ldr r0, [r3, #8] - 800411c: 683b ldr r3, [r7, #0] - 800411e: 681b ldr r3, [r3, #0] - 8004120: 1c5a adds r2, r3, #1 - 8004122: 4613 mov r3, r2 - 8004124: 005b lsls r3, r3, #1 - 8004126: 4413 add r3, r2 - 8004128: fa00 f203 lsl.w r2, r0, r3 - 800412c: 687b ldr r3, [r7, #4] - 800412e: 681b ldr r3, [r3, #0] - 8004130: 430a orrs r2, r1 - 8004132: 615a str r2, [r3, #20] - - /* Configuration of common ADC parameters */ - /* Pointer to the common control register to which is belonging hadc */ - /* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */ - /* control registers) */ - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - 8004134: 687b ldr r3, [r7, #4] - 8004136: 681b ldr r3, [r3, #0] - 8004138: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800413c: d004 beq.n 8004148 - 800413e: 687b ldr r3, [r7, #4] - 8004140: 681b ldr r3, [r3, #0] - 8004142: 4a1d ldr r2, [pc, #116] ; (80041b8 ) - 8004144: 4293 cmp r3, r2 - 8004146: d101 bne.n 800414c - 8004148: 4b1c ldr r3, [pc, #112] ; (80041bc ) - 800414a: e000 b.n 800414e - 800414c: 4b1c ldr r3, [pc, #112] ; (80041c0 ) - 800414e: 65fb str r3, [r7, #92] ; 0x5c - - /* If the requested internal measurement path has already been enabled, */ - /* bypass the configuration processing. */ - if (( (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && - 8004150: 683b ldr r3, [r7, #0] - 8004152: 681b ldr r3, [r3, #0] - 8004154: 2b10 cmp r3, #16 - 8004156: d105 bne.n 8004164 - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) || - 8004158: 6dfb ldr r3, [r7, #92] ; 0x5c - 800415a: 689b ldr r3, [r3, #8] - 800415c: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - if (( (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && - 8004160: 2b00 cmp r3, #0 - 8004162: d015 beq.n 8004190 - ( (sConfig->Channel == ADC_CHANNEL_VBAT) && - 8004164: 683b ldr r3, [r7, #0] - 8004166: 681b ldr r3, [r3, #0] - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) || - 8004168: 2b11 cmp r3, #17 - 800416a: d105 bne.n 8004178 - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) || - 800416c: 6dfb ldr r3, [r7, #92] ; 0x5c - 800416e: 689b ldr r3, [r3, #8] - 8004170: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - ( (sConfig->Channel == ADC_CHANNEL_VBAT) && - 8004174: 2b00 cmp r3, #0 - 8004176: d00b beq.n 8004190 - ( (sConfig->Channel == ADC_CHANNEL_VREFINT) && - 8004178: 683b ldr r3, [r7, #0] - 800417a: 681b ldr r3, [r3, #0] - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) || - 800417c: 2b12 cmp r3, #18 - 800417e: f040 80ac bne.w 80042da - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN))) - 8004182: 6dfb ldr r3, [r7, #92] ; 0x5c - 8004184: 689b ldr r3, [r3, #8] - 8004186: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - ( (sConfig->Channel == ADC_CHANNEL_VREFINT) && - 800418a: 2b00 cmp r3, #0 - 800418c: f040 80a5 bne.w 80042da - ) - { - /* Configuration of common ADC parameters (continuation) */ - /* Set handle of the other ADC sharing the same common register */ - ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister); - 8004190: 687b ldr r3, [r7, #4] - 8004192: 681b ldr r3, [r3, #0] - 8004194: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8004198: d102 bne.n 80041a0 - 800419a: 4b07 ldr r3, [pc, #28] ; (80041b8 ) - 800419c: 60fb str r3, [r7, #12] - 800419e: e023 b.n 80041e8 - 80041a0: 687b ldr r3, [r7, #4] - 80041a2: 681b ldr r3, [r3, #0] - 80041a4: 4a04 ldr r2, [pc, #16] ; (80041b8 ) - 80041a6: 4293 cmp r3, r2 - 80041a8: d10c bne.n 80041c4 - 80041aa: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000 - 80041ae: 60fb str r3, [r7, #12] - 80041b0: e01a b.n 80041e8 - 80041b2: bf00 nop - 80041b4: 83fff000 .word 0x83fff000 - 80041b8: 50000100 .word 0x50000100 - 80041bc: 50000300 .word 0x50000300 - 80041c0: 50000700 .word 0x50000700 - 80041c4: 687b ldr r3, [r7, #4] - 80041c6: 681b ldr r3, [r3, #0] - 80041c8: 4a4a ldr r2, [pc, #296] ; (80042f4 ) - 80041ca: 4293 cmp r3, r2 - 80041cc: d102 bne.n 80041d4 - 80041ce: 4b4a ldr r3, [pc, #296] ; (80042f8 ) - 80041d0: 60fb str r3, [r7, #12] - 80041d2: e009 b.n 80041e8 - 80041d4: 687b ldr r3, [r7, #4] - 80041d6: 681b ldr r3, [r3, #0] - 80041d8: 4a47 ldr r2, [pc, #284] ; (80042f8 ) - 80041da: 4293 cmp r3, r2 - 80041dc: d102 bne.n 80041e4 - 80041de: 4b45 ldr r3, [pc, #276] ; (80042f4 ) - 80041e0: 60fb str r3, [r7, #12] - 80041e2: e001 b.n 80041e8 - 80041e4: 2300 movs r3, #0 - 80041e6: 60fb str r3, [r7, #12] - - /* Software is allowed to change common parameters only when all ADCs */ - /* of the common group are disabled. */ - if ((ADC_IS_ENABLE(hadc) == RESET) && - 80041e8: 687b ldr r3, [r7, #4] - 80041ea: 681b ldr r3, [r3, #0] - 80041ec: 689b ldr r3, [r3, #8] - 80041ee: f003 0303 and.w r3, r3, #3 - 80041f2: 2b01 cmp r3, #1 - 80041f4: d108 bne.n 8004208 - 80041f6: 687b ldr r3, [r7, #4] - 80041f8: 681b ldr r3, [r3, #0] - 80041fa: 681b ldr r3, [r3, #0] - 80041fc: f003 0301 and.w r3, r3, #1 - 8004200: 2b01 cmp r3, #1 - 8004202: d101 bne.n 8004208 - 8004204: 2301 movs r3, #1 - 8004206: e000 b.n 800420a - 8004208: 2300 movs r3, #0 - 800420a: 2b00 cmp r3, #0 - 800420c: d150 bne.n 80042b0 - ( (tmphadcSharingSameCommonRegister.Instance == NULL) || - 800420e: 68fb ldr r3, [r7, #12] - if ((ADC_IS_ENABLE(hadc) == RESET) && - 8004210: 2b00 cmp r3, #0 - 8004212: d010 beq.n 8004236 - (ADC_IS_ENABLE(&tmphadcSharingSameCommonRegister) == RESET) ) ) - 8004214: 68fb ldr r3, [r7, #12] - 8004216: 689b ldr r3, [r3, #8] - 8004218: f003 0303 and.w r3, r3, #3 - 800421c: 2b01 cmp r3, #1 - 800421e: d107 bne.n 8004230 - 8004220: 68fb ldr r3, [r7, #12] - 8004222: 681b ldr r3, [r3, #0] - 8004224: f003 0301 and.w r3, r3, #1 - 8004228: 2b01 cmp r3, #1 - 800422a: d101 bne.n 8004230 - 800422c: 2301 movs r3, #1 - 800422e: e000 b.n 8004232 - 8004230: 2300 movs r3, #0 - ( (tmphadcSharingSameCommonRegister.Instance == NULL) || - 8004232: 2b00 cmp r3, #0 - 8004234: d13c bne.n 80042b0 - { - /* If Channel_16 is selected, enable Temp. sensor measurement path */ - /* Note: Temp. sensor internal channels available on ADC1 only */ - if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1)) - 8004236: 683b ldr r3, [r7, #0] - 8004238: 681b ldr r3, [r3, #0] - 800423a: 2b10 cmp r3, #16 - 800423c: d11d bne.n 800427a - 800423e: 687b ldr r3, [r7, #4] - 8004240: 681b ldr r3, [r3, #0] - 8004242: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8004246: d118 bne.n 800427a - { - SET_BIT(tmpADC_Common->CCR, ADC_CCR_TSEN); - 8004248: 6dfb ldr r3, [r7, #92] ; 0x5c - 800424a: 689b ldr r3, [r3, #8] - 800424c: f443 0200 orr.w r2, r3, #8388608 ; 0x800000 - 8004250: 6dfb ldr r3, [r7, #92] ; 0x5c - 8004252: 609a str r2, [r3, #8] - - /* Delay for temperature sensor stabilization time */ - /* Compute number of CPU cycles to wait for */ - wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); - 8004254: 4b29 ldr r3, [pc, #164] ; (80042fc ) - 8004256: 681b ldr r3, [r3, #0] - 8004258: 4a29 ldr r2, [pc, #164] ; (8004300 ) - 800425a: fba2 2303 umull r2, r3, r2, r3 - 800425e: 0c9a lsrs r2, r3, #18 - 8004260: 4613 mov r3, r2 - 8004262: 009b lsls r3, r3, #2 - 8004264: 4413 add r3, r2 - 8004266: 005b lsls r3, r3, #1 - 8004268: 60bb str r3, [r7, #8] - while(wait_loop_index != 0U) - 800426a: e002 b.n 8004272 - { - wait_loop_index--; - 800426c: 68bb ldr r3, [r7, #8] - 800426e: 3b01 subs r3, #1 - 8004270: 60bb str r3, [r7, #8] - while(wait_loop_index != 0U) - 8004272: 68bb ldr r3, [r7, #8] - 8004274: 2b00 cmp r3, #0 - 8004276: d1f9 bne.n 800426c - if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1)) - 8004278: e02e b.n 80042d8 - } - } - /* If Channel_17 is selected, enable VBAT measurement path */ - /* Note: VBAT internal channels available on ADC1 only */ - else if ((sConfig->Channel == ADC_CHANNEL_VBAT) && (hadc->Instance == ADC1)) - 800427a: 683b ldr r3, [r7, #0] - 800427c: 681b ldr r3, [r3, #0] - 800427e: 2b11 cmp r3, #17 - 8004280: d10b bne.n 800429a - 8004282: 687b ldr r3, [r7, #4] - 8004284: 681b ldr r3, [r3, #0] - 8004286: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 800428a: d106 bne.n 800429a - { - SET_BIT(tmpADC_Common->CCR, ADC_CCR_VBATEN); - 800428c: 6dfb ldr r3, [r7, #92] ; 0x5c - 800428e: 689b ldr r3, [r3, #8] - 8004290: f043 7280 orr.w r2, r3, #16777216 ; 0x1000000 - 8004294: 6dfb ldr r3, [r7, #92] ; 0x5c - 8004296: 609a str r2, [r3, #8] - if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1)) - 8004298: e01e b.n 80042d8 - } - /* If Channel_18 is selected, enable VREFINT measurement path */ - /* Note: VrefInt internal channels available on all ADCs, but only */ - /* one ADC is allowed to be connected to VrefInt at the same */ - /* time. */ - else if (sConfig->Channel == ADC_CHANNEL_VREFINT) - 800429a: 683b ldr r3, [r7, #0] - 800429c: 681b ldr r3, [r3, #0] - 800429e: 2b12 cmp r3, #18 - 80042a0: d11a bne.n 80042d8 - { - SET_BIT(tmpADC_Common->CCR, ADC_CCR_VREFEN); - 80042a2: 6dfb ldr r3, [r7, #92] ; 0x5c - 80042a4: 689b ldr r3, [r3, #8] - 80042a6: f443 0280 orr.w r2, r3, #4194304 ; 0x400000 - 80042aa: 6dfb ldr r3, [r7, #92] ; 0x5c - 80042ac: 609a str r2, [r3, #8] - if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1)) - 80042ae: e013 b.n 80042d8 - /* enabled and other ADC of the common group are enabled, internal */ - /* measurement paths cannot be enabled. */ - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 80042b0: 687b ldr r3, [r7, #4] - 80042b2: 6c1b ldr r3, [r3, #64] ; 0x40 - 80042b4: f043 0220 orr.w r2, r3, #32 - 80042b8: 687b ldr r3, [r7, #4] - 80042ba: 641a str r2, [r3, #64] ; 0x40 - - tmp_hal_status = HAL_ERROR; - 80042bc: 2301 movs r3, #1 - 80042be: f887 3067 strb.w r3, [r7, #103] ; 0x67 - 80042c2: e00a b.n 80042da - /* channel could be done on neither of the channel configuration structure */ - /* parameters. */ - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 80042c4: 687b ldr r3, [r7, #4] - 80042c6: 6c1b ldr r3, [r3, #64] ; 0x40 - 80042c8: f043 0220 orr.w r2, r3, #32 - 80042cc: 687b ldr r3, [r7, #4] - 80042ce: 641a str r2, [r3, #64] ; 0x40 - - tmp_hal_status = HAL_ERROR; - 80042d0: 2301 movs r3, #1 - 80042d2: f887 3067 strb.w r3, [r7, #103] ; 0x67 - 80042d6: e000 b.n 80042da - if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1)) - 80042d8: bf00 nop - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 80042da: 687b ldr r3, [r7, #4] - 80042dc: 2200 movs r2, #0 - 80042de: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Return function status */ - return tmp_hal_status; - 80042e2: f897 3067 ldrb.w r3, [r7, #103] ; 0x67 -} - 80042e6: 4618 mov r0, r3 - 80042e8: 376c adds r7, #108 ; 0x6c - 80042ea: 46bd mov sp, r7 - 80042ec: f85d 7b04 ldr.w r7, [sp], #4 - 80042f0: 4770 bx lr - 80042f2: bf00 nop - 80042f4: 50000400 .word 0x50000400 - 80042f8: 50000500 .word 0x50000500 - 80042fc: 20000008 .word 0x20000008 - 8004300: 431bde83 .word 0x431bde83 - -08004304 : - * @param hadc ADC handle - * @param AnalogWDGConfig Structure of ADC analog watchdog configuration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig) -{ - 8004304: b480 push {r7} - 8004306: b089 sub sp, #36 ; 0x24 - 8004308: af00 add r7, sp, #0 - 800430a: 6078 str r0, [r7, #4] - 800430c: 6039 str r1, [r7, #0] - HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 800430e: 2300 movs r3, #0 - 8004310: 77fb strb r3, [r7, #31] - - /* Verify if threshold is within the selected ADC resolution */ - assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); - assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); - - if((AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) || - 8004312: 683b ldr r3, [r7, #0] - 8004314: 685b ldr r3, [r3, #4] - 8004316: f5b3 0f40 cmp.w r3, #12582912 ; 0xc00000 - 800431a: d003 beq.n 8004324 - (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || - 800431c: 683b ldr r3, [r7, #0] - 800431e: 685b ldr r3, [r3, #4] - if((AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) || - 8004320: f1b3 7fa0 cmp.w r3, #20971520 ; 0x1400000 - { - assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); - } - - /* Process locked */ - __HAL_LOCK(hadc); - 8004324: 687b ldr r3, [r7, #4] - 8004326: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 800432a: 2b01 cmp r3, #1 - 800432c: d101 bne.n 8004332 - 800432e: 2302 movs r3, #2 - 8004330: e130 b.n 8004594 - 8004332: 687b ldr r3, [r7, #4] - 8004334: 2201 movs r2, #1 - 8004336: f883 203c strb.w r2, [r3, #60] ; 0x3c - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular and injected groups: */ - /* - Analog watchdog channels */ - /* - Analog watchdog thresholds */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) - 800433a: 687b ldr r3, [r7, #4] - 800433c: 681b ldr r3, [r3, #0] - 800433e: 689b ldr r3, [r3, #8] - 8004340: f003 030c and.w r3, r3, #12 - 8004344: 2b00 cmp r3, #0 - 8004346: f040 8118 bne.w 800457a - { - - /* Analog watchdogs configuration */ - if(AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_1) - 800434a: 683b ldr r3, [r7, #0] - 800434c: 681b ldr r3, [r3, #0] - 800434e: 2b01 cmp r3, #1 - 8004350: d14f bne.n 80043f2 - /* Configuration of analog watchdog: */ - /* - Set the analog watchdog enable mode: regular and/or injected */ - /* groups, one or overall group of channels. */ - /* - Set the Analog watchdog channel (is not used if watchdog */ - /* mode "all channels": ADC_CFGR_AWD1SGL=0U). */ - MODIFY_REG(hadc->Instance->CFGR , - 8004352: 687b ldr r3, [r7, #4] - 8004354: 681b ldr r3, [r3, #0] - 8004356: 68db ldr r3, [r3, #12] - 8004358: f023 43fb bic.w r3, r3, #2105540608 ; 0x7d800000 - 800435c: f423 0380 bic.w r3, r3, #4194304 ; 0x400000 - 8004360: 683a ldr r2, [r7, #0] - 8004362: 6851 ldr r1, [r2, #4] - 8004364: 683a ldr r2, [r7, #0] - 8004366: 6892 ldr r2, [r2, #8] - 8004368: 0692 lsls r2, r2, #26 - 800436a: 4311 orrs r1, r2 - 800436c: 687a ldr r2, [r7, #4] - 800436e: 6812 ldr r2, [r2, #0] - 8004370: 430b orrs r3, r1 - 8004372: 60d3 str r3, [r2, #12] - ADC_CFGR_AWD1CH_SHIFT(AnalogWDGConfig->Channel) ); - - /* Shift the offset in function of the selected ADC resolution: */ - /* Thresholds have to be left-aligned on bit 11U, the LSB (right bits) */ - /* are set to 0 */ - tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold); - 8004374: 683b ldr r3, [r7, #0] - 8004376: 691a ldr r2, [r3, #16] - 8004378: 687b ldr r3, [r7, #4] - 800437a: 681b ldr r3, [r3, #0] - 800437c: 68db ldr r3, [r3, #12] - 800437e: 08db lsrs r3, r3, #3 - 8004380: f003 0303 and.w r3, r3, #3 - 8004384: 005b lsls r3, r3, #1 - 8004386: fa02 f303 lsl.w r3, r2, r3 - 800438a: 613b str r3, [r7, #16] - tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold); - 800438c: 683b ldr r3, [r7, #0] - 800438e: 695a ldr r2, [r3, #20] - 8004390: 687b ldr r3, [r7, #4] - 8004392: 681b ldr r3, [r3, #0] - 8004394: 68db ldr r3, [r3, #12] - 8004396: 08db lsrs r3, r3, #3 - 8004398: f003 0303 and.w r3, r3, #3 - 800439c: 005b lsls r3, r3, #1 - 800439e: fa02 f303 lsl.w r3, r2, r3 - 80043a2: 60fb str r3, [r7, #12] - - /* Set the high and low thresholds */ - MODIFY_REG(hadc->Instance->TR1 , - 80043a4: 687b ldr r3, [r7, #4] - 80043a6: 681b ldr r3, [r3, #0] - 80043a8: 6a1b ldr r3, [r3, #32] - 80043aa: f003 21f0 and.w r1, r3, #4026593280 ; 0xf000f000 - 80043ae: 693b ldr r3, [r7, #16] - 80043b0: 041a lsls r2, r3, #16 - 80043b2: 68fb ldr r3, [r7, #12] - 80043b4: 431a orrs r2, r3 - 80043b6: 687b ldr r3, [r7, #4] - 80043b8: 681b ldr r3, [r3, #0] - 80043ba: 430a orrs r2, r1 - 80043bc: 621a str r2, [r3, #32] - tmpAWDLowThresholdShifted ); - - /* Clear the ADC Analog watchdog flag (in case of left enabled by */ - /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ - /* or HAL_ADC_PollForEvent(). */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD1); - 80043be: 687b ldr r3, [r7, #4] - 80043c0: 681b ldr r3, [r3, #0] - 80043c2: 2280 movs r2, #128 ; 0x80 - 80043c4: 601a str r2, [r3, #0] - - /* Configure ADC Analog watchdog interrupt */ - if(AnalogWDGConfig->ITMode == ENABLE) - 80043c6: 683b ldr r3, [r7, #0] - 80043c8: 7b1b ldrb r3, [r3, #12] - 80043ca: 2b01 cmp r3, #1 - 80043cc: d108 bne.n 80043e0 - { - /* Enable the ADC Analog watchdog interrupt */ - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD1); - 80043ce: 687b ldr r3, [r7, #4] - 80043d0: 681b ldr r3, [r3, #0] - 80043d2: 685a ldr r2, [r3, #4] - 80043d4: 687b ldr r3, [r7, #4] - 80043d6: 681b ldr r3, [r3, #0] - 80043d8: f042 0280 orr.w r2, r2, #128 ; 0x80 - 80043dc: 605a str r2, [r3, #4] - 80043de: e0d4 b.n 800458a - } - else - { - /* Disable the ADC Analog watchdog interrupt */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD1); - 80043e0: 687b ldr r3, [r7, #4] - 80043e2: 681b ldr r3, [r3, #0] - 80043e4: 685a ldr r2, [r3, #4] - 80043e6: 687b ldr r3, [r7, #4] - 80043e8: 681b ldr r3, [r3, #0] - 80043ea: f022 0280 bic.w r2, r2, #128 ; 0x80 - 80043ee: 605a str r2, [r3, #4] - 80043f0: e0cb b.n 800458a - /* Case of ADC_ANALOGWATCHDOG_2 and ADC_ANALOGWATCHDOG_3 */ - else - { - /* Shift the threshold in function of the selected ADC resolution */ - /* have to be left-aligned on bit 7U, the LSB (right bits) are set to 0 */ - tmpAWDHighThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold); - 80043f2: 687b ldr r3, [r7, #4] - 80043f4: 681b ldr r3, [r3, #0] - 80043f6: 68db ldr r3, [r3, #12] - 80043f8: f003 0318 and.w r3, r3, #24 - 80043fc: 2b18 cmp r3, #24 - 80043fe: d00f beq.n 8004420 - 8004400: 683b ldr r3, [r7, #0] - 8004402: 6919 ldr r1, [r3, #16] - 8004404: 687b ldr r3, [r7, #4] - 8004406: 681b ldr r3, [r3, #0] - 8004408: 68db ldr r3, [r3, #12] - 800440a: 08db lsrs r3, r3, #3 - 800440c: f003 0203 and.w r2, r3, #3 - 8004410: 4613 mov r3, r2 - 8004412: 07db lsls r3, r3, #31 - 8004414: 1a9b subs r3, r3, r2 - 8004416: 005b lsls r3, r3, #1 - 8004418: 3304 adds r3, #4 - 800441a: fa21 f303 lsr.w r3, r1, r3 - 800441e: e002 b.n 8004426 - 8004420: 683b ldr r3, [r7, #0] - 8004422: 691b ldr r3, [r3, #16] - 8004424: 009b lsls r3, r3, #2 - 8004426: 613b str r3, [r7, #16] - tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold); - 8004428: 687b ldr r3, [r7, #4] - 800442a: 681b ldr r3, [r3, #0] - 800442c: 68db ldr r3, [r3, #12] - 800442e: f003 0318 and.w r3, r3, #24 - 8004432: 2b18 cmp r3, #24 - 8004434: d00f beq.n 8004456 - 8004436: 683b ldr r3, [r7, #0] - 8004438: 6959 ldr r1, [r3, #20] - 800443a: 687b ldr r3, [r7, #4] - 800443c: 681b ldr r3, [r3, #0] - 800443e: 68db ldr r3, [r3, #12] - 8004440: 08db lsrs r3, r3, #3 - 8004442: f003 0203 and.w r2, r3, #3 - 8004446: 4613 mov r3, r2 - 8004448: 07db lsls r3, r3, #31 - 800444a: 1a9b subs r3, r3, r2 - 800444c: 005b lsls r3, r3, #1 - 800444e: 3304 adds r3, #4 - 8004450: fa21 f303 lsr.w r3, r1, r3 - 8004454: e002 b.n 800445c - 8004456: 683b ldr r3, [r7, #0] - 8004458: 695b ldr r3, [r3, #20] - 800445a: 009b lsls r3, r3, #2 - 800445c: 60fb str r3, [r7, #12] - - if (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_2) - 800445e: 683b ldr r3, [r7, #0] - 8004460: 681b ldr r3, [r3, #0] - 8004462: 2b02 cmp r3, #2 - 8004464: d137 bne.n 80044d6 - { - /* Set the Analog watchdog channel or group of channels. This also */ - /* enables the watchdog. */ - /* Note: Conditional register reset, because several channels can be */ - /* set by successive calls of this function. */ - if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE) - 8004466: 683b ldr r3, [r7, #0] - 8004468: 685b ldr r3, [r3, #4] - 800446a: 2b00 cmp r3, #0 - 800446c: d01a beq.n 80044a4 - { - /* Set the high and low thresholds */ - MODIFY_REG(hadc->Instance->TR2 , - 800446e: 687b ldr r3, [r7, #4] - 8004470: 681b ldr r3, [r3, #0] - 8004472: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004474: f003 21ff and.w r1, r3, #4278255360 ; 0xff00ff00 - 8004478: 693b ldr r3, [r7, #16] - 800447a: 041a lsls r2, r3, #16 - 800447c: 68fb ldr r3, [r7, #12] - 800447e: 431a orrs r2, r3 - 8004480: 687b ldr r3, [r7, #4] - 8004482: 681b ldr r3, [r3, #0] - 8004484: 430a orrs r2, r1 - 8004486: 625a str r2, [r3, #36] ; 0x24 - ADC_TR2_HT2 | - ADC_TR2_LT2 , - ADC_TRX_HIGHTHRESHOLD(tmpAWDHighThresholdShifted) | - tmpAWDLowThresholdShifted ); - - SET_BIT(hadc->Instance->AWD2CR, ADC_CFGR_AWD23CR(AnalogWDGConfig->Channel)); - 8004488: 687b ldr r3, [r7, #4] - 800448a: 681b ldr r3, [r3, #0] - 800448c: f8d3 10a0 ldr.w r1, [r3, #160] ; 0xa0 - 8004490: 683b ldr r3, [r7, #0] - 8004492: 689b ldr r3, [r3, #8] - 8004494: 2201 movs r2, #1 - 8004496: 409a lsls r2, r3 - 8004498: 687b ldr r3, [r7, #4] - 800449a: 681b ldr r3, [r3, #0] - 800449c: 430a orrs r2, r1 - 800449e: f8c3 20a0 str.w r2, [r3, #160] ; 0xa0 - 80044a2: e011 b.n 80044c8 - } - else - { - CLEAR_BIT(hadc->Instance->TR2, ADC_TR2_HT2 | ADC_TR2_LT2); - 80044a4: 687b ldr r3, [r7, #4] - 80044a6: 681b ldr r3, [r3, #0] - 80044a8: 6a5a ldr r2, [r3, #36] ; 0x24 - 80044aa: 687b ldr r3, [r7, #4] - 80044ac: 681b ldr r3, [r3, #0] - 80044ae: f002 22ff and.w r2, r2, #4278255360 ; 0xff00ff00 - 80044b2: 625a str r2, [r3, #36] ; 0x24 - CLEAR_BIT(hadc->Instance->AWD2CR, ADC_AWD2CR_AWD2CH); - 80044b4: 687b ldr r3, [r7, #4] - 80044b6: 681b ldr r3, [r3, #0] - 80044b8: f8d3 10a0 ldr.w r1, [r3, #160] ; 0xa0 - 80044bc: 687b ldr r3, [r7, #4] - 80044be: 681a ldr r2, [r3, #0] - 80044c0: 4b37 ldr r3, [pc, #220] ; (80045a0 ) - 80044c2: 400b ands r3, r1 - 80044c4: f8c2 30a0 str.w r3, [r2, #160] ; 0xa0 - } - - /* Set temporary variable to flag and IT of AWD2 or AWD3 for further */ - /* settings. */ - tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD2; - 80044c8: f44f 7380 mov.w r3, #256 ; 0x100 - 80044cc: 61bb str r3, [r7, #24] - tmpADCITAWD2orAWD3 = ADC_IT_AWD2; - 80044ce: f44f 7380 mov.w r3, #256 ; 0x100 - 80044d2: 617b str r3, [r7, #20] - 80044d4: e036 b.n 8004544 - { - /* Set the Analog watchdog channel or group of channels. This also */ - /* enables the watchdog. */ - /* Note: Conditionnal register reset, because several channels can be */ - /* set by successive calls of this function. */ - if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE) - 80044d6: 683b ldr r3, [r7, #0] - 80044d8: 685b ldr r3, [r3, #4] - 80044da: 2b00 cmp r3, #0 - 80044dc: d01a beq.n 8004514 - { - /* Set the high and low thresholds */ - MODIFY_REG(hadc->Instance->TR3 , - 80044de: 687b ldr r3, [r7, #4] - 80044e0: 681b ldr r3, [r3, #0] - 80044e2: 6a9b ldr r3, [r3, #40] ; 0x28 - 80044e4: f003 21ff and.w r1, r3, #4278255360 ; 0xff00ff00 - 80044e8: 693b ldr r3, [r7, #16] - 80044ea: 041a lsls r2, r3, #16 - 80044ec: 68fb ldr r3, [r7, #12] - 80044ee: 431a orrs r2, r3 - 80044f0: 687b ldr r3, [r7, #4] - 80044f2: 681b ldr r3, [r3, #0] - 80044f4: 430a orrs r2, r1 - 80044f6: 629a str r2, [r3, #40] ; 0x28 - ADC_TR3_HT3 | - ADC_TR3_LT3 , - ADC_TRX_HIGHTHRESHOLD(tmpAWDHighThresholdShifted) | - tmpAWDLowThresholdShifted ); - - SET_BIT(hadc->Instance->AWD3CR, ADC_CFGR_AWD23CR(AnalogWDGConfig->Channel)); - 80044f8: 687b ldr r3, [r7, #4] - 80044fa: 681b ldr r3, [r3, #0] - 80044fc: f8d3 10a4 ldr.w r1, [r3, #164] ; 0xa4 - 8004500: 683b ldr r3, [r7, #0] - 8004502: 689b ldr r3, [r3, #8] - 8004504: 2201 movs r2, #1 - 8004506: 409a lsls r2, r3 - 8004508: 687b ldr r3, [r7, #4] - 800450a: 681b ldr r3, [r3, #0] - 800450c: 430a orrs r2, r1 - 800450e: f8c3 20a4 str.w r2, [r3, #164] ; 0xa4 - 8004512: e011 b.n 8004538 - } - else - { - CLEAR_BIT(hadc->Instance->TR3, ADC_TR3_HT3 | ADC_TR3_LT3); - 8004514: 687b ldr r3, [r7, #4] - 8004516: 681b ldr r3, [r3, #0] - 8004518: 6a9a ldr r2, [r3, #40] ; 0x28 - 800451a: 687b ldr r3, [r7, #4] - 800451c: 681b ldr r3, [r3, #0] - 800451e: f002 22ff and.w r2, r2, #4278255360 ; 0xff00ff00 - 8004522: 629a str r2, [r3, #40] ; 0x28 - CLEAR_BIT(hadc->Instance->AWD3CR, ADC_AWD3CR_AWD3CH); - 8004524: 687b ldr r3, [r7, #4] - 8004526: 681b ldr r3, [r3, #0] - 8004528: f8d3 10a4 ldr.w r1, [r3, #164] ; 0xa4 - 800452c: 687b ldr r3, [r7, #4] - 800452e: 681a ldr r2, [r3, #0] - 8004530: 4b1b ldr r3, [pc, #108] ; (80045a0 ) - 8004532: 400b ands r3, r1 - 8004534: f8c2 30a4 str.w r3, [r2, #164] ; 0xa4 - } - - /* Set temporary variable to flag and IT of AWD2 or AWD3 for further */ - /* settings. */ - tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD3; - 8004538: f44f 7300 mov.w r3, #512 ; 0x200 - 800453c: 61bb str r3, [r7, #24] - tmpADCITAWD2orAWD3 = ADC_IT_AWD3; - 800453e: f44f 7300 mov.w r3, #512 ; 0x200 - 8004542: 617b str r3, [r7, #20] - } - - /* Clear the ADC Analog watchdog flag (in case of left enabled by */ - /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ - /* or HAL_ADC_PollForEvent(). */ - __HAL_ADC_CLEAR_FLAG(hadc, tmpADCFlagAWD2orAWD3); - 8004544: 687b ldr r3, [r7, #4] - 8004546: 681b ldr r3, [r3, #0] - 8004548: 69ba ldr r2, [r7, #24] - 800454a: 601a str r2, [r3, #0] - - /* Configure ADC Analog watchdog interrupt */ - if(AnalogWDGConfig->ITMode == ENABLE) - 800454c: 683b ldr r3, [r7, #0] - 800454e: 7b1b ldrb r3, [r3, #12] - 8004550: 2b01 cmp r3, #1 - 8004552: d108 bne.n 8004566 - { - __HAL_ADC_ENABLE_IT(hadc, tmpADCITAWD2orAWD3); - 8004554: 687b ldr r3, [r7, #4] - 8004556: 681b ldr r3, [r3, #0] - 8004558: 6859 ldr r1, [r3, #4] - 800455a: 687b ldr r3, [r7, #4] - 800455c: 681b ldr r3, [r3, #0] - 800455e: 697a ldr r2, [r7, #20] - 8004560: 430a orrs r2, r1 - 8004562: 605a str r2, [r3, #4] - 8004564: e011 b.n 800458a - } - else - { - __HAL_ADC_DISABLE_IT(hadc, tmpADCITAWD2orAWD3); - 8004566: 687b ldr r3, [r7, #4] - 8004568: 681b ldr r3, [r3, #0] - 800456a: 6859 ldr r1, [r3, #4] - 800456c: 697b ldr r3, [r7, #20] - 800456e: 43da mvns r2, r3 - 8004570: 687b ldr r3, [r7, #4] - 8004572: 681b ldr r3, [r3, #0] - 8004574: 400a ands r2, r1 - 8004576: 605a str r2, [r3, #4] - 8004578: e007 b.n 800458a - /* If a conversion is on going on regular or injected groups, no update */ - /* could be done on neither of the AWD configuration structure parameters. */ - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 800457a: 687b ldr r3, [r7, #4] - 800457c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800457e: f043 0220 orr.w r2, r3, #32 - 8004582: 687b ldr r3, [r7, #4] - 8004584: 641a str r2, [r3, #64] ; 0x40 - - tmp_hal_status = HAL_ERROR; - 8004586: 2301 movs r3, #1 - 8004588: 77fb strb r3, [r7, #31] - } - - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 800458a: 687b ldr r3, [r7, #4] - 800458c: 2200 movs r2, #0 - 800458e: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Return function status */ - return tmp_hal_status; - 8004592: 7ffb ldrb r3, [r7, #31] -} - 8004594: 4618 mov r0, r3 - 8004596: 3724 adds r7, #36 ; 0x24 - 8004598: 46bd mov sp, r7 - 800459a: f85d 7b04 ldr.w r7, [sp], #4 - 800459e: 4770 bx lr - 80045a0: fff80001 .word 0xfff80001 - -080045a4 : - * @param hadc ADC handle - * @param multimode Structure of ADC multimode configuration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode) -{ - 80045a4: b480 push {r7} - 80045a6: b099 sub sp, #100 ; 0x64 - 80045a8: af00 add r7, sp, #0 - 80045aa: 6078 str r0, [r7, #4] - 80045ac: 6039 str r1, [r7, #0] - HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80045ae: 2300 movs r3, #0 - 80045b0: f887 305f strb.w r3, [r7, #95] ; 0x5f - assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode)); - assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay)); - } - - /* Set handle of the other ADC sharing the same common register */ - ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister); - 80045b4: 687b ldr r3, [r7, #4] - 80045b6: 681b ldr r3, [r3, #0] - 80045b8: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80045bc: d102 bne.n 80045c4 - 80045be: 4b6d ldr r3, [pc, #436] ; (8004774 ) - 80045c0: 60bb str r3, [r7, #8] - 80045c2: e01a b.n 80045fa - 80045c4: 687b ldr r3, [r7, #4] - 80045c6: 681b ldr r3, [r3, #0] - 80045c8: 4a6a ldr r2, [pc, #424] ; (8004774 ) - 80045ca: 4293 cmp r3, r2 - 80045cc: d103 bne.n 80045d6 - 80045ce: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000 - 80045d2: 60bb str r3, [r7, #8] - 80045d4: e011 b.n 80045fa - 80045d6: 687b ldr r3, [r7, #4] - 80045d8: 681b ldr r3, [r3, #0] - 80045da: 4a67 ldr r2, [pc, #412] ; (8004778 ) - 80045dc: 4293 cmp r3, r2 - 80045de: d102 bne.n 80045e6 - 80045e0: 4b66 ldr r3, [pc, #408] ; (800477c ) - 80045e2: 60bb str r3, [r7, #8] - 80045e4: e009 b.n 80045fa - 80045e6: 687b ldr r3, [r7, #4] - 80045e8: 681b ldr r3, [r3, #0] - 80045ea: 4a64 ldr r2, [pc, #400] ; (800477c ) - 80045ec: 4293 cmp r3, r2 - 80045ee: d102 bne.n 80045f6 - 80045f0: 4b61 ldr r3, [pc, #388] ; (8004778 ) - 80045f2: 60bb str r3, [r7, #8] - 80045f4: e001 b.n 80045fa - 80045f6: 2300 movs r3, #0 - 80045f8: 60bb str r3, [r7, #8] - if (tmphadcSharingSameCommonRegister.Instance == NULL) - 80045fa: 68bb ldr r3, [r7, #8] - 80045fc: 2b00 cmp r3, #0 - 80045fe: d101 bne.n 8004604 - { - /* Return function status */ - return HAL_ERROR; - 8004600: 2301 movs r3, #1 - 8004602: e0b0 b.n 8004766 - } - - /* Process locked */ - __HAL_LOCK(hadc); - 8004604: 687b ldr r3, [r7, #4] - 8004606: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 800460a: 2b01 cmp r3, #1 - 800460c: d101 bne.n 8004612 - 800460e: 2302 movs r3, #2 - 8004610: e0a9 b.n 8004766 - 8004612: 687b ldr r3, [r7, #4] - 8004614: 2201 movs r2, #1 - 8004616: f883 203c strb.w r2, [r3, #60] ; 0x3c - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular group: */ - /* - Multimode DMA configuration */ - /* - Multimode DMA mode */ - if ( (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - 800461a: 687b ldr r3, [r7, #4] - 800461c: 681b ldr r3, [r3, #0] - 800461e: 689b ldr r3, [r3, #8] - 8004620: f003 0304 and.w r3, r3, #4 - 8004624: 2b00 cmp r3, #0 - 8004626: f040 808d bne.w 8004744 - && (ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSharingSameCommonRegister) == RESET) ) - 800462a: 68bb ldr r3, [r7, #8] - 800462c: 689b ldr r3, [r3, #8] - 800462e: f003 0304 and.w r3, r3, #4 - 8004632: 2b00 cmp r3, #0 - 8004634: f040 8086 bne.w 8004744 - { - /* Pointer to the common control register to which is belonging hadc */ - /* (Depending on STM32F3 product, there may have up to 4 ADC and 2 common */ - /* control registers) */ - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - 8004638: 687b ldr r3, [r7, #4] - 800463a: 681b ldr r3, [r3, #0] - 800463c: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8004640: d004 beq.n 800464c - 8004642: 687b ldr r3, [r7, #4] - 8004644: 681b ldr r3, [r3, #0] - 8004646: 4a4b ldr r2, [pc, #300] ; (8004774 ) - 8004648: 4293 cmp r3, r2 - 800464a: d101 bne.n 8004650 - 800464c: 4b4c ldr r3, [pc, #304] ; (8004780 ) - 800464e: e000 b.n 8004652 - 8004650: 4b4c ldr r3, [pc, #304] ; (8004784 ) - 8004652: 65bb str r3, [r7, #88] ; 0x58 - - /* If multimode is selected, configure all multimode paramaters. */ - /* Otherwise, reset multimode parameters (can be used in case of */ - /* transition from multimode to independent mode). */ - if(multimode->Mode != ADC_MODE_INDEPENDENT) - 8004654: 683b ldr r3, [r7, #0] - 8004656: 681b ldr r3, [r3, #0] - 8004658: 2b00 cmp r3, #0 - 800465a: d040 beq.n 80046de - { - /* Configuration of ADC common group ADC1&ADC2, ADC3&ADC4 if available */ - /* (ADC2, ADC3, ADC4 availability depends on STM32 product) */ - /* - DMA access mode */ - MODIFY_REG(tmpADC_Common->CCR , - 800465c: 6dbb ldr r3, [r7, #88] ; 0x58 - 800465e: 689b ldr r3, [r3, #8] - 8004660: f423 4260 bic.w r2, r3, #57344 ; 0xe000 - 8004664: 683b ldr r3, [r7, #0] - 8004666: 6859 ldr r1, [r3, #4] - 8004668: 687b ldr r3, [r7, #4] - 800466a: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 800466e: 035b lsls r3, r3, #13 - 8004670: 430b orrs r3, r1 - 8004672: 431a orrs r2, r3 - 8004674: 6dbb ldr r3, [r7, #88] ; 0x58 - 8004676: 609a str r2, [r3, #8] - /* parameters, their setting is bypassed without error reporting */ - /* (as it can be the expected behaviour in case of intended action */ - /* to update parameter above (which fulfills the ADC state */ - /* condition: no conversion on going on group regular) */ - /* on the fly). */ - if ((ADC_IS_ENABLE(hadc) == RESET) && - 8004678: 687b ldr r3, [r7, #4] - 800467a: 681b ldr r3, [r3, #0] - 800467c: 689b ldr r3, [r3, #8] - 800467e: f003 0303 and.w r3, r3, #3 - 8004682: 2b01 cmp r3, #1 - 8004684: d108 bne.n 8004698 - 8004686: 687b ldr r3, [r7, #4] - 8004688: 681b ldr r3, [r3, #0] - 800468a: 681b ldr r3, [r3, #0] - 800468c: f003 0301 and.w r3, r3, #1 - 8004690: 2b01 cmp r3, #1 - 8004692: d101 bne.n 8004698 - 8004694: 2301 movs r3, #1 - 8004696: e000 b.n 800469a - 8004698: 2300 movs r3, #0 - 800469a: 2b00 cmp r3, #0 - 800469c: d15c bne.n 8004758 - (ADC_IS_ENABLE(&tmphadcSharingSameCommonRegister) == RESET) ) - 800469e: 68bb ldr r3, [r7, #8] - 80046a0: 689b ldr r3, [r3, #8] - 80046a2: f003 0303 and.w r3, r3, #3 - 80046a6: 2b01 cmp r3, #1 - 80046a8: d107 bne.n 80046ba - 80046aa: 68bb ldr r3, [r7, #8] - 80046ac: 681b ldr r3, [r3, #0] - 80046ae: f003 0301 and.w r3, r3, #1 - 80046b2: 2b01 cmp r3, #1 - 80046b4: d101 bne.n 80046ba - 80046b6: 2301 movs r3, #1 - 80046b8: e000 b.n 80046bc - 80046ba: 2300 movs r3, #0 - if ((ADC_IS_ENABLE(hadc) == RESET) && - 80046bc: 2b00 cmp r3, #0 - 80046be: d14b bne.n 8004758 - { - MODIFY_REG(tmpADC_Common->CCR , - 80046c0: 6dbb ldr r3, [r7, #88] ; 0x58 - 80046c2: 689b ldr r3, [r3, #8] - 80046c4: f423 6371 bic.w r3, r3, #3856 ; 0xf10 - 80046c8: f023 030f bic.w r3, r3, #15 - 80046cc: 683a ldr r2, [r7, #0] - 80046ce: 6811 ldr r1, [r2, #0] - 80046d0: 683a ldr r2, [r7, #0] - 80046d2: 6892 ldr r2, [r2, #8] - 80046d4: 430a orrs r2, r1 - 80046d6: 431a orrs r2, r3 - 80046d8: 6dbb ldr r3, [r7, #88] ; 0x58 - 80046da: 609a str r2, [r3, #8] - if(multimode->Mode != ADC_MODE_INDEPENDENT) - 80046dc: e03c b.n 8004758 - multimode->TwoSamplingDelay ); - } - } - else /* ADC_MODE_INDEPENDENT */ - { - CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG); - 80046de: 6dbb ldr r3, [r7, #88] ; 0x58 - 80046e0: 689b ldr r3, [r3, #8] - 80046e2: f423 4260 bic.w r2, r3, #57344 ; 0xe000 - 80046e6: 6dbb ldr r3, [r7, #88] ; 0x58 - 80046e8: 609a str r2, [r3, #8] - - /* Parameters that can be updated only when ADC is disabled: */ - /* - Multimode mode selection */ - /* - Multimode delay */ - if ((ADC_IS_ENABLE(hadc) == RESET) && - 80046ea: 687b ldr r3, [r7, #4] - 80046ec: 681b ldr r3, [r3, #0] - 80046ee: 689b ldr r3, [r3, #8] - 80046f0: f003 0303 and.w r3, r3, #3 - 80046f4: 2b01 cmp r3, #1 - 80046f6: d108 bne.n 800470a - 80046f8: 687b ldr r3, [r7, #4] - 80046fa: 681b ldr r3, [r3, #0] - 80046fc: 681b ldr r3, [r3, #0] - 80046fe: f003 0301 and.w r3, r3, #1 - 8004702: 2b01 cmp r3, #1 - 8004704: d101 bne.n 800470a - 8004706: 2301 movs r3, #1 - 8004708: e000 b.n 800470c - 800470a: 2300 movs r3, #0 - 800470c: 2b00 cmp r3, #0 - 800470e: d123 bne.n 8004758 - (ADC_IS_ENABLE(&tmphadcSharingSameCommonRegister) == RESET) ) - 8004710: 68bb ldr r3, [r7, #8] - 8004712: 689b ldr r3, [r3, #8] - 8004714: f003 0303 and.w r3, r3, #3 - 8004718: 2b01 cmp r3, #1 - 800471a: d107 bne.n 800472c - 800471c: 68bb ldr r3, [r7, #8] - 800471e: 681b ldr r3, [r3, #0] - 8004720: f003 0301 and.w r3, r3, #1 - 8004724: 2b01 cmp r3, #1 - 8004726: d101 bne.n 800472c - 8004728: 2301 movs r3, #1 - 800472a: e000 b.n 800472e - 800472c: 2300 movs r3, #0 - if ((ADC_IS_ENABLE(hadc) == RESET) && - 800472e: 2b00 cmp r3, #0 - 8004730: d112 bne.n 8004758 - { - CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MULTI | ADC_CCR_DELAY); - 8004732: 6dbb ldr r3, [r7, #88] ; 0x58 - 8004734: 689b ldr r3, [r3, #8] - 8004736: f423 6371 bic.w r3, r3, #3856 ; 0xf10 - 800473a: f023 030f bic.w r3, r3, #15 - 800473e: 6dba ldr r2, [r7, #88] ; 0x58 - 8004740: 6093 str r3, [r2, #8] - if(multimode->Mode != ADC_MODE_INDEPENDENT) - 8004742: e009 b.n 8004758 - /* If one of the ADC sharing the same common group is enabled, no update */ - /* could be done on neither of the multimode structure parameters. */ - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8004744: 687b ldr r3, [r7, #4] - 8004746: 6c1b ldr r3, [r3, #64] ; 0x40 - 8004748: f043 0220 orr.w r2, r3, #32 - 800474c: 687b ldr r3, [r7, #4] - 800474e: 641a str r2, [r3, #64] ; 0x40 - - tmp_hal_status = HAL_ERROR; - 8004750: 2301 movs r3, #1 - 8004752: f887 305f strb.w r3, [r7, #95] ; 0x5f - 8004756: e000 b.n 800475a - if(multimode->Mode != ADC_MODE_INDEPENDENT) - 8004758: bf00 nop - } - - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 800475a: 687b ldr r3, [r7, #4] - 800475c: 2200 movs r2, #0 - 800475e: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Return function status */ - return tmp_hal_status; - 8004762: f897 305f ldrb.w r3, [r7, #95] ; 0x5f -} - 8004766: 4618 mov r0, r3 - 8004768: 3764 adds r7, #100 ; 0x64 - 800476a: 46bd mov sp, r7 - 800476c: f85d 7b04 ldr.w r7, [sp], #4 - 8004770: 4770 bx lr - 8004772: bf00 nop - 8004774: 50000100 .word 0x50000100 - 8004778: 50000400 .word 0x50000400 - 800477c: 50000500 .word 0x50000500 - 8004780: 50000300 .word 0x50000300 - 8004784: 50000700 .word 0x50000700 - -08004788 : - * @brief DMA transfer complete callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) -{ - 8004788: b580 push {r7, lr} - 800478a: b084 sub sp, #16 - 800478c: af00 add r7, sp, #0 - 800478e: 6078 str r0, [r7, #4] - /* Retrieve ADC handle corresponding to current DMA handle */ - ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - 8004790: 687b ldr r3, [r7, #4] - 8004792: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004794: 60fb str r3, [r7, #12] - - /* Update state machine on conversion status if not in error state */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) - 8004796: 68fb ldr r3, [r7, #12] - 8004798: 6c1b ldr r3, [r3, #64] ; 0x40 - 800479a: f003 0350 and.w r3, r3, #80 ; 0x50 - 800479e: 2b00 cmp r3, #0 - 80047a0: d126 bne.n 80047f0 - { - /* Update ADC state machine */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - 80047a2: 68fb ldr r3, [r7, #12] - 80047a4: 6c1b ldr r3, [r3, #64] ; 0x40 - 80047a6: f443 7200 orr.w r2, r3, #512 ; 0x200 - 80047aa: 68fb ldr r3, [r7, #12] - 80047ac: 641a str r2, [r3, #64] ; 0x40 - /* Determine whether any further conversion upcoming on group regular */ - /* by external trigger, continuous mode or scan sequence on going. */ - /* Note: On STM32F3 devices, in case of sequencer enabled */ - /* (several ranks selected), end of conversion flag is raised */ - /* at the end of the sequence. */ - if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 80047ae: 68fb ldr r3, [r7, #12] - 80047b0: 681b ldr r3, [r3, #0] - 80047b2: 68db ldr r3, [r3, #12] - 80047b4: f403 6340 and.w r3, r3, #3072 ; 0xc00 - 80047b8: 2b00 cmp r3, #0 - 80047ba: d115 bne.n 80047e8 - (hadc->Init.ContinuousConvMode == DISABLE) ) - 80047bc: 68fb ldr r3, [r7, #12] - 80047be: 7e5b ldrb r3, [r3, #25] - if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 80047c0: 2b00 cmp r3, #0 - 80047c2: d111 bne.n 80047e8 - { - /* Set ADC state */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - 80047c4: 68fb ldr r3, [r7, #12] - 80047c6: 6c1b ldr r3, [r3, #64] ; 0x40 - 80047c8: f423 7280 bic.w r2, r3, #256 ; 0x100 - 80047cc: 68fb ldr r3, [r7, #12] - 80047ce: 641a str r2, [r3, #64] ; 0x40 - - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 80047d0: 68fb ldr r3, [r7, #12] - 80047d2: 6c1b ldr r3, [r3, #64] ; 0x40 - 80047d4: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 80047d8: 2b00 cmp r3, #0 - 80047da: d105 bne.n 80047e8 - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - 80047dc: 68fb ldr r3, [r7, #12] - 80047de: 6c1b ldr r3, [r3, #64] ; 0x40 - 80047e0: f043 0201 orr.w r2, r3, #1 - 80047e4: 68fb ldr r3, [r7, #12] - 80047e6: 641a str r2, [r3, #64] ; 0x40 - - /* Conversion complete callback */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ConvCpltCallback(hadc); -#else - HAL_ADC_ConvCpltCallback(hadc); - 80047e8: 68f8 ldr r0, [r7, #12] - 80047ea: f7fe fbdd bl 8002fa8 - else - { - /* Call DMA error callback */ - hadc->DMA_Handle->XferErrorCallback(hdma); - } -} - 80047ee: e004 b.n 80047fa - hadc->DMA_Handle->XferErrorCallback(hdma); - 80047f0: 68fb ldr r3, [r7, #12] - 80047f2: 6b9b ldr r3, [r3, #56] ; 0x38 - 80047f4: 6b1b ldr r3, [r3, #48] ; 0x30 - 80047f6: 6878 ldr r0, [r7, #4] - 80047f8: 4798 blx r3 -} - 80047fa: bf00 nop - 80047fc: 3710 adds r7, #16 - 80047fe: 46bd mov sp, r7 - 8004800: bd80 pop {r7, pc} - -08004802 : - * @brief DMA half transfer complete callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) -{ - 8004802: b580 push {r7, lr} - 8004804: b084 sub sp, #16 - 8004806: af00 add r7, sp, #0 - 8004808: 6078 str r0, [r7, #4] - /* Retrieve ADC handle corresponding to current DMA handle */ - ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - 800480a: 687b ldr r3, [r7, #4] - 800480c: 6a5b ldr r3, [r3, #36] ; 0x24 - 800480e: 60fb str r3, [r7, #12] - - /* Half conversion callback */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ConvHalfCpltCallback(hadc); -#else - HAL_ADC_ConvHalfCpltCallback(hadc); - 8004810: 68f8 ldr r0, [r7, #12] - 8004812: f7fe fbd3 bl 8002fbc -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ -} - 8004816: bf00 nop - 8004818: 3710 adds r7, #16 - 800481a: 46bd mov sp, r7 - 800481c: bd80 pop {r7, pc} - -0800481e : - * @brief DMA error callback - * @param hdma pointer to DMA handle. - * @retval None - */ -static void ADC_DMAError(DMA_HandleTypeDef *hdma) -{ - 800481e: b580 push {r7, lr} - 8004820: b084 sub sp, #16 - 8004822: af00 add r7, sp, #0 - 8004824: 6078 str r0, [r7, #4] - /* Retrieve ADC handle corresponding to current DMA handle */ - ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - 8004826: 687b ldr r3, [r7, #4] - 8004828: 6a5b ldr r3, [r3, #36] ; 0x24 - 800482a: 60fb str r3, [r7, #12] - - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); - 800482c: 68fb ldr r3, [r7, #12] - 800482e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8004830: f043 0240 orr.w r2, r3, #64 ; 0x40 - 8004834: 68fb ldr r3, [r7, #12] - 8004836: 641a str r2, [r3, #64] ; 0x40 - - /* Set ADC error code to DMA error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); - 8004838: 68fb ldr r3, [r7, #12] - 800483a: 6c5b ldr r3, [r3, #68] ; 0x44 - 800483c: f043 0204 orr.w r2, r3, #4 - 8004840: 68fb ldr r3, [r7, #12] - 8004842: 645a str r2, [r3, #68] ; 0x44 - - /* Error callback */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ErrorCallback(hadc); -#else - HAL_ADC_ErrorCallback(hadc); - 8004844: 68f8 ldr r0, [r7, #12] - 8004846: f7fe fbcd bl 8002fe4 -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ -} - 800484a: bf00 nop - 800484c: 3710 adds r7, #16 - 800484e: 46bd mov sp, r7 - 8004850: bd80 pop {r7, pc} - ... - -08004854 : - * and voltage regulator must be enabled (done into HAL_ADC_Init()). - * @param hadc ADC handle - * @retval HAL status. - */ -static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) -{ - 8004854: b580 push {r7, lr} - 8004856: b084 sub sp, #16 - 8004858: af00 add r7, sp, #0 - 800485a: 6078 str r0, [r7, #4] - uint32_t tickstart = 0U; - 800485c: 2300 movs r3, #0 - 800485e: 60fb str r3, [r7, #12] - - /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ - /* enabling phase not yet completed: flag ADC ready not yet set). */ - /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ - /* causes: ADC clock not running, ...). */ - if (ADC_IS_ENABLE(hadc) == RESET) - 8004860: 687b ldr r3, [r7, #4] - 8004862: 681b ldr r3, [r3, #0] - 8004864: 689b ldr r3, [r3, #8] - 8004866: f003 0303 and.w r3, r3, #3 - 800486a: 2b01 cmp r3, #1 - 800486c: d108 bne.n 8004880 - 800486e: 687b ldr r3, [r7, #4] - 8004870: 681b ldr r3, [r3, #0] - 8004872: 681b ldr r3, [r3, #0] - 8004874: f003 0301 and.w r3, r3, #1 - 8004878: 2b01 cmp r3, #1 - 800487a: d101 bne.n 8004880 - 800487c: 2301 movs r3, #1 - 800487e: e000 b.n 8004882 - 8004880: 2300 movs r3, #0 - 8004882: 2b00 cmp r3, #0 - 8004884: d13c bne.n 8004900 - { - /* Check if conditions to enable the ADC are fulfilled */ - if (ADC_ENABLING_CONDITIONS(hadc) == RESET) - 8004886: 687b ldr r3, [r7, #4] - 8004888: 681b ldr r3, [r3, #0] - 800488a: 689a ldr r2, [r3, #8] - 800488c: 4b1f ldr r3, [pc, #124] ; (800490c ) - 800488e: 4013 ands r3, r2 - 8004890: 2b00 cmp r3, #0 - 8004892: d00d beq.n 80048b0 - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8004894: 687b ldr r3, [r7, #4] - 8004896: 6c1b ldr r3, [r3, #64] ; 0x40 - 8004898: f043 0210 orr.w r2, r3, #16 - 800489c: 687b ldr r3, [r7, #4] - 800489e: 641a str r2, [r3, #64] ; 0x40 - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80048a0: 687b ldr r3, [r7, #4] - 80048a2: 6c5b ldr r3, [r3, #68] ; 0x44 - 80048a4: f043 0201 orr.w r2, r3, #1 - 80048a8: 687b ldr r3, [r7, #4] - 80048aa: 645a str r2, [r3, #68] ; 0x44 - - return HAL_ERROR; - 80048ac: 2301 movs r3, #1 - 80048ae: e028 b.n 8004902 - } - - /* Enable the ADC peripheral */ - __HAL_ADC_ENABLE(hadc); - 80048b0: 687b ldr r3, [r7, #4] - 80048b2: 681b ldr r3, [r3, #0] - 80048b4: 689a ldr r2, [r3, #8] - 80048b6: 687b ldr r3, [r7, #4] - 80048b8: 681b ldr r3, [r3, #0] - 80048ba: f042 0201 orr.w r2, r2, #1 - 80048be: 609a str r2, [r3, #8] - - /* Wait for ADC effectively enabled */ - tickstart = HAL_GetTick(); - 80048c0: f7fe fb44 bl 8002f4c - 80048c4: 60f8 str r0, [r7, #12] - - while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) - 80048c6: e014 b.n 80048f2 - { - if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) - 80048c8: f7fe fb40 bl 8002f4c - 80048cc: 4602 mov r2, r0 - 80048ce: 68fb ldr r3, [r7, #12] - 80048d0: 1ad3 subs r3, r2, r3 - 80048d2: 2b02 cmp r3, #2 - 80048d4: d90d bls.n 80048f2 - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80048d6: 687b ldr r3, [r7, #4] - 80048d8: 6c1b ldr r3, [r3, #64] ; 0x40 - 80048da: f043 0210 orr.w r2, r3, #16 - 80048de: 687b ldr r3, [r7, #4] - 80048e0: 641a str r2, [r3, #64] ; 0x40 - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80048e2: 687b ldr r3, [r7, #4] - 80048e4: 6c5b ldr r3, [r3, #68] ; 0x44 - 80048e6: f043 0201 orr.w r2, r3, #1 - 80048ea: 687b ldr r3, [r7, #4] - 80048ec: 645a str r2, [r3, #68] ; 0x44 - - return HAL_ERROR; - 80048ee: 2301 movs r3, #1 - 80048f0: e007 b.n 8004902 - while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) - 80048f2: 687b ldr r3, [r7, #4] - 80048f4: 681b ldr r3, [r3, #0] - 80048f6: 681b ldr r3, [r3, #0] - 80048f8: f003 0301 and.w r3, r3, #1 - 80048fc: 2b01 cmp r3, #1 - 80048fe: d1e3 bne.n 80048c8 - } - } - } - - /* Return HAL status */ - return HAL_OK; - 8004900: 2300 movs r3, #0 -} - 8004902: 4618 mov r0, r3 - 8004904: 3710 adds r7, #16 - 8004906: 46bd mov sp, r7 - 8004908: bd80 pop {r7, pc} - 800490a: bf00 nop - 800490c: 8000003f .word 0x8000003f - -08004910 : - * stopped. - * @param hadc ADC handle - * @retval HAL status. - */ -static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) -{ - 8004910: b580 push {r7, lr} - 8004912: b084 sub sp, #16 - 8004914: af00 add r7, sp, #0 - 8004916: 6078 str r0, [r7, #4] - uint32_t tickstart = 0U; - 8004918: 2300 movs r3, #0 - 800491a: 60fb str r3, [r7, #12] - - /* Verification if ADC is not already disabled: */ - /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ - /* disabled. */ - if (ADC_IS_ENABLE(hadc) != RESET ) - 800491c: 687b ldr r3, [r7, #4] - 800491e: 681b ldr r3, [r3, #0] - 8004920: 689b ldr r3, [r3, #8] - 8004922: f003 0303 and.w r3, r3, #3 - 8004926: 2b01 cmp r3, #1 - 8004928: d108 bne.n 800493c - 800492a: 687b ldr r3, [r7, #4] - 800492c: 681b ldr r3, [r3, #0] - 800492e: 681b ldr r3, [r3, #0] - 8004930: f003 0301 and.w r3, r3, #1 - 8004934: 2b01 cmp r3, #1 - 8004936: d101 bne.n 800493c - 8004938: 2301 movs r3, #1 - 800493a: e000 b.n 800493e - 800493c: 2300 movs r3, #0 - 800493e: 2b00 cmp r3, #0 - 8004940: d040 beq.n 80049c4 - { - /* Check if conditions to disable the ADC are fulfilled */ - if (ADC_DISABLING_CONDITIONS(hadc) != RESET) - 8004942: 687b ldr r3, [r7, #4] - 8004944: 681b ldr r3, [r3, #0] - 8004946: 689b ldr r3, [r3, #8] - 8004948: f003 030d and.w r3, r3, #13 - 800494c: 2b01 cmp r3, #1 - 800494e: d10f bne.n 8004970 - { - /* Disable the ADC peripheral */ - __HAL_ADC_DISABLE(hadc); - 8004950: 687b ldr r3, [r7, #4] - 8004952: 681b ldr r3, [r3, #0] - 8004954: 689a ldr r2, [r3, #8] - 8004956: 687b ldr r3, [r7, #4] - 8004958: 681b ldr r3, [r3, #0] - 800495a: f042 0202 orr.w r2, r2, #2 - 800495e: 609a str r2, [r3, #8] - 8004960: 687b ldr r3, [r7, #4] - 8004962: 681b ldr r3, [r3, #0] - 8004964: 2203 movs r2, #3 - 8004966: 601a str r2, [r3, #0] - - return HAL_ERROR; - } - - /* Wait for ADC effectively disabled */ - tickstart = HAL_GetTick(); - 8004968: f7fe faf0 bl 8002f4c - 800496c: 60f8 str r0, [r7, #12] - - while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) - 800496e: e022 b.n 80049b6 - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8004970: 687b ldr r3, [r7, #4] - 8004972: 6c1b ldr r3, [r3, #64] ; 0x40 - 8004974: f043 0210 orr.w r2, r3, #16 - 8004978: 687b ldr r3, [r7, #4] - 800497a: 641a str r2, [r3, #64] ; 0x40 - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 800497c: 687b ldr r3, [r7, #4] - 800497e: 6c5b ldr r3, [r3, #68] ; 0x44 - 8004980: f043 0201 orr.w r2, r3, #1 - 8004984: 687b ldr r3, [r7, #4] - 8004986: 645a str r2, [r3, #68] ; 0x44 - return HAL_ERROR; - 8004988: 2301 movs r3, #1 - 800498a: e01c b.n 80049c6 - { - if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 800498c: f7fe fade bl 8002f4c - 8004990: 4602 mov r2, r0 - 8004992: 68fb ldr r3, [r7, #12] - 8004994: 1ad3 subs r3, r2, r3 - 8004996: 2b02 cmp r3, #2 - 8004998: d90d bls.n 80049b6 - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 800499a: 687b ldr r3, [r7, #4] - 800499c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800499e: f043 0210 orr.w r2, r3, #16 - 80049a2: 687b ldr r3, [r7, #4] - 80049a4: 641a str r2, [r3, #64] ; 0x40 - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80049a6: 687b ldr r3, [r7, #4] - 80049a8: 6c5b ldr r3, [r3, #68] ; 0x44 - 80049aa: f043 0201 orr.w r2, r3, #1 - 80049ae: 687b ldr r3, [r7, #4] - 80049b0: 645a str r2, [r3, #68] ; 0x44 - - return HAL_ERROR; - 80049b2: 2301 movs r3, #1 - 80049b4: e007 b.n 80049c6 - while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) - 80049b6: 687b ldr r3, [r7, #4] - 80049b8: 681b ldr r3, [r3, #0] - 80049ba: 689b ldr r3, [r3, #8] - 80049bc: f003 0301 and.w r3, r3, #1 - 80049c0: 2b01 cmp r3, #1 - 80049c2: d0e3 beq.n 800498c - } - } - } - - /* Return HAL status */ - return HAL_OK; - 80049c4: 2300 movs r3, #0 -} - 80049c6: 4618 mov r0, r3 - 80049c8: 3710 adds r7, #16 - 80049ca: 46bd mov sp, r7 - 80049cc: bd80 pop {r7, pc} - ... - -080049d0 : - * To unlock the configuration, perform a system reset. - * @param hcomp COMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) -{ - 80049d0: b580 push {r7, lr} - 80049d2: b086 sub sp, #24 - 80049d4: af00 add r7, sp, #0 - 80049d6: 6078 str r0, [r7, #4] - HAL_StatusTypeDef status = HAL_OK; - 80049d8: 2300 movs r3, #0 - 80049da: 75fb strb r3, [r7, #23] - - /* Check the COMP handle allocation and lock status */ - if ((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET)) - 80049dc: 687b ldr r3, [r7, #4] - 80049de: 2b00 cmp r3, #0 - 80049e0: d007 beq.n 80049f2 - 80049e2: 687b ldr r3, [r7, #4] - 80049e4: f893 3029 ldrb.w r3, [r3, #41] ; 0x29 - 80049e8: b2db uxtb r3, r3 - 80049ea: f003 0310 and.w r3, r3, #16 - 80049ee: 2b00 cmp r3, #0 - 80049f0: d002 beq.n 80049f8 - { - status = HAL_ERROR; - 80049f2: 2301 movs r3, #1 - 80049f4: 75fb strb r3, [r7, #23] - 80049f6: e064 b.n 8004ac2 - assert_param(IS_COMP_WINDOWMODE_INSTANCE(hcomp->Instance)); - assert_param(IS_COMP_WINDOWMODE(hcomp->Init.WindowMode)); - } - - /* Init SYSCFG and the low level hardware to access comparators */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80049f8: 4b34 ldr r3, [pc, #208] ; (8004acc ) - 80049fa: 699b ldr r3, [r3, #24] - 80049fc: 4a33 ldr r2, [pc, #204] ; (8004acc ) - 80049fe: f043 0301 orr.w r3, r3, #1 - 8004a02: 6193 str r3, [r2, #24] - 8004a04: 4b31 ldr r3, [pc, #196] ; (8004acc ) - 8004a06: 699b ldr r3, [r3, #24] - 8004a08: f003 0301 and.w r3, r3, #1 - 8004a0c: 613b str r3, [r7, #16] - 8004a0e: 693b ldr r3, [r7, #16] - - /* Init the low level hardware */ - hcomp->MspInitCallback(hcomp); -#else - /* Init the low level hardware : SYSCFG to access comparators */ - HAL_COMP_MspInit(hcomp); - 8004a10: 6878 ldr r0, [r7, #4] - 8004a12: f7fd fdb7 bl 8002584 -#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */ - - if (hcomp->State == HAL_COMP_STATE_RESET) - 8004a16: 687b ldr r3, [r7, #4] - 8004a18: f893 3029 ldrb.w r3, [r3, #41] ; 0x29 - 8004a1c: b2db uxtb r3, r3 - 8004a1e: 2b00 cmp r3, #0 - 8004a20: d103 bne.n 8004a2a - { - /* Allocate lock resource and initialize it */ - hcomp->Lock = HAL_UNLOCKED; - 8004a22: 687b ldr r3, [r7, #4] - 8004a24: 2200 movs r2, #0 - 8004a26: f883 2028 strb.w r2, [r3, #40] ; 0x28 - } - - /* Manage inverting input comparator inverting input connected to a GPIO */ - /* for STM32F302x, STM32F32xx, STM32F33x. */ - hcomp->Init.InvertingInput = COMP_INVERTINGINPUT_SELECTION(hcomp->Instance, hcomp->Init.InvertingInput); - 8004a2a: 687b ldr r3, [r7, #4] - 8004a2c: 685a ldr r2, [r3, #4] - 8004a2e: 687b ldr r3, [r7, #4] - 8004a30: 605a str r2, [r3, #4] - /* Set COMPxBLANKING bits according to hcomp->Init.BlankingSrce value */ - /* Set COMPxOUTSEL bits according to hcomp->Init.Output value */ - /* Set COMPxPOL bit according to hcomp->Init.OutputPol value */ - /* Set COMPxHYST bits according to hcomp->Init.Hysteresis value */ - /* Set COMPxMODE bits according to hcomp->Init.Mode value */ - COMP_INIT(hcomp); - 8004a32: 2300 movs r3, #0 - 8004a34: 60fb str r3, [r7, #12] - 8004a36: 687b ldr r3, [r7, #4] - 8004a38: 681b ldr r3, [r3, #0] - 8004a3a: 681b ldr r3, [r3, #0] - 8004a3c: 60fb str r3, [r7, #12] - 8004a3e: 68fb ldr r3, [r7, #12] - 8004a40: f023 0270 bic.w r2, r3, #112 ; 0x70 - 8004a44: 687b ldr r3, [r7, #4] - 8004a46: 685b ldr r3, [r3, #4] - 8004a48: 4313 orrs r3, r2 - 8004a4a: 60fb str r3, [r7, #12] - 8004a4c: 68fb ldr r3, [r7, #12] - 8004a4e: f023 0282 bic.w r2, r3, #130 ; 0x82 - 8004a52: 687b ldr r3, [r7, #4] - 8004a54: 689b ldr r3, [r3, #8] - 8004a56: 4313 orrs r3, r2 - 8004a58: 60fb str r3, [r7, #12] - 8004a5a: 68fb ldr r3, [r7, #12] - 8004a5c: f423 2240 bic.w r2, r3, #786432 ; 0xc0000 - 8004a60: 687b ldr r3, [r7, #4] - 8004a62: 699b ldr r3, [r3, #24] - 8004a64: 4313 orrs r3, r2 - 8004a66: 60fb str r3, [r7, #12] - 8004a68: 68fb ldr r3, [r7, #12] - 8004a6a: f423 5270 bic.w r2, r3, #15360 ; 0x3c00 - 8004a6e: 687b ldr r3, [r7, #4] - 8004a70: 68db ldr r3, [r3, #12] - 8004a72: f403 5370 and.w r3, r3, #15360 ; 0x3c00 - 8004a76: 4313 orrs r3, r2 - 8004a78: 60fb str r3, [r7, #12] - 8004a7a: 68fb ldr r3, [r7, #12] - 8004a7c: f423 4200 bic.w r2, r3, #32768 ; 0x8000 - 8004a80: 687b ldr r3, [r7, #4] - 8004a82: 691b ldr r3, [r3, #16] - 8004a84: 4313 orrs r3, r2 - 8004a86: 60fb str r3, [r7, #12] - 8004a88: 68fb ldr r3, [r7, #12] - 8004a8a: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 8004a8e: 687b ldr r3, [r7, #4] - 8004a90: 695b ldr r3, [r3, #20] - 8004a92: 4313 orrs r3, r2 - 8004a94: 60fb str r3, [r7, #12] - 8004a96: 68fb ldr r3, [r7, #12] - 8004a98: f023 020c bic.w r2, r3, #12 - 8004a9c: 687b ldr r3, [r7, #4] - 8004a9e: 69db ldr r3, [r3, #28] - 8004aa0: 4313 orrs r3, r2 - 8004aa2: 60fb str r3, [r7, #12] - 8004aa4: 68fb ldr r3, [r7, #12] - 8004aa6: f423 7200 bic.w r2, r3, #512 ; 0x200 - 8004aaa: 687b ldr r3, [r7, #4] - 8004aac: 6a1b ldr r3, [r3, #32] - 8004aae: 4313 orrs r3, r2 - 8004ab0: 60fb str r3, [r7, #12] - 8004ab2: 687b ldr r3, [r7, #4] - 8004ab4: 681b ldr r3, [r3, #0] - 8004ab6: 68fa ldr r2, [r7, #12] - 8004ab8: 601a str r2, [r3, #0] - - /* Initialize the COMP state*/ - hcomp->State = HAL_COMP_STATE_READY; - 8004aba: 687b ldr r3, [r7, #4] - 8004abc: 2201 movs r2, #1 - 8004abe: f883 2029 strb.w r2, [r3, #41] ; 0x29 - } - - return status; - 8004ac2: 7dfb ldrb r3, [r7, #23] -} - 8004ac4: 4618 mov r0, r3 - 8004ac6: 3718 adds r7, #24 - 8004ac8: 46bd mov sp, r7 - 8004aca: bd80 pop {r7, pc} - 8004acc: 40021000 .word 0x40021000 - -08004ad0 <__NVIC_SetPriorityGrouping>: - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - 8004ad0: b480 push {r7} - 8004ad2: b085 sub sp, #20 - 8004ad4: af00 add r7, sp, #0 - 8004ad6: 6078 str r0, [r7, #4] - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8004ad8: 687b ldr r3, [r7, #4] - 8004ada: f003 0307 and.w r3, r3, #7 - 8004ade: 60fb str r3, [r7, #12] - - reg_value = SCB->AIRCR; /* read old register configuration */ - 8004ae0: 4b0c ldr r3, [pc, #48] ; (8004b14 <__NVIC_SetPriorityGrouping+0x44>) - 8004ae2: 68db ldr r3, [r3, #12] - 8004ae4: 60bb str r3, [r7, #8] - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 8004ae6: 68ba ldr r2, [r7, #8] - 8004ae8: f64f 03ff movw r3, #63743 ; 0xf8ff - 8004aec: 4013 ands r3, r2 - 8004aee: 60bb str r3, [r7, #8] - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8004af0: 68fb ldr r3, [r7, #12] - 8004af2: 021a lsls r2, r3, #8 - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8004af4: 68bb ldr r3, [r7, #8] - 8004af6: 4313 orrs r3, r2 - reg_value = (reg_value | - 8004af8: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 - 8004afc: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8004b00: 60bb str r3, [r7, #8] - SCB->AIRCR = reg_value; - 8004b02: 4a04 ldr r2, [pc, #16] ; (8004b14 <__NVIC_SetPriorityGrouping+0x44>) - 8004b04: 68bb ldr r3, [r7, #8] - 8004b06: 60d3 str r3, [r2, #12] -} - 8004b08: bf00 nop - 8004b0a: 3714 adds r7, #20 - 8004b0c: 46bd mov sp, r7 - 8004b0e: f85d 7b04 ldr.w r7, [sp], #4 - 8004b12: 4770 bx lr - 8004b14: e000ed00 .word 0xe000ed00 - -08004b18 <__NVIC_GetPriorityGrouping>: - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - 8004b18: b480 push {r7} - 8004b1a: af00 add r7, sp, #0 - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8004b1c: 4b04 ldr r3, [pc, #16] ; (8004b30 <__NVIC_GetPriorityGrouping+0x18>) - 8004b1e: 68db ldr r3, [r3, #12] - 8004b20: 0a1b lsrs r3, r3, #8 - 8004b22: f003 0307 and.w r3, r3, #7 -} - 8004b26: 4618 mov r0, r3 - 8004b28: 46bd mov sp, r7 - 8004b2a: f85d 7b04 ldr.w r7, [sp], #4 - 8004b2e: 4770 bx lr - 8004b30: e000ed00 .word 0xe000ed00 - -08004b34 <__NVIC_EnableIRQ>: - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 8004b34: b480 push {r7} - 8004b36: b083 sub sp, #12 - 8004b38: af00 add r7, sp, #0 - 8004b3a: 4603 mov r3, r0 - 8004b3c: 71fb strb r3, [r7, #7] - if ((int32_t)(IRQn) >= 0) - 8004b3e: f997 3007 ldrsb.w r3, [r7, #7] - 8004b42: 2b00 cmp r3, #0 - 8004b44: db0b blt.n 8004b5e <__NVIC_EnableIRQ+0x2a> - { - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8004b46: 79fb ldrb r3, [r7, #7] - 8004b48: f003 021f and.w r2, r3, #31 - 8004b4c: 4907 ldr r1, [pc, #28] ; (8004b6c <__NVIC_EnableIRQ+0x38>) - 8004b4e: f997 3007 ldrsb.w r3, [r7, #7] - 8004b52: 095b lsrs r3, r3, #5 - 8004b54: 2001 movs r0, #1 - 8004b56: fa00 f202 lsl.w r2, r0, r2 - 8004b5a: f841 2023 str.w r2, [r1, r3, lsl #2] - } -} - 8004b5e: bf00 nop - 8004b60: 370c adds r7, #12 - 8004b62: 46bd mov sp, r7 - 8004b64: f85d 7b04 ldr.w r7, [sp], #4 - 8004b68: 4770 bx lr - 8004b6a: bf00 nop - 8004b6c: e000e100 .word 0xe000e100 - -08004b70 <__NVIC_SetPriority>: - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - 8004b70: b480 push {r7} - 8004b72: b083 sub sp, #12 - 8004b74: af00 add r7, sp, #0 - 8004b76: 4603 mov r3, r0 - 8004b78: 6039 str r1, [r7, #0] - 8004b7a: 71fb strb r3, [r7, #7] - if ((int32_t)(IRQn) >= 0) - 8004b7c: f997 3007 ldrsb.w r3, [r7, #7] - 8004b80: 2b00 cmp r3, #0 - 8004b82: db0a blt.n 8004b9a <__NVIC_SetPriority+0x2a> - { - NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8004b84: 683b ldr r3, [r7, #0] - 8004b86: b2da uxtb r2, r3 - 8004b88: 490c ldr r1, [pc, #48] ; (8004bbc <__NVIC_SetPriority+0x4c>) - 8004b8a: f997 3007 ldrsb.w r3, [r7, #7] - 8004b8e: 0112 lsls r2, r2, #4 - 8004b90: b2d2 uxtb r2, r2 - 8004b92: 440b add r3, r1 - 8004b94: f883 2300 strb.w r2, [r3, #768] ; 0x300 - } - else - { - SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - 8004b98: e00a b.n 8004bb0 <__NVIC_SetPriority+0x40> - SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8004b9a: 683b ldr r3, [r7, #0] - 8004b9c: b2da uxtb r2, r3 - 8004b9e: 4908 ldr r1, [pc, #32] ; (8004bc0 <__NVIC_SetPriority+0x50>) - 8004ba0: 79fb ldrb r3, [r7, #7] - 8004ba2: f003 030f and.w r3, r3, #15 - 8004ba6: 3b04 subs r3, #4 - 8004ba8: 0112 lsls r2, r2, #4 - 8004baa: b2d2 uxtb r2, r2 - 8004bac: 440b add r3, r1 - 8004bae: 761a strb r2, [r3, #24] -} - 8004bb0: bf00 nop - 8004bb2: 370c adds r7, #12 - 8004bb4: 46bd mov sp, r7 - 8004bb6: f85d 7b04 ldr.w r7, [sp], #4 - 8004bba: 4770 bx lr - 8004bbc: e000e100 .word 0xe000e100 - 8004bc0: e000ed00 .word 0xe000ed00 - -08004bc4 : - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - 8004bc4: b480 push {r7} - 8004bc6: b089 sub sp, #36 ; 0x24 - 8004bc8: af00 add r7, sp, #0 - 8004bca: 60f8 str r0, [r7, #12] - 8004bcc: 60b9 str r1, [r7, #8] - 8004bce: 607a str r2, [r7, #4] - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8004bd0: 68fb ldr r3, [r7, #12] - 8004bd2: f003 0307 and.w r3, r3, #7 - 8004bd6: 61fb str r3, [r7, #28] - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8004bd8: 69fb ldr r3, [r7, #28] - 8004bda: f1c3 0307 rsb r3, r3, #7 - 8004bde: 2b04 cmp r3, #4 - 8004be0: bf28 it cs - 8004be2: 2304 movcs r3, #4 - 8004be4: 61bb str r3, [r7, #24] - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8004be6: 69fb ldr r3, [r7, #28] - 8004be8: 3304 adds r3, #4 - 8004bea: 2b06 cmp r3, #6 - 8004bec: d902 bls.n 8004bf4 - 8004bee: 69fb ldr r3, [r7, #28] - 8004bf0: 3b03 subs r3, #3 - 8004bf2: e000 b.n 8004bf6 - 8004bf4: 2300 movs r3, #0 - 8004bf6: 617b str r3, [r7, #20] - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8004bf8: f04f 32ff mov.w r2, #4294967295 - 8004bfc: 69bb ldr r3, [r7, #24] - 8004bfe: fa02 f303 lsl.w r3, r2, r3 - 8004c02: 43da mvns r2, r3 - 8004c04: 68bb ldr r3, [r7, #8] - 8004c06: 401a ands r2, r3 - 8004c08: 697b ldr r3, [r7, #20] - 8004c0a: 409a lsls r2, r3 - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8004c0c: f04f 31ff mov.w r1, #4294967295 - 8004c10: 697b ldr r3, [r7, #20] - 8004c12: fa01 f303 lsl.w r3, r1, r3 - 8004c16: 43d9 mvns r1, r3 - 8004c18: 687b ldr r3, [r7, #4] - 8004c1a: 400b ands r3, r1 - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8004c1c: 4313 orrs r3, r2 - ); -} - 8004c1e: 4618 mov r0, r3 - 8004c20: 3724 adds r7, #36 ; 0x24 - 8004c22: 46bd mov sp, r7 - 8004c24: f85d 7b04 ldr.w r7, [sp], #4 - 8004c28: 4770 bx lr - -08004c2a : - * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. - * The pending IRQ priority will be managed only by the subpriority. - * @retval None - */ -void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - 8004c2a: b580 push {r7, lr} - 8004c2c: b082 sub sp, #8 - 8004c2e: af00 add r7, sp, #0 - 8004c30: 6078 str r0, [r7, #4] - /* Check the parameters */ - assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); - - /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ - NVIC_SetPriorityGrouping(PriorityGroup); - 8004c32: 6878 ldr r0, [r7, #4] - 8004c34: f7ff ff4c bl 8004ad0 <__NVIC_SetPriorityGrouping> -} - 8004c38: bf00 nop - 8004c3a: 3708 adds r7, #8 - 8004c3c: 46bd mov sp, r7 - 8004c3e: bd80 pop {r7, pc} - -08004c40 : - * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Priority_Table - * A lower priority value indicates a higher priority. - * @retval None - */ -void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) -{ - 8004c40: b580 push {r7, lr} - 8004c42: b086 sub sp, #24 - 8004c44: af00 add r7, sp, #0 - 8004c46: 4603 mov r3, r0 - 8004c48: 60b9 str r1, [r7, #8] - 8004c4a: 607a str r2, [r7, #4] - 8004c4c: 73fb strb r3, [r7, #15] - uint32_t prioritygroup = 0x00U; - 8004c4e: 2300 movs r3, #0 - 8004c50: 617b str r3, [r7, #20] - - /* Check the parameters */ - assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); - assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); - - prioritygroup = NVIC_GetPriorityGrouping(); - 8004c52: f7ff ff61 bl 8004b18 <__NVIC_GetPriorityGrouping> - 8004c56: 6178 str r0, [r7, #20] - - NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8004c58: 687a ldr r2, [r7, #4] - 8004c5a: 68b9 ldr r1, [r7, #8] - 8004c5c: 6978 ldr r0, [r7, #20] - 8004c5e: f7ff ffb1 bl 8004bc4 - 8004c62: 4602 mov r2, r0 - 8004c64: f997 300f ldrsb.w r3, [r7, #15] - 8004c68: 4611 mov r1, r2 - 8004c6a: 4618 mov r0, r3 - 8004c6c: f7ff ff80 bl 8004b70 <__NVIC_SetPriority> -} - 8004c70: bf00 nop - 8004c72: 3718 adds r7, #24 - 8004c74: 46bd mov sp, r7 - 8004c76: bd80 pop {r7, pc} - -08004c78 : - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) - * @retval None - */ -void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 8004c78: b580 push {r7, lr} - 8004c7a: b082 sub sp, #8 - 8004c7c: af00 add r7, sp, #0 - 8004c7e: 4603 mov r3, r0 - 8004c80: 71fb strb r3, [r7, #7] - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Enable interrupt */ - NVIC_EnableIRQ(IRQn); - 8004c82: f997 3007 ldrsb.w r3, [r7, #7] - 8004c86: 4618 mov r0, r3 - 8004c88: f7ff ff54 bl 8004b34 <__NVIC_EnableIRQ> -} - 8004c8c: bf00 nop - 8004c8e: 3708 adds r7, #8 - 8004c90: 46bd mov sp, r7 - 8004c92: bd80 pop {r7, pc} - -08004c94 : - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) -{ - 8004c94: b580 push {r7, lr} - 8004c96: b084 sub sp, #16 - 8004c98: af00 add r7, sp, #0 - 8004c9a: 6078 str r0, [r7, #4] - uint32_t tmp = 0U; - 8004c9c: 2300 movs r3, #0 - 8004c9e: 60fb str r3, [r7, #12] - - /* Check the DMA handle allocation */ - if(NULL == hdma) - 8004ca0: 687b ldr r3, [r7, #4] - 8004ca2: 2b00 cmp r3, #0 - 8004ca4: d101 bne.n 8004caa - { - return HAL_ERROR; - 8004ca6: 2301 movs r3, #1 - 8004ca8: e037 b.n 8004d1a - assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); - assert_param(IS_DMA_MODE(hdma->Init.Mode)); - assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); - - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - 8004caa: 687b ldr r3, [r7, #4] - 8004cac: 2202 movs r2, #2 - 8004cae: f883 2021 strb.w r2, [r3, #33] ; 0x21 - - /* Get the CR register value */ - tmp = hdma->Instance->CCR; - 8004cb2: 687b ldr r3, [r7, #4] - 8004cb4: 681b ldr r3, [r3, #0] - 8004cb6: 681b ldr r3, [r3, #0] - 8004cb8: 60fb str r3, [r7, #12] - - /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ - tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ - 8004cba: 68fb ldr r3, [r7, #12] - 8004cbc: f423 537f bic.w r3, r3, #16320 ; 0x3fc0 - 8004cc0: f023 0330 bic.w r3, r3, #48 ; 0x30 - 8004cc4: 60fb str r3, [r7, #12] - DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ - DMA_CCR_DIR)); - - /* Prepare the DMA Channel configuration */ - tmp |= hdma->Init.Direction | - 8004cc6: 687b ldr r3, [r7, #4] - 8004cc8: 685a ldr r2, [r3, #4] - hdma->Init.PeriphInc | hdma->Init.MemInc | - 8004cca: 687b ldr r3, [r7, #4] - 8004ccc: 689b ldr r3, [r3, #8] - tmp |= hdma->Init.Direction | - 8004cce: 431a orrs r2, r3 - hdma->Init.PeriphInc | hdma->Init.MemInc | - 8004cd0: 687b ldr r3, [r7, #4] - 8004cd2: 68db ldr r3, [r3, #12] - 8004cd4: 431a orrs r2, r3 - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8004cd6: 687b ldr r3, [r7, #4] - 8004cd8: 691b ldr r3, [r3, #16] - hdma->Init.PeriphInc | hdma->Init.MemInc | - 8004cda: 431a orrs r2, r3 - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8004cdc: 687b ldr r3, [r7, #4] - 8004cde: 695b ldr r3, [r3, #20] - 8004ce0: 431a orrs r2, r3 - hdma->Init.Mode | hdma->Init.Priority; - 8004ce2: 687b ldr r3, [r7, #4] - 8004ce4: 699b ldr r3, [r3, #24] - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8004ce6: 431a orrs r2, r3 - hdma->Init.Mode | hdma->Init.Priority; - 8004ce8: 687b ldr r3, [r7, #4] - 8004cea: 69db ldr r3, [r3, #28] - 8004cec: 4313 orrs r3, r2 - tmp |= hdma->Init.Direction | - 8004cee: 68fa ldr r2, [r7, #12] - 8004cf0: 4313 orrs r3, r2 - 8004cf2: 60fb str r3, [r7, #12] - - /* Write to DMA Channel CR register */ - hdma->Instance->CCR = tmp; - 8004cf4: 687b ldr r3, [r7, #4] - 8004cf6: 681b ldr r3, [r3, #0] - 8004cf8: 68fa ldr r2, [r7, #12] - 8004cfa: 601a str r2, [r3, #0] - - /* Initialize DmaBaseAddress and ChannelIndex parameters used - by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ - DMA_CalcBaseAndBitshift(hdma); - 8004cfc: 6878 ldr r0, [r7, #4] - 8004cfe: f000 f941 bl 8004f84 - - /* Initialise the error code */ - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8004d02: 687b ldr r3, [r7, #4] - 8004d04: 2200 movs r2, #0 - 8004d06: 639a str r2, [r3, #56] ; 0x38 - - /* Initialize the DMA state*/ - hdma->State = HAL_DMA_STATE_READY; - 8004d08: 687b ldr r3, [r7, #4] - 8004d0a: 2201 movs r2, #1 - 8004d0c: f883 2021 strb.w r2, [r3, #33] ; 0x21 - - /* Allocate lock resource and initialize it */ - hdma->Lock = HAL_UNLOCKED; - 8004d10: 687b ldr r3, [r7, #4] - 8004d12: 2200 movs r2, #0 - 8004d14: f883 2020 strb.w r2, [r3, #32] - - return HAL_OK; - 8004d18: 2300 movs r3, #0 -} - 8004d1a: 4618 mov r0, r3 - 8004d1c: 3710 adds r7, #16 - 8004d1e: 46bd mov sp, r7 - 8004d20: bd80 pop {r7, pc} - -08004d22 : - * @param DstAddress The destination memory Buffer address - * @param DataLength The length of data to be transferred from source to destination - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - 8004d22: b580 push {r7, lr} - 8004d24: b086 sub sp, #24 - 8004d26: af00 add r7, sp, #0 - 8004d28: 60f8 str r0, [r7, #12] - 8004d2a: 60b9 str r1, [r7, #8] - 8004d2c: 607a str r2, [r7, #4] - 8004d2e: 603b str r3, [r7, #0] - HAL_StatusTypeDef status = HAL_OK; - 8004d30: 2300 movs r3, #0 - 8004d32: 75fb strb r3, [r7, #23] - - /* Check the parameters */ - assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - - /* Process locked */ - __HAL_LOCK(hdma); - 8004d34: 68fb ldr r3, [r7, #12] - 8004d36: f893 3020 ldrb.w r3, [r3, #32] - 8004d3a: 2b01 cmp r3, #1 - 8004d3c: d101 bne.n 8004d42 - 8004d3e: 2302 movs r3, #2 - 8004d40: e04a b.n 8004dd8 - 8004d42: 68fb ldr r3, [r7, #12] - 8004d44: 2201 movs r2, #1 - 8004d46: f883 2020 strb.w r2, [r3, #32] - - if(HAL_DMA_STATE_READY == hdma->State) - 8004d4a: 68fb ldr r3, [r7, #12] - 8004d4c: f893 3021 ldrb.w r3, [r3, #33] ; 0x21 - 8004d50: 2b01 cmp r3, #1 - 8004d52: d13a bne.n 8004dca - { - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - 8004d54: 68fb ldr r3, [r7, #12] - 8004d56: 2202 movs r2, #2 - 8004d58: f883 2021 strb.w r2, [r3, #33] ; 0x21 - - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8004d5c: 68fb ldr r3, [r7, #12] - 8004d5e: 2200 movs r2, #0 - 8004d60: 639a str r2, [r3, #56] ; 0x38 - - /* Disable the peripheral */ - hdma->Instance->CCR &= ~DMA_CCR_EN; - 8004d62: 68fb ldr r3, [r7, #12] - 8004d64: 681b ldr r3, [r3, #0] - 8004d66: 681a ldr r2, [r3, #0] - 8004d68: 68fb ldr r3, [r7, #12] - 8004d6a: 681b ldr r3, [r3, #0] - 8004d6c: f022 0201 bic.w r2, r2, #1 - 8004d70: 601a str r2, [r3, #0] - - /* Configure the source, destination address and the data length */ - DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - 8004d72: 683b ldr r3, [r7, #0] - 8004d74: 687a ldr r2, [r7, #4] - 8004d76: 68b9 ldr r1, [r7, #8] - 8004d78: 68f8 ldr r0, [r7, #12] - 8004d7a: f000 f8d4 bl 8004f26 - - /* Enable the transfer complete, & transfer error interrupts */ - /* Half transfer interrupt is optional: enable it only if associated callback is available */ - if(NULL != hdma->XferHalfCpltCallback ) - 8004d7e: 68fb ldr r3, [r7, #12] - 8004d80: 6adb ldr r3, [r3, #44] ; 0x2c - 8004d82: 2b00 cmp r3, #0 - 8004d84: d008 beq.n 8004d98 - { - hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); - 8004d86: 68fb ldr r3, [r7, #12] - 8004d88: 681b ldr r3, [r3, #0] - 8004d8a: 681a ldr r2, [r3, #0] - 8004d8c: 68fb ldr r3, [r7, #12] - 8004d8e: 681b ldr r3, [r3, #0] - 8004d90: f042 020e orr.w r2, r2, #14 - 8004d94: 601a str r2, [r3, #0] - 8004d96: e00f b.n 8004db8 - } - else - { - hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE); - 8004d98: 68fb ldr r3, [r7, #12] - 8004d9a: 681b ldr r3, [r3, #0] - 8004d9c: 681a ldr r2, [r3, #0] - 8004d9e: 68fb ldr r3, [r7, #12] - 8004da0: 681b ldr r3, [r3, #0] - 8004da2: f042 020a orr.w r2, r2, #10 - 8004da6: 601a str r2, [r3, #0] - hdma->Instance->CCR &= ~DMA_IT_HT; - 8004da8: 68fb ldr r3, [r7, #12] - 8004daa: 681b ldr r3, [r3, #0] - 8004dac: 681a ldr r2, [r3, #0] - 8004dae: 68fb ldr r3, [r7, #12] - 8004db0: 681b ldr r3, [r3, #0] - 8004db2: f022 0204 bic.w r2, r2, #4 - 8004db6: 601a str r2, [r3, #0] - } - - /* Enable the Peripheral */ - hdma->Instance->CCR |= DMA_CCR_EN; - 8004db8: 68fb ldr r3, [r7, #12] - 8004dba: 681b ldr r3, [r3, #0] - 8004dbc: 681a ldr r2, [r3, #0] - 8004dbe: 68fb ldr r3, [r7, #12] - 8004dc0: 681b ldr r3, [r3, #0] - 8004dc2: f042 0201 orr.w r2, r2, #1 - 8004dc6: 601a str r2, [r3, #0] - 8004dc8: e005 b.n 8004dd6 - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8004dca: 68fb ldr r3, [r7, #12] - 8004dcc: 2200 movs r2, #0 - 8004dce: f883 2020 strb.w r2, [r3, #32] - - /* Remain BUSY */ - status = HAL_BUSY; - 8004dd2: 2302 movs r3, #2 - 8004dd4: 75fb strb r3, [r7, #23] - } - - return status; - 8004dd6: 7dfb ldrb r3, [r7, #23] -} - 8004dd8: 4618 mov r0, r3 - 8004dda: 3718 adds r7, #24 - 8004ddc: 46bd mov sp, r7 - 8004dde: bd80 pop {r7, pc} - -08004de0 : - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval None - */ -void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) -{ - 8004de0: b580 push {r7, lr} - 8004de2: b084 sub sp, #16 - 8004de4: af00 add r7, sp, #0 - 8004de6: 6078 str r0, [r7, #4] - uint32_t flag_it = hdma->DmaBaseAddress->ISR; - 8004de8: 687b ldr r3, [r7, #4] - 8004dea: 6bdb ldr r3, [r3, #60] ; 0x3c - 8004dec: 681b ldr r3, [r3, #0] - 8004dee: 60fb str r3, [r7, #12] - uint32_t source_it = hdma->Instance->CCR; - 8004df0: 687b ldr r3, [r7, #4] - 8004df2: 681b ldr r3, [r3, #0] - 8004df4: 681b ldr r3, [r3, #0] - 8004df6: 60bb str r3, [r7, #8] - - /* Half Transfer Complete Interrupt management ******************************/ - if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT))) - 8004df8: 687b ldr r3, [r7, #4] - 8004dfa: 6c1b ldr r3, [r3, #64] ; 0x40 - 8004dfc: 2204 movs r2, #4 - 8004dfe: 409a lsls r2, r3 - 8004e00: 68fb ldr r3, [r7, #12] - 8004e02: 4013 ands r3, r2 - 8004e04: 2b00 cmp r3, #0 - 8004e06: d024 beq.n 8004e52 - 8004e08: 68bb ldr r3, [r7, #8] - 8004e0a: f003 0304 and.w r3, r3, #4 - 8004e0e: 2b00 cmp r3, #0 - 8004e10: d01f beq.n 8004e52 - { - /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 8004e12: 687b ldr r3, [r7, #4] - 8004e14: 681b ldr r3, [r3, #0] - 8004e16: 681b ldr r3, [r3, #0] - 8004e18: f003 0320 and.w r3, r3, #32 - 8004e1c: 2b00 cmp r3, #0 - 8004e1e: d107 bne.n 8004e30 - { - /* Disable the half transfer interrupt */ - hdma->Instance->CCR &= ~DMA_IT_HT; - 8004e20: 687b ldr r3, [r7, #4] - 8004e22: 681b ldr r3, [r3, #0] - 8004e24: 681a ldr r2, [r3, #0] - 8004e26: 687b ldr r3, [r7, #4] - 8004e28: 681b ldr r3, [r3, #0] - 8004e2a: f022 0204 bic.w r2, r2, #4 - 8004e2e: 601a str r2, [r3, #0] - } - - /* Clear the half transfer complete flag */ - hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; - 8004e30: 687b ldr r3, [r7, #4] - 8004e32: 6c1a ldr r2, [r3, #64] ; 0x40 - 8004e34: 687b ldr r3, [r7, #4] - 8004e36: 6bdb ldr r3, [r3, #60] ; 0x3c - 8004e38: 2104 movs r1, #4 - 8004e3a: fa01 f202 lsl.w r2, r1, r2 - 8004e3e: 605a str r2, [r3, #4] - - /* DMA peripheral state is not updated in Half Transfer */ - /* State is updated only in Transfer Complete case */ - - if(hdma->XferHalfCpltCallback != NULL) - 8004e40: 687b ldr r3, [r7, #4] - 8004e42: 6adb ldr r3, [r3, #44] ; 0x2c - 8004e44: 2b00 cmp r3, #0 - 8004e46: d06a beq.n 8004f1e - { - /* Half transfer callback */ - hdma->XferHalfCpltCallback(hdma); - 8004e48: 687b ldr r3, [r7, #4] - 8004e4a: 6adb ldr r3, [r3, #44] ; 0x2c - 8004e4c: 6878 ldr r0, [r7, #4] - 8004e4e: 4798 blx r3 - if(hdma->XferHalfCpltCallback != NULL) - 8004e50: e065 b.n 8004f1e - } - } - - /* Transfer Complete Interrupt management ***********************************/ - else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC))) - 8004e52: 687b ldr r3, [r7, #4] - 8004e54: 6c1b ldr r3, [r3, #64] ; 0x40 - 8004e56: 2202 movs r2, #2 - 8004e58: 409a lsls r2, r3 - 8004e5a: 68fb ldr r3, [r7, #12] - 8004e5c: 4013 ands r3, r2 - 8004e5e: 2b00 cmp r3, #0 - 8004e60: d02c beq.n 8004ebc - 8004e62: 68bb ldr r3, [r7, #8] - 8004e64: f003 0302 and.w r3, r3, #2 - 8004e68: 2b00 cmp r3, #0 - 8004e6a: d027 beq.n 8004ebc - { - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 8004e6c: 687b ldr r3, [r7, #4] - 8004e6e: 681b ldr r3, [r3, #0] - 8004e70: 681b ldr r3, [r3, #0] - 8004e72: f003 0320 and.w r3, r3, #32 - 8004e76: 2b00 cmp r3, #0 - 8004e78: d10b bne.n 8004e92 - { - /* Disable the transfer complete & transfer error interrupts */ - /* if the DMA mode is not CIRCULAR */ - hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE); - 8004e7a: 687b ldr r3, [r7, #4] - 8004e7c: 681b ldr r3, [r3, #0] - 8004e7e: 681a ldr r2, [r3, #0] - 8004e80: 687b ldr r3, [r7, #4] - 8004e82: 681b ldr r3, [r3, #0] - 8004e84: f022 020a bic.w r2, r2, #10 - 8004e88: 601a str r2, [r3, #0] - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 8004e8a: 687b ldr r3, [r7, #4] - 8004e8c: 2201 movs r2, #1 - 8004e8e: f883 2021 strb.w r2, [r3, #33] ; 0x21 - } - - /* Clear the transfer complete flag */ - hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; - 8004e92: 687b ldr r3, [r7, #4] - 8004e94: 6c1a ldr r2, [r3, #64] ; 0x40 - 8004e96: 687b ldr r3, [r7, #4] - 8004e98: 6bdb ldr r3, [r3, #60] ; 0x3c - 8004e9a: 2102 movs r1, #2 - 8004e9c: fa01 f202 lsl.w r2, r1, r2 - 8004ea0: 605a str r2, [r3, #4] - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8004ea2: 687b ldr r3, [r7, #4] - 8004ea4: 2200 movs r2, #0 - 8004ea6: f883 2020 strb.w r2, [r3, #32] - - if(hdma->XferCpltCallback != NULL) - 8004eaa: 687b ldr r3, [r7, #4] - 8004eac: 6a9b ldr r3, [r3, #40] ; 0x28 - 8004eae: 2b00 cmp r3, #0 - 8004eb0: d035 beq.n 8004f1e - { - /* Transfer complete callback */ - hdma->XferCpltCallback(hdma); - 8004eb2: 687b ldr r3, [r7, #4] - 8004eb4: 6a9b ldr r3, [r3, #40] ; 0x28 - 8004eb6: 6878 ldr r0, [r7, #4] - 8004eb8: 4798 blx r3 - if(hdma->XferCpltCallback != NULL) - 8004eba: e030 b.n 8004f1e - } - } - - /* Transfer Error Interrupt management ***************************************/ - else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) - 8004ebc: 687b ldr r3, [r7, #4] - 8004ebe: 6c1b ldr r3, [r3, #64] ; 0x40 - 8004ec0: 2208 movs r2, #8 - 8004ec2: 409a lsls r2, r3 - 8004ec4: 68fb ldr r3, [r7, #12] - 8004ec6: 4013 ands r3, r2 - 8004ec8: 2b00 cmp r3, #0 - 8004eca: d028 beq.n 8004f1e - 8004ecc: 68bb ldr r3, [r7, #8] - 8004ece: f003 0308 and.w r3, r3, #8 - 8004ed2: 2b00 cmp r3, #0 - 8004ed4: d023 beq.n 8004f1e - { - /* When a DMA transfer error occurs */ - /* A hardware clear of its EN bits is performed */ - /* Then, disable all DMA interrupts */ - hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); - 8004ed6: 687b ldr r3, [r7, #4] - 8004ed8: 681b ldr r3, [r3, #0] - 8004eda: 681a ldr r2, [r3, #0] - 8004edc: 687b ldr r3, [r7, #4] - 8004ede: 681b ldr r3, [r3, #0] - 8004ee0: f022 020e bic.w r2, r2, #14 - 8004ee4: 601a str r2, [r3, #0] - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; - 8004ee6: 687b ldr r3, [r7, #4] - 8004ee8: 6c1a ldr r2, [r3, #64] ; 0x40 - 8004eea: 687b ldr r3, [r7, #4] - 8004eec: 6bdb ldr r3, [r3, #60] ; 0x3c - 8004eee: 2101 movs r1, #1 - 8004ef0: fa01 f202 lsl.w r2, r1, r2 - 8004ef4: 605a str r2, [r3, #4] - - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TE; - 8004ef6: 687b ldr r3, [r7, #4] - 8004ef8: 2201 movs r2, #1 - 8004efa: 639a str r2, [r3, #56] ; 0x38 - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 8004efc: 687b ldr r3, [r7, #4] - 8004efe: 2201 movs r2, #1 - 8004f00: f883 2021 strb.w r2, [r3, #33] ; 0x21 - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8004f04: 687b ldr r3, [r7, #4] - 8004f06: 2200 movs r2, #0 - 8004f08: f883 2020 strb.w r2, [r3, #32] - - if(hdma->XferErrorCallback != NULL) - 8004f0c: 687b ldr r3, [r7, #4] - 8004f0e: 6b1b ldr r3, [r3, #48] ; 0x30 - 8004f10: 2b00 cmp r3, #0 - 8004f12: d004 beq.n 8004f1e - { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - 8004f14: 687b ldr r3, [r7, #4] - 8004f16: 6b1b ldr r3, [r3, #48] ; 0x30 - 8004f18: 6878 ldr r0, [r7, #4] - 8004f1a: 4798 blx r3 - } - } -} - 8004f1c: e7ff b.n 8004f1e - 8004f1e: bf00 nop - 8004f20: 3710 adds r7, #16 - 8004f22: 46bd mov sp, r7 - 8004f24: bd80 pop {r7, pc} - -08004f26 : - * @param DstAddress The destination memory Buffer address - * @param DataLength The length of data to be transferred from source to destination - * @retval HAL status - */ -static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - 8004f26: b480 push {r7} - 8004f28: b085 sub sp, #20 - 8004f2a: af00 add r7, sp, #0 - 8004f2c: 60f8 str r0, [r7, #12] - 8004f2e: 60b9 str r1, [r7, #8] - 8004f30: 607a str r2, [r7, #4] - 8004f32: 603b str r3, [r7, #0] - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); - 8004f34: 68fb ldr r3, [r7, #12] - 8004f36: 6c1a ldr r2, [r3, #64] ; 0x40 - 8004f38: 68fb ldr r3, [r7, #12] - 8004f3a: 6bdb ldr r3, [r3, #60] ; 0x3c - 8004f3c: 2101 movs r1, #1 - 8004f3e: fa01 f202 lsl.w r2, r1, r2 - 8004f42: 605a str r2, [r3, #4] - - /* Configure DMA Channel data length */ - hdma->Instance->CNDTR = DataLength; - 8004f44: 68fb ldr r3, [r7, #12] - 8004f46: 681b ldr r3, [r3, #0] - 8004f48: 683a ldr r2, [r7, #0] - 8004f4a: 605a str r2, [r3, #4] - - /* Peripheral to Memory */ - if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 8004f4c: 68fb ldr r3, [r7, #12] - 8004f4e: 685b ldr r3, [r3, #4] - 8004f50: 2b10 cmp r3, #16 - 8004f52: d108 bne.n 8004f66 - { - /* Configure DMA Channel destination address */ - hdma->Instance->CPAR = DstAddress; - 8004f54: 68fb ldr r3, [r7, #12] - 8004f56: 681b ldr r3, [r3, #0] - 8004f58: 687a ldr r2, [r7, #4] - 8004f5a: 609a str r2, [r3, #8] - - /* Configure DMA Channel source address */ - hdma->Instance->CMAR = SrcAddress; - 8004f5c: 68fb ldr r3, [r7, #12] - 8004f5e: 681b ldr r3, [r3, #0] - 8004f60: 68ba ldr r2, [r7, #8] - 8004f62: 60da str r2, [r3, #12] - hdma->Instance->CPAR = SrcAddress; - - /* Configure DMA Channel destination address */ - hdma->Instance->CMAR = DstAddress; - } -} - 8004f64: e007 b.n 8004f76 - hdma->Instance->CPAR = SrcAddress; - 8004f66: 68fb ldr r3, [r7, #12] - 8004f68: 681b ldr r3, [r3, #0] - 8004f6a: 68ba ldr r2, [r7, #8] - 8004f6c: 609a str r2, [r3, #8] - hdma->Instance->CMAR = DstAddress; - 8004f6e: 68fb ldr r3, [r7, #12] - 8004f70: 681b ldr r3, [r3, #0] - 8004f72: 687a ldr r2, [r7, #4] - 8004f74: 60da str r2, [r3, #12] -} - 8004f76: bf00 nop - 8004f78: 3714 adds r7, #20 - 8004f7a: 46bd mov sp, r7 - 8004f7c: f85d 7b04 ldr.w r7, [sp], #4 - 8004f80: 4770 bx lr - ... - -08004f84 : - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval None - */ -static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) -{ - 8004f84: b480 push {r7} - 8004f86: b083 sub sp, #12 - 8004f88: af00 add r7, sp, #0 - 8004f8a: 6078 str r0, [r7, #4] -#if defined (DMA2) - /* calculation of the channel index */ - if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) - 8004f8c: 687b ldr r3, [r7, #4] - 8004f8e: 681b ldr r3, [r3, #0] - 8004f90: 461a mov r2, r3 - 8004f92: 4b14 ldr r3, [pc, #80] ; (8004fe4 ) - 8004f94: 429a cmp r2, r3 - 8004f96: d80f bhi.n 8004fb8 - { - /* DMA1 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U; - 8004f98: 687b ldr r3, [r7, #4] - 8004f9a: 681b ldr r3, [r3, #0] - 8004f9c: 461a mov r2, r3 - 8004f9e: 4b12 ldr r3, [pc, #72] ; (8004fe8 ) - 8004fa0: 4413 add r3, r2 - 8004fa2: 4a12 ldr r2, [pc, #72] ; (8004fec ) - 8004fa4: fba2 2303 umull r2, r3, r2, r3 - 8004fa8: 091b lsrs r3, r3, #4 - 8004faa: 009a lsls r2, r3, #2 - 8004fac: 687b ldr r3, [r7, #4] - 8004fae: 641a str r2, [r3, #64] ; 0x40 - hdma->DmaBaseAddress = DMA1; - 8004fb0: 687b ldr r3, [r7, #4] - 8004fb2: 4a0f ldr r2, [pc, #60] ; (8004ff0 ) - 8004fb4: 63da str r2, [r3, #60] ; 0x3c - /* calculation of the channel index */ - /* DMA1 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U; - hdma->DmaBaseAddress = DMA1; -#endif -} - 8004fb6: e00e b.n 8004fd6 - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U; - 8004fb8: 687b ldr r3, [r7, #4] - 8004fba: 681b ldr r3, [r3, #0] - 8004fbc: 461a mov r2, r3 - 8004fbe: 4b0d ldr r3, [pc, #52] ; (8004ff4 ) - 8004fc0: 4413 add r3, r2 - 8004fc2: 4a0a ldr r2, [pc, #40] ; (8004fec ) - 8004fc4: fba2 2303 umull r2, r3, r2, r3 - 8004fc8: 091b lsrs r3, r3, #4 - 8004fca: 009a lsls r2, r3, #2 - 8004fcc: 687b ldr r3, [r7, #4] - 8004fce: 641a str r2, [r3, #64] ; 0x40 - hdma->DmaBaseAddress = DMA2; - 8004fd0: 687b ldr r3, [r7, #4] - 8004fd2: 4a09 ldr r2, [pc, #36] ; (8004ff8 ) - 8004fd4: 63da str r2, [r3, #60] ; 0x3c -} - 8004fd6: bf00 nop - 8004fd8: 370c adds r7, #12 - 8004fda: 46bd mov sp, r7 - 8004fdc: f85d 7b04 ldr.w r7, [sp], #4 - 8004fe0: 4770 bx lr - 8004fe2: bf00 nop - 8004fe4: 40020407 .word 0x40020407 - 8004fe8: bffdfff8 .word 0xbffdfff8 - 8004fec: cccccccd .word 0xcccccccd - 8004ff0: 40020000 .word 0x40020000 - 8004ff4: bffdfbf8 .word 0xbffdfbf8 - 8004ff8: 40020400 .word 0x40020400 - -08004ffc : - * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains - * the configuration information for the specified GPIO peripheral. - * @retval None - */ -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) -{ - 8004ffc: b480 push {r7} - 8004ffe: b087 sub sp, #28 - 8005000: af00 add r7, sp, #0 - 8005002: 6078 str r0, [r7, #4] - 8005004: 6039 str r1, [r7, #0] - uint32_t position = 0x00u; - 8005006: 2300 movs r3, #0 - 8005008: 617b str r3, [r7, #20] - assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); - assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); - - /* Configure the port pins */ - while (((GPIO_Init->Pin) >> position) != 0x00u) - 800500a: e154 b.n 80052b6 - { - /* Get current io position */ - iocurrent = (GPIO_Init->Pin) & (1uL << position); - 800500c: 683b ldr r3, [r7, #0] - 800500e: 681a ldr r2, [r3, #0] - 8005010: 2101 movs r1, #1 - 8005012: 697b ldr r3, [r7, #20] - 8005014: fa01 f303 lsl.w r3, r1, r3 - 8005018: 4013 ands r3, r2 - 800501a: 60fb str r3, [r7, #12] - - if (iocurrent != 0x00u) - 800501c: 68fb ldr r3, [r7, #12] - 800501e: 2b00 cmp r3, #0 - 8005020: f000 8146 beq.w 80052b0 - { - /*--------------------- GPIO Mode Configuration ------------------------*/ - /* In case of Alternate function mode selection */ - if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 8005024: 683b ldr r3, [r7, #0] - 8005026: 685b ldr r3, [r3, #4] - 8005028: 2b02 cmp r3, #2 - 800502a: d003 beq.n 8005034 - 800502c: 683b ldr r3, [r7, #0] - 800502e: 685b ldr r3, [r3, #4] - 8005030: 2b12 cmp r3, #18 - 8005032: d123 bne.n 800507c - /* Check the Alternate function parameters */ - assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); - assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); - - /* Configure Alternate function mapped with the current IO */ - temp = GPIOx->AFR[position >> 3u]; - 8005034: 697b ldr r3, [r7, #20] - 8005036: 08da lsrs r2, r3, #3 - 8005038: 687b ldr r3, [r7, #4] - 800503a: 3208 adds r2, #8 - 800503c: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8005040: 613b str r3, [r7, #16] - temp &= ~(0xFu << ((position & 0x07u) * 4u)); - 8005042: 697b ldr r3, [r7, #20] - 8005044: f003 0307 and.w r3, r3, #7 - 8005048: 009b lsls r3, r3, #2 - 800504a: 220f movs r2, #15 - 800504c: fa02 f303 lsl.w r3, r2, r3 - 8005050: 43db mvns r3, r3 - 8005052: 693a ldr r2, [r7, #16] - 8005054: 4013 ands r3, r2 - 8005056: 613b str r3, [r7, #16] - temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); - 8005058: 683b ldr r3, [r7, #0] - 800505a: 691a ldr r2, [r3, #16] - 800505c: 697b ldr r3, [r7, #20] - 800505e: f003 0307 and.w r3, r3, #7 - 8005062: 009b lsls r3, r3, #2 - 8005064: fa02 f303 lsl.w r3, r2, r3 - 8005068: 693a ldr r2, [r7, #16] - 800506a: 4313 orrs r3, r2 - 800506c: 613b str r3, [r7, #16] - GPIOx->AFR[position >> 3u] = temp; - 800506e: 697b ldr r3, [r7, #20] - 8005070: 08da lsrs r2, r3, #3 - 8005072: 687b ldr r3, [r7, #4] - 8005074: 3208 adds r2, #8 - 8005076: 6939 ldr r1, [r7, #16] - 8005078: f843 1022 str.w r1, [r3, r2, lsl #2] - } - - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - temp = GPIOx->MODER; - 800507c: 687b ldr r3, [r7, #4] - 800507e: 681b ldr r3, [r3, #0] - 8005080: 613b str r3, [r7, #16] - temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); - 8005082: 697b ldr r3, [r7, #20] - 8005084: 005b lsls r3, r3, #1 - 8005086: 2203 movs r2, #3 - 8005088: fa02 f303 lsl.w r3, r2, r3 - 800508c: 43db mvns r3, r3 - 800508e: 693a ldr r2, [r7, #16] - 8005090: 4013 ands r3, r2 - 8005092: 613b str r3, [r7, #16] - temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); - 8005094: 683b ldr r3, [r7, #0] - 8005096: 685b ldr r3, [r3, #4] - 8005098: f003 0203 and.w r2, r3, #3 - 800509c: 697b ldr r3, [r7, #20] - 800509e: 005b lsls r3, r3, #1 - 80050a0: fa02 f303 lsl.w r3, r2, r3 - 80050a4: 693a ldr r2, [r7, #16] - 80050a6: 4313 orrs r3, r2 - 80050a8: 613b str r3, [r7, #16] - GPIOx->MODER = temp; - 80050aa: 687b ldr r3, [r7, #4] - 80050ac: 693a ldr r2, [r7, #16] - 80050ae: 601a str r2, [r3, #0] - - /* In case of Output or Alternate function mode selection */ - if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - 80050b0: 683b ldr r3, [r7, #0] - 80050b2: 685b ldr r3, [r3, #4] - 80050b4: 2b01 cmp r3, #1 - 80050b6: d00b beq.n 80050d0 - 80050b8: 683b ldr r3, [r7, #0] - 80050ba: 685b ldr r3, [r3, #4] - 80050bc: 2b02 cmp r3, #2 - 80050be: d007 beq.n 80050d0 - (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 80050c0: 683b ldr r3, [r7, #0] - 80050c2: 685b ldr r3, [r3, #4] - if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - 80050c4: 2b11 cmp r3, #17 - 80050c6: d003 beq.n 80050d0 - (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 80050c8: 683b ldr r3, [r7, #0] - 80050ca: 685b ldr r3, [r3, #4] - 80050cc: 2b12 cmp r3, #18 - 80050ce: d130 bne.n 8005132 - { - /* Check the Speed parameter */ - assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); - /* Configure the IO Speed */ - temp = GPIOx->OSPEEDR; - 80050d0: 687b ldr r3, [r7, #4] - 80050d2: 689b ldr r3, [r3, #8] - 80050d4: 613b str r3, [r7, #16] - temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); - 80050d6: 697b ldr r3, [r7, #20] - 80050d8: 005b lsls r3, r3, #1 - 80050da: 2203 movs r2, #3 - 80050dc: fa02 f303 lsl.w r3, r2, r3 - 80050e0: 43db mvns r3, r3 - 80050e2: 693a ldr r2, [r7, #16] - 80050e4: 4013 ands r3, r2 - 80050e6: 613b str r3, [r7, #16] - temp |= (GPIO_Init->Speed << (position * 2u)); - 80050e8: 683b ldr r3, [r7, #0] - 80050ea: 68da ldr r2, [r3, #12] - 80050ec: 697b ldr r3, [r7, #20] - 80050ee: 005b lsls r3, r3, #1 - 80050f0: fa02 f303 lsl.w r3, r2, r3 - 80050f4: 693a ldr r2, [r7, #16] - 80050f6: 4313 orrs r3, r2 - 80050f8: 613b str r3, [r7, #16] - GPIOx->OSPEEDR = temp; - 80050fa: 687b ldr r3, [r7, #4] - 80050fc: 693a ldr r2, [r7, #16] - 80050fe: 609a str r2, [r3, #8] - - /* Configure the IO Output Type */ - temp = GPIOx->OTYPER; - 8005100: 687b ldr r3, [r7, #4] - 8005102: 685b ldr r3, [r3, #4] - 8005104: 613b str r3, [r7, #16] - temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 8005106: 2201 movs r2, #1 - 8005108: 697b ldr r3, [r7, #20] - 800510a: fa02 f303 lsl.w r3, r2, r3 - 800510e: 43db mvns r3, r3 - 8005110: 693a ldr r2, [r7, #16] - 8005112: 4013 ands r3, r2 - 8005114: 613b str r3, [r7, #16] - temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4u) << position); - 8005116: 683b ldr r3, [r7, #0] - 8005118: 685b ldr r3, [r3, #4] - 800511a: 091b lsrs r3, r3, #4 - 800511c: f003 0201 and.w r2, r3, #1 - 8005120: 697b ldr r3, [r7, #20] - 8005122: fa02 f303 lsl.w r3, r2, r3 - 8005126: 693a ldr r2, [r7, #16] - 8005128: 4313 orrs r3, r2 - 800512a: 613b str r3, [r7, #16] - GPIOx->OTYPER = temp; - 800512c: 687b ldr r3, [r7, #4] - 800512e: 693a ldr r2, [r7, #16] - 8005130: 605a str r2, [r3, #4] - } - - /* Activate the Pull-up or Pull down resistor for the current IO */ - temp = GPIOx->PUPDR; - 8005132: 687b ldr r3, [r7, #4] - 8005134: 68db ldr r3, [r3, #12] - 8005136: 613b str r3, [r7, #16] - temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); - 8005138: 697b ldr r3, [r7, #20] - 800513a: 005b lsls r3, r3, #1 - 800513c: 2203 movs r2, #3 - 800513e: fa02 f303 lsl.w r3, r2, r3 - 8005142: 43db mvns r3, r3 - 8005144: 693a ldr r2, [r7, #16] - 8005146: 4013 ands r3, r2 - 8005148: 613b str r3, [r7, #16] - temp |= ((GPIO_Init->Pull) << (position * 2u)); - 800514a: 683b ldr r3, [r7, #0] - 800514c: 689a ldr r2, [r3, #8] - 800514e: 697b ldr r3, [r7, #20] - 8005150: 005b lsls r3, r3, #1 - 8005152: fa02 f303 lsl.w r3, r2, r3 - 8005156: 693a ldr r2, [r7, #16] - 8005158: 4313 orrs r3, r2 - 800515a: 613b str r3, [r7, #16] - GPIOx->PUPDR = temp; - 800515c: 687b ldr r3, [r7, #4] - 800515e: 693a ldr r2, [r7, #16] - 8005160: 60da str r2, [r3, #12] - - /*--------------------- EXTI Mode Configuration ------------------------*/ - /* Configure the External Interrupt or event for the current IO */ - if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 8005162: 683b ldr r3, [r7, #0] - 8005164: 685b ldr r3, [r3, #4] - 8005166: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800516a: 2b00 cmp r3, #0 - 800516c: f000 80a0 beq.w 80052b0 - { - /* Enable SYSCFG Clock */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8005170: 4b58 ldr r3, [pc, #352] ; (80052d4 ) - 8005172: 699b ldr r3, [r3, #24] - 8005174: 4a57 ldr r2, [pc, #348] ; (80052d4 ) - 8005176: f043 0301 orr.w r3, r3, #1 - 800517a: 6193 str r3, [r2, #24] - 800517c: 4b55 ldr r3, [pc, #340] ; (80052d4 ) - 800517e: 699b ldr r3, [r3, #24] - 8005180: f003 0301 and.w r3, r3, #1 - 8005184: 60bb str r3, [r7, #8] - 8005186: 68bb ldr r3, [r7, #8] - - temp = SYSCFG->EXTICR[position >> 2u]; - 8005188: 4a53 ldr r2, [pc, #332] ; (80052d8 ) - 800518a: 697b ldr r3, [r7, #20] - 800518c: 089b lsrs r3, r3, #2 - 800518e: 3302 adds r3, #2 - 8005190: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8005194: 613b str r3, [r7, #16] - temp &= ~(0x0FuL << (4u * (position & 0x03u))); - 8005196: 697b ldr r3, [r7, #20] - 8005198: f003 0303 and.w r3, r3, #3 - 800519c: 009b lsls r3, r3, #2 - 800519e: 220f movs r2, #15 - 80051a0: fa02 f303 lsl.w r3, r2, r3 - 80051a4: 43db mvns r3, r3 - 80051a6: 693a ldr r2, [r7, #16] - 80051a8: 4013 ands r3, r2 - 80051aa: 613b str r3, [r7, #16] - temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); - 80051ac: 687b ldr r3, [r7, #4] - 80051ae: f1b3 4f90 cmp.w r3, #1207959552 ; 0x48000000 - 80051b2: d019 beq.n 80051e8 - 80051b4: 687b ldr r3, [r7, #4] - 80051b6: 4a49 ldr r2, [pc, #292] ; (80052dc ) - 80051b8: 4293 cmp r3, r2 - 80051ba: d013 beq.n 80051e4 - 80051bc: 687b ldr r3, [r7, #4] - 80051be: 4a48 ldr r2, [pc, #288] ; (80052e0 ) - 80051c0: 4293 cmp r3, r2 - 80051c2: d00d beq.n 80051e0 - 80051c4: 687b ldr r3, [r7, #4] - 80051c6: 4a47 ldr r2, [pc, #284] ; (80052e4 ) - 80051c8: 4293 cmp r3, r2 - 80051ca: d007 beq.n 80051dc - 80051cc: 687b ldr r3, [r7, #4] - 80051ce: 4a46 ldr r2, [pc, #280] ; (80052e8 ) - 80051d0: 4293 cmp r3, r2 - 80051d2: d101 bne.n 80051d8 - 80051d4: 2304 movs r3, #4 - 80051d6: e008 b.n 80051ea - 80051d8: 2305 movs r3, #5 - 80051da: e006 b.n 80051ea - 80051dc: 2303 movs r3, #3 - 80051de: e004 b.n 80051ea - 80051e0: 2302 movs r3, #2 - 80051e2: e002 b.n 80051ea - 80051e4: 2301 movs r3, #1 - 80051e6: e000 b.n 80051ea - 80051e8: 2300 movs r3, #0 - 80051ea: 697a ldr r2, [r7, #20] - 80051ec: f002 0203 and.w r2, r2, #3 - 80051f0: 0092 lsls r2, r2, #2 - 80051f2: 4093 lsls r3, r2 - 80051f4: 693a ldr r2, [r7, #16] - 80051f6: 4313 orrs r3, r2 - 80051f8: 613b str r3, [r7, #16] - SYSCFG->EXTICR[position >> 2u] = temp; - 80051fa: 4937 ldr r1, [pc, #220] ; (80052d8 ) - 80051fc: 697b ldr r3, [r7, #20] - 80051fe: 089b lsrs r3, r3, #2 - 8005200: 3302 adds r3, #2 - 8005202: 693a ldr r2, [r7, #16] - 8005204: f841 2023 str.w r2, [r1, r3, lsl #2] - - /* Clear EXTI line configuration */ - temp = EXTI->IMR; - 8005208: 4b38 ldr r3, [pc, #224] ; (80052ec ) - 800520a: 681b ldr r3, [r3, #0] - 800520c: 613b str r3, [r7, #16] - temp &= ~(iocurrent); - 800520e: 68fb ldr r3, [r7, #12] - 8005210: 43db mvns r3, r3 - 8005212: 693a ldr r2, [r7, #16] - 8005214: 4013 ands r3, r2 - 8005216: 613b str r3, [r7, #16] - if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 8005218: 683b ldr r3, [r7, #0] - 800521a: 685b ldr r3, [r3, #4] - 800521c: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8005220: 2b00 cmp r3, #0 - 8005222: d003 beq.n 800522c - { - temp |= iocurrent; - 8005224: 693a ldr r2, [r7, #16] - 8005226: 68fb ldr r3, [r7, #12] - 8005228: 4313 orrs r3, r2 - 800522a: 613b str r3, [r7, #16] - } - EXTI->IMR = temp; - 800522c: 4a2f ldr r2, [pc, #188] ; (80052ec ) - 800522e: 693b ldr r3, [r7, #16] - 8005230: 6013 str r3, [r2, #0] - - temp = EXTI->EMR; - 8005232: 4b2e ldr r3, [pc, #184] ; (80052ec ) - 8005234: 685b ldr r3, [r3, #4] - 8005236: 613b str r3, [r7, #16] - temp &= ~(iocurrent); - 8005238: 68fb ldr r3, [r7, #12] - 800523a: 43db mvns r3, r3 - 800523c: 693a ldr r2, [r7, #16] - 800523e: 4013 ands r3, r2 - 8005240: 613b str r3, [r7, #16] - if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 8005242: 683b ldr r3, [r7, #0] - 8005244: 685b ldr r3, [r3, #4] - 8005246: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 800524a: 2b00 cmp r3, #0 - 800524c: d003 beq.n 8005256 - { - temp |= iocurrent; - 800524e: 693a ldr r2, [r7, #16] - 8005250: 68fb ldr r3, [r7, #12] - 8005252: 4313 orrs r3, r2 - 8005254: 613b str r3, [r7, #16] - } - EXTI->EMR = temp; - 8005256: 4a25 ldr r2, [pc, #148] ; (80052ec ) - 8005258: 693b ldr r3, [r7, #16] - 800525a: 6053 str r3, [r2, #4] - - /* Clear Rising Falling edge configuration */ - temp = EXTI->RTSR; - 800525c: 4b23 ldr r3, [pc, #140] ; (80052ec ) - 800525e: 689b ldr r3, [r3, #8] - 8005260: 613b str r3, [r7, #16] - temp &= ~(iocurrent); - 8005262: 68fb ldr r3, [r7, #12] - 8005264: 43db mvns r3, r3 - 8005266: 693a ldr r2, [r7, #16] - 8005268: 4013 ands r3, r2 - 800526a: 613b str r3, [r7, #16] - if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 800526c: 683b ldr r3, [r7, #0] - 800526e: 685b ldr r3, [r3, #4] - 8005270: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 8005274: 2b00 cmp r3, #0 - 8005276: d003 beq.n 8005280 - { - temp |= iocurrent; - 8005278: 693a ldr r2, [r7, #16] - 800527a: 68fb ldr r3, [r7, #12] - 800527c: 4313 orrs r3, r2 - 800527e: 613b str r3, [r7, #16] - } - EXTI->RTSR = temp; - 8005280: 4a1a ldr r2, [pc, #104] ; (80052ec ) - 8005282: 693b ldr r3, [r7, #16] - 8005284: 6093 str r3, [r2, #8] - - temp = EXTI->FTSR; - 8005286: 4b19 ldr r3, [pc, #100] ; (80052ec ) - 8005288: 68db ldr r3, [r3, #12] - 800528a: 613b str r3, [r7, #16] - temp &= ~(iocurrent); - 800528c: 68fb ldr r3, [r7, #12] - 800528e: 43db mvns r3, r3 - 8005290: 693a ldr r2, [r7, #16] - 8005292: 4013 ands r3, r2 - 8005294: 613b str r3, [r7, #16] - if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 8005296: 683b ldr r3, [r7, #0] - 8005298: 685b ldr r3, [r3, #4] - 800529a: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 800529e: 2b00 cmp r3, #0 - 80052a0: d003 beq.n 80052aa - { - temp |= iocurrent; - 80052a2: 693a ldr r2, [r7, #16] - 80052a4: 68fb ldr r3, [r7, #12] - 80052a6: 4313 orrs r3, r2 - 80052a8: 613b str r3, [r7, #16] - } - EXTI->FTSR = temp; - 80052aa: 4a10 ldr r2, [pc, #64] ; (80052ec ) - 80052ac: 693b ldr r3, [r7, #16] - 80052ae: 60d3 str r3, [r2, #12] - } - } - - position++; - 80052b0: 697b ldr r3, [r7, #20] - 80052b2: 3301 adds r3, #1 - 80052b4: 617b str r3, [r7, #20] - while (((GPIO_Init->Pin) >> position) != 0x00u) - 80052b6: 683b ldr r3, [r7, #0] - 80052b8: 681a ldr r2, [r3, #0] - 80052ba: 697b ldr r3, [r7, #20] - 80052bc: fa22 f303 lsr.w r3, r2, r3 - 80052c0: 2b00 cmp r3, #0 - 80052c2: f47f aea3 bne.w 800500c - } -} - 80052c6: bf00 nop - 80052c8: 371c adds r7, #28 - 80052ca: 46bd mov sp, r7 - 80052cc: f85d 7b04 ldr.w r7, [sp], #4 - 80052d0: 4770 bx lr - 80052d2: bf00 nop - 80052d4: 40021000 .word 0x40021000 - 80052d8: 40010000 .word 0x40010000 - 80052dc: 48000400 .word 0x48000400 - 80052e0: 48000800 .word 0x48000800 - 80052e4: 48000c00 .word 0x48000c00 - 80052e8: 48001000 .word 0x48001000 - 80052ec: 40010400 .word 0x40010400 - -080052f0 : - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) -{ - 80052f0: b580 push {r7, lr} - 80052f2: b082 sub sp, #8 - 80052f4: af00 add r7, sp, #0 - 80052f6: 6078 str r0, [r7, #4] - /* Check the I2C handle allocation */ - if (hi2c == NULL) - 80052f8: 687b ldr r3, [r7, #4] - 80052fa: 2b00 cmp r3, #0 - 80052fc: d101 bne.n 8005302 - { - return HAL_ERROR; - 80052fe: 2301 movs r3, #1 - 8005300: e081 b.n 8005406 - assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); - assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); - assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); - assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); - - if (hi2c->State == HAL_I2C_STATE_RESET) - 8005302: 687b ldr r3, [r7, #4] - 8005304: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 8005308: b2db uxtb r3, r3 - 800530a: 2b00 cmp r3, #0 - 800530c: d106 bne.n 800531c - { - /* Allocate lock resource and initialize it */ - hi2c->Lock = HAL_UNLOCKED; - 800530e: 687b ldr r3, [r7, #4] - 8005310: 2200 movs r2, #0 - 8005312: f883 2040 strb.w r2, [r3, #64] ; 0x40 - - /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ - hi2c->MspInitCallback(hi2c); -#else - /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ - HAL_I2C_MspInit(hi2c); - 8005316: 6878 ldr r0, [r7, #4] - 8005318: f7fd f9ca bl 80026b0 -#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ - } - - hi2c->State = HAL_I2C_STATE_BUSY; - 800531c: 687b ldr r3, [r7, #4] - 800531e: 2224 movs r2, #36 ; 0x24 - 8005320: f883 2041 strb.w r2, [r3, #65] ; 0x41 - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - 8005324: 687b ldr r3, [r7, #4] - 8005326: 681b ldr r3, [r3, #0] - 8005328: 681a ldr r2, [r3, #0] - 800532a: 687b ldr r3, [r7, #4] - 800532c: 681b ldr r3, [r3, #0] - 800532e: f022 0201 bic.w r2, r2, #1 - 8005332: 601a str r2, [r3, #0] - - /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ - /* Configure I2Cx: Frequency range */ - hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; - 8005334: 687b ldr r3, [r7, #4] - 8005336: 685a ldr r2, [r3, #4] - 8005338: 687b ldr r3, [r7, #4] - 800533a: 681b ldr r3, [r3, #0] - 800533c: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000 - 8005340: 611a str r2, [r3, #16] - - /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ - /* Disable Own Address1 before set the Own Address1 configuration */ - hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; - 8005342: 687b ldr r3, [r7, #4] - 8005344: 681b ldr r3, [r3, #0] - 8005346: 689a ldr r2, [r3, #8] - 8005348: 687b ldr r3, [r7, #4] - 800534a: 681b ldr r3, [r3, #0] - 800534c: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 8005350: 609a str r2, [r3, #8] - - /* Configure I2Cx: Own Address1 and ack own address1 mode */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8005352: 687b ldr r3, [r7, #4] - 8005354: 68db ldr r3, [r3, #12] - 8005356: 2b01 cmp r3, #1 - 8005358: d107 bne.n 800536a - { - hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); - 800535a: 687b ldr r3, [r7, #4] - 800535c: 689a ldr r2, [r3, #8] - 800535e: 687b ldr r3, [r7, #4] - 8005360: 681b ldr r3, [r3, #0] - 8005362: f442 4200 orr.w r2, r2, #32768 ; 0x8000 - 8005366: 609a str r2, [r3, #8] - 8005368: e006 b.n 8005378 - } - else /* I2C_ADDRESSINGMODE_10BIT */ - { - hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); - 800536a: 687b ldr r3, [r7, #4] - 800536c: 689a ldr r2, [r3, #8] - 800536e: 687b ldr r3, [r7, #4] - 8005370: 681b ldr r3, [r3, #0] - 8005372: f442 4204 orr.w r2, r2, #33792 ; 0x8400 - 8005376: 609a str r2, [r3, #8] - } - - /*---------------------------- I2Cx CR2 Configuration ----------------------*/ - /* Configure I2Cx: Addressing Master mode */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - 8005378: 687b ldr r3, [r7, #4] - 800537a: 68db ldr r3, [r3, #12] - 800537c: 2b02 cmp r3, #2 - 800537e: d104 bne.n 800538a - { - hi2c->Instance->CR2 = (I2C_CR2_ADD10); - 8005380: 687b ldr r3, [r7, #4] - 8005382: 681b ldr r3, [r3, #0] - 8005384: f44f 6200 mov.w r2, #2048 ; 0x800 - 8005388: 605a str r2, [r3, #4] - } - /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ - hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); - 800538a: 687b ldr r3, [r7, #4] - 800538c: 681b ldr r3, [r3, #0] - 800538e: 685b ldr r3, [r3, #4] - 8005390: 687a ldr r2, [r7, #4] - 8005392: 6812 ldr r2, [r2, #0] - 8005394: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 - 8005398: f443 4300 orr.w r3, r3, #32768 ; 0x8000 - 800539c: 6053 str r3, [r2, #4] - - /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ - /* Disable Own Address2 before set the Own Address2 configuration */ - hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; - 800539e: 687b ldr r3, [r7, #4] - 80053a0: 681b ldr r3, [r3, #0] - 80053a2: 68da ldr r2, [r3, #12] - 80053a4: 687b ldr r3, [r7, #4] - 80053a6: 681b ldr r3, [r3, #0] - 80053a8: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 80053ac: 60da str r2, [r3, #12] - - /* Configure I2Cx: Dual mode and Own Address2 */ - hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8)); - 80053ae: 687b ldr r3, [r7, #4] - 80053b0: 691a ldr r2, [r3, #16] - 80053b2: 687b ldr r3, [r7, #4] - 80053b4: 695b ldr r3, [r3, #20] - 80053b6: ea42 0103 orr.w r1, r2, r3 - 80053ba: 687b ldr r3, [r7, #4] - 80053bc: 699b ldr r3, [r3, #24] - 80053be: 021a lsls r2, r3, #8 - 80053c0: 687b ldr r3, [r7, #4] - 80053c2: 681b ldr r3, [r3, #0] - 80053c4: 430a orrs r2, r1 - 80053c6: 60da str r2, [r3, #12] - - /*---------------------------- I2Cx CR1 Configuration ----------------------*/ - /* Configure I2Cx: Generalcall and NoStretch mode */ - hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); - 80053c8: 687b ldr r3, [r7, #4] - 80053ca: 69d9 ldr r1, [r3, #28] - 80053cc: 687b ldr r3, [r7, #4] - 80053ce: 6a1a ldr r2, [r3, #32] - 80053d0: 687b ldr r3, [r7, #4] - 80053d2: 681b ldr r3, [r3, #0] - 80053d4: 430a orrs r2, r1 - 80053d6: 601a str r2, [r3, #0] - - /* Enable the selected I2C peripheral */ - __HAL_I2C_ENABLE(hi2c); - 80053d8: 687b ldr r3, [r7, #4] - 80053da: 681b ldr r3, [r3, #0] - 80053dc: 681a ldr r2, [r3, #0] - 80053de: 687b ldr r3, [r7, #4] - 80053e0: 681b ldr r3, [r3, #0] - 80053e2: f042 0201 orr.w r2, r2, #1 - 80053e6: 601a str r2, [r3, #0] - - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 80053e8: 687b ldr r3, [r7, #4] - 80053ea: 2200 movs r2, #0 - 80053ec: 645a str r2, [r3, #68] ; 0x44 - hi2c->State = HAL_I2C_STATE_READY; - 80053ee: 687b ldr r3, [r7, #4] - 80053f0: 2220 movs r2, #32 - 80053f2: f883 2041 strb.w r2, [r3, #65] ; 0x41 - hi2c->PreviousState = I2C_STATE_NONE; - 80053f6: 687b ldr r3, [r7, #4] - 80053f8: 2200 movs r2, #0 - 80053fa: 631a str r2, [r3, #48] ; 0x30 - hi2c->Mode = HAL_I2C_MODE_NONE; - 80053fc: 687b ldr r3, [r7, #4] - 80053fe: 2200 movs r2, #0 - 8005400: f883 2042 strb.w r2, [r3, #66] ; 0x42 - - return HAL_OK; - 8005404: 2300 movs r3, #0 -} - 8005406: 4618 mov r0, r3 - 8005408: 3708 adds r7, #8 - 800540a: 46bd mov sp, r7 - 800540c: bd80 pop {r7, pc} - -0800540e : - * the configuration information for the specified I2Cx peripheral. - * @param AnalogFilter New state of the Analog filter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) -{ - 800540e: b480 push {r7} - 8005410: b083 sub sp, #12 - 8005412: af00 add r7, sp, #0 - 8005414: 6078 str r0, [r7, #4] - 8005416: 6039 str r1, [r7, #0] - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); - - if (hi2c->State == HAL_I2C_STATE_READY) - 8005418: 687b ldr r3, [r7, #4] - 800541a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 800541e: b2db uxtb r3, r3 - 8005420: 2b20 cmp r3, #32 - 8005422: d138 bne.n 8005496 - { - /* Process Locked */ - __HAL_LOCK(hi2c); - 8005424: 687b ldr r3, [r7, #4] - 8005426: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 800542a: 2b01 cmp r3, #1 - 800542c: d101 bne.n 8005432 - 800542e: 2302 movs r3, #2 - 8005430: e032 b.n 8005498 - 8005432: 687b ldr r3, [r7, #4] - 8005434: 2201 movs r2, #1 - 8005436: f883 2040 strb.w r2, [r3, #64] ; 0x40 - - hi2c->State = HAL_I2C_STATE_BUSY; - 800543a: 687b ldr r3, [r7, #4] - 800543c: 2224 movs r2, #36 ; 0x24 - 800543e: f883 2041 strb.w r2, [r3, #65] ; 0x41 - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - 8005442: 687b ldr r3, [r7, #4] - 8005444: 681b ldr r3, [r3, #0] - 8005446: 681a ldr r2, [r3, #0] - 8005448: 687b ldr r3, [r7, #4] - 800544a: 681b ldr r3, [r3, #0] - 800544c: f022 0201 bic.w r2, r2, #1 - 8005450: 601a str r2, [r3, #0] - - /* Reset I2Cx ANOFF bit */ - hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); - 8005452: 687b ldr r3, [r7, #4] - 8005454: 681b ldr r3, [r3, #0] - 8005456: 681a ldr r2, [r3, #0] - 8005458: 687b ldr r3, [r7, #4] - 800545a: 681b ldr r3, [r3, #0] - 800545c: f422 5280 bic.w r2, r2, #4096 ; 0x1000 - 8005460: 601a str r2, [r3, #0] - - /* Set analog filter bit*/ - hi2c->Instance->CR1 |= AnalogFilter; - 8005462: 687b ldr r3, [r7, #4] - 8005464: 681b ldr r3, [r3, #0] - 8005466: 6819 ldr r1, [r3, #0] - 8005468: 687b ldr r3, [r7, #4] - 800546a: 681b ldr r3, [r3, #0] - 800546c: 683a ldr r2, [r7, #0] - 800546e: 430a orrs r2, r1 - 8005470: 601a str r2, [r3, #0] - - __HAL_I2C_ENABLE(hi2c); - 8005472: 687b ldr r3, [r7, #4] - 8005474: 681b ldr r3, [r3, #0] - 8005476: 681a ldr r2, [r3, #0] - 8005478: 687b ldr r3, [r7, #4] - 800547a: 681b ldr r3, [r3, #0] - 800547c: f042 0201 orr.w r2, r2, #1 - 8005480: 601a str r2, [r3, #0] - - hi2c->State = HAL_I2C_STATE_READY; - 8005482: 687b ldr r3, [r7, #4] - 8005484: 2220 movs r2, #32 - 8005486: f883 2041 strb.w r2, [r3, #65] ; 0x41 - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - 800548a: 687b ldr r3, [r7, #4] - 800548c: 2200 movs r2, #0 - 800548e: f883 2040 strb.w r2, [r3, #64] ; 0x40 - - return HAL_OK; - 8005492: 2300 movs r3, #0 - 8005494: e000 b.n 8005498 - } - else - { - return HAL_BUSY; - 8005496: 2302 movs r3, #2 - } -} - 8005498: 4618 mov r0, r3 - 800549a: 370c adds r7, #12 - 800549c: 46bd mov sp, r7 - 800549e: f85d 7b04 ldr.w r7, [sp], #4 - 80054a2: 4770 bx lr - -080054a4 : - * the configuration information for the specified I2Cx peripheral. - * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) -{ - 80054a4: b480 push {r7} - 80054a6: b085 sub sp, #20 - 80054a8: af00 add r7, sp, #0 - 80054aa: 6078 str r0, [r7, #4] - 80054ac: 6039 str r1, [r7, #0] - - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); - - if (hi2c->State == HAL_I2C_STATE_READY) - 80054ae: 687b ldr r3, [r7, #4] - 80054b0: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 80054b4: b2db uxtb r3, r3 - 80054b6: 2b20 cmp r3, #32 - 80054b8: d139 bne.n 800552e - { - /* Process Locked */ - __HAL_LOCK(hi2c); - 80054ba: 687b ldr r3, [r7, #4] - 80054bc: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 80054c0: 2b01 cmp r3, #1 - 80054c2: d101 bne.n 80054c8 - 80054c4: 2302 movs r3, #2 - 80054c6: e033 b.n 8005530 - 80054c8: 687b ldr r3, [r7, #4] - 80054ca: 2201 movs r2, #1 - 80054cc: f883 2040 strb.w r2, [r3, #64] ; 0x40 - - hi2c->State = HAL_I2C_STATE_BUSY; - 80054d0: 687b ldr r3, [r7, #4] - 80054d2: 2224 movs r2, #36 ; 0x24 - 80054d4: f883 2041 strb.w r2, [r3, #65] ; 0x41 - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - 80054d8: 687b ldr r3, [r7, #4] - 80054da: 681b ldr r3, [r3, #0] - 80054dc: 681a ldr r2, [r3, #0] - 80054de: 687b ldr r3, [r7, #4] - 80054e0: 681b ldr r3, [r3, #0] - 80054e2: f022 0201 bic.w r2, r2, #1 - 80054e6: 601a str r2, [r3, #0] - - /* Get the old register value */ - tmpreg = hi2c->Instance->CR1; - 80054e8: 687b ldr r3, [r7, #4] - 80054ea: 681b ldr r3, [r3, #0] - 80054ec: 681b ldr r3, [r3, #0] - 80054ee: 60fb str r3, [r7, #12] - - /* Reset I2Cx DNF bits [11:8] */ - tmpreg &= ~(I2C_CR1_DNF); - 80054f0: 68fb ldr r3, [r7, #12] - 80054f2: f423 6370 bic.w r3, r3, #3840 ; 0xf00 - 80054f6: 60fb str r3, [r7, #12] - - /* Set I2Cx DNF coefficient */ - tmpreg |= DigitalFilter << 8U; - 80054f8: 683b ldr r3, [r7, #0] - 80054fa: 021b lsls r3, r3, #8 - 80054fc: 68fa ldr r2, [r7, #12] - 80054fe: 4313 orrs r3, r2 - 8005500: 60fb str r3, [r7, #12] - - /* Store the new register value */ - hi2c->Instance->CR1 = tmpreg; - 8005502: 687b ldr r3, [r7, #4] - 8005504: 681b ldr r3, [r3, #0] - 8005506: 68fa ldr r2, [r7, #12] - 8005508: 601a str r2, [r3, #0] - - __HAL_I2C_ENABLE(hi2c); - 800550a: 687b ldr r3, [r7, #4] - 800550c: 681b ldr r3, [r3, #0] - 800550e: 681a ldr r2, [r3, #0] - 8005510: 687b ldr r3, [r7, #4] - 8005512: 681b ldr r3, [r3, #0] - 8005514: f042 0201 orr.w r2, r2, #1 - 8005518: 601a str r2, [r3, #0] - - hi2c->State = HAL_I2C_STATE_READY; - 800551a: 687b ldr r3, [r7, #4] - 800551c: 2220 movs r2, #32 - 800551e: f883 2041 strb.w r2, [r3, #65] ; 0x41 - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - 8005522: 687b ldr r3, [r7, #4] - 8005524: 2200 movs r2, #0 - 8005526: f883 2040 strb.w r2, [r3, #64] ; 0x40 - - return HAL_OK; - 800552a: 2300 movs r3, #0 - 800552c: e000 b.n 8005530 - } - else - { - return HAL_BUSY; - 800552e: 2302 movs r3, #2 - } -} - 8005530: 4618 mov r0, r3 - 8005532: 3714 adds r7, #20 - 8005534: 46bd mov sp, r7 - 8005536: f85d 7b04 ldr.w r7, [sp], #4 - 800553a: 4770 bx lr - -0800553c : - * @param hopamp OPAMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp) - -{ - 800553c: b580 push {r7, lr} - 800553e: b084 sub sp, #16 - 8005540: af00 add r7, sp, #0 - 8005542: 6078 str r0, [r7, #4] - HAL_StatusTypeDef status = HAL_OK; - 8005544: 2300 movs r3, #0 - 8005546: 73fb strb r3, [r7, #15] - - /* Check the OPAMP handle allocation and lock status */ - /* Init not allowed if calibration is ongoing */ - if (hopamp == NULL) - 8005548: 687b ldr r3, [r7, #4] - 800554a: 2b00 cmp r3, #0 - 800554c: d101 bne.n 8005552 - { - return HAL_ERROR; - 800554e: 2301 movs r3, #1 - 8005550: e092 b.n 8005678 - } - else if (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) - 8005552: 687b ldr r3, [r7, #4] - 8005554: f893 3032 ldrb.w r3, [r3, #50] ; 0x32 - 8005558: b2db uxtb r3, r3 - 800555a: 2b05 cmp r3, #5 - 800555c: d101 bne.n 8005562 - { - return HAL_ERROR; - 800555e: 2301 movs r3, #1 - 8005560: e08a b.n 8005678 - } - else if (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY) - 8005562: 687b ldr r3, [r7, #4] - 8005564: f893 3032 ldrb.w r3, [r3, #50] ; 0x32 - 8005568: b2db uxtb r3, r3 - 800556a: 2b02 cmp r3, #2 - 800556c: d101 bne.n 8005572 - { - return HAL_ERROR; - 800556e: 2301 movs r3, #1 - 8005570: e082 b.n 8005678 - - /* Set OPAMP parameters */ - assert_param(IS_OPAMP_FUNCTIONAL_NORMALMODE(hopamp->Init.Mode)); - assert_param(IS_OPAMP_NONINVERTING_INPUT(hopamp->Init.NonInvertingInput)); - - if (hopamp->State == HAL_OPAMP_STATE_RESET) - 8005572: 687b ldr r3, [r7, #4] - 8005574: f893 3032 ldrb.w r3, [r3, #50] ; 0x32 - assert_param(IS_OPAMP_INVERTING_INPUT(hopamp->Init.InvertingInput)); - } - - assert_param(IS_OPAMP_TIMERCONTROLLED_MUXMODE(hopamp->Init.TimerControlledMuxmode)); - - if ((hopamp->Init.TimerControlledMuxmode) == OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE) - 8005578: 687b ldr r3, [r7, #4] - 800557a: 691b ldr r3, [r3, #16] - 800557c: 2b80 cmp r3, #128 ; 0x80 - assert_param(IS_OPAMP_TRIMMINGVALUE(hopamp->Init.TrimmingValueP)); - assert_param(IS_OPAMP_TRIMMINGVALUE(hopamp->Init.TrimmingValueN)); - } - - /* Init SYSCFG and the low level hardware to access opamp */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - 800557e: 4b40 ldr r3, [pc, #256] ; (8005680 ) - 8005580: 699b ldr r3, [r3, #24] - 8005582: 4a3f ldr r2, [pc, #252] ; (8005680 ) - 8005584: f043 0301 orr.w r3, r3, #1 - 8005588: 6193 str r3, [r2, #24] - 800558a: 4b3d ldr r3, [pc, #244] ; (8005680 ) - 800558c: 699b ldr r3, [r3, #24] - 800558e: f003 0301 and.w r3, r3, #1 - 8005592: 60bb str r3, [r7, #8] - 8005594: 68bb ldr r3, [r7, #8] - - if (hopamp->State == HAL_OPAMP_STATE_RESET) - 8005596: 687b ldr r3, [r7, #4] - 8005598: f893 3032 ldrb.w r3, [r3, #50] ; 0x32 - 800559c: b2db uxtb r3, r3 - 800559e: 2b00 cmp r3, #0 - 80055a0: d103 bne.n 80055aa - { - /* Allocate lock resource and initialize it */ - hopamp->Lock = HAL_UNLOCKED; - 80055a2: 687b ldr r3, [r7, #4] - 80055a4: 2200 movs r2, #0 - 80055a6: f883 2031 strb.w r2, [r3, #49] ; 0x31 - -#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1) - hopamp->MspInitCallback(hopamp); -#else - /* Call MSP init function */ - HAL_OPAMP_MspInit(hopamp); - 80055aa: 6878 ldr r0, [r7, #4] - 80055ac: f7fd f938 bl 8002820 - /* check if OPAMP_PGA_MODE & in Follower mode */ - /* - InvertingInput */ - /* - InvertingInputSecondary */ - /* are Not Applicable */ - - if ((hopamp->Init.Mode == OPAMP_PGA_MODE) || (hopamp->Init.Mode == OPAMP_FOLLOWER_MODE)) - 80055b0: 687b ldr r3, [r7, #4] - 80055b2: 685b ldr r3, [r3, #4] - 80055b4: 2b40 cmp r3, #64 ; 0x40 - 80055b6: d003 beq.n 80055c0 - 80055b8: 687b ldr r3, [r7, #4] - 80055ba: 685b ldr r3, [r3, #4] - 80055bc: 2b60 cmp r3, #96 ; 0x60 - 80055be: d125 bne.n 800560c - { - MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_UPDATE_PARAMETERS_INIT_MASK, \ - 80055c0: 687b ldr r3, [r7, #4] - 80055c2: 681b ldr r3, [r3, #0] - 80055c4: 681a ldr r2, [r3, #0] - 80055c6: 4b2f ldr r3, [pc, #188] ; (8005684 ) - 80055c8: 4013 ands r3, r2 - 80055ca: 687a ldr r2, [r7, #4] - 80055cc: 6851 ldr r1, [r2, #4] - 80055ce: 687a ldr r2, [r7, #4] - 80055d0: 68d2 ldr r2, [r2, #12] - 80055d2: 4311 orrs r1, r2 - 80055d4: 687a ldr r2, [r7, #4] - 80055d6: 6912 ldr r2, [r2, #16] - 80055d8: 4311 orrs r1, r2 - 80055da: 687a ldr r2, [r7, #4] - 80055dc: 6992 ldr r2, [r2, #24] - 80055de: 4311 orrs r1, r2 - 80055e0: 687a ldr r2, [r7, #4] - 80055e2: 69d2 ldr r2, [r2, #28] - 80055e4: 4311 orrs r1, r2 - 80055e6: 687a ldr r2, [r7, #4] - 80055e8: 6a12 ldr r2, [r2, #32] - 80055ea: 4311 orrs r1, r2 - 80055ec: 687a ldr r2, [r7, #4] - 80055ee: 6a52 ldr r2, [r2, #36] ; 0x24 - 80055f0: 4311 orrs r1, r2 - 80055f2: 687a ldr r2, [r7, #4] - 80055f4: 6a92 ldr r2, [r2, #40] ; 0x28 - 80055f6: 04d2 lsls r2, r2, #19 - 80055f8: 4311 orrs r1, r2 - 80055fa: 687a ldr r2, [r7, #4] - 80055fc: 6ad2 ldr r2, [r2, #44] ; 0x2c - 80055fe: 0612 lsls r2, r2, #24 - 8005600: 4311 orrs r1, r2 - 8005602: 687a ldr r2, [r7, #4] - 8005604: 6812 ldr r2, [r2, #0] - 8005606: 430b orrs r3, r1 - 8005608: 6013 str r3, [r2, #0] - 800560a: e02a b.n 8005662 - (hopamp->Init.TrimmingValueN << OPAMP_INPUT_INVERTING)); - - } - else /* OPAMP_STANDALONE_MODE */ - { - MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_UPDATE_PARAMETERS_INIT_MASK, \ - 800560c: 687b ldr r3, [r7, #4] - 800560e: 681b ldr r3, [r3, #0] - 8005610: 681a ldr r2, [r3, #0] - 8005612: 4b1c ldr r3, [pc, #112] ; (8005684 ) - 8005614: 4013 ands r3, r2 - 8005616: 687a ldr r2, [r7, #4] - 8005618: 6851 ldr r1, [r2, #4] - 800561a: 687a ldr r2, [r7, #4] - 800561c: 6892 ldr r2, [r2, #8] - 800561e: 4311 orrs r1, r2 - 8005620: 687a ldr r2, [r7, #4] - 8005622: 68d2 ldr r2, [r2, #12] - 8005624: 4311 orrs r1, r2 - 8005626: 687a ldr r2, [r7, #4] - 8005628: 6912 ldr r2, [r2, #16] - 800562a: 4311 orrs r1, r2 - 800562c: 687a ldr r2, [r7, #4] - 800562e: 6952 ldr r2, [r2, #20] - 8005630: 4311 orrs r1, r2 - 8005632: 687a ldr r2, [r7, #4] - 8005634: 6992 ldr r2, [r2, #24] - 8005636: 4311 orrs r1, r2 - 8005638: 687a ldr r2, [r7, #4] - 800563a: 69d2 ldr r2, [r2, #28] - 800563c: 4311 orrs r1, r2 - 800563e: 687a ldr r2, [r7, #4] - 8005640: 6a12 ldr r2, [r2, #32] - 8005642: 4311 orrs r1, r2 - 8005644: 687a ldr r2, [r7, #4] - 8005646: 6a52 ldr r2, [r2, #36] ; 0x24 - 8005648: 4311 orrs r1, r2 - 800564a: 687a ldr r2, [r7, #4] - 800564c: 6a92 ldr r2, [r2, #40] ; 0x28 - 800564e: 04d2 lsls r2, r2, #19 - 8005650: 4311 orrs r1, r2 - 8005652: 687a ldr r2, [r7, #4] - 8005654: 6ad2 ldr r2, [r2, #44] ; 0x2c - 8005656: 0612 lsls r2, r2, #24 - 8005658: 4311 orrs r1, r2 - 800565a: 687a ldr r2, [r7, #4] - 800565c: 6812 ldr r2, [r2, #0] - 800565e: 430b orrs r3, r1 - 8005660: 6013 str r3, [r2, #0] - (hopamp->Init.TrimmingValueP << OPAMP_INPUT_NONINVERTING) | \ - (hopamp->Init.TrimmingValueN << OPAMP_INPUT_INVERTING)); - } - - /* Update the OPAMP state*/ - if (hopamp->State == HAL_OPAMP_STATE_RESET) - 8005662: 687b ldr r3, [r7, #4] - 8005664: f893 3032 ldrb.w r3, [r3, #50] ; 0x32 - 8005668: b2db uxtb r3, r3 - 800566a: 2b00 cmp r3, #0 - 800566c: d103 bne.n 8005676 - { - /* From RESET state to READY State */ - hopamp->State = HAL_OPAMP_STATE_READY; - 800566e: 687b ldr r3, [r7, #4] - 8005670: 2201 movs r2, #1 - 8005672: f883 2032 strb.w r2, [r3, #50] ; 0x32 - } - /* else: remain in READY or BUSY state (no update) */ - - return status; - 8005676: 7bfb ldrb r3, [r7, #15] - } -} - 8005678: 4618 mov r0, r3 - 800567a: 3710 adds r7, #16 - 800567c: 46bd mov sp, r7 - 800567e: bd80 pop {r7, pc} - 8005680: 40021000 .word 0x40021000 - 8005684: e0003811 .word 0xe0003811 - -08005688 : - * @param hopamp OPAMP handle - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp) -{ - 8005688: b480 push {r7} - 800568a: b085 sub sp, #20 - 800568c: af00 add r7, sp, #0 - 800568e: 6078 str r0, [r7, #4] - HAL_StatusTypeDef status = HAL_OK; - 8005690: 2300 movs r3, #0 - 8005692: 73fb strb r3, [r7, #15] - - /* Check the OPAMP handle allocation */ - /* Check if OPAMP locked */ - if (hopamp == NULL) - 8005694: 687b ldr r3, [r7, #4] - 8005696: 2b00 cmp r3, #0 - 8005698: d102 bne.n 80056a0 - { - status = HAL_ERROR; - 800569a: 2301 movs r3, #1 - 800569c: 73fb strb r3, [r7, #15] - 800569e: e01d b.n 80056dc - } - else if (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) - 80056a0: 687b ldr r3, [r7, #4] - 80056a2: f893 3032 ldrb.w r3, [r3, #50] ; 0x32 - 80056a6: b2db uxtb r3, r3 - 80056a8: 2b05 cmp r3, #5 - 80056aa: d102 bne.n 80056b2 - - { - status = HAL_ERROR; - 80056ac: 2301 movs r3, #1 - 80056ae: 73fb strb r3, [r7, #15] - 80056b0: e014 b.n 80056dc - else - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - - if (hopamp->State == HAL_OPAMP_STATE_READY) - 80056b2: 687b ldr r3, [r7, #4] - 80056b4: f893 3032 ldrb.w r3, [r3, #50] ; 0x32 - 80056b8: b2db uxtb r3, r3 - 80056ba: 2b01 cmp r3, #1 - 80056bc: d10c bne.n 80056d8 - { - /* Enable the selected opamp */ - SET_BIT(hopamp->Instance->CSR, OPAMP_CSR_OPAMPxEN); - 80056be: 687b ldr r3, [r7, #4] - 80056c0: 681b ldr r3, [r3, #0] - 80056c2: 681a ldr r2, [r3, #0] - 80056c4: 687b ldr r3, [r7, #4] - 80056c6: 681b ldr r3, [r3, #0] - 80056c8: f042 0201 orr.w r2, r2, #1 - 80056cc: 601a str r2, [r3, #0] - - /* Update the OPAMP state*/ - /* From HAL_OPAMP_STATE_READY to HAL_OPAMP_STATE_BUSY */ - hopamp->State = HAL_OPAMP_STATE_BUSY; - 80056ce: 687b ldr r3, [r7, #4] - 80056d0: 2204 movs r2, #4 - 80056d2: f883 2032 strb.w r2, [r3, #50] ; 0x32 - 80056d6: e001 b.n 80056dc - } - else - { - status = HAL_ERROR; - 80056d8: 2301 movs r3, #1 - 80056da: 73fb strb r3, [r7, #15] - } - } - return status; - 80056dc: 7bfb ldrb r3, [r7, #15] -} - 80056de: 4618 mov r0, r3 - 80056e0: 3714 adds r7, #20 - 80056e2: 46bd mov sp, r7 - 80056e4: f85d 7b04 ldr.w r7, [sp], #4 - 80056e8: 4770 bx lr - -080056ea : - * @brief This function handles PCD interrupt request. - * @param hpcd PCD handle - * @retval HAL status - */ -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) -{ - 80056ea: b580 push {r7, lr} - 80056ec: b082 sub sp, #8 - 80056ee: af00 add r7, sp, #0 - 80056f0: 6078 str r0, [r7, #4] - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR)) - 80056f2: 687b ldr r3, [r7, #4] - 80056f4: 681b ldr r3, [r3, #0] - 80056f6: 4618 mov r0, r3 - 80056f8: f004 ff98 bl 800a62c - 80056fc: 4603 mov r3, r0 - 80056fe: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8005702: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8005706: d102 bne.n 800570e - { - /* servicing of the endpoint correct transfer interrupt */ - /* clear of the CTR flag into the sub */ - (void)PCD_EP_ISR_Handler(hpcd); - 8005708: 6878 ldr r0, [r7, #4] - 800570a: f000 fa91 bl 8005c30 - } - - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_RESET)) - 800570e: 687b ldr r3, [r7, #4] - 8005710: 681b ldr r3, [r3, #0] - 8005712: 4618 mov r0, r3 - 8005714: f004 ff8a bl 800a62c - 8005718: 4603 mov r3, r0 - 800571a: f403 6380 and.w r3, r3, #1024 ; 0x400 - 800571e: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8005722: d112 bne.n 800574a - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); - 8005724: 687b ldr r3, [r7, #4] - 8005726: 681b ldr r3, [r3, #0] - 8005728: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 800572c: b29a uxth r2, r3 - 800572e: 687b ldr r3, [r7, #4] - 8005730: 681b ldr r3, [r3, #0] - 8005732: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 8005736: b292 uxth r2, r2 - 8005738: f8a3 2044 strh.w r2, [r3, #68] ; 0x44 - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->ResetCallback(hpcd); -#else - HAL_PCD_ResetCallback(hpcd); - 800573c: 6878 ldr r0, [r7, #4] - 800573e: f006 fa3a bl 800bbb6 -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - (void)HAL_PCD_SetAddress(hpcd, 0U); - 8005742: 2100 movs r1, #0 - 8005744: 6878 ldr r0, [r7, #4] - 8005746: f000 f8d2 bl 80058ee - } - - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_PMAOVR)) - 800574a: 687b ldr r3, [r7, #4] - 800574c: 681b ldr r3, [r3, #0] - 800574e: 4618 mov r0, r3 - 8005750: f004 ff6c bl 800a62c - 8005754: 4603 mov r3, r0 - 8005756: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 800575a: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 800575e: d10b bne.n 8005778 - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); - 8005760: 687b ldr r3, [r7, #4] - 8005762: 681b ldr r3, [r3, #0] - 8005764: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 8005768: b29a uxth r2, r3 - 800576a: 687b ldr r3, [r7, #4] - 800576c: 681b ldr r3, [r3, #0] - 800576e: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 8005772: b292 uxth r2, r2 - 8005774: f8a3 2044 strh.w r2, [r3, #68] ; 0x44 - } - - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ERR)) - 8005778: 687b ldr r3, [r7, #4] - 800577a: 681b ldr r3, [r3, #0] - 800577c: 4618 mov r0, r3 - 800577e: f004 ff55 bl 800a62c - 8005782: 4603 mov r3, r0 - 8005784: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 8005788: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 800578c: d10b bne.n 80057a6 - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); - 800578e: 687b ldr r3, [r7, #4] - 8005790: 681b ldr r3, [r3, #0] - 8005792: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 8005796: b29a uxth r2, r3 - 8005798: 687b ldr r3, [r7, #4] - 800579a: 681b ldr r3, [r3, #0] - 800579c: f422 5200 bic.w r2, r2, #8192 ; 0x2000 - 80057a0: b292 uxth r2, r2 - 80057a2: f8a3 2044 strh.w r2, [r3, #68] ; 0x44 - } - - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP)) - 80057a6: 687b ldr r3, [r7, #4] - 80057a8: 681b ldr r3, [r3, #0] - 80057aa: 4618 mov r0, r3 - 80057ac: f004 ff3e bl 800a62c - 80057b0: 4603 mov r3, r0 - 80057b2: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 80057b6: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80057ba: d126 bne.n 800580a - { - hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LPMODE); - 80057bc: 687b ldr r3, [r7, #4] - 80057be: 681b ldr r3, [r3, #0] - 80057c0: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40 - 80057c4: b29a uxth r2, r3 - 80057c6: 687b ldr r3, [r7, #4] - 80057c8: 681b ldr r3, [r3, #0] - 80057ca: f022 0204 bic.w r2, r2, #4 - 80057ce: b292 uxth r2, r2 - 80057d0: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 - hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); - 80057d4: 687b ldr r3, [r7, #4] - 80057d6: 681b ldr r3, [r3, #0] - 80057d8: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40 - 80057dc: b29a uxth r2, r3 - 80057de: 687b ldr r3, [r7, #4] - 80057e0: 681b ldr r3, [r3, #0] - 80057e2: f022 0208 bic.w r2, r2, #8 - 80057e6: b292 uxth r2, r2 - 80057e8: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->ResumeCallback(hpcd); -#else - HAL_PCD_ResumeCallback(hpcd); - 80057ec: 6878 ldr r0, [r7, #4] - 80057ee: f006 fa1b bl 800bc28 -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); - 80057f2: 687b ldr r3, [r7, #4] - 80057f4: 681b ldr r3, [r3, #0] - 80057f6: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 80057fa: b29a uxth r2, r3 - 80057fc: 687b ldr r3, [r7, #4] - 80057fe: 681b ldr r3, [r3, #0] - 8005800: f422 5280 bic.w r2, r2, #4096 ; 0x1000 - 8005804: b292 uxth r2, r2 - 8005806: f8a3 2044 strh.w r2, [r3, #68] ; 0x44 - } - - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP)) - 800580a: 687b ldr r3, [r7, #4] - 800580c: 681b ldr r3, [r3, #0] - 800580e: 4618 mov r0, r3 - 8005810: f004 ff0c bl 800a62c - 8005814: 4603 mov r3, r0 - 8005816: f403 6300 and.w r3, r3, #2048 ; 0x800 - 800581a: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 800581e: d131 bne.n 8005884 - { - /* Force low-power mode in the macrocell */ - hpcd->Instance->CNTR |= USB_CNTR_FSUSP; - 8005820: 687b ldr r3, [r7, #4] - 8005822: 681b ldr r3, [r3, #0] - 8005824: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40 - 8005828: b29a uxth r2, r3 - 800582a: 687b ldr r3, [r7, #4] - 800582c: 681b ldr r3, [r3, #0] - 800582e: f042 0208 orr.w r2, r2, #8 - 8005832: b292 uxth r2, r2 - 8005834: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 - - /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); - 8005838: 687b ldr r3, [r7, #4] - 800583a: 681b ldr r3, [r3, #0] - 800583c: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 8005840: b29a uxth r2, r3 - 8005842: 687b ldr r3, [r7, #4] - 8005844: 681b ldr r3, [r3, #0] - 8005846: f422 6200 bic.w r2, r2, #2048 ; 0x800 - 800584a: b292 uxth r2, r2 - 800584c: f8a3 2044 strh.w r2, [r3, #68] ; 0x44 - - hpcd->Instance->CNTR |= USB_CNTR_LPMODE; - 8005850: 687b ldr r3, [r7, #4] - 8005852: 681b ldr r3, [r3, #0] - 8005854: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40 - 8005858: b29a uxth r2, r3 - 800585a: 687b ldr r3, [r7, #4] - 800585c: 681b ldr r3, [r3, #0] - 800585e: f042 0204 orr.w r2, r2, #4 - 8005862: b292 uxth r2, r2 - 8005864: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 - - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP) == 0U) - 8005868: 687b ldr r3, [r7, #4] - 800586a: 681b ldr r3, [r3, #0] - 800586c: 4618 mov r0, r3 - 800586e: f004 fedd bl 800a62c - 8005872: 4603 mov r3, r0 - 8005874: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8005878: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 800587c: d002 beq.n 8005884 - { -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->SuspendCallback(hpcd); -#else - HAL_PCD_SuspendCallback(hpcd); - 800587e: 6878 ldr r0, [r7, #4] - 8005880: f006 f9b8 bl 800bbf4 -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - } - - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SOF)) - 8005884: 687b ldr r3, [r7, #4] - 8005886: 681b ldr r3, [r3, #0] - 8005888: 4618 mov r0, r3 - 800588a: f004 fecf bl 800a62c - 800588e: 4603 mov r3, r0 - 8005890: f403 7300 and.w r3, r3, #512 ; 0x200 - 8005894: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8005898: d10e bne.n 80058b8 - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); - 800589a: 687b ldr r3, [r7, #4] - 800589c: 681b ldr r3, [r3, #0] - 800589e: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 80058a2: b29a uxth r2, r3 - 80058a4: 687b ldr r3, [r7, #4] - 80058a6: 681b ldr r3, [r3, #0] - 80058a8: f422 7200 bic.w r2, r2, #512 ; 0x200 - 80058ac: b292 uxth r2, r2 - 80058ae: f8a3 2044 strh.w r2, [r3, #68] ; 0x44 - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->SOFCallback(hpcd); -#else - HAL_PCD_SOFCallback(hpcd); - 80058b2: 6878 ldr r0, [r7, #4] - 80058b4: f006 f971 bl 800bb9a -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ESOF)) - 80058b8: 687b ldr r3, [r7, #4] - 80058ba: 681b ldr r3, [r3, #0] - 80058bc: 4618 mov r0, r3 - 80058be: f004 feb5 bl 800a62c - 80058c2: 4603 mov r3, r0 - 80058c4: f403 7380 and.w r3, r3, #256 ; 0x100 - 80058c8: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80058cc: d10b bne.n 80058e6 - { - /* clear ESOF flag in ISTR */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); - 80058ce: 687b ldr r3, [r7, #4] - 80058d0: 681b ldr r3, [r3, #0] - 80058d2: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 80058d6: b29a uxth r2, r3 - 80058d8: 687b ldr r3, [r7, #4] - 80058da: 681b ldr r3, [r3, #0] - 80058dc: f422 7280 bic.w r2, r2, #256 ; 0x100 - 80058e0: b292 uxth r2, r2 - 80058e2: f8a3 2044 strh.w r2, [r3, #68] ; 0x44 - } -} - 80058e6: bf00 nop - 80058e8: 3708 adds r7, #8 - 80058ea: 46bd mov sp, r7 - 80058ec: bd80 pop {r7, pc} - -080058ee : - * @param hpcd PCD handle - * @param address new device address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) -{ - 80058ee: b580 push {r7, lr} - 80058f0: b082 sub sp, #8 - 80058f2: af00 add r7, sp, #0 - 80058f4: 6078 str r0, [r7, #4] - 80058f6: 460b mov r3, r1 - 80058f8: 70fb strb r3, [r7, #3] - __HAL_LOCK(hpcd); - 80058fa: 687b ldr r3, [r7, #4] - 80058fc: f893 3228 ldrb.w r3, [r3, #552] ; 0x228 - 8005900: 2b01 cmp r3, #1 - 8005902: d101 bne.n 8005908 - 8005904: 2302 movs r3, #2 - 8005906: e013 b.n 8005930 - 8005908: 687b ldr r3, [r7, #4] - 800590a: 2201 movs r2, #1 - 800590c: f883 2228 strb.w r2, [r3, #552] ; 0x228 - hpcd->USB_Address = address; - 8005910: 687b ldr r3, [r7, #4] - 8005912: 78fa ldrb r2, [r7, #3] - 8005914: f883 2024 strb.w r2, [r3, #36] ; 0x24 - (void)USB_SetDevAddress(hpcd->Instance, address); - 8005918: 687b ldr r3, [r7, #4] - 800591a: 681b ldr r3, [r3, #0] - 800591c: 78fa ldrb r2, [r7, #3] - 800591e: 4611 mov r1, r2 - 8005920: 4618 mov r0, r3 - 8005922: f004 fe6f bl 800a604 - __HAL_UNLOCK(hpcd); - 8005926: 687b ldr r3, [r7, #4] - 8005928: 2200 movs r2, #0 - 800592a: f883 2228 strb.w r2, [r3, #552] ; 0x228 - return HAL_OK; - 800592e: 2300 movs r3, #0 -} - 8005930: 4618 mov r0, r3 - 8005932: 3708 adds r7, #8 - 8005934: 46bd mov sp, r7 - 8005936: bd80 pop {r7, pc} - -08005938 : - * @param ep_mps endpoint max packet size - * @param ep_type endpoint type - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) -{ - 8005938: b580 push {r7, lr} - 800593a: b084 sub sp, #16 - 800593c: af00 add r7, sp, #0 - 800593e: 6078 str r0, [r7, #4] - 8005940: 4608 mov r0, r1 - 8005942: 4611 mov r1, r2 - 8005944: 461a mov r2, r3 - 8005946: 4603 mov r3, r0 - 8005948: 70fb strb r3, [r7, #3] - 800594a: 460b mov r3, r1 - 800594c: 803b strh r3, [r7, #0] - 800594e: 4613 mov r3, r2 - 8005950: 70bb strb r3, [r7, #2] - HAL_StatusTypeDef ret = HAL_OK; - 8005952: 2300 movs r3, #0 - 8005954: 72fb strb r3, [r7, #11] - PCD_EPTypeDef *ep; - - if ((ep_addr & 0x80U) == 0x80U) - 8005956: f997 3003 ldrsb.w r3, [r7, #3] - 800595a: 2b00 cmp r3, #0 - 800595c: da0b bge.n 8005976 - { - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - 800595e: 78fb ldrb r3, [r7, #3] - 8005960: f003 0307 and.w r3, r3, #7 - 8005964: 015b lsls r3, r3, #5 - 8005966: 3328 adds r3, #40 ; 0x28 - 8005968: 687a ldr r2, [r7, #4] - 800596a: 4413 add r3, r2 - 800596c: 60fb str r3, [r7, #12] - ep->is_in = 1U; - 800596e: 68fb ldr r3, [r7, #12] - 8005970: 2201 movs r2, #1 - 8005972: 705a strb r2, [r3, #1] - 8005974: e00b b.n 800598e - } - else - { - ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; - 8005976: 78fb ldrb r3, [r7, #3] - 8005978: f003 0307 and.w r3, r3, #7 - 800597c: 015b lsls r3, r3, #5 - 800597e: f503 7394 add.w r3, r3, #296 ; 0x128 - 8005982: 687a ldr r2, [r7, #4] - 8005984: 4413 add r3, r2 - 8005986: 60fb str r3, [r7, #12] - ep->is_in = 0U; - 8005988: 68fb ldr r3, [r7, #12] - 800598a: 2200 movs r2, #0 - 800598c: 705a strb r2, [r3, #1] - } - - ep->num = ep_addr & EP_ADDR_MSK; - 800598e: 78fb ldrb r3, [r7, #3] - 8005990: f003 0307 and.w r3, r3, #7 - 8005994: b2da uxtb r2, r3 - 8005996: 68fb ldr r3, [r7, #12] - 8005998: 701a strb r2, [r3, #0] - ep->maxpacket = ep_mps; - 800599a: 883a ldrh r2, [r7, #0] - 800599c: 68fb ldr r3, [r7, #12] - 800599e: 611a str r2, [r3, #16] - ep->type = ep_type; - 80059a0: 68fb ldr r3, [r7, #12] - 80059a2: 78ba ldrb r2, [r7, #2] - 80059a4: 70da strb r2, [r3, #3] - - if (ep->is_in != 0U) - 80059a6: 68fb ldr r3, [r7, #12] - 80059a8: 785b ldrb r3, [r3, #1] - 80059aa: 2b00 cmp r3, #0 - 80059ac: d004 beq.n 80059b8 - { - /* Assign a Tx FIFO */ - ep->tx_fifo_num = ep->num; - 80059ae: 68fb ldr r3, [r7, #12] - 80059b0: 781b ldrb r3, [r3, #0] - 80059b2: b29a uxth r2, r3 - 80059b4: 68fb ldr r3, [r7, #12] - 80059b6: 81da strh r2, [r3, #14] - } - /* Set initial data PID. */ - if (ep_type == EP_TYPE_BULK) - 80059b8: 78bb ldrb r3, [r7, #2] - 80059ba: 2b02 cmp r3, #2 - 80059bc: d102 bne.n 80059c4 - { - ep->data_pid_start = 0U; - 80059be: 68fb ldr r3, [r7, #12] - 80059c0: 2200 movs r2, #0 - 80059c2: 711a strb r2, [r3, #4] - } - - __HAL_LOCK(hpcd); - 80059c4: 687b ldr r3, [r7, #4] - 80059c6: f893 3228 ldrb.w r3, [r3, #552] ; 0x228 - 80059ca: 2b01 cmp r3, #1 - 80059cc: d101 bne.n 80059d2 - 80059ce: 2302 movs r3, #2 - 80059d0: e00e b.n 80059f0 - 80059d2: 687b ldr r3, [r7, #4] - 80059d4: 2201 movs r2, #1 - 80059d6: f883 2228 strb.w r2, [r3, #552] ; 0x228 - (void)USB_ActivateEndpoint(hpcd->Instance, ep); - 80059da: 687b ldr r3, [r7, #4] - 80059dc: 681b ldr r3, [r3, #0] - 80059de: 68f9 ldr r1, [r7, #12] - 80059e0: 4618 mov r0, r3 - 80059e2: f003 ff73 bl 80098cc - __HAL_UNLOCK(hpcd); - 80059e6: 687b ldr r3, [r7, #4] - 80059e8: 2200 movs r2, #0 - 80059ea: f883 2228 strb.w r2, [r3, #552] ; 0x228 - - return ret; - 80059ee: 7afb ldrb r3, [r7, #11] -} - 80059f0: 4618 mov r0, r3 - 80059f2: 3710 adds r7, #16 - 80059f4: 46bd mov sp, r7 - 80059f6: bd80 pop {r7, pc} - -080059f8 : - * @param pBuf pointer to the reception buffer - * @param len amount of data to be received - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - 80059f8: b580 push {r7, lr} - 80059fa: b086 sub sp, #24 - 80059fc: af00 add r7, sp, #0 - 80059fe: 60f8 str r0, [r7, #12] - 8005a00: 607a str r2, [r7, #4] - 8005a02: 603b str r3, [r7, #0] - 8005a04: 460b mov r3, r1 - 8005a06: 72fb strb r3, [r7, #11] - PCD_EPTypeDef *ep; - - ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; - 8005a08: 7afb ldrb r3, [r7, #11] - 8005a0a: f003 0307 and.w r3, r3, #7 - 8005a0e: 015b lsls r3, r3, #5 - 8005a10: f503 7394 add.w r3, r3, #296 ; 0x128 - 8005a14: 68fa ldr r2, [r7, #12] - 8005a16: 4413 add r3, r2 - 8005a18: 617b str r3, [r7, #20] - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - 8005a1a: 697b ldr r3, [r7, #20] - 8005a1c: 687a ldr r2, [r7, #4] - 8005a1e: 615a str r2, [r3, #20] - ep->xfer_len = len; - 8005a20: 697b ldr r3, [r7, #20] - 8005a22: 683a ldr r2, [r7, #0] - 8005a24: 619a str r2, [r3, #24] - ep->xfer_count = 0U; - 8005a26: 697b ldr r3, [r7, #20] - 8005a28: 2200 movs r2, #0 - 8005a2a: 61da str r2, [r3, #28] - ep->is_in = 0U; - 8005a2c: 697b ldr r3, [r7, #20] - 8005a2e: 2200 movs r2, #0 - 8005a30: 705a strb r2, [r3, #1] - ep->num = ep_addr & EP_ADDR_MSK; - 8005a32: 7afb ldrb r3, [r7, #11] - 8005a34: f003 0307 and.w r3, r3, #7 - 8005a38: b2da uxtb r2, r3 - 8005a3a: 697b ldr r3, [r7, #20] - 8005a3c: 701a strb r2, [r3, #0] - - if ((ep_addr & EP_ADDR_MSK) == 0U) - 8005a3e: 7afb ldrb r3, [r7, #11] - 8005a40: f003 0307 and.w r3, r3, #7 - 8005a44: 2b00 cmp r3, #0 - 8005a46: d106 bne.n 8005a56 - { - (void)USB_EP0StartXfer(hpcd->Instance, ep); - 8005a48: 68fb ldr r3, [r7, #12] - 8005a4a: 681b ldr r3, [r3, #0] - 8005a4c: 6979 ldr r1, [r7, #20] - 8005a4e: 4618 mov r0, r3 - 8005a50: f004 fa30 bl 8009eb4 - 8005a54: e005 b.n 8005a62 - } - else - { - (void)USB_EPStartXfer(hpcd->Instance, ep); - 8005a56: 68fb ldr r3, [r7, #12] - 8005a58: 681b ldr r3, [r3, #0] - 8005a5a: 6979 ldr r1, [r7, #20] - 8005a5c: 4618 mov r0, r3 - 8005a5e: f004 fa29 bl 8009eb4 - } - - return HAL_OK; - 8005a62: 2300 movs r3, #0 -} - 8005a64: 4618 mov r0, r3 - 8005a66: 3718 adds r7, #24 - 8005a68: 46bd mov sp, r7 - 8005a6a: bd80 pop {r7, pc} - -08005a6c : - * @param pBuf pointer to the transmission buffer - * @param len amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - 8005a6c: b580 push {r7, lr} - 8005a6e: b086 sub sp, #24 - 8005a70: af00 add r7, sp, #0 - 8005a72: 60f8 str r0, [r7, #12] - 8005a74: 607a str r2, [r7, #4] - 8005a76: 603b str r3, [r7, #0] - 8005a78: 460b mov r3, r1 - 8005a7a: 72fb strb r3, [r7, #11] - PCD_EPTypeDef *ep; - - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - 8005a7c: 7afb ldrb r3, [r7, #11] - 8005a7e: f003 0307 and.w r3, r3, #7 - 8005a82: 015b lsls r3, r3, #5 - 8005a84: 3328 adds r3, #40 ; 0x28 - 8005a86: 68fa ldr r2, [r7, #12] - 8005a88: 4413 add r3, r2 - 8005a8a: 617b str r3, [r7, #20] - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - 8005a8c: 697b ldr r3, [r7, #20] - 8005a8e: 687a ldr r2, [r7, #4] - 8005a90: 615a str r2, [r3, #20] - ep->xfer_len = len; - 8005a92: 697b ldr r3, [r7, #20] - 8005a94: 683a ldr r2, [r7, #0] - 8005a96: 619a str r2, [r3, #24] - ep->xfer_count = 0U; - 8005a98: 697b ldr r3, [r7, #20] - 8005a9a: 2200 movs r2, #0 - 8005a9c: 61da str r2, [r3, #28] - ep->is_in = 1U; - 8005a9e: 697b ldr r3, [r7, #20] - 8005aa0: 2201 movs r2, #1 - 8005aa2: 705a strb r2, [r3, #1] - ep->num = ep_addr & EP_ADDR_MSK; - 8005aa4: 7afb ldrb r3, [r7, #11] - 8005aa6: f003 0307 and.w r3, r3, #7 - 8005aaa: b2da uxtb r2, r3 - 8005aac: 697b ldr r3, [r7, #20] - 8005aae: 701a strb r2, [r3, #0] - - if ((ep_addr & EP_ADDR_MSK) == 0U) - 8005ab0: 7afb ldrb r3, [r7, #11] - 8005ab2: f003 0307 and.w r3, r3, #7 - 8005ab6: 2b00 cmp r3, #0 - 8005ab8: d106 bne.n 8005ac8 - { - (void)USB_EP0StartXfer(hpcd->Instance, ep); - 8005aba: 68fb ldr r3, [r7, #12] - 8005abc: 681b ldr r3, [r3, #0] - 8005abe: 6979 ldr r1, [r7, #20] - 8005ac0: 4618 mov r0, r3 - 8005ac2: f004 f9f7 bl 8009eb4 - 8005ac6: e005 b.n 8005ad4 - } - else - { - (void)USB_EPStartXfer(hpcd->Instance, ep); - 8005ac8: 68fb ldr r3, [r7, #12] - 8005aca: 681b ldr r3, [r3, #0] - 8005acc: 6979 ldr r1, [r7, #20] - 8005ace: 4618 mov r0, r3 - 8005ad0: f004 f9f0 bl 8009eb4 - } - - return HAL_OK; - 8005ad4: 2300 movs r3, #0 -} - 8005ad6: 4618 mov r0, r3 - 8005ad8: 3718 adds r7, #24 - 8005ada: 46bd mov sp, r7 - 8005adc: bd80 pop {r7, pc} - -08005ade : - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - 8005ade: b580 push {r7, lr} - 8005ae0: b084 sub sp, #16 - 8005ae2: af00 add r7, sp, #0 - 8005ae4: 6078 str r0, [r7, #4] - 8005ae6: 460b mov r3, r1 - 8005ae8: 70fb strb r3, [r7, #3] - PCD_EPTypeDef *ep; - - if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) - 8005aea: 78fb ldrb r3, [r7, #3] - 8005aec: f003 0207 and.w r2, r3, #7 - 8005af0: 687b ldr r3, [r7, #4] - 8005af2: 685b ldr r3, [r3, #4] - 8005af4: 429a cmp r2, r3 - 8005af6: d901 bls.n 8005afc - { - return HAL_ERROR; - 8005af8: 2301 movs r3, #1 - 8005afa: e046 b.n 8005b8a - } - - if ((0x80U & ep_addr) == 0x80U) - 8005afc: f997 3003 ldrsb.w r3, [r7, #3] - 8005b00: 2b00 cmp r3, #0 - 8005b02: da0b bge.n 8005b1c - { - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - 8005b04: 78fb ldrb r3, [r7, #3] - 8005b06: f003 0307 and.w r3, r3, #7 - 8005b0a: 015b lsls r3, r3, #5 - 8005b0c: 3328 adds r3, #40 ; 0x28 - 8005b0e: 687a ldr r2, [r7, #4] - 8005b10: 4413 add r3, r2 - 8005b12: 60fb str r3, [r7, #12] - ep->is_in = 1U; - 8005b14: 68fb ldr r3, [r7, #12] - 8005b16: 2201 movs r2, #1 - 8005b18: 705a strb r2, [r3, #1] - 8005b1a: e009 b.n 8005b30 - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - 8005b1c: 78fb ldrb r3, [r7, #3] - 8005b1e: 015b lsls r3, r3, #5 - 8005b20: f503 7394 add.w r3, r3, #296 ; 0x128 - 8005b24: 687a ldr r2, [r7, #4] - 8005b26: 4413 add r3, r2 - 8005b28: 60fb str r3, [r7, #12] - ep->is_in = 0U; - 8005b2a: 68fb ldr r3, [r7, #12] - 8005b2c: 2200 movs r2, #0 - 8005b2e: 705a strb r2, [r3, #1] - } - - ep->is_stall = 1U; - 8005b30: 68fb ldr r3, [r7, #12] - 8005b32: 2201 movs r2, #1 - 8005b34: 709a strb r2, [r3, #2] - ep->num = ep_addr & EP_ADDR_MSK; - 8005b36: 78fb ldrb r3, [r7, #3] - 8005b38: f003 0307 and.w r3, r3, #7 - 8005b3c: b2da uxtb r2, r3 - 8005b3e: 68fb ldr r3, [r7, #12] - 8005b40: 701a strb r2, [r3, #0] - - __HAL_LOCK(hpcd); - 8005b42: 687b ldr r3, [r7, #4] - 8005b44: f893 3228 ldrb.w r3, [r3, #552] ; 0x228 - 8005b48: 2b01 cmp r3, #1 - 8005b4a: d101 bne.n 8005b50 - 8005b4c: 2302 movs r3, #2 - 8005b4e: e01c b.n 8005b8a - 8005b50: 687b ldr r3, [r7, #4] - 8005b52: 2201 movs r2, #1 - 8005b54: f883 2228 strb.w r2, [r3, #552] ; 0x228 - - (void)USB_EPSetStall(hpcd->Instance, ep); - 8005b58: 687b ldr r3, [r7, #4] - 8005b5a: 681b ldr r3, [r3, #0] - 8005b5c: 68f9 ldr r1, [r7, #12] - 8005b5e: 4618 mov r0, r3 - 8005b60: f004 fc7a bl 800a458 - if ((ep_addr & EP_ADDR_MSK) == 0U) - 8005b64: 78fb ldrb r3, [r7, #3] - 8005b66: f003 0307 and.w r3, r3, #7 - 8005b6a: 2b00 cmp r3, #0 - 8005b6c: d108 bne.n 8005b80 - { - (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup); - 8005b6e: 687b ldr r3, [r7, #4] - 8005b70: 681a ldr r2, [r3, #0] - 8005b72: 687b ldr r3, [r7, #4] - 8005b74: f503 730c add.w r3, r3, #560 ; 0x230 - 8005b78: 4619 mov r1, r3 - 8005b7a: 4610 mov r0, r2 - 8005b7c: f004 fd66 bl 800a64c - } - __HAL_UNLOCK(hpcd); - 8005b80: 687b ldr r3, [r7, #4] - 8005b82: 2200 movs r2, #0 - 8005b84: f883 2228 strb.w r2, [r3, #552] ; 0x228 - - return HAL_OK; - 8005b88: 2300 movs r3, #0 -} - 8005b8a: 4618 mov r0, r3 - 8005b8c: 3710 adds r7, #16 - 8005b8e: 46bd mov sp, r7 - 8005b90: bd80 pop {r7, pc} - -08005b92 : - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - 8005b92: b580 push {r7, lr} - 8005b94: b084 sub sp, #16 - 8005b96: af00 add r7, sp, #0 - 8005b98: 6078 str r0, [r7, #4] - 8005b9a: 460b mov r3, r1 - 8005b9c: 70fb strb r3, [r7, #3] - PCD_EPTypeDef *ep; - - if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) - 8005b9e: 78fb ldrb r3, [r7, #3] - 8005ba0: f003 020f and.w r2, r3, #15 - 8005ba4: 687b ldr r3, [r7, #4] - 8005ba6: 685b ldr r3, [r3, #4] - 8005ba8: 429a cmp r2, r3 - 8005baa: d901 bls.n 8005bb0 - { - return HAL_ERROR; - 8005bac: 2301 movs r3, #1 - 8005bae: e03a b.n 8005c26 - } - - if ((0x80U & ep_addr) == 0x80U) - 8005bb0: f997 3003 ldrsb.w r3, [r7, #3] - 8005bb4: 2b00 cmp r3, #0 - 8005bb6: da0b bge.n 8005bd0 - { - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - 8005bb8: 78fb ldrb r3, [r7, #3] - 8005bba: f003 0307 and.w r3, r3, #7 - 8005bbe: 015b lsls r3, r3, #5 - 8005bc0: 3328 adds r3, #40 ; 0x28 - 8005bc2: 687a ldr r2, [r7, #4] - 8005bc4: 4413 add r3, r2 - 8005bc6: 60fb str r3, [r7, #12] - ep->is_in = 1U; - 8005bc8: 68fb ldr r3, [r7, #12] - 8005bca: 2201 movs r2, #1 - 8005bcc: 705a strb r2, [r3, #1] - 8005bce: e00b b.n 8005be8 - } - else - { - ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; - 8005bd0: 78fb ldrb r3, [r7, #3] - 8005bd2: f003 0307 and.w r3, r3, #7 - 8005bd6: 015b lsls r3, r3, #5 - 8005bd8: f503 7394 add.w r3, r3, #296 ; 0x128 - 8005bdc: 687a ldr r2, [r7, #4] - 8005bde: 4413 add r3, r2 - 8005be0: 60fb str r3, [r7, #12] - ep->is_in = 0U; - 8005be2: 68fb ldr r3, [r7, #12] - 8005be4: 2200 movs r2, #0 - 8005be6: 705a strb r2, [r3, #1] - } - - ep->is_stall = 0U; - 8005be8: 68fb ldr r3, [r7, #12] - 8005bea: 2200 movs r2, #0 - 8005bec: 709a strb r2, [r3, #2] - ep->num = ep_addr & EP_ADDR_MSK; - 8005bee: 78fb ldrb r3, [r7, #3] - 8005bf0: f003 0307 and.w r3, r3, #7 - 8005bf4: b2da uxtb r2, r3 - 8005bf6: 68fb ldr r3, [r7, #12] - 8005bf8: 701a strb r2, [r3, #0] - - __HAL_LOCK(hpcd); - 8005bfa: 687b ldr r3, [r7, #4] - 8005bfc: f893 3228 ldrb.w r3, [r3, #552] ; 0x228 - 8005c00: 2b01 cmp r3, #1 - 8005c02: d101 bne.n 8005c08 - 8005c04: 2302 movs r3, #2 - 8005c06: e00e b.n 8005c26 - 8005c08: 687b ldr r3, [r7, #4] - 8005c0a: 2201 movs r2, #1 - 8005c0c: f883 2228 strb.w r2, [r3, #552] ; 0x228 - (void)USB_EPClearStall(hpcd->Instance, ep); - 8005c10: 687b ldr r3, [r7, #4] - 8005c12: 681b ldr r3, [r3, #0] - 8005c14: 68f9 ldr r1, [r7, #12] - 8005c16: 4618 mov r0, r3 - 8005c18: f004 fc60 bl 800a4dc - __HAL_UNLOCK(hpcd); - 8005c1c: 687b ldr r3, [r7, #4] - 8005c1e: 2200 movs r2, #0 - 8005c20: f883 2228 strb.w r2, [r3, #552] ; 0x228 - - return HAL_OK; - 8005c24: 2300 movs r3, #0 -} - 8005c26: 4618 mov r0, r3 - 8005c28: 3710 adds r7, #16 - 8005c2a: 46bd mov sp, r7 - 8005c2c: bd80 pop {r7, pc} - ... - -08005c30 : - * @brief This function handles PCD Endpoint interrupt request. - * @param hpcd PCD handle - * @retval HAL status - */ -static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) -{ - 8005c30: b590 push {r4, r7, lr} - 8005c32: b089 sub sp, #36 ; 0x24 - 8005c34: af00 add r7, sp, #0 - 8005c36: 6078 str r0, [r7, #4] - uint16_t wIstr; - uint16_t wEPVal; - uint8_t epindex; - - /* stay in loop while pending interrupts */ - while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) - 8005c38: e286 b.n 8006148 - { - wIstr = hpcd->Instance->ISTR; - 8005c3a: 687b ldr r3, [r7, #4] - 8005c3c: 681b ldr r3, [r3, #0] - 8005c3e: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 8005c42: 82fb strh r3, [r7, #22] - /* extract highest priority endpoint number */ - epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); - 8005c44: 8afb ldrh r3, [r7, #22] - 8005c46: b2db uxtb r3, r3 - 8005c48: f003 030f and.w r3, r3, #15 - 8005c4c: 757b strb r3, [r7, #21] - - if (epindex == 0U) - 8005c4e: 7d7b ldrb r3, [r7, #21] - 8005c50: 2b00 cmp r3, #0 - 8005c52: f040 8146 bne.w 8005ee2 - { - /* Decode and service control endpoint interrupt */ - - /* DIR bit = origin of the interrupt */ - if ((wIstr & USB_ISTR_DIR) == 0U) - 8005c56: 8afb ldrh r3, [r7, #22] - 8005c58: f003 0310 and.w r3, r3, #16 - 8005c5c: 2b00 cmp r3, #0 - 8005c5e: d151 bne.n 8005d04 - { - /* DIR = 0 */ - - /* DIR = 0 => IN int */ - /* DIR = 0 implies that (EP_CTR_TX = 1) always */ - PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); - 8005c60: 687b ldr r3, [r7, #4] - 8005c62: 681b ldr r3, [r3, #0] - 8005c64: 881b ldrh r3, [r3, #0] - 8005c66: b29b uxth r3, r3 - 8005c68: f423 43e1 bic.w r3, r3, #28800 ; 0x7080 - 8005c6c: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8005c70: b29c uxth r4, r3 - 8005c72: 687b ldr r3, [r7, #4] - 8005c74: 681a ldr r2, [r3, #0] - 8005c76: ea6f 4344 mvn.w r3, r4, lsl #17 - 8005c7a: ea6f 4353 mvn.w r3, r3, lsr #17 - 8005c7e: b29b uxth r3, r3 - 8005c80: 8013 strh r3, [r2, #0] - ep = &hpcd->IN_ep[0]; - 8005c82: 687b ldr r3, [r7, #4] - 8005c84: 3328 adds r3, #40 ; 0x28 - 8005c86: 60fb str r3, [r7, #12] - - ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - 8005c88: 687b ldr r3, [r7, #4] - 8005c8a: 681b ldr r3, [r3, #0] - 8005c8c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8005c90: b29b uxth r3, r3 - 8005c92: 461a mov r2, r3 - 8005c94: 68fb ldr r3, [r7, #12] - 8005c96: 781b ldrb r3, [r3, #0] - 8005c98: 00db lsls r3, r3, #3 - 8005c9a: 4413 add r3, r2 - 8005c9c: 3302 adds r3, #2 - 8005c9e: 005b lsls r3, r3, #1 - 8005ca0: 687a ldr r2, [r7, #4] - 8005ca2: 6812 ldr r2, [r2, #0] - 8005ca4: 4413 add r3, r2 - 8005ca6: f503 6380 add.w r3, r3, #1024 ; 0x400 - 8005caa: 881b ldrh r3, [r3, #0] - 8005cac: f3c3 0209 ubfx r2, r3, #0, #10 - 8005cb0: 68fb ldr r3, [r7, #12] - 8005cb2: 61da str r2, [r3, #28] - ep->xfer_buff += ep->xfer_count; - 8005cb4: 68fb ldr r3, [r7, #12] - 8005cb6: 695a ldr r2, [r3, #20] - 8005cb8: 68fb ldr r3, [r7, #12] - 8005cba: 69db ldr r3, [r3, #28] - 8005cbc: 441a add r2, r3 - 8005cbe: 68fb ldr r3, [r7, #12] - 8005cc0: 615a str r2, [r3, #20] - - /* TX COMPLETE */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataInStageCallback(hpcd, 0U); -#else - HAL_PCD_DataInStageCallback(hpcd, 0U); - 8005cc2: 2100 movs r1, #0 - 8005cc4: 6878 ldr r0, [r7, #4] - 8005cc6: f005 ff51 bl 800bb6c -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U)) - 8005cca: 687b ldr r3, [r7, #4] - 8005ccc: f893 3024 ldrb.w r3, [r3, #36] ; 0x24 - 8005cd0: b2db uxtb r3, r3 - 8005cd2: 2b00 cmp r3, #0 - 8005cd4: f000 8238 beq.w 8006148 - 8005cd8: 68fb ldr r3, [r7, #12] - 8005cda: 699b ldr r3, [r3, #24] - 8005cdc: 2b00 cmp r3, #0 - 8005cde: f040 8233 bne.w 8006148 - { - hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF); - 8005ce2: 687b ldr r3, [r7, #4] - 8005ce4: f893 3024 ldrb.w r3, [r3, #36] ; 0x24 - 8005ce8: b2db uxtb r3, r3 - 8005cea: f063 037f orn r3, r3, #127 ; 0x7f - 8005cee: b2da uxtb r2, r3 - 8005cf0: 687b ldr r3, [r7, #4] - 8005cf2: 681b ldr r3, [r3, #0] - 8005cf4: b292 uxth r2, r2 - 8005cf6: f8a3 204c strh.w r2, [r3, #76] ; 0x4c - hpcd->USB_Address = 0U; - 8005cfa: 687b ldr r3, [r7, #4] - 8005cfc: 2200 movs r2, #0 - 8005cfe: f883 2024 strb.w r2, [r3, #36] ; 0x24 - 8005d02: e221 b.n 8006148 - { - /* DIR = 1 */ - - /* DIR = 1 & CTR_RX => SETUP or OUT int */ - /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ - ep = &hpcd->OUT_ep[0]; - 8005d04: 687b ldr r3, [r7, #4] - 8005d06: f503 7394 add.w r3, r3, #296 ; 0x128 - 8005d0a: 60fb str r3, [r7, #12] - wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); - 8005d0c: 687b ldr r3, [r7, #4] - 8005d0e: 681b ldr r3, [r3, #0] - 8005d10: 881b ldrh r3, [r3, #0] - 8005d12: 827b strh r3, [r7, #18] - - if ((wEPVal & USB_EP_SETUP) != 0U) - 8005d14: 8a7b ldrh r3, [r7, #18] - 8005d16: f403 6300 and.w r3, r3, #2048 ; 0x800 - 8005d1a: 2b00 cmp r3, #0 - 8005d1c: d033 beq.n 8005d86 - { - /* Get SETUP Packet*/ - ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - 8005d1e: 687b ldr r3, [r7, #4] - 8005d20: 681b ldr r3, [r3, #0] - 8005d22: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8005d26: b29b uxth r3, r3 - 8005d28: 461a mov r2, r3 - 8005d2a: 68fb ldr r3, [r7, #12] - 8005d2c: 781b ldrb r3, [r3, #0] - 8005d2e: 00db lsls r3, r3, #3 - 8005d30: 4413 add r3, r2 - 8005d32: 3306 adds r3, #6 - 8005d34: 005b lsls r3, r3, #1 - 8005d36: 687a ldr r2, [r7, #4] - 8005d38: 6812 ldr r2, [r2, #0] - 8005d3a: 4413 add r3, r2 - 8005d3c: f503 6380 add.w r3, r3, #1024 ; 0x400 - 8005d40: 881b ldrh r3, [r3, #0] - 8005d42: f3c3 0209 ubfx r2, r3, #0, #10 - 8005d46: 68fb ldr r3, [r7, #12] - 8005d48: 61da str r2, [r3, #28] - - USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, - 8005d4a: 687b ldr r3, [r7, #4] - 8005d4c: 6818 ldr r0, [r3, #0] - 8005d4e: 687b ldr r3, [r7, #4] - 8005d50: f503 710c add.w r1, r3, #560 ; 0x230 - 8005d54: 68fb ldr r3, [r7, #12] - 8005d56: 88da ldrh r2, [r3, #6] - ep->pmaadress, (uint16_t)ep->xfer_count); - 8005d58: 68fb ldr r3, [r7, #12] - 8005d5a: 69db ldr r3, [r3, #28] - USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, - 8005d5c: b29b uxth r3, r3 - 8005d5e: f004 fcc6 bl 800a6ee - - /* SETUP bit kept frozen while CTR_RX = 1*/ - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); - 8005d62: 687b ldr r3, [r7, #4] - 8005d64: 681b ldr r3, [r3, #0] - 8005d66: 881b ldrh r3, [r3, #0] - 8005d68: b29a uxth r2, r3 - 8005d6a: f640 738f movw r3, #3983 ; 0xf8f - 8005d6e: 4013 ands r3, r2 - 8005d70: b29c uxth r4, r3 - 8005d72: 687b ldr r3, [r7, #4] - 8005d74: 681b ldr r3, [r3, #0] - 8005d76: f044 0280 orr.w r2, r4, #128 ; 0x80 - 8005d7a: b292 uxth r2, r2 - 8005d7c: 801a strh r2, [r3, #0] - - /* Process SETUP Packet*/ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->SetupStageCallback(hpcd); -#else - HAL_PCD_SetupStageCallback(hpcd); - 8005d7e: 6878 ldr r0, [r7, #4] - 8005d80: f005 feca bl 800bb18 - 8005d84: e1e0 b.n 8006148 -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - - else if ((wEPVal & USB_EP_CTR_RX) != 0U) - 8005d86: f9b7 3012 ldrsh.w r3, [r7, #18] - 8005d8a: 2b00 cmp r3, #0 - 8005d8c: f280 81dc bge.w 8006148 - { - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); - 8005d90: 687b ldr r3, [r7, #4] - 8005d92: 681b ldr r3, [r3, #0] - 8005d94: 881b ldrh r3, [r3, #0] - 8005d96: b29a uxth r2, r3 - 8005d98: f640 738f movw r3, #3983 ; 0xf8f - 8005d9c: 4013 ands r3, r2 - 8005d9e: b29c uxth r4, r3 - 8005da0: 687b ldr r3, [r7, #4] - 8005da2: 681b ldr r3, [r3, #0] - 8005da4: f044 0280 orr.w r2, r4, #128 ; 0x80 - 8005da8: b292 uxth r2, r2 - 8005daa: 801a strh r2, [r3, #0] - - /* Get Control Data OUT Packet*/ - ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - 8005dac: 687b ldr r3, [r7, #4] - 8005dae: 681b ldr r3, [r3, #0] - 8005db0: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8005db4: b29b uxth r3, r3 - 8005db6: 461a mov r2, r3 - 8005db8: 68fb ldr r3, [r7, #12] - 8005dba: 781b ldrb r3, [r3, #0] - 8005dbc: 00db lsls r3, r3, #3 - 8005dbe: 4413 add r3, r2 - 8005dc0: 3306 adds r3, #6 - 8005dc2: 005b lsls r3, r3, #1 - 8005dc4: 687a ldr r2, [r7, #4] - 8005dc6: 6812 ldr r2, [r2, #0] - 8005dc8: 4413 add r3, r2 - 8005dca: f503 6380 add.w r3, r3, #1024 ; 0x400 - 8005dce: 881b ldrh r3, [r3, #0] - 8005dd0: f3c3 0209 ubfx r2, r3, #0, #10 - 8005dd4: 68fb ldr r3, [r7, #12] - 8005dd6: 61da str r2, [r3, #28] - - if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) - 8005dd8: 68fb ldr r3, [r7, #12] - 8005dda: 69db ldr r3, [r3, #28] - 8005ddc: 2b00 cmp r3, #0 - 8005dde: d019 beq.n 8005e14 - 8005de0: 68fb ldr r3, [r7, #12] - 8005de2: 695b ldr r3, [r3, #20] - 8005de4: 2b00 cmp r3, #0 - 8005de6: d015 beq.n 8005e14 - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, - 8005de8: 687b ldr r3, [r7, #4] - 8005dea: 6818 ldr r0, [r3, #0] - 8005dec: 68fb ldr r3, [r7, #12] - 8005dee: 6959 ldr r1, [r3, #20] - 8005df0: 68fb ldr r3, [r7, #12] - 8005df2: 88da ldrh r2, [r3, #6] - ep->pmaadress, (uint16_t)ep->xfer_count); - 8005df4: 68fb ldr r3, [r7, #12] - 8005df6: 69db ldr r3, [r3, #28] - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, - 8005df8: b29b uxth r3, r3 - 8005dfa: f004 fc78 bl 800a6ee - - ep->xfer_buff += ep->xfer_count; - 8005dfe: 68fb ldr r3, [r7, #12] - 8005e00: 695a ldr r2, [r3, #20] - 8005e02: 68fb ldr r3, [r7, #12] - 8005e04: 69db ldr r3, [r3, #28] - 8005e06: 441a add r2, r3 - 8005e08: 68fb ldr r3, [r7, #12] - 8005e0a: 615a str r2, [r3, #20] - - /* Process Control Data OUT Packet*/ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataOutStageCallback(hpcd, 0U); -#else - HAL_PCD_DataOutStageCallback(hpcd, 0U); - 8005e0c: 2100 movs r1, #0 - 8005e0e: 6878 ldr r0, [r7, #4] - 8005e10: f005 fe94 bl 800bb3c -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - - PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); - 8005e14: 687b ldr r3, [r7, #4] - 8005e16: 681b ldr r3, [r3, #0] - 8005e18: 461c mov r4, r3 - 8005e1a: 687b ldr r3, [r7, #4] - 8005e1c: 681b ldr r3, [r3, #0] - 8005e1e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8005e22: b29b uxth r3, r3 - 8005e24: 441c add r4, r3 - 8005e26: f204 430c addw r3, r4, #1036 ; 0x40c - 8005e2a: 60bb str r3, [r7, #8] - 8005e2c: 68fb ldr r3, [r7, #12] - 8005e2e: 691b ldr r3, [r3, #16] - 8005e30: 2b00 cmp r3, #0 - 8005e32: d110 bne.n 8005e56 - 8005e34: 68bb ldr r3, [r7, #8] - 8005e36: 881b ldrh r3, [r3, #0] - 8005e38: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00 - 8005e3c: b29a uxth r2, r3 - 8005e3e: 68bb ldr r3, [r7, #8] - 8005e40: 801a strh r2, [r3, #0] - 8005e42: 68bb ldr r3, [r7, #8] - 8005e44: 881b ldrh r3, [r3, #0] - 8005e46: ea6f 4343 mvn.w r3, r3, lsl #17 - 8005e4a: ea6f 4353 mvn.w r3, r3, lsr #17 - 8005e4e: b29a uxth r2, r3 - 8005e50: 68bb ldr r3, [r7, #8] - 8005e52: 801a strh r2, [r3, #0] - 8005e54: e02f b.n 8005eb6 - 8005e56: 68fb ldr r3, [r7, #12] - 8005e58: 691b ldr r3, [r3, #16] - 8005e5a: 2b3e cmp r3, #62 ; 0x3e - 8005e5c: d813 bhi.n 8005e86 - 8005e5e: 68fb ldr r3, [r7, #12] - 8005e60: 691b ldr r3, [r3, #16] - 8005e62: 085b lsrs r3, r3, #1 - 8005e64: 61bb str r3, [r7, #24] - 8005e66: 68fb ldr r3, [r7, #12] - 8005e68: 691b ldr r3, [r3, #16] - 8005e6a: f003 0301 and.w r3, r3, #1 - 8005e6e: 2b00 cmp r3, #0 - 8005e70: d002 beq.n 8005e78 - 8005e72: 69bb ldr r3, [r7, #24] - 8005e74: 3301 adds r3, #1 - 8005e76: 61bb str r3, [r7, #24] - 8005e78: 69bb ldr r3, [r7, #24] - 8005e7a: b29b uxth r3, r3 - 8005e7c: 029b lsls r3, r3, #10 - 8005e7e: b29a uxth r2, r3 - 8005e80: 68bb ldr r3, [r7, #8] - 8005e82: 801a strh r2, [r3, #0] - 8005e84: e017 b.n 8005eb6 - 8005e86: 68fb ldr r3, [r7, #12] - 8005e88: 691b ldr r3, [r3, #16] - 8005e8a: 095b lsrs r3, r3, #5 - 8005e8c: 61bb str r3, [r7, #24] - 8005e8e: 68fb ldr r3, [r7, #12] - 8005e90: 691b ldr r3, [r3, #16] - 8005e92: f003 031f and.w r3, r3, #31 - 8005e96: 2b00 cmp r3, #0 - 8005e98: d102 bne.n 8005ea0 - 8005e9a: 69bb ldr r3, [r7, #24] - 8005e9c: 3b01 subs r3, #1 - 8005e9e: 61bb str r3, [r7, #24] - 8005ea0: 69bb ldr r3, [r7, #24] - 8005ea2: b29b uxth r3, r3 - 8005ea4: 029b lsls r3, r3, #10 - 8005ea6: b29b uxth r3, r3 - 8005ea8: ea6f 4343 mvn.w r3, r3, lsl #17 - 8005eac: ea6f 4353 mvn.w r3, r3, lsr #17 - 8005eb0: b29a uxth r2, r3 - 8005eb2: 68bb ldr r3, [r7, #8] - 8005eb4: 801a strh r2, [r3, #0] - PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); - 8005eb6: 687b ldr r3, [r7, #4] - 8005eb8: 681b ldr r3, [r3, #0] - 8005eba: 881b ldrh r3, [r3, #0] - 8005ebc: b29b uxth r3, r3 - 8005ebe: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 8005ec2: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8005ec6: b29c uxth r4, r3 - 8005ec8: f484 5380 eor.w r3, r4, #4096 ; 0x1000 - 8005ecc: b29c uxth r4, r3 - 8005ece: f484 5300 eor.w r3, r4, #8192 ; 0x2000 - 8005ed2: b29c uxth r4, r3 - 8005ed4: 687b ldr r3, [r7, #4] - 8005ed6: 681a ldr r2, [r3, #0] - 8005ed8: 4ba2 ldr r3, [pc, #648] ; (8006164 ) - 8005eda: 4323 orrs r3, r4 - 8005edc: b29b uxth r3, r3 - 8005ede: 8013 strh r3, [r2, #0] - 8005ee0: e132 b.n 8006148 - else - { - /* Decode and service non control endpoints interrupt */ - - /* process related endpoint register */ - wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); - 8005ee2: 687b ldr r3, [r7, #4] - 8005ee4: 681b ldr r3, [r3, #0] - 8005ee6: 461a mov r2, r3 - 8005ee8: 7d7b ldrb r3, [r7, #21] - 8005eea: 009b lsls r3, r3, #2 - 8005eec: 4413 add r3, r2 - 8005eee: 881b ldrh r3, [r3, #0] - 8005ef0: 827b strh r3, [r7, #18] - if ((wEPVal & USB_EP_CTR_RX) != 0U) - 8005ef2: f9b7 3012 ldrsh.w r3, [r7, #18] - 8005ef6: 2b00 cmp r3, #0 - 8005ef8: f280 80d1 bge.w 800609e - { - /* clear int flag */ - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); - 8005efc: 687b ldr r3, [r7, #4] - 8005efe: 681b ldr r3, [r3, #0] - 8005f00: 461a mov r2, r3 - 8005f02: 7d7b ldrb r3, [r7, #21] - 8005f04: 009b lsls r3, r3, #2 - 8005f06: 4413 add r3, r2 - 8005f08: 881b ldrh r3, [r3, #0] - 8005f0a: b29a uxth r2, r3 - 8005f0c: f640 738f movw r3, #3983 ; 0xf8f - 8005f10: 4013 ands r3, r2 - 8005f12: b29c uxth r4, r3 - 8005f14: 687b ldr r3, [r7, #4] - 8005f16: 681b ldr r3, [r3, #0] - 8005f18: 461a mov r2, r3 - 8005f1a: 7d7b ldrb r3, [r7, #21] - 8005f1c: 009b lsls r3, r3, #2 - 8005f1e: 4413 add r3, r2 - 8005f20: f044 0280 orr.w r2, r4, #128 ; 0x80 - 8005f24: b292 uxth r2, r2 - 8005f26: 801a strh r2, [r3, #0] - ep = &hpcd->OUT_ep[epindex]; - 8005f28: 7d7b ldrb r3, [r7, #21] - 8005f2a: 015b lsls r3, r3, #5 - 8005f2c: f503 7394 add.w r3, r3, #296 ; 0x128 - 8005f30: 687a ldr r2, [r7, #4] - 8005f32: 4413 add r3, r2 - 8005f34: 60fb str r3, [r7, #12] - - /* OUT double Buffering*/ - if (ep->doublebuffer == 0U) - 8005f36: 68fb ldr r3, [r7, #12] - 8005f38: 7b1b ldrb r3, [r3, #12] - 8005f3a: 2b00 cmp r3, #0 - 8005f3c: d121 bne.n 8005f82 - { - count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - 8005f3e: 687b ldr r3, [r7, #4] - 8005f40: 681b ldr r3, [r3, #0] - 8005f42: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8005f46: b29b uxth r3, r3 - 8005f48: 461a mov r2, r3 - 8005f4a: 68fb ldr r3, [r7, #12] - 8005f4c: 781b ldrb r3, [r3, #0] - 8005f4e: 00db lsls r3, r3, #3 - 8005f50: 4413 add r3, r2 - 8005f52: 3306 adds r3, #6 - 8005f54: 005b lsls r3, r3, #1 - 8005f56: 687a ldr r2, [r7, #4] - 8005f58: 6812 ldr r2, [r2, #0] - 8005f5a: 4413 add r3, r2 - 8005f5c: f503 6380 add.w r3, r3, #1024 ; 0x400 - 8005f60: 881b ldrh r3, [r3, #0] - 8005f62: f3c3 0309 ubfx r3, r3, #0, #10 - 8005f66: 83fb strh r3, [r7, #30] - if (count != 0U) - 8005f68: 8bfb ldrh r3, [r7, #30] - 8005f6a: 2b00 cmp r3, #0 - 8005f6c: d072 beq.n 8006054 - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); - 8005f6e: 687b ldr r3, [r7, #4] - 8005f70: 6818 ldr r0, [r3, #0] - 8005f72: 68fb ldr r3, [r7, #12] - 8005f74: 6959 ldr r1, [r3, #20] - 8005f76: 68fb ldr r3, [r7, #12] - 8005f78: 88da ldrh r2, [r3, #6] - 8005f7a: 8bfb ldrh r3, [r7, #30] - 8005f7c: f004 fbb7 bl 800a6ee - 8005f80: e068 b.n 8006054 - } - } - else - { - if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U) - 8005f82: 687b ldr r3, [r7, #4] - 8005f84: 681b ldr r3, [r3, #0] - 8005f86: 461a mov r2, r3 - 8005f88: 68fb ldr r3, [r7, #12] - 8005f8a: 781b ldrb r3, [r3, #0] - 8005f8c: 009b lsls r3, r3, #2 - 8005f8e: 4413 add r3, r2 - 8005f90: 881b ldrh r3, [r3, #0] - 8005f92: b29b uxth r3, r3 - 8005f94: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8005f98: 2b00 cmp r3, #0 - 8005f9a: d021 beq.n 8005fe0 - { - /*read from endpoint BUF0Addr buffer*/ - count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); - 8005f9c: 687b ldr r3, [r7, #4] - 8005f9e: 681b ldr r3, [r3, #0] - 8005fa0: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8005fa4: b29b uxth r3, r3 - 8005fa6: 461a mov r2, r3 - 8005fa8: 68fb ldr r3, [r7, #12] - 8005faa: 781b ldrb r3, [r3, #0] - 8005fac: 00db lsls r3, r3, #3 - 8005fae: 4413 add r3, r2 - 8005fb0: 3302 adds r3, #2 - 8005fb2: 005b lsls r3, r3, #1 - 8005fb4: 687a ldr r2, [r7, #4] - 8005fb6: 6812 ldr r2, [r2, #0] - 8005fb8: 4413 add r3, r2 - 8005fba: f503 6380 add.w r3, r3, #1024 ; 0x400 - 8005fbe: 881b ldrh r3, [r3, #0] - 8005fc0: f3c3 0309 ubfx r3, r3, #0, #10 - 8005fc4: 83fb strh r3, [r7, #30] - if (count != 0U) - 8005fc6: 8bfb ldrh r3, [r7, #30] - 8005fc8: 2b00 cmp r3, #0 - 8005fca: d02a beq.n 8006022 - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); - 8005fcc: 687b ldr r3, [r7, #4] - 8005fce: 6818 ldr r0, [r3, #0] - 8005fd0: 68fb ldr r3, [r7, #12] - 8005fd2: 6959 ldr r1, [r3, #20] - 8005fd4: 68fb ldr r3, [r7, #12] - 8005fd6: 891a ldrh r2, [r3, #8] - 8005fd8: 8bfb ldrh r3, [r7, #30] - 8005fda: f004 fb88 bl 800a6ee - 8005fde: e020 b.n 8006022 - } - } - else - { - /*read from endpoint BUF1Addr buffer*/ - count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); - 8005fe0: 687b ldr r3, [r7, #4] - 8005fe2: 681b ldr r3, [r3, #0] - 8005fe4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8005fe8: b29b uxth r3, r3 - 8005fea: 461a mov r2, r3 - 8005fec: 68fb ldr r3, [r7, #12] - 8005fee: 781b ldrb r3, [r3, #0] - 8005ff0: 00db lsls r3, r3, #3 - 8005ff2: 4413 add r3, r2 - 8005ff4: 3306 adds r3, #6 - 8005ff6: 005b lsls r3, r3, #1 - 8005ff8: 687a ldr r2, [r7, #4] - 8005ffa: 6812 ldr r2, [r2, #0] - 8005ffc: 4413 add r3, r2 - 8005ffe: f503 6380 add.w r3, r3, #1024 ; 0x400 - 8006002: 881b ldrh r3, [r3, #0] - 8006004: f3c3 0309 ubfx r3, r3, #0, #10 - 8006008: 83fb strh r3, [r7, #30] - if (count != 0U) - 800600a: 8bfb ldrh r3, [r7, #30] - 800600c: 2b00 cmp r3, #0 - 800600e: d008 beq.n 8006022 - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); - 8006010: 687b ldr r3, [r7, #4] - 8006012: 6818 ldr r0, [r3, #0] - 8006014: 68fb ldr r3, [r7, #12] - 8006016: 6959 ldr r1, [r3, #20] - 8006018: 68fb ldr r3, [r7, #12] - 800601a: 895a ldrh r2, [r3, #10] - 800601c: 8bfb ldrh r3, [r7, #30] - 800601e: f004 fb66 bl 800a6ee - } - } - /* free EP OUT Buffer */ - PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U); - 8006022: 687b ldr r3, [r7, #4] - 8006024: 681b ldr r3, [r3, #0] - 8006026: 461a mov r2, r3 - 8006028: 68fb ldr r3, [r7, #12] - 800602a: 781b ldrb r3, [r3, #0] - 800602c: 009b lsls r3, r3, #2 - 800602e: 4413 add r3, r2 - 8006030: 881b ldrh r3, [r3, #0] - 8006032: b29b uxth r3, r3 - 8006034: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8006038: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800603c: b29c uxth r4, r3 - 800603e: 687b ldr r3, [r7, #4] - 8006040: 681b ldr r3, [r3, #0] - 8006042: 461a mov r2, r3 - 8006044: 68fb ldr r3, [r7, #12] - 8006046: 781b ldrb r3, [r3, #0] - 8006048: 009b lsls r3, r3, #2 - 800604a: 441a add r2, r3 - 800604c: 4b46 ldr r3, [pc, #280] ; (8006168 ) - 800604e: 4323 orrs r3, r4 - 8006050: b29b uxth r3, r3 - 8006052: 8013 strh r3, [r2, #0] - } - /*multi-packet on the NON control OUT endpoint*/ - ep->xfer_count += count; - 8006054: 68fb ldr r3, [r7, #12] - 8006056: 69da ldr r2, [r3, #28] - 8006058: 8bfb ldrh r3, [r7, #30] - 800605a: 441a add r2, r3 - 800605c: 68fb ldr r3, [r7, #12] - 800605e: 61da str r2, [r3, #28] - ep->xfer_buff += count; - 8006060: 68fb ldr r3, [r7, #12] - 8006062: 695a ldr r2, [r3, #20] - 8006064: 8bfb ldrh r3, [r7, #30] - 8006066: 441a add r2, r3 - 8006068: 68fb ldr r3, [r7, #12] - 800606a: 615a str r2, [r3, #20] - - if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) - 800606c: 68fb ldr r3, [r7, #12] - 800606e: 699b ldr r3, [r3, #24] - 8006070: 2b00 cmp r3, #0 - 8006072: d004 beq.n 800607e - 8006074: 8bfa ldrh r2, [r7, #30] - 8006076: 68fb ldr r3, [r7, #12] - 8006078: 691b ldr r3, [r3, #16] - 800607a: 429a cmp r2, r3 - 800607c: d206 bcs.n 800608c - { - /* RX COMPLETE */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataOutStageCallback(hpcd, ep->num); -#else - HAL_PCD_DataOutStageCallback(hpcd, ep->num); - 800607e: 68fb ldr r3, [r7, #12] - 8006080: 781b ldrb r3, [r3, #0] - 8006082: 4619 mov r1, r3 - 8006084: 6878 ldr r0, [r7, #4] - 8006086: f005 fd59 bl 800bb3c - 800608a: e008 b.n 800609e -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else - { - (void)HAL_PCD_EP_Receive(hpcd, ep->num, ep->xfer_buff, ep->xfer_len); - 800608c: 68fb ldr r3, [r7, #12] - 800608e: 7819 ldrb r1, [r3, #0] - 8006090: 68fb ldr r3, [r7, #12] - 8006092: 695a ldr r2, [r3, #20] - 8006094: 68fb ldr r3, [r7, #12] - 8006096: 699b ldr r3, [r3, #24] - 8006098: 6878 ldr r0, [r7, #4] - 800609a: f7ff fcad bl 80059f8 - } - - } /* if((wEPVal & EP_CTR_RX) */ - - if ((wEPVal & USB_EP_CTR_TX) != 0U) - 800609e: 8a7b ldrh r3, [r7, #18] - 80060a0: f003 0380 and.w r3, r3, #128 ; 0x80 - 80060a4: 2b00 cmp r3, #0 - 80060a6: d04f beq.n 8006148 - { - ep = &hpcd->IN_ep[epindex]; - 80060a8: 7d7b ldrb r3, [r7, #21] - 80060aa: 015b lsls r3, r3, #5 - 80060ac: 3328 adds r3, #40 ; 0x28 - 80060ae: 687a ldr r2, [r7, #4] - 80060b0: 4413 add r3, r2 - 80060b2: 60fb str r3, [r7, #12] - - /* clear int flag */ - PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); - 80060b4: 687b ldr r3, [r7, #4] - 80060b6: 681b ldr r3, [r3, #0] - 80060b8: 461a mov r2, r3 - 80060ba: 7d7b ldrb r3, [r7, #21] - 80060bc: 009b lsls r3, r3, #2 - 80060be: 4413 add r3, r2 - 80060c0: 881b ldrh r3, [r3, #0] - 80060c2: b29b uxth r3, r3 - 80060c4: f423 43e1 bic.w r3, r3, #28800 ; 0x7080 - 80060c8: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80060cc: b29c uxth r4, r3 - 80060ce: 687b ldr r3, [r7, #4] - 80060d0: 681b ldr r3, [r3, #0] - 80060d2: 461a mov r2, r3 - 80060d4: 7d7b ldrb r3, [r7, #21] - 80060d6: 009b lsls r3, r3, #2 - 80060d8: 441a add r2, r3 - 80060da: ea6f 4344 mvn.w r3, r4, lsl #17 - 80060de: ea6f 4353 mvn.w r3, r3, lsr #17 - 80060e2: b29b uxth r3, r3 - 80060e4: 8013 strh r3, [r2, #0] - - /*multi-packet on the NON control IN endpoint*/ - ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - 80060e6: 687b ldr r3, [r7, #4] - 80060e8: 681b ldr r3, [r3, #0] - 80060ea: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 80060ee: b29b uxth r3, r3 - 80060f0: 461a mov r2, r3 - 80060f2: 68fb ldr r3, [r7, #12] - 80060f4: 781b ldrb r3, [r3, #0] - 80060f6: 00db lsls r3, r3, #3 - 80060f8: 4413 add r3, r2 - 80060fa: 3302 adds r3, #2 - 80060fc: 005b lsls r3, r3, #1 - 80060fe: 687a ldr r2, [r7, #4] - 8006100: 6812 ldr r2, [r2, #0] - 8006102: 4413 add r3, r2 - 8006104: f503 6380 add.w r3, r3, #1024 ; 0x400 - 8006108: 881b ldrh r3, [r3, #0] - 800610a: f3c3 0209 ubfx r2, r3, #0, #10 - 800610e: 68fb ldr r3, [r7, #12] - 8006110: 61da str r2, [r3, #28] - ep->xfer_buff += ep->xfer_count; - 8006112: 68fb ldr r3, [r7, #12] - 8006114: 695a ldr r2, [r3, #20] - 8006116: 68fb ldr r3, [r7, #12] - 8006118: 69db ldr r3, [r3, #28] - 800611a: 441a add r2, r3 - 800611c: 68fb ldr r3, [r7, #12] - 800611e: 615a str r2, [r3, #20] - - /* Zero Length Packet? */ - if (ep->xfer_len == 0U) - 8006120: 68fb ldr r3, [r7, #12] - 8006122: 699b ldr r3, [r3, #24] - 8006124: 2b00 cmp r3, #0 - 8006126: d106 bne.n 8006136 - { - /* TX COMPLETE */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataInStageCallback(hpcd, ep->num); -#else - HAL_PCD_DataInStageCallback(hpcd, ep->num); - 8006128: 68fb ldr r3, [r7, #12] - 800612a: 781b ldrb r3, [r3, #0] - 800612c: 4619 mov r1, r3 - 800612e: 6878 ldr r0, [r7, #4] - 8006130: f005 fd1c bl 800bb6c - 8006134: e008 b.n 8006148 -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else - { - (void)HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len); - 8006136: 68fb ldr r3, [r7, #12] - 8006138: 7819 ldrb r1, [r3, #0] - 800613a: 68fb ldr r3, [r7, #12] - 800613c: 695a ldr r2, [r3, #20] - 800613e: 68fb ldr r3, [r7, #12] - 8006140: 699b ldr r3, [r3, #24] - 8006142: 6878 ldr r0, [r7, #4] - 8006144: f7ff fc92 bl 8005a6c - while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) - 8006148: 687b ldr r3, [r7, #4] - 800614a: 681b ldr r3, [r3, #0] - 800614c: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 8006150: b29b uxth r3, r3 - 8006152: b21b sxth r3, r3 - 8006154: 2b00 cmp r3, #0 - 8006156: f6ff ad70 blt.w 8005c3a - } - } - } - } - return HAL_OK; - 800615a: 2300 movs r3, #0 -} - 800615c: 4618 mov r0, r3 - 800615e: 3724 adds r7, #36 ; 0x24 - 8006160: 46bd mov sp, r7 - 8006162: bd90 pop {r4, r7, pc} - 8006164: ffff8080 .word 0xffff8080 - 8006168: ffff80c0 .word 0xffff80c0 - -0800616c : - * supported by this macro. User should request a transition to HSE Off - * first and then HSE On or HSE Bypass. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) -{ - 800616c: b580 push {r7, lr} - 800616e: f5ad 7d00 sub.w sp, sp, #512 ; 0x200 - 8006172: af00 add r7, sp, #0 - 8006174: 1d3b adds r3, r7, #4 - 8006176: 6018 str r0, [r3, #0] -#if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) - uint32_t pll_config2; -#endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ - - /* Check Null pointer */ - if(RCC_OscInitStruct == NULL) - 8006178: 1d3b adds r3, r7, #4 - 800617a: 681b ldr r3, [r3, #0] - 800617c: 2b00 cmp r3, #0 - 800617e: d102 bne.n 8006186 - { - return HAL_ERROR; - 8006180: 2301 movs r3, #1 - 8006182: f000 bef4 b.w 8006f6e - - /* Check the parameters */ - assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); - - /*------------------------------- HSE Configuration ------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8006186: 1d3b adds r3, r7, #4 - 8006188: 681b ldr r3, [r3, #0] - 800618a: 681b ldr r3, [r3, #0] - 800618c: f003 0301 and.w r3, r3, #1 - 8006190: 2b00 cmp r3, #0 - 8006192: f000 816a beq.w 800646a - { - /* Check the parameters */ - assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); - - /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8006196: 4bb3 ldr r3, [pc, #716] ; (8006464 ) - 8006198: 685b ldr r3, [r3, #4] - 800619a: f003 030c and.w r3, r3, #12 - 800619e: 2b04 cmp r3, #4 - 80061a0: d00c beq.n 80061bc - || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 80061a2: 4bb0 ldr r3, [pc, #704] ; (8006464 ) - 80061a4: 685b ldr r3, [r3, #4] - 80061a6: f003 030c and.w r3, r3, #12 - 80061aa: 2b08 cmp r3, #8 - 80061ac: d159 bne.n 8006262 - 80061ae: 4bad ldr r3, [pc, #692] ; (8006464 ) - 80061b0: 685b ldr r3, [r3, #4] - 80061b2: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 80061b6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80061ba: d152 bne.n 8006262 - 80061bc: f44f 3300 mov.w r3, #131072 ; 0x20000 - 80061c0: f8c7 31f0 str.w r3, [r7, #496] ; 0x1f0 - uint32_t result; - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80061c4: f8d7 31f0 ldr.w r3, [r7, #496] ; 0x1f0 - 80061c8: fa93 f3a3 rbit r3, r3 - 80061cc: f8c7 31ec str.w r3, [r7, #492] ; 0x1ec - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ -#endif - return result; - 80061d0: f8d7 31ec ldr.w r3, [r7, #492] ; 0x1ec - { - if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 80061d4: fab3 f383 clz r3, r3 - 80061d8: b2db uxtb r3, r3 - 80061da: 095b lsrs r3, r3, #5 - 80061dc: b2db uxtb r3, r3 - 80061de: f043 0301 orr.w r3, r3, #1 - 80061e2: b2db uxtb r3, r3 - 80061e4: 2b01 cmp r3, #1 - 80061e6: d102 bne.n 80061ee - 80061e8: 4b9e ldr r3, [pc, #632] ; (8006464 ) - 80061ea: 681b ldr r3, [r3, #0] - 80061ec: e015 b.n 800621a - 80061ee: f44f 3300 mov.w r3, #131072 ; 0x20000 - 80061f2: f8c7 31e8 str.w r3, [r7, #488] ; 0x1e8 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80061f6: f8d7 31e8 ldr.w r3, [r7, #488] ; 0x1e8 - 80061fa: fa93 f3a3 rbit r3, r3 - 80061fe: f8c7 31e4 str.w r3, [r7, #484] ; 0x1e4 - 8006202: f44f 3300 mov.w r3, #131072 ; 0x20000 - 8006206: f8c7 31e0 str.w r3, [r7, #480] ; 0x1e0 - 800620a: f8d7 31e0 ldr.w r3, [r7, #480] ; 0x1e0 - 800620e: fa93 f3a3 rbit r3, r3 - 8006212: f8c7 31dc str.w r3, [r7, #476] ; 0x1dc - 8006216: 4b93 ldr r3, [pc, #588] ; (8006464 ) - 8006218: 6a5b ldr r3, [r3, #36] ; 0x24 - 800621a: f44f 3200 mov.w r2, #131072 ; 0x20000 - 800621e: f8c7 21d8 str.w r2, [r7, #472] ; 0x1d8 - 8006222: f8d7 21d8 ldr.w r2, [r7, #472] ; 0x1d8 - 8006226: fa92 f2a2 rbit r2, r2 - 800622a: f8c7 21d4 str.w r2, [r7, #468] ; 0x1d4 - return result; - 800622e: f8d7 21d4 ldr.w r2, [r7, #468] ; 0x1d4 - 8006232: fab2 f282 clz r2, r2 - 8006236: b2d2 uxtb r2, r2 - 8006238: f042 0220 orr.w r2, r2, #32 - 800623c: b2d2 uxtb r2, r2 - 800623e: f002 021f and.w r2, r2, #31 - 8006242: 2101 movs r1, #1 - 8006244: fa01 f202 lsl.w r2, r1, r2 - 8006248: 4013 ands r3, r2 - 800624a: 2b00 cmp r3, #0 - 800624c: f000 810c beq.w 8006468 - 8006250: 1d3b adds r3, r7, #4 - 8006252: 681b ldr r3, [r3, #0] - 8006254: 685b ldr r3, [r3, #4] - 8006256: 2b00 cmp r3, #0 - 8006258: f040 8106 bne.w 8006468 - { - return HAL_ERROR; - 800625c: 2301 movs r3, #1 - 800625e: f000 be86 b.w 8006f6e - } - } - else - { - /* Set the new HSE configuration ---------------------------------------*/ - __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8006262: 1d3b adds r3, r7, #4 - 8006264: 681b ldr r3, [r3, #0] - 8006266: 685b ldr r3, [r3, #4] - 8006268: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 800626c: d106 bne.n 800627c - 800626e: 4b7d ldr r3, [pc, #500] ; (8006464 ) - 8006270: 681b ldr r3, [r3, #0] - 8006272: 4a7c ldr r2, [pc, #496] ; (8006464 ) - 8006274: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8006278: 6013 str r3, [r2, #0] - 800627a: e030 b.n 80062de - 800627c: 1d3b adds r3, r7, #4 - 800627e: 681b ldr r3, [r3, #0] - 8006280: 685b ldr r3, [r3, #4] - 8006282: 2b00 cmp r3, #0 - 8006284: d10c bne.n 80062a0 - 8006286: 4b77 ldr r3, [pc, #476] ; (8006464 ) - 8006288: 681b ldr r3, [r3, #0] - 800628a: 4a76 ldr r2, [pc, #472] ; (8006464 ) - 800628c: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8006290: 6013 str r3, [r2, #0] - 8006292: 4b74 ldr r3, [pc, #464] ; (8006464 ) - 8006294: 681b ldr r3, [r3, #0] - 8006296: 4a73 ldr r2, [pc, #460] ; (8006464 ) - 8006298: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 800629c: 6013 str r3, [r2, #0] - 800629e: e01e b.n 80062de - 80062a0: 1d3b adds r3, r7, #4 - 80062a2: 681b ldr r3, [r3, #0] - 80062a4: 685b ldr r3, [r3, #4] - 80062a6: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 80062aa: d10c bne.n 80062c6 - 80062ac: 4b6d ldr r3, [pc, #436] ; (8006464 ) - 80062ae: 681b ldr r3, [r3, #0] - 80062b0: 4a6c ldr r2, [pc, #432] ; (8006464 ) - 80062b2: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 80062b6: 6013 str r3, [r2, #0] - 80062b8: 4b6a ldr r3, [pc, #424] ; (8006464 ) - 80062ba: 681b ldr r3, [r3, #0] - 80062bc: 4a69 ldr r2, [pc, #420] ; (8006464 ) - 80062be: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 80062c2: 6013 str r3, [r2, #0] - 80062c4: e00b b.n 80062de - 80062c6: 4b67 ldr r3, [pc, #412] ; (8006464 ) - 80062c8: 681b ldr r3, [r3, #0] - 80062ca: 4a66 ldr r2, [pc, #408] ; (8006464 ) - 80062cc: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 80062d0: 6013 str r3, [r2, #0] - 80062d2: 4b64 ldr r3, [pc, #400] ; (8006464 ) - 80062d4: 681b ldr r3, [r3, #0] - 80062d6: 4a63 ldr r2, [pc, #396] ; (8006464 ) - 80062d8: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 80062dc: 6013 str r3, [r2, #0] - -#if defined(RCC_CFGR_PLLSRC_HSI_DIV2) - /* Configure the HSE predivision factor --------------------------------*/ - __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); - 80062de: 4b61 ldr r3, [pc, #388] ; (8006464 ) - 80062e0: 6adb ldr r3, [r3, #44] ; 0x2c - 80062e2: f023 020f bic.w r2, r3, #15 - 80062e6: 1d3b adds r3, r7, #4 - 80062e8: 681b ldr r3, [r3, #0] - 80062ea: 689b ldr r3, [r3, #8] - 80062ec: 495d ldr r1, [pc, #372] ; (8006464 ) - 80062ee: 4313 orrs r3, r2 - 80062f0: 62cb str r3, [r1, #44] ; 0x2c -#endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ - - /* Check the HSE State */ - if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 80062f2: 1d3b adds r3, r7, #4 - 80062f4: 681b ldr r3, [r3, #0] - 80062f6: 685b ldr r3, [r3, #4] - 80062f8: 2b00 cmp r3, #0 - 80062fa: d059 beq.n 80063b0 - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 80062fc: f7fc fe26 bl 8002f4c - 8006300: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till HSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8006304: e00a b.n 800631c - { - if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8006306: f7fc fe21 bl 8002f4c - 800630a: 4602 mov r2, r0 - 800630c: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 8006310: 1ad3 subs r3, r2, r3 - 8006312: 2b64 cmp r3, #100 ; 0x64 - 8006314: d902 bls.n 800631c - { - return HAL_TIMEOUT; - 8006316: 2303 movs r3, #3 - 8006318: f000 be29 b.w 8006f6e - 800631c: f44f 3300 mov.w r3, #131072 ; 0x20000 - 8006320: f8c7 31d0 str.w r3, [r7, #464] ; 0x1d0 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006324: f8d7 31d0 ldr.w r3, [r7, #464] ; 0x1d0 - 8006328: fa93 f3a3 rbit r3, r3 - 800632c: f8c7 31cc str.w r3, [r7, #460] ; 0x1cc - return result; - 8006330: f8d7 31cc ldr.w r3, [r7, #460] ; 0x1cc - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8006334: fab3 f383 clz r3, r3 - 8006338: b2db uxtb r3, r3 - 800633a: 095b lsrs r3, r3, #5 - 800633c: b2db uxtb r3, r3 - 800633e: f043 0301 orr.w r3, r3, #1 - 8006342: b2db uxtb r3, r3 - 8006344: 2b01 cmp r3, #1 - 8006346: d102 bne.n 800634e - 8006348: 4b46 ldr r3, [pc, #280] ; (8006464 ) - 800634a: 681b ldr r3, [r3, #0] - 800634c: e015 b.n 800637a - 800634e: f44f 3300 mov.w r3, #131072 ; 0x20000 - 8006352: f8c7 31c8 str.w r3, [r7, #456] ; 0x1c8 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006356: f8d7 31c8 ldr.w r3, [r7, #456] ; 0x1c8 - 800635a: fa93 f3a3 rbit r3, r3 - 800635e: f8c7 31c4 str.w r3, [r7, #452] ; 0x1c4 - 8006362: f44f 3300 mov.w r3, #131072 ; 0x20000 - 8006366: f8c7 31c0 str.w r3, [r7, #448] ; 0x1c0 - 800636a: f8d7 31c0 ldr.w r3, [r7, #448] ; 0x1c0 - 800636e: fa93 f3a3 rbit r3, r3 - 8006372: f8c7 31bc str.w r3, [r7, #444] ; 0x1bc - 8006376: 4b3b ldr r3, [pc, #236] ; (8006464 ) - 8006378: 6a5b ldr r3, [r3, #36] ; 0x24 - 800637a: f44f 3200 mov.w r2, #131072 ; 0x20000 - 800637e: f8c7 21b8 str.w r2, [r7, #440] ; 0x1b8 - 8006382: f8d7 21b8 ldr.w r2, [r7, #440] ; 0x1b8 - 8006386: fa92 f2a2 rbit r2, r2 - 800638a: f8c7 21b4 str.w r2, [r7, #436] ; 0x1b4 - return result; - 800638e: f8d7 21b4 ldr.w r2, [r7, #436] ; 0x1b4 - 8006392: fab2 f282 clz r2, r2 - 8006396: b2d2 uxtb r2, r2 - 8006398: f042 0220 orr.w r2, r2, #32 - 800639c: b2d2 uxtb r2, r2 - 800639e: f002 021f and.w r2, r2, #31 - 80063a2: 2101 movs r1, #1 - 80063a4: fa01 f202 lsl.w r2, r1, r2 - 80063a8: 4013 ands r3, r2 - 80063aa: 2b00 cmp r3, #0 - 80063ac: d0ab beq.n 8006306 - 80063ae: e05c b.n 800646a - } - } - else - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 80063b0: f7fc fdcc bl 8002f4c - 80063b4: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till HSE is disabled */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 80063b8: e00a b.n 80063d0 - { - if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 80063ba: f7fc fdc7 bl 8002f4c - 80063be: 4602 mov r2, r0 - 80063c0: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 80063c4: 1ad3 subs r3, r2, r3 - 80063c6: 2b64 cmp r3, #100 ; 0x64 - 80063c8: d902 bls.n 80063d0 - { - return HAL_TIMEOUT; - 80063ca: 2303 movs r3, #3 - 80063cc: f000 bdcf b.w 8006f6e - 80063d0: f44f 3300 mov.w r3, #131072 ; 0x20000 - 80063d4: f8c7 31b0 str.w r3, [r7, #432] ; 0x1b0 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80063d8: f8d7 31b0 ldr.w r3, [r7, #432] ; 0x1b0 - 80063dc: fa93 f3a3 rbit r3, r3 - 80063e0: f8c7 31ac str.w r3, [r7, #428] ; 0x1ac - return result; - 80063e4: f8d7 31ac ldr.w r3, [r7, #428] ; 0x1ac - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 80063e8: fab3 f383 clz r3, r3 - 80063ec: b2db uxtb r3, r3 - 80063ee: 095b lsrs r3, r3, #5 - 80063f0: b2db uxtb r3, r3 - 80063f2: f043 0301 orr.w r3, r3, #1 - 80063f6: b2db uxtb r3, r3 - 80063f8: 2b01 cmp r3, #1 - 80063fa: d102 bne.n 8006402 - 80063fc: 4b19 ldr r3, [pc, #100] ; (8006464 ) - 80063fe: 681b ldr r3, [r3, #0] - 8006400: e015 b.n 800642e - 8006402: f44f 3300 mov.w r3, #131072 ; 0x20000 - 8006406: f8c7 31a8 str.w r3, [r7, #424] ; 0x1a8 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800640a: f8d7 31a8 ldr.w r3, [r7, #424] ; 0x1a8 - 800640e: fa93 f3a3 rbit r3, r3 - 8006412: f8c7 31a4 str.w r3, [r7, #420] ; 0x1a4 - 8006416: f44f 3300 mov.w r3, #131072 ; 0x20000 - 800641a: f8c7 31a0 str.w r3, [r7, #416] ; 0x1a0 - 800641e: f8d7 31a0 ldr.w r3, [r7, #416] ; 0x1a0 - 8006422: fa93 f3a3 rbit r3, r3 - 8006426: f8c7 319c str.w r3, [r7, #412] ; 0x19c - 800642a: 4b0e ldr r3, [pc, #56] ; (8006464 ) - 800642c: 6a5b ldr r3, [r3, #36] ; 0x24 - 800642e: f44f 3200 mov.w r2, #131072 ; 0x20000 - 8006432: f8c7 2198 str.w r2, [r7, #408] ; 0x198 - 8006436: f8d7 2198 ldr.w r2, [r7, #408] ; 0x198 - 800643a: fa92 f2a2 rbit r2, r2 - 800643e: f8c7 2194 str.w r2, [r7, #404] ; 0x194 - return result; - 8006442: f8d7 2194 ldr.w r2, [r7, #404] ; 0x194 - 8006446: fab2 f282 clz r2, r2 - 800644a: b2d2 uxtb r2, r2 - 800644c: f042 0220 orr.w r2, r2, #32 - 8006450: b2d2 uxtb r2, r2 - 8006452: f002 021f and.w r2, r2, #31 - 8006456: 2101 movs r1, #1 - 8006458: fa01 f202 lsl.w r2, r1, r2 - 800645c: 4013 ands r3, r2 - 800645e: 2b00 cmp r3, #0 - 8006460: d1ab bne.n 80063ba - 8006462: e002 b.n 800646a - 8006464: 40021000 .word 0x40021000 - if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8006468: bf00 nop - } - } - } - } - /*----------------------------- HSI Configuration --------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 800646a: 1d3b adds r3, r7, #4 - 800646c: 681b ldr r3, [r3, #0] - 800646e: 681b ldr r3, [r3, #0] - 8006470: f003 0302 and.w r3, r3, #2 - 8006474: 2b00 cmp r3, #0 - 8006476: f000 816f beq.w 8006758 - /* Check the parameters */ - assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); - assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); - - /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 800647a: 4bd0 ldr r3, [pc, #832] ; (80067bc ) - 800647c: 685b ldr r3, [r3, #4] - 800647e: f003 030c and.w r3, r3, #12 - 8006482: 2b00 cmp r3, #0 - 8006484: d00b beq.n 800649e - || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) - 8006486: 4bcd ldr r3, [pc, #820] ; (80067bc ) - 8006488: 685b ldr r3, [r3, #4] - 800648a: f003 030c and.w r3, r3, #12 - 800648e: 2b08 cmp r3, #8 - 8006490: d16c bne.n 800656c - 8006492: 4bca ldr r3, [pc, #808] ; (80067bc ) - 8006494: 685b ldr r3, [r3, #4] - 8006496: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 800649a: 2b00 cmp r3, #0 - 800649c: d166 bne.n 800656c - 800649e: 2302 movs r3, #2 - 80064a0: f8c7 3190 str.w r3, [r7, #400] ; 0x190 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80064a4: f8d7 3190 ldr.w r3, [r7, #400] ; 0x190 - 80064a8: fa93 f3a3 rbit r3, r3 - 80064ac: f8c7 318c str.w r3, [r7, #396] ; 0x18c - return result; - 80064b0: f8d7 318c ldr.w r3, [r7, #396] ; 0x18c - { - /* When HSI is used as system clock it will not disabled */ - if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 80064b4: fab3 f383 clz r3, r3 - 80064b8: b2db uxtb r3, r3 - 80064ba: 095b lsrs r3, r3, #5 - 80064bc: b2db uxtb r3, r3 - 80064be: f043 0301 orr.w r3, r3, #1 - 80064c2: b2db uxtb r3, r3 - 80064c4: 2b01 cmp r3, #1 - 80064c6: d102 bne.n 80064ce - 80064c8: 4bbc ldr r3, [pc, #752] ; (80067bc ) - 80064ca: 681b ldr r3, [r3, #0] - 80064cc: e013 b.n 80064f6 - 80064ce: 2302 movs r3, #2 - 80064d0: f8c7 3188 str.w r3, [r7, #392] ; 0x188 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80064d4: f8d7 3188 ldr.w r3, [r7, #392] ; 0x188 - 80064d8: fa93 f3a3 rbit r3, r3 - 80064dc: f8c7 3184 str.w r3, [r7, #388] ; 0x184 - 80064e0: 2302 movs r3, #2 - 80064e2: f8c7 3180 str.w r3, [r7, #384] ; 0x180 - 80064e6: f8d7 3180 ldr.w r3, [r7, #384] ; 0x180 - 80064ea: fa93 f3a3 rbit r3, r3 - 80064ee: f8c7 317c str.w r3, [r7, #380] ; 0x17c - 80064f2: 4bb2 ldr r3, [pc, #712] ; (80067bc ) - 80064f4: 6a5b ldr r3, [r3, #36] ; 0x24 - 80064f6: 2202 movs r2, #2 - 80064f8: f8c7 2178 str.w r2, [r7, #376] ; 0x178 - 80064fc: f8d7 2178 ldr.w r2, [r7, #376] ; 0x178 - 8006500: fa92 f2a2 rbit r2, r2 - 8006504: f8c7 2174 str.w r2, [r7, #372] ; 0x174 - return result; - 8006508: f8d7 2174 ldr.w r2, [r7, #372] ; 0x174 - 800650c: fab2 f282 clz r2, r2 - 8006510: b2d2 uxtb r2, r2 - 8006512: f042 0220 orr.w r2, r2, #32 - 8006516: b2d2 uxtb r2, r2 - 8006518: f002 021f and.w r2, r2, #31 - 800651c: 2101 movs r1, #1 - 800651e: fa01 f202 lsl.w r2, r1, r2 - 8006522: 4013 ands r3, r2 - 8006524: 2b00 cmp r3, #0 - 8006526: d007 beq.n 8006538 - 8006528: 1d3b adds r3, r7, #4 - 800652a: 681b ldr r3, [r3, #0] - 800652c: 691b ldr r3, [r3, #16] - 800652e: 2b01 cmp r3, #1 - 8006530: d002 beq.n 8006538 - { - return HAL_ERROR; - 8006532: 2301 movs r3, #1 - 8006534: f000 bd1b b.w 8006f6e - } - /* Otherwise, just the calibration is allowed */ - else - { - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8006538: 4ba0 ldr r3, [pc, #640] ; (80067bc ) - 800653a: 681b ldr r3, [r3, #0] - 800653c: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8006540: 1d3b adds r3, r7, #4 - 8006542: 681b ldr r3, [r3, #0] - 8006544: 695b ldr r3, [r3, #20] - 8006546: 21f8 movs r1, #248 ; 0xf8 - 8006548: f8c7 1170 str.w r1, [r7, #368] ; 0x170 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800654c: f8d7 1170 ldr.w r1, [r7, #368] ; 0x170 - 8006550: fa91 f1a1 rbit r1, r1 - 8006554: f8c7 116c str.w r1, [r7, #364] ; 0x16c - return result; - 8006558: f8d7 116c ldr.w r1, [r7, #364] ; 0x16c - 800655c: fab1 f181 clz r1, r1 - 8006560: b2c9 uxtb r1, r1 - 8006562: 408b lsls r3, r1 - 8006564: 4995 ldr r1, [pc, #596] ; (80067bc ) - 8006566: 4313 orrs r3, r2 - 8006568: 600b str r3, [r1, #0] - if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 800656a: e0f5 b.n 8006758 - } - } - else - { - /* Check the HSI State */ - if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 800656c: 1d3b adds r3, r7, #4 - 800656e: 681b ldr r3, [r3, #0] - 8006570: 691b ldr r3, [r3, #16] - 8006572: 2b00 cmp r3, #0 - 8006574: f000 8085 beq.w 8006682 - 8006578: 2301 movs r3, #1 - 800657a: f8c7 3168 str.w r3, [r7, #360] ; 0x168 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800657e: f8d7 3168 ldr.w r3, [r7, #360] ; 0x168 - 8006582: fa93 f3a3 rbit r3, r3 - 8006586: f8c7 3164 str.w r3, [r7, #356] ; 0x164 - return result; - 800658a: f8d7 3164 ldr.w r3, [r7, #356] ; 0x164 - { - /* Enable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_ENABLE(); - 800658e: fab3 f383 clz r3, r3 - 8006592: b2db uxtb r3, r3 - 8006594: f103 5384 add.w r3, r3, #276824064 ; 0x10800000 - 8006598: f503 1384 add.w r3, r3, #1081344 ; 0x108000 - 800659c: 009b lsls r3, r3, #2 - 800659e: 461a mov r2, r3 - 80065a0: 2301 movs r3, #1 - 80065a2: 6013 str r3, [r2, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 80065a4: f7fc fcd2 bl 8002f4c - 80065a8: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till HSI is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80065ac: e00a b.n 80065c4 - { - if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 80065ae: f7fc fccd bl 8002f4c - 80065b2: 4602 mov r2, r0 - 80065b4: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 80065b8: 1ad3 subs r3, r2, r3 - 80065ba: 2b02 cmp r3, #2 - 80065bc: d902 bls.n 80065c4 - { - return HAL_TIMEOUT; - 80065be: 2303 movs r3, #3 - 80065c0: f000 bcd5 b.w 8006f6e - 80065c4: 2302 movs r3, #2 - 80065c6: f8c7 3160 str.w r3, [r7, #352] ; 0x160 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80065ca: f8d7 3160 ldr.w r3, [r7, #352] ; 0x160 - 80065ce: fa93 f3a3 rbit r3, r3 - 80065d2: f8c7 315c str.w r3, [r7, #348] ; 0x15c - return result; - 80065d6: f8d7 315c ldr.w r3, [r7, #348] ; 0x15c - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80065da: fab3 f383 clz r3, r3 - 80065de: b2db uxtb r3, r3 - 80065e0: 095b lsrs r3, r3, #5 - 80065e2: b2db uxtb r3, r3 - 80065e4: f043 0301 orr.w r3, r3, #1 - 80065e8: b2db uxtb r3, r3 - 80065ea: 2b01 cmp r3, #1 - 80065ec: d102 bne.n 80065f4 - 80065ee: 4b73 ldr r3, [pc, #460] ; (80067bc ) - 80065f0: 681b ldr r3, [r3, #0] - 80065f2: e013 b.n 800661c - 80065f4: 2302 movs r3, #2 - 80065f6: f8c7 3158 str.w r3, [r7, #344] ; 0x158 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80065fa: f8d7 3158 ldr.w r3, [r7, #344] ; 0x158 - 80065fe: fa93 f3a3 rbit r3, r3 - 8006602: f8c7 3154 str.w r3, [r7, #340] ; 0x154 - 8006606: 2302 movs r3, #2 - 8006608: f8c7 3150 str.w r3, [r7, #336] ; 0x150 - 800660c: f8d7 3150 ldr.w r3, [r7, #336] ; 0x150 - 8006610: fa93 f3a3 rbit r3, r3 - 8006614: f8c7 314c str.w r3, [r7, #332] ; 0x14c - 8006618: 4b68 ldr r3, [pc, #416] ; (80067bc ) - 800661a: 6a5b ldr r3, [r3, #36] ; 0x24 - 800661c: 2202 movs r2, #2 - 800661e: f8c7 2148 str.w r2, [r7, #328] ; 0x148 - 8006622: f8d7 2148 ldr.w r2, [r7, #328] ; 0x148 - 8006626: fa92 f2a2 rbit r2, r2 - 800662a: f8c7 2144 str.w r2, [r7, #324] ; 0x144 - return result; - 800662e: f8d7 2144 ldr.w r2, [r7, #324] ; 0x144 - 8006632: fab2 f282 clz r2, r2 - 8006636: b2d2 uxtb r2, r2 - 8006638: f042 0220 orr.w r2, r2, #32 - 800663c: b2d2 uxtb r2, r2 - 800663e: f002 021f and.w r2, r2, #31 - 8006642: 2101 movs r1, #1 - 8006644: fa01 f202 lsl.w r2, r1, r2 - 8006648: 4013 ands r3, r2 - 800664a: 2b00 cmp r3, #0 - 800664c: d0af beq.n 80065ae - } - } - - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 800664e: 4b5b ldr r3, [pc, #364] ; (80067bc ) - 8006650: 681b ldr r3, [r3, #0] - 8006652: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8006656: 1d3b adds r3, r7, #4 - 8006658: 681b ldr r3, [r3, #0] - 800665a: 695b ldr r3, [r3, #20] - 800665c: 21f8 movs r1, #248 ; 0xf8 - 800665e: f8c7 1140 str.w r1, [r7, #320] ; 0x140 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006662: f8d7 1140 ldr.w r1, [r7, #320] ; 0x140 - 8006666: fa91 f1a1 rbit r1, r1 - 800666a: f8c7 113c str.w r1, [r7, #316] ; 0x13c - return result; - 800666e: f8d7 113c ldr.w r1, [r7, #316] ; 0x13c - 8006672: fab1 f181 clz r1, r1 - 8006676: b2c9 uxtb r1, r1 - 8006678: 408b lsls r3, r1 - 800667a: 4950 ldr r1, [pc, #320] ; (80067bc ) - 800667c: 4313 orrs r3, r2 - 800667e: 600b str r3, [r1, #0] - 8006680: e06a b.n 8006758 - 8006682: 2301 movs r3, #1 - 8006684: f8c7 3138 str.w r3, [r7, #312] ; 0x138 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006688: f8d7 3138 ldr.w r3, [r7, #312] ; 0x138 - 800668c: fa93 f3a3 rbit r3, r3 - 8006690: f8c7 3134 str.w r3, [r7, #308] ; 0x134 - return result; - 8006694: f8d7 3134 ldr.w r3, [r7, #308] ; 0x134 - } - else - { - /* Disable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_DISABLE(); - 8006698: fab3 f383 clz r3, r3 - 800669c: b2db uxtb r3, r3 - 800669e: f103 5384 add.w r3, r3, #276824064 ; 0x10800000 - 80066a2: f503 1384 add.w r3, r3, #1081344 ; 0x108000 - 80066a6: 009b lsls r3, r3, #2 - 80066a8: 461a mov r2, r3 - 80066aa: 2300 movs r3, #0 - 80066ac: 6013 str r3, [r2, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 80066ae: f7fc fc4d bl 8002f4c - 80066b2: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till HSI is disabled */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80066b6: e00a b.n 80066ce - { - if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 80066b8: f7fc fc48 bl 8002f4c - 80066bc: 4602 mov r2, r0 - 80066be: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 80066c2: 1ad3 subs r3, r2, r3 - 80066c4: 2b02 cmp r3, #2 - 80066c6: d902 bls.n 80066ce - { - return HAL_TIMEOUT; - 80066c8: 2303 movs r3, #3 - 80066ca: f000 bc50 b.w 8006f6e - 80066ce: 2302 movs r3, #2 - 80066d0: f8c7 3130 str.w r3, [r7, #304] ; 0x130 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80066d4: f8d7 3130 ldr.w r3, [r7, #304] ; 0x130 - 80066d8: fa93 f3a3 rbit r3, r3 - 80066dc: f8c7 312c str.w r3, [r7, #300] ; 0x12c - return result; - 80066e0: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80066e4: fab3 f383 clz r3, r3 - 80066e8: b2db uxtb r3, r3 - 80066ea: 095b lsrs r3, r3, #5 - 80066ec: b2db uxtb r3, r3 - 80066ee: f043 0301 orr.w r3, r3, #1 - 80066f2: b2db uxtb r3, r3 - 80066f4: 2b01 cmp r3, #1 - 80066f6: d102 bne.n 80066fe - 80066f8: 4b30 ldr r3, [pc, #192] ; (80067bc ) - 80066fa: 681b ldr r3, [r3, #0] - 80066fc: e013 b.n 8006726 - 80066fe: 2302 movs r3, #2 - 8006700: f8c7 3128 str.w r3, [r7, #296] ; 0x128 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006704: f8d7 3128 ldr.w r3, [r7, #296] ; 0x128 - 8006708: fa93 f3a3 rbit r3, r3 - 800670c: f8c7 3124 str.w r3, [r7, #292] ; 0x124 - 8006710: 2302 movs r3, #2 - 8006712: f8c7 3120 str.w r3, [r7, #288] ; 0x120 - 8006716: f8d7 3120 ldr.w r3, [r7, #288] ; 0x120 - 800671a: fa93 f3a3 rbit r3, r3 - 800671e: f8c7 311c str.w r3, [r7, #284] ; 0x11c - 8006722: 4b26 ldr r3, [pc, #152] ; (80067bc ) - 8006724: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006726: 2202 movs r2, #2 - 8006728: f8c7 2118 str.w r2, [r7, #280] ; 0x118 - 800672c: f8d7 2118 ldr.w r2, [r7, #280] ; 0x118 - 8006730: fa92 f2a2 rbit r2, r2 - 8006734: f8c7 2114 str.w r2, [r7, #276] ; 0x114 - return result; - 8006738: f8d7 2114 ldr.w r2, [r7, #276] ; 0x114 - 800673c: fab2 f282 clz r2, r2 - 8006740: b2d2 uxtb r2, r2 - 8006742: f042 0220 orr.w r2, r2, #32 - 8006746: b2d2 uxtb r2, r2 - 8006748: f002 021f and.w r2, r2, #31 - 800674c: 2101 movs r1, #1 - 800674e: fa01 f202 lsl.w r2, r1, r2 - 8006752: 4013 ands r3, r2 - 8006754: 2b00 cmp r3, #0 - 8006756: d1af bne.n 80066b8 - } - } - } - } - /*------------------------------ LSI Configuration -------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8006758: 1d3b adds r3, r7, #4 - 800675a: 681b ldr r3, [r3, #0] - 800675c: 681b ldr r3, [r3, #0] - 800675e: f003 0308 and.w r3, r3, #8 - 8006762: 2b00 cmp r3, #0 - 8006764: f000 80da beq.w 800691c - { - /* Check the parameters */ - assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); - - /* Check the LSI State */ - if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 8006768: 1d3b adds r3, r7, #4 - 800676a: 681b ldr r3, [r3, #0] - 800676c: 699b ldr r3, [r3, #24] - 800676e: 2b00 cmp r3, #0 - 8006770: d069 beq.n 8006846 - 8006772: 2301 movs r3, #1 - 8006774: f8c7 3110 str.w r3, [r7, #272] ; 0x110 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006778: f8d7 3110 ldr.w r3, [r7, #272] ; 0x110 - 800677c: fa93 f3a3 rbit r3, r3 - 8006780: f8c7 310c str.w r3, [r7, #268] ; 0x10c - return result; - 8006784: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c - { - /* Enable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_ENABLE(); - 8006788: fab3 f383 clz r3, r3 - 800678c: b2db uxtb r3, r3 - 800678e: 461a mov r2, r3 - 8006790: 4b0b ldr r3, [pc, #44] ; (80067c0 ) - 8006792: 4413 add r3, r2 - 8006794: 009b lsls r3, r3, #2 - 8006796: 461a mov r2, r3 - 8006798: 2301 movs r3, #1 - 800679a: 6013 str r3, [r2, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 800679c: f7fc fbd6 bl 8002f4c - 80067a0: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till LSI is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 80067a4: e00e b.n 80067c4 - { - if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 80067a6: f7fc fbd1 bl 8002f4c - 80067aa: 4602 mov r2, r0 - 80067ac: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 80067b0: 1ad3 subs r3, r2, r3 - 80067b2: 2b02 cmp r3, #2 - 80067b4: d906 bls.n 80067c4 - { - return HAL_TIMEOUT; - 80067b6: 2303 movs r3, #3 - 80067b8: e3d9 b.n 8006f6e - 80067ba: bf00 nop - 80067bc: 40021000 .word 0x40021000 - 80067c0: 10908120 .word 0x10908120 - 80067c4: 2302 movs r3, #2 - 80067c6: f8c7 3108 str.w r3, [r7, #264] ; 0x108 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80067ca: f8d7 3108 ldr.w r3, [r7, #264] ; 0x108 - 80067ce: fa93 f3a3 rbit r3, r3 - 80067d2: f8c7 3104 str.w r3, [r7, #260] ; 0x104 - 80067d6: f507 7380 add.w r3, r7, #256 ; 0x100 - 80067da: 2202 movs r2, #2 - 80067dc: 601a str r2, [r3, #0] - 80067de: f507 7380 add.w r3, r7, #256 ; 0x100 - 80067e2: 681b ldr r3, [r3, #0] - 80067e4: fa93 f2a3 rbit r2, r3 - 80067e8: f107 03fc add.w r3, r7, #252 ; 0xfc - 80067ec: 601a str r2, [r3, #0] - 80067ee: f107 03f8 add.w r3, r7, #248 ; 0xf8 - 80067f2: 2202 movs r2, #2 - 80067f4: 601a str r2, [r3, #0] - 80067f6: f107 03f8 add.w r3, r7, #248 ; 0xf8 - 80067fa: 681b ldr r3, [r3, #0] - 80067fc: fa93 f2a3 rbit r2, r3 - 8006800: f107 03f4 add.w r3, r7, #244 ; 0xf4 - 8006804: 601a str r2, [r3, #0] - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8006806: 4ba5 ldr r3, [pc, #660] ; (8006a9c ) - 8006808: 6a5a ldr r2, [r3, #36] ; 0x24 - 800680a: f107 03f0 add.w r3, r7, #240 ; 0xf0 - 800680e: 2102 movs r1, #2 - 8006810: 6019 str r1, [r3, #0] - 8006812: f107 03f0 add.w r3, r7, #240 ; 0xf0 - 8006816: 681b ldr r3, [r3, #0] - 8006818: fa93 f1a3 rbit r1, r3 - 800681c: f107 03ec add.w r3, r7, #236 ; 0xec - 8006820: 6019 str r1, [r3, #0] - return result; - 8006822: f107 03ec add.w r3, r7, #236 ; 0xec - 8006826: 681b ldr r3, [r3, #0] - 8006828: fab3 f383 clz r3, r3 - 800682c: b2db uxtb r3, r3 - 800682e: f043 0360 orr.w r3, r3, #96 ; 0x60 - 8006832: b2db uxtb r3, r3 - 8006834: f003 031f and.w r3, r3, #31 - 8006838: 2101 movs r1, #1 - 800683a: fa01 f303 lsl.w r3, r1, r3 - 800683e: 4013 ands r3, r2 - 8006840: 2b00 cmp r3, #0 - 8006842: d0b0 beq.n 80067a6 - 8006844: e06a b.n 800691c - 8006846: f107 03e8 add.w r3, r7, #232 ; 0xe8 - 800684a: 2201 movs r2, #1 - 800684c: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800684e: f107 03e8 add.w r3, r7, #232 ; 0xe8 - 8006852: 681b ldr r3, [r3, #0] - 8006854: fa93 f2a3 rbit r2, r3 - 8006858: f107 03e4 add.w r3, r7, #228 ; 0xe4 - 800685c: 601a str r2, [r3, #0] - return result; - 800685e: f107 03e4 add.w r3, r7, #228 ; 0xe4 - 8006862: 681b ldr r3, [r3, #0] - } - } - else - { - /* Disable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_DISABLE(); - 8006864: fab3 f383 clz r3, r3 - 8006868: b2db uxtb r3, r3 - 800686a: 461a mov r2, r3 - 800686c: 4b8c ldr r3, [pc, #560] ; (8006aa0 ) - 800686e: 4413 add r3, r2 - 8006870: 009b lsls r3, r3, #2 - 8006872: 461a mov r2, r3 - 8006874: 2300 movs r3, #0 - 8006876: 6013 str r3, [r2, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8006878: f7fc fb68 bl 8002f4c - 800687c: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till LSI is disabled */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8006880: e009 b.n 8006896 - { - if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8006882: f7fc fb63 bl 8002f4c - 8006886: 4602 mov r2, r0 - 8006888: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 800688c: 1ad3 subs r3, r2, r3 - 800688e: 2b02 cmp r3, #2 - 8006890: d901 bls.n 8006896 - { - return HAL_TIMEOUT; - 8006892: 2303 movs r3, #3 - 8006894: e36b b.n 8006f6e - 8006896: f107 03e0 add.w r3, r7, #224 ; 0xe0 - 800689a: 2202 movs r2, #2 - 800689c: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800689e: f107 03e0 add.w r3, r7, #224 ; 0xe0 - 80068a2: 681b ldr r3, [r3, #0] - 80068a4: fa93 f2a3 rbit r2, r3 - 80068a8: f107 03dc add.w r3, r7, #220 ; 0xdc - 80068ac: 601a str r2, [r3, #0] - 80068ae: f107 03d8 add.w r3, r7, #216 ; 0xd8 - 80068b2: 2202 movs r2, #2 - 80068b4: 601a str r2, [r3, #0] - 80068b6: f107 03d8 add.w r3, r7, #216 ; 0xd8 - 80068ba: 681b ldr r3, [r3, #0] - 80068bc: fa93 f2a3 rbit r2, r3 - 80068c0: f107 03d4 add.w r3, r7, #212 ; 0xd4 - 80068c4: 601a str r2, [r3, #0] - 80068c6: f107 03d0 add.w r3, r7, #208 ; 0xd0 - 80068ca: 2202 movs r2, #2 - 80068cc: 601a str r2, [r3, #0] - 80068ce: f107 03d0 add.w r3, r7, #208 ; 0xd0 - 80068d2: 681b ldr r3, [r3, #0] - 80068d4: fa93 f2a3 rbit r2, r3 - 80068d8: f107 03cc add.w r3, r7, #204 ; 0xcc - 80068dc: 601a str r2, [r3, #0] - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 80068de: 4b6f ldr r3, [pc, #444] ; (8006a9c ) - 80068e0: 6a5a ldr r2, [r3, #36] ; 0x24 - 80068e2: f107 03c8 add.w r3, r7, #200 ; 0xc8 - 80068e6: 2102 movs r1, #2 - 80068e8: 6019 str r1, [r3, #0] - 80068ea: f107 03c8 add.w r3, r7, #200 ; 0xc8 - 80068ee: 681b ldr r3, [r3, #0] - 80068f0: fa93 f1a3 rbit r1, r3 - 80068f4: f107 03c4 add.w r3, r7, #196 ; 0xc4 - 80068f8: 6019 str r1, [r3, #0] - return result; - 80068fa: f107 03c4 add.w r3, r7, #196 ; 0xc4 - 80068fe: 681b ldr r3, [r3, #0] - 8006900: fab3 f383 clz r3, r3 - 8006904: b2db uxtb r3, r3 - 8006906: f043 0360 orr.w r3, r3, #96 ; 0x60 - 800690a: b2db uxtb r3, r3 - 800690c: f003 031f and.w r3, r3, #31 - 8006910: 2101 movs r1, #1 - 8006912: fa01 f303 lsl.w r3, r1, r3 - 8006916: 4013 ands r3, r2 - 8006918: 2b00 cmp r3, #0 - 800691a: d1b2 bne.n 8006882 - } - } - } - } - /*------------------------------ LSE Configuration -------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 800691c: 1d3b adds r3, r7, #4 - 800691e: 681b ldr r3, [r3, #0] - 8006920: 681b ldr r3, [r3, #0] - 8006922: f003 0304 and.w r3, r3, #4 - 8006926: 2b00 cmp r3, #0 - 8006928: f000 8158 beq.w 8006bdc - { - FlagStatus pwrclkchanged = RESET; - 800692c: 2300 movs r3, #0 - 800692e: f887 31ff strb.w r3, [r7, #511] ; 0x1ff - /* Check the parameters */ - assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); - - /* Update LSE configuration in Backup Domain control register */ - /* Requires to enable write access to Backup Domain of necessary */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8006932: 4b5a ldr r3, [pc, #360] ; (8006a9c ) - 8006934: 69db ldr r3, [r3, #28] - 8006936: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800693a: 2b00 cmp r3, #0 - 800693c: d112 bne.n 8006964 - { - __HAL_RCC_PWR_CLK_ENABLE(); - 800693e: 4b57 ldr r3, [pc, #348] ; (8006a9c ) - 8006940: 69db ldr r3, [r3, #28] - 8006942: 4a56 ldr r2, [pc, #344] ; (8006a9c ) - 8006944: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8006948: 61d3 str r3, [r2, #28] - 800694a: 4b54 ldr r3, [pc, #336] ; (8006a9c ) - 800694c: 69db ldr r3, [r3, #28] - 800694e: f003 5280 and.w r2, r3, #268435456 ; 0x10000000 - 8006952: f107 0308 add.w r3, r7, #8 - 8006956: 601a str r2, [r3, #0] - 8006958: f107 0308 add.w r3, r7, #8 - 800695c: 681b ldr r3, [r3, #0] - pwrclkchanged = SET; - 800695e: 2301 movs r3, #1 - 8006960: f887 31ff strb.w r3, [r7, #511] ; 0x1ff - } - - if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8006964: 4b4f ldr r3, [pc, #316] ; (8006aa4 ) - 8006966: 681b ldr r3, [r3, #0] - 8006968: f403 7380 and.w r3, r3, #256 ; 0x100 - 800696c: 2b00 cmp r3, #0 - 800696e: d11a bne.n 80069a6 - { - /* Enable write access to Backup domain */ - SET_BIT(PWR->CR, PWR_CR_DBP); - 8006970: 4b4c ldr r3, [pc, #304] ; (8006aa4 ) - 8006972: 681b ldr r3, [r3, #0] - 8006974: 4a4b ldr r2, [pc, #300] ; (8006aa4 ) - 8006976: f443 7380 orr.w r3, r3, #256 ; 0x100 - 800697a: 6013 str r3, [r2, #0] - - /* Wait for Backup domain Write protection disable */ - tickstart = HAL_GetTick(); - 800697c: f7fc fae6 bl 8002f4c - 8006980: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8006984: e009 b.n 800699a - { - if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8006986: f7fc fae1 bl 8002f4c - 800698a: 4602 mov r2, r0 - 800698c: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 8006990: 1ad3 subs r3, r2, r3 - 8006992: 2b64 cmp r3, #100 ; 0x64 - 8006994: d901 bls.n 800699a - { - return HAL_TIMEOUT; - 8006996: 2303 movs r3, #3 - 8006998: e2e9 b.n 8006f6e - while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800699a: 4b42 ldr r3, [pc, #264] ; (8006aa4 ) - 800699c: 681b ldr r3, [r3, #0] - 800699e: f403 7380 and.w r3, r3, #256 ; 0x100 - 80069a2: 2b00 cmp r3, #0 - 80069a4: d0ef beq.n 8006986 - } - } - } - - /* Set the new LSE configuration -----------------------------------------*/ - __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80069a6: 1d3b adds r3, r7, #4 - 80069a8: 681b ldr r3, [r3, #0] - 80069aa: 68db ldr r3, [r3, #12] - 80069ac: 2b01 cmp r3, #1 - 80069ae: d106 bne.n 80069be - 80069b0: 4b3a ldr r3, [pc, #232] ; (8006a9c ) - 80069b2: 6a1b ldr r3, [r3, #32] - 80069b4: 4a39 ldr r2, [pc, #228] ; (8006a9c ) - 80069b6: f043 0301 orr.w r3, r3, #1 - 80069ba: 6213 str r3, [r2, #32] - 80069bc: e02f b.n 8006a1e - 80069be: 1d3b adds r3, r7, #4 - 80069c0: 681b ldr r3, [r3, #0] - 80069c2: 68db ldr r3, [r3, #12] - 80069c4: 2b00 cmp r3, #0 - 80069c6: d10c bne.n 80069e2 - 80069c8: 4b34 ldr r3, [pc, #208] ; (8006a9c ) - 80069ca: 6a1b ldr r3, [r3, #32] - 80069cc: 4a33 ldr r2, [pc, #204] ; (8006a9c ) - 80069ce: f023 0301 bic.w r3, r3, #1 - 80069d2: 6213 str r3, [r2, #32] - 80069d4: 4b31 ldr r3, [pc, #196] ; (8006a9c ) - 80069d6: 6a1b ldr r3, [r3, #32] - 80069d8: 4a30 ldr r2, [pc, #192] ; (8006a9c ) - 80069da: f023 0304 bic.w r3, r3, #4 - 80069de: 6213 str r3, [r2, #32] - 80069e0: e01d b.n 8006a1e - 80069e2: 1d3b adds r3, r7, #4 - 80069e4: 681b ldr r3, [r3, #0] - 80069e6: 68db ldr r3, [r3, #12] - 80069e8: 2b05 cmp r3, #5 - 80069ea: d10c bne.n 8006a06 - 80069ec: 4b2b ldr r3, [pc, #172] ; (8006a9c ) - 80069ee: 6a1b ldr r3, [r3, #32] - 80069f0: 4a2a ldr r2, [pc, #168] ; (8006a9c ) - 80069f2: f043 0304 orr.w r3, r3, #4 - 80069f6: 6213 str r3, [r2, #32] - 80069f8: 4b28 ldr r3, [pc, #160] ; (8006a9c ) - 80069fa: 6a1b ldr r3, [r3, #32] - 80069fc: 4a27 ldr r2, [pc, #156] ; (8006a9c ) - 80069fe: f043 0301 orr.w r3, r3, #1 - 8006a02: 6213 str r3, [r2, #32] - 8006a04: e00b b.n 8006a1e - 8006a06: 4b25 ldr r3, [pc, #148] ; (8006a9c ) - 8006a08: 6a1b ldr r3, [r3, #32] - 8006a0a: 4a24 ldr r2, [pc, #144] ; (8006a9c ) - 8006a0c: f023 0301 bic.w r3, r3, #1 - 8006a10: 6213 str r3, [r2, #32] - 8006a12: 4b22 ldr r3, [pc, #136] ; (8006a9c ) - 8006a14: 6a1b ldr r3, [r3, #32] - 8006a16: 4a21 ldr r2, [pc, #132] ; (8006a9c ) - 8006a18: f023 0304 bic.w r3, r3, #4 - 8006a1c: 6213 str r3, [r2, #32] - /* Check the LSE State */ - if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8006a1e: 1d3b adds r3, r7, #4 - 8006a20: 681b ldr r3, [r3, #0] - 8006a22: 68db ldr r3, [r3, #12] - 8006a24: 2b00 cmp r3, #0 - 8006a26: d06b beq.n 8006b00 - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8006a28: f7fc fa90 bl 8002f4c - 8006a2c: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till LSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8006a30: e00b b.n 8006a4a - { - if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8006a32: f7fc fa8b bl 8002f4c - 8006a36: 4602 mov r2, r0 - 8006a38: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 8006a3c: 1ad3 subs r3, r2, r3 - 8006a3e: f241 3288 movw r2, #5000 ; 0x1388 - 8006a42: 4293 cmp r3, r2 - 8006a44: d901 bls.n 8006a4a - { - return HAL_TIMEOUT; - 8006a46: 2303 movs r3, #3 - 8006a48: e291 b.n 8006f6e - 8006a4a: f107 03c0 add.w r3, r7, #192 ; 0xc0 - 8006a4e: 2202 movs r2, #2 - 8006a50: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006a52: f107 03c0 add.w r3, r7, #192 ; 0xc0 - 8006a56: 681b ldr r3, [r3, #0] - 8006a58: fa93 f2a3 rbit r2, r3 - 8006a5c: f107 03bc add.w r3, r7, #188 ; 0xbc - 8006a60: 601a str r2, [r3, #0] - 8006a62: f107 03b8 add.w r3, r7, #184 ; 0xb8 - 8006a66: 2202 movs r2, #2 - 8006a68: 601a str r2, [r3, #0] - 8006a6a: f107 03b8 add.w r3, r7, #184 ; 0xb8 - 8006a6e: 681b ldr r3, [r3, #0] - 8006a70: fa93 f2a3 rbit r2, r3 - 8006a74: f107 03b4 add.w r3, r7, #180 ; 0xb4 - 8006a78: 601a str r2, [r3, #0] - return result; - 8006a7a: f107 03b4 add.w r3, r7, #180 ; 0xb4 - 8006a7e: 681b ldr r3, [r3, #0] - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8006a80: fab3 f383 clz r3, r3 - 8006a84: b2db uxtb r3, r3 - 8006a86: 095b lsrs r3, r3, #5 - 8006a88: b2db uxtb r3, r3 - 8006a8a: f043 0302 orr.w r3, r3, #2 - 8006a8e: b2db uxtb r3, r3 - 8006a90: 2b02 cmp r3, #2 - 8006a92: d109 bne.n 8006aa8 - 8006a94: 4b01 ldr r3, [pc, #4] ; (8006a9c ) - 8006a96: 6a1b ldr r3, [r3, #32] - 8006a98: e014 b.n 8006ac4 - 8006a9a: bf00 nop - 8006a9c: 40021000 .word 0x40021000 - 8006aa0: 10908120 .word 0x10908120 - 8006aa4: 40007000 .word 0x40007000 - 8006aa8: f107 03b0 add.w r3, r7, #176 ; 0xb0 - 8006aac: 2202 movs r2, #2 - 8006aae: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006ab0: f107 03b0 add.w r3, r7, #176 ; 0xb0 - 8006ab4: 681b ldr r3, [r3, #0] - 8006ab6: fa93 f2a3 rbit r2, r3 - 8006aba: f107 03ac add.w r3, r7, #172 ; 0xac - 8006abe: 601a str r2, [r3, #0] - 8006ac0: 4bbb ldr r3, [pc, #748] ; (8006db0 ) - 8006ac2: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006ac4: f107 02a8 add.w r2, r7, #168 ; 0xa8 - 8006ac8: 2102 movs r1, #2 - 8006aca: 6011 str r1, [r2, #0] - 8006acc: f107 02a8 add.w r2, r7, #168 ; 0xa8 - 8006ad0: 6812 ldr r2, [r2, #0] - 8006ad2: fa92 f1a2 rbit r1, r2 - 8006ad6: f107 02a4 add.w r2, r7, #164 ; 0xa4 - 8006ada: 6011 str r1, [r2, #0] - return result; - 8006adc: f107 02a4 add.w r2, r7, #164 ; 0xa4 - 8006ae0: 6812 ldr r2, [r2, #0] - 8006ae2: fab2 f282 clz r2, r2 - 8006ae6: b2d2 uxtb r2, r2 - 8006ae8: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8006aec: b2d2 uxtb r2, r2 - 8006aee: f002 021f and.w r2, r2, #31 - 8006af2: 2101 movs r1, #1 - 8006af4: fa01 f202 lsl.w r2, r1, r2 - 8006af8: 4013 ands r3, r2 - 8006afa: 2b00 cmp r3, #0 - 8006afc: d099 beq.n 8006a32 - 8006afe: e063 b.n 8006bc8 - } - } - else - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8006b00: f7fc fa24 bl 8002f4c - 8006b04: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till LSE is disabled */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8006b08: e00b b.n 8006b22 - { - if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8006b0a: f7fc fa1f bl 8002f4c - 8006b0e: 4602 mov r2, r0 - 8006b10: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 8006b14: 1ad3 subs r3, r2, r3 - 8006b16: f241 3288 movw r2, #5000 ; 0x1388 - 8006b1a: 4293 cmp r3, r2 - 8006b1c: d901 bls.n 8006b22 - { - return HAL_TIMEOUT; - 8006b1e: 2303 movs r3, #3 - 8006b20: e225 b.n 8006f6e - 8006b22: f107 03a0 add.w r3, r7, #160 ; 0xa0 - 8006b26: 2202 movs r2, #2 - 8006b28: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006b2a: f107 03a0 add.w r3, r7, #160 ; 0xa0 - 8006b2e: 681b ldr r3, [r3, #0] - 8006b30: fa93 f2a3 rbit r2, r3 - 8006b34: f107 039c add.w r3, r7, #156 ; 0x9c - 8006b38: 601a str r2, [r3, #0] - 8006b3a: f107 0398 add.w r3, r7, #152 ; 0x98 - 8006b3e: 2202 movs r2, #2 - 8006b40: 601a str r2, [r3, #0] - 8006b42: f107 0398 add.w r3, r7, #152 ; 0x98 - 8006b46: 681b ldr r3, [r3, #0] - 8006b48: fa93 f2a3 rbit r2, r3 - 8006b4c: f107 0394 add.w r3, r7, #148 ; 0x94 - 8006b50: 601a str r2, [r3, #0] - return result; - 8006b52: f107 0394 add.w r3, r7, #148 ; 0x94 - 8006b56: 681b ldr r3, [r3, #0] - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8006b58: fab3 f383 clz r3, r3 - 8006b5c: b2db uxtb r3, r3 - 8006b5e: 095b lsrs r3, r3, #5 - 8006b60: b2db uxtb r3, r3 - 8006b62: f043 0302 orr.w r3, r3, #2 - 8006b66: b2db uxtb r3, r3 - 8006b68: 2b02 cmp r3, #2 - 8006b6a: d102 bne.n 8006b72 - 8006b6c: 4b90 ldr r3, [pc, #576] ; (8006db0 ) - 8006b6e: 6a1b ldr r3, [r3, #32] - 8006b70: e00d b.n 8006b8e - 8006b72: f107 0390 add.w r3, r7, #144 ; 0x90 - 8006b76: 2202 movs r2, #2 - 8006b78: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006b7a: f107 0390 add.w r3, r7, #144 ; 0x90 - 8006b7e: 681b ldr r3, [r3, #0] - 8006b80: fa93 f2a3 rbit r2, r3 - 8006b84: f107 038c add.w r3, r7, #140 ; 0x8c - 8006b88: 601a str r2, [r3, #0] - 8006b8a: 4b89 ldr r3, [pc, #548] ; (8006db0 ) - 8006b8c: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006b8e: f107 0288 add.w r2, r7, #136 ; 0x88 - 8006b92: 2102 movs r1, #2 - 8006b94: 6011 str r1, [r2, #0] - 8006b96: f107 0288 add.w r2, r7, #136 ; 0x88 - 8006b9a: 6812 ldr r2, [r2, #0] - 8006b9c: fa92 f1a2 rbit r1, r2 - 8006ba0: f107 0284 add.w r2, r7, #132 ; 0x84 - 8006ba4: 6011 str r1, [r2, #0] - return result; - 8006ba6: f107 0284 add.w r2, r7, #132 ; 0x84 - 8006baa: 6812 ldr r2, [r2, #0] - 8006bac: fab2 f282 clz r2, r2 - 8006bb0: b2d2 uxtb r2, r2 - 8006bb2: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8006bb6: b2d2 uxtb r2, r2 - 8006bb8: f002 021f and.w r2, r2, #31 - 8006bbc: 2101 movs r1, #1 - 8006bbe: fa01 f202 lsl.w r2, r1, r2 - 8006bc2: 4013 ands r3, r2 - 8006bc4: 2b00 cmp r3, #0 - 8006bc6: d1a0 bne.n 8006b0a - } - } - } - - /* Require to disable power clock if necessary */ - if(pwrclkchanged == SET) - 8006bc8: f897 31ff ldrb.w r3, [r7, #511] ; 0x1ff - 8006bcc: 2b01 cmp r3, #1 - 8006bce: d105 bne.n 8006bdc - { - __HAL_RCC_PWR_CLK_DISABLE(); - 8006bd0: 4b77 ldr r3, [pc, #476] ; (8006db0 ) - 8006bd2: 69db ldr r3, [r3, #28] - 8006bd4: 4a76 ldr r2, [pc, #472] ; (8006db0 ) - 8006bd6: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 8006bda: 61d3 str r3, [r2, #28] - } - - /*-------------------------------- PLL Configuration -----------------------*/ - /* Check the parameters */ - assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); - if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 8006bdc: 1d3b adds r3, r7, #4 - 8006bde: 681b ldr r3, [r3, #0] - 8006be0: 69db ldr r3, [r3, #28] - 8006be2: 2b00 cmp r3, #0 - 8006be4: f000 81c2 beq.w 8006f6c - { - /* Check if the PLL is used as system clock or not */ - if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8006be8: 4b71 ldr r3, [pc, #452] ; (8006db0 ) - 8006bea: 685b ldr r3, [r3, #4] - 8006bec: f003 030c and.w r3, r3, #12 - 8006bf0: 2b08 cmp r3, #8 - 8006bf2: f000 819c beq.w 8006f2e - { - if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 8006bf6: 1d3b adds r3, r7, #4 - 8006bf8: 681b ldr r3, [r3, #0] - 8006bfa: 69db ldr r3, [r3, #28] - 8006bfc: 2b02 cmp r3, #2 - 8006bfe: f040 8114 bne.w 8006e2a - 8006c02: f107 0380 add.w r3, r7, #128 ; 0x80 - 8006c06: f04f 7280 mov.w r2, #16777216 ; 0x1000000 - 8006c0a: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006c0c: f107 0380 add.w r3, r7, #128 ; 0x80 - 8006c10: 681b ldr r3, [r3, #0] - 8006c12: fa93 f2a3 rbit r2, r3 - 8006c16: f107 037c add.w r3, r7, #124 ; 0x7c - 8006c1a: 601a str r2, [r3, #0] - return result; - 8006c1c: f107 037c add.w r3, r7, #124 ; 0x7c - 8006c20: 681b ldr r3, [r3, #0] -#if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) - assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); -#endif - - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - 8006c22: fab3 f383 clz r3, r3 - 8006c26: b2db uxtb r3, r3 - 8006c28: f103 5384 add.w r3, r3, #276824064 ; 0x10800000 - 8006c2c: f503 1384 add.w r3, r3, #1081344 ; 0x108000 - 8006c30: 009b lsls r3, r3, #2 - 8006c32: 461a mov r2, r3 - 8006c34: 2300 movs r3, #0 - 8006c36: 6013 str r3, [r2, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8006c38: f7fc f988 bl 8002f4c - 8006c3c: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till PLL is disabled */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8006c40: e009 b.n 8006c56 - { - if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8006c42: f7fc f983 bl 8002f4c - 8006c46: 4602 mov r2, r0 - 8006c48: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 8006c4c: 1ad3 subs r3, r2, r3 - 8006c4e: 2b02 cmp r3, #2 - 8006c50: d901 bls.n 8006c56 - { - return HAL_TIMEOUT; - 8006c52: 2303 movs r3, #3 - 8006c54: e18b b.n 8006f6e - 8006c56: f107 0378 add.w r3, r7, #120 ; 0x78 - 8006c5a: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 8006c5e: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006c60: f107 0378 add.w r3, r7, #120 ; 0x78 - 8006c64: 681b ldr r3, [r3, #0] - 8006c66: fa93 f2a3 rbit r2, r3 - 8006c6a: f107 0374 add.w r3, r7, #116 ; 0x74 - 8006c6e: 601a str r2, [r3, #0] - return result; - 8006c70: f107 0374 add.w r3, r7, #116 ; 0x74 - 8006c74: 681b ldr r3, [r3, #0] - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8006c76: fab3 f383 clz r3, r3 - 8006c7a: b2db uxtb r3, r3 - 8006c7c: 095b lsrs r3, r3, #5 - 8006c7e: b2db uxtb r3, r3 - 8006c80: f043 0301 orr.w r3, r3, #1 - 8006c84: b2db uxtb r3, r3 - 8006c86: 2b01 cmp r3, #1 - 8006c88: d102 bne.n 8006c90 - 8006c8a: 4b49 ldr r3, [pc, #292] ; (8006db0 ) - 8006c8c: 681b ldr r3, [r3, #0] - 8006c8e: e01b b.n 8006cc8 - 8006c90: f107 0370 add.w r3, r7, #112 ; 0x70 - 8006c94: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 8006c98: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006c9a: f107 0370 add.w r3, r7, #112 ; 0x70 - 8006c9e: 681b ldr r3, [r3, #0] - 8006ca0: fa93 f2a3 rbit r2, r3 - 8006ca4: f107 036c add.w r3, r7, #108 ; 0x6c - 8006ca8: 601a str r2, [r3, #0] - 8006caa: f107 0368 add.w r3, r7, #104 ; 0x68 - 8006cae: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 8006cb2: 601a str r2, [r3, #0] - 8006cb4: f107 0368 add.w r3, r7, #104 ; 0x68 - 8006cb8: 681b ldr r3, [r3, #0] - 8006cba: fa93 f2a3 rbit r2, r3 - 8006cbe: f107 0364 add.w r3, r7, #100 ; 0x64 - 8006cc2: 601a str r2, [r3, #0] - 8006cc4: 4b3a ldr r3, [pc, #232] ; (8006db0 ) - 8006cc6: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006cc8: f107 0260 add.w r2, r7, #96 ; 0x60 - 8006ccc: f04f 7100 mov.w r1, #33554432 ; 0x2000000 - 8006cd0: 6011 str r1, [r2, #0] - 8006cd2: f107 0260 add.w r2, r7, #96 ; 0x60 - 8006cd6: 6812 ldr r2, [r2, #0] - 8006cd8: fa92 f1a2 rbit r1, r2 - 8006cdc: f107 025c add.w r2, r7, #92 ; 0x5c - 8006ce0: 6011 str r1, [r2, #0] - return result; - 8006ce2: f107 025c add.w r2, r7, #92 ; 0x5c - 8006ce6: 6812 ldr r2, [r2, #0] - 8006ce8: fab2 f282 clz r2, r2 - 8006cec: b2d2 uxtb r2, r2 - 8006cee: f042 0220 orr.w r2, r2, #32 - 8006cf2: b2d2 uxtb r2, r2 - 8006cf4: f002 021f and.w r2, r2, #31 - 8006cf8: 2101 movs r1, #1 - 8006cfa: fa01 f202 lsl.w r2, r1, r2 - 8006cfe: 4013 ands r3, r2 - 8006d00: 2b00 cmp r3, #0 - 8006d02: d19e bne.n 8006c42 - __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - RCC_OscInitStruct->PLL.PREDIV, - RCC_OscInitStruct->PLL.PLLMUL); -#else - /* Configure the main PLL clock source and multiplication factor. */ - __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8006d04: 4b2a ldr r3, [pc, #168] ; (8006db0 ) - 8006d06: 685b ldr r3, [r3, #4] - 8006d08: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000 - 8006d0c: 1d3b adds r3, r7, #4 - 8006d0e: 681b ldr r3, [r3, #0] - 8006d10: 6a59 ldr r1, [r3, #36] ; 0x24 - 8006d12: 1d3b adds r3, r7, #4 - 8006d14: 681b ldr r3, [r3, #0] - 8006d16: 6a1b ldr r3, [r3, #32] - 8006d18: 430b orrs r3, r1 - 8006d1a: 4925 ldr r1, [pc, #148] ; (8006db0 ) - 8006d1c: 4313 orrs r3, r2 - 8006d1e: 604b str r3, [r1, #4] - 8006d20: f107 0358 add.w r3, r7, #88 ; 0x58 - 8006d24: f04f 7280 mov.w r2, #16777216 ; 0x1000000 - 8006d28: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006d2a: f107 0358 add.w r3, r7, #88 ; 0x58 - 8006d2e: 681b ldr r3, [r3, #0] - 8006d30: fa93 f2a3 rbit r2, r3 - 8006d34: f107 0354 add.w r3, r7, #84 ; 0x54 - 8006d38: 601a str r2, [r3, #0] - return result; - 8006d3a: f107 0354 add.w r3, r7, #84 ; 0x54 - 8006d3e: 681b ldr r3, [r3, #0] - RCC_OscInitStruct->PLL.PLLMUL); -#endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ - /* Enable the main PLL. */ - __HAL_RCC_PLL_ENABLE(); - 8006d40: fab3 f383 clz r3, r3 - 8006d44: b2db uxtb r3, r3 - 8006d46: f103 5384 add.w r3, r3, #276824064 ; 0x10800000 - 8006d4a: f503 1384 add.w r3, r3, #1081344 ; 0x108000 - 8006d4e: 009b lsls r3, r3, #2 - 8006d50: 461a mov r2, r3 - 8006d52: 2301 movs r3, #1 - 8006d54: 6013 str r3, [r2, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8006d56: f7fc f8f9 bl 8002f4c - 8006d5a: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till PLL is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8006d5e: e009 b.n 8006d74 - { - if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8006d60: f7fc f8f4 bl 8002f4c - 8006d64: 4602 mov r2, r0 - 8006d66: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 8006d6a: 1ad3 subs r3, r2, r3 - 8006d6c: 2b02 cmp r3, #2 - 8006d6e: d901 bls.n 8006d74 - { - return HAL_TIMEOUT; - 8006d70: 2303 movs r3, #3 - 8006d72: e0fc b.n 8006f6e - 8006d74: f107 0350 add.w r3, r7, #80 ; 0x50 - 8006d78: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 8006d7c: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006d7e: f107 0350 add.w r3, r7, #80 ; 0x50 - 8006d82: 681b ldr r3, [r3, #0] - 8006d84: fa93 f2a3 rbit r2, r3 - 8006d88: f107 034c add.w r3, r7, #76 ; 0x4c - 8006d8c: 601a str r2, [r3, #0] - return result; - 8006d8e: f107 034c add.w r3, r7, #76 ; 0x4c - 8006d92: 681b ldr r3, [r3, #0] - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8006d94: fab3 f383 clz r3, r3 - 8006d98: b2db uxtb r3, r3 - 8006d9a: 095b lsrs r3, r3, #5 - 8006d9c: b2db uxtb r3, r3 - 8006d9e: f043 0301 orr.w r3, r3, #1 - 8006da2: b2db uxtb r3, r3 - 8006da4: 2b01 cmp r3, #1 - 8006da6: d105 bne.n 8006db4 - 8006da8: 4b01 ldr r3, [pc, #4] ; (8006db0 ) - 8006daa: 681b ldr r3, [r3, #0] - 8006dac: e01e b.n 8006dec - 8006dae: bf00 nop - 8006db0: 40021000 .word 0x40021000 - 8006db4: f107 0348 add.w r3, r7, #72 ; 0x48 - 8006db8: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 8006dbc: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006dbe: f107 0348 add.w r3, r7, #72 ; 0x48 - 8006dc2: 681b ldr r3, [r3, #0] - 8006dc4: fa93 f2a3 rbit r2, r3 - 8006dc8: f107 0344 add.w r3, r7, #68 ; 0x44 - 8006dcc: 601a str r2, [r3, #0] - 8006dce: f107 0340 add.w r3, r7, #64 ; 0x40 - 8006dd2: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 8006dd6: 601a str r2, [r3, #0] - 8006dd8: f107 0340 add.w r3, r7, #64 ; 0x40 - 8006ddc: 681b ldr r3, [r3, #0] - 8006dde: fa93 f2a3 rbit r2, r3 - 8006de2: f107 033c add.w r3, r7, #60 ; 0x3c - 8006de6: 601a str r2, [r3, #0] - 8006de8: 4b63 ldr r3, [pc, #396] ; (8006f78 ) - 8006dea: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006dec: f107 0238 add.w r2, r7, #56 ; 0x38 - 8006df0: f04f 7100 mov.w r1, #33554432 ; 0x2000000 - 8006df4: 6011 str r1, [r2, #0] - 8006df6: f107 0238 add.w r2, r7, #56 ; 0x38 - 8006dfa: 6812 ldr r2, [r2, #0] - 8006dfc: fa92 f1a2 rbit r1, r2 - 8006e00: f107 0234 add.w r2, r7, #52 ; 0x34 - 8006e04: 6011 str r1, [r2, #0] - return result; - 8006e06: f107 0234 add.w r2, r7, #52 ; 0x34 - 8006e0a: 6812 ldr r2, [r2, #0] - 8006e0c: fab2 f282 clz r2, r2 - 8006e10: b2d2 uxtb r2, r2 - 8006e12: f042 0220 orr.w r2, r2, #32 - 8006e16: b2d2 uxtb r2, r2 - 8006e18: f002 021f and.w r2, r2, #31 - 8006e1c: 2101 movs r1, #1 - 8006e1e: fa01 f202 lsl.w r2, r1, r2 - 8006e22: 4013 ands r3, r2 - 8006e24: 2b00 cmp r3, #0 - 8006e26: d09b beq.n 8006d60 - 8006e28: e0a0 b.n 8006f6c - 8006e2a: f107 0330 add.w r3, r7, #48 ; 0x30 - 8006e2e: f04f 7280 mov.w r2, #16777216 ; 0x1000000 - 8006e32: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006e34: f107 0330 add.w r3, r7, #48 ; 0x30 - 8006e38: 681b ldr r3, [r3, #0] - 8006e3a: fa93 f2a3 rbit r2, r3 - 8006e3e: f107 032c add.w r3, r7, #44 ; 0x2c - 8006e42: 601a str r2, [r3, #0] - return result; - 8006e44: f107 032c add.w r3, r7, #44 ; 0x2c - 8006e48: 681b ldr r3, [r3, #0] - } - } - else - { - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - 8006e4a: fab3 f383 clz r3, r3 - 8006e4e: b2db uxtb r3, r3 - 8006e50: f103 5384 add.w r3, r3, #276824064 ; 0x10800000 - 8006e54: f503 1384 add.w r3, r3, #1081344 ; 0x108000 - 8006e58: 009b lsls r3, r3, #2 - 8006e5a: 461a mov r2, r3 - 8006e5c: 2300 movs r3, #0 - 8006e5e: 6013 str r3, [r2, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8006e60: f7fc f874 bl 8002f4c - 8006e64: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8 - - /* Wait till PLL is disabled */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8006e68: e009 b.n 8006e7e - { - if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8006e6a: f7fc f86f bl 8002f4c - 8006e6e: 4602 mov r2, r0 - 8006e70: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 8006e74: 1ad3 subs r3, r2, r3 - 8006e76: 2b02 cmp r3, #2 - 8006e78: d901 bls.n 8006e7e - { - return HAL_TIMEOUT; - 8006e7a: 2303 movs r3, #3 - 8006e7c: e077 b.n 8006f6e - 8006e7e: f107 0328 add.w r3, r7, #40 ; 0x28 - 8006e82: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 8006e86: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006e88: f107 0328 add.w r3, r7, #40 ; 0x28 - 8006e8c: 681b ldr r3, [r3, #0] - 8006e8e: fa93 f2a3 rbit r2, r3 - 8006e92: f107 0324 add.w r3, r7, #36 ; 0x24 - 8006e96: 601a str r2, [r3, #0] - return result; - 8006e98: f107 0324 add.w r3, r7, #36 ; 0x24 - 8006e9c: 681b ldr r3, [r3, #0] - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8006e9e: fab3 f383 clz r3, r3 - 8006ea2: b2db uxtb r3, r3 - 8006ea4: 095b lsrs r3, r3, #5 - 8006ea6: b2db uxtb r3, r3 - 8006ea8: f043 0301 orr.w r3, r3, #1 - 8006eac: b2db uxtb r3, r3 - 8006eae: 2b01 cmp r3, #1 - 8006eb0: d102 bne.n 8006eb8 - 8006eb2: 4b31 ldr r3, [pc, #196] ; (8006f78 ) - 8006eb4: 681b ldr r3, [r3, #0] - 8006eb6: e01b b.n 8006ef0 - 8006eb8: f107 0320 add.w r3, r7, #32 - 8006ebc: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 8006ec0: 601a str r2, [r3, #0] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006ec2: f107 0320 add.w r3, r7, #32 - 8006ec6: 681b ldr r3, [r3, #0] - 8006ec8: fa93 f2a3 rbit r2, r3 - 8006ecc: f107 031c add.w r3, r7, #28 - 8006ed0: 601a str r2, [r3, #0] - 8006ed2: f107 0318 add.w r3, r7, #24 - 8006ed6: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 8006eda: 601a str r2, [r3, #0] - 8006edc: f107 0318 add.w r3, r7, #24 - 8006ee0: 681b ldr r3, [r3, #0] - 8006ee2: fa93 f2a3 rbit r2, r3 - 8006ee6: f107 0314 add.w r3, r7, #20 - 8006eea: 601a str r2, [r3, #0] - 8006eec: 4b22 ldr r3, [pc, #136] ; (8006f78 ) - 8006eee: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006ef0: f107 0210 add.w r2, r7, #16 - 8006ef4: f04f 7100 mov.w r1, #33554432 ; 0x2000000 - 8006ef8: 6011 str r1, [r2, #0] - 8006efa: f107 0210 add.w r2, r7, #16 - 8006efe: 6812 ldr r2, [r2, #0] - 8006f00: fa92 f1a2 rbit r1, r2 - 8006f04: f107 020c add.w r2, r7, #12 - 8006f08: 6011 str r1, [r2, #0] - return result; - 8006f0a: f107 020c add.w r2, r7, #12 - 8006f0e: 6812 ldr r2, [r2, #0] - 8006f10: fab2 f282 clz r2, r2 - 8006f14: b2d2 uxtb r2, r2 - 8006f16: f042 0220 orr.w r2, r2, #32 - 8006f1a: b2d2 uxtb r2, r2 - 8006f1c: f002 021f and.w r2, r2, #31 - 8006f20: 2101 movs r1, #1 - 8006f22: fa01 f202 lsl.w r2, r1, r2 - 8006f26: 4013 ands r3, r2 - 8006f28: 2b00 cmp r3, #0 - 8006f2a: d19e bne.n 8006e6a - 8006f2c: e01e b.n 8006f6c - } - } - else - { - /* Check if there is a request to disable the PLL used as System clock source */ - if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8006f2e: 1d3b adds r3, r7, #4 - 8006f30: 681b ldr r3, [r3, #0] - 8006f32: 69db ldr r3, [r3, #28] - 8006f34: 2b01 cmp r3, #1 - 8006f36: d101 bne.n 8006f3c - { - return HAL_ERROR; - 8006f38: 2301 movs r3, #1 - 8006f3a: e018 b.n 8006f6e - } - else - { - /* Do not return HAL_ERROR if request repeats the current configuration */ - pll_config = RCC->CFGR; - 8006f3c: 4b0e ldr r3, [pc, #56] ; (8006f78 ) - 8006f3e: 685b ldr r3, [r3, #4] - 8006f40: f8c7 31f4 str.w r3, [r7, #500] ; 0x1f4 - pll_config2 = RCC->CFGR2; - if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || - (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)) -#else - if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8006f44: f8d7 31f4 ldr.w r3, [r7, #500] ; 0x1f4 - 8006f48: f403 3280 and.w r2, r3, #65536 ; 0x10000 - 8006f4c: 1d3b adds r3, r7, #4 - 8006f4e: 681b ldr r3, [r3, #0] - 8006f50: 6a1b ldr r3, [r3, #32] - 8006f52: 429a cmp r2, r3 - 8006f54: d108 bne.n 8006f68 - (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) - 8006f56: f8d7 31f4 ldr.w r3, [r7, #500] ; 0x1f4 - 8006f5a: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000 - 8006f5e: 1d3b adds r3, r7, #4 - 8006f60: 681b ldr r3, [r3, #0] - 8006f62: 6a5b ldr r3, [r3, #36] ; 0x24 - if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8006f64: 429a cmp r2, r3 - 8006f66: d001 beq.n 8006f6c -#endif - { - return HAL_ERROR; - 8006f68: 2301 movs r3, #1 - 8006f6a: e000 b.n 8006f6e - } - } - } - } - - return HAL_OK; - 8006f6c: 2300 movs r3, #0 -} - 8006f6e: 4618 mov r0, r3 - 8006f70: f507 7700 add.w r7, r7, #512 ; 0x200 - 8006f74: 46bd mov sp, r7 - 8006f76: bd80 pop {r7, pc} - 8006f78: 40021000 .word 0x40021000 - -08006f7c : - * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is - * currently used as system clock source. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) -{ - 8006f7c: b580 push {r7, lr} - 8006f7e: b09e sub sp, #120 ; 0x78 - 8006f80: af00 add r7, sp, #0 - 8006f82: 6078 str r0, [r7, #4] - 8006f84: 6039 str r1, [r7, #0] - uint32_t tickstart = 0U; - 8006f86: 2300 movs r3, #0 - 8006f88: 677b str r3, [r7, #116] ; 0x74 - - /* Check Null pointer */ - if(RCC_ClkInitStruct == NULL) - 8006f8a: 687b ldr r3, [r7, #4] - 8006f8c: 2b00 cmp r3, #0 - 8006f8e: d101 bne.n 8006f94 - { - return HAL_ERROR; - 8006f90: 2301 movs r3, #1 - 8006f92: e162 b.n 800725a - /* To correctly read data from FLASH memory, the number of wait states (LATENCY) - must be correctly programmed according to the frequency of the CPU clock - (HCLK) of the device. */ - - /* Increasing the number of wait states because of higher CPU frequency */ - if(FLatency > __HAL_FLASH_GET_LATENCY()) - 8006f94: 4b90 ldr r3, [pc, #576] ; (80071d8 ) - 8006f96: 681b ldr r3, [r3, #0] - 8006f98: f003 0307 and.w r3, r3, #7 - 8006f9c: 683a ldr r2, [r7, #0] - 8006f9e: 429a cmp r2, r3 - 8006fa0: d910 bls.n 8006fc4 - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - 8006fa2: 4b8d ldr r3, [pc, #564] ; (80071d8 ) - 8006fa4: 681b ldr r3, [r3, #0] - 8006fa6: f023 0207 bic.w r2, r3, #7 - 8006faa: 498b ldr r1, [pc, #556] ; (80071d8 ) - 8006fac: 683b ldr r3, [r7, #0] - 8006fae: 4313 orrs r3, r2 - 8006fb0: 600b str r3, [r1, #0] - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8006fb2: 4b89 ldr r3, [pc, #548] ; (80071d8 ) - 8006fb4: 681b ldr r3, [r3, #0] - 8006fb6: f003 0307 and.w r3, r3, #7 - 8006fba: 683a ldr r2, [r7, #0] - 8006fbc: 429a cmp r2, r3 - 8006fbe: d001 beq.n 8006fc4 - { - return HAL_ERROR; - 8006fc0: 2301 movs r3, #1 - 8006fc2: e14a b.n 800725a - } - } - - /*-------------------------- HCLK Configuration --------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8006fc4: 687b ldr r3, [r7, #4] - 8006fc6: 681b ldr r3, [r3, #0] - 8006fc8: f003 0302 and.w r3, r3, #2 - 8006fcc: 2b00 cmp r3, #0 - 8006fce: d008 beq.n 8006fe2 - { - assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8006fd0: 4b82 ldr r3, [pc, #520] ; (80071dc ) - 8006fd2: 685b ldr r3, [r3, #4] - 8006fd4: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 8006fd8: 687b ldr r3, [r7, #4] - 8006fda: 689b ldr r3, [r3, #8] - 8006fdc: 497f ldr r1, [pc, #508] ; (80071dc ) - 8006fde: 4313 orrs r3, r2 - 8006fe0: 604b str r3, [r1, #4] - } - - /*------------------------- SYSCLK Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8006fe2: 687b ldr r3, [r7, #4] - 8006fe4: 681b ldr r3, [r3, #0] - 8006fe6: f003 0301 and.w r3, r3, #1 - 8006fea: 2b00 cmp r3, #0 - 8006fec: f000 80dc beq.w 80071a8 - { - assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); - - /* HSE is selected as System Clock Source */ - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8006ff0: 687b ldr r3, [r7, #4] - 8006ff2: 685b ldr r3, [r3, #4] - 8006ff4: 2b01 cmp r3, #1 - 8006ff6: d13c bne.n 8007072 - 8006ff8: f44f 3300 mov.w r3, #131072 ; 0x20000 - 8006ffc: 673b str r3, [r7, #112] ; 0x70 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8006ffe: 6f3b ldr r3, [r7, #112] ; 0x70 - 8007000: fa93 f3a3 rbit r3, r3 - 8007004: 66fb str r3, [r7, #108] ; 0x6c - return result; - 8007006: 6efb ldr r3, [r7, #108] ; 0x6c - { - /* Check the HSE ready flag */ - if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8007008: fab3 f383 clz r3, r3 - 800700c: b2db uxtb r3, r3 - 800700e: 095b lsrs r3, r3, #5 - 8007010: b2db uxtb r3, r3 - 8007012: f043 0301 orr.w r3, r3, #1 - 8007016: b2db uxtb r3, r3 - 8007018: 2b01 cmp r3, #1 - 800701a: d102 bne.n 8007022 - 800701c: 4b6f ldr r3, [pc, #444] ; (80071dc ) - 800701e: 681b ldr r3, [r3, #0] - 8007020: e00f b.n 8007042 - 8007022: f44f 3300 mov.w r3, #131072 ; 0x20000 - 8007026: 66bb str r3, [r7, #104] ; 0x68 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8007028: 6ebb ldr r3, [r7, #104] ; 0x68 - 800702a: fa93 f3a3 rbit r3, r3 - 800702e: 667b str r3, [r7, #100] ; 0x64 - 8007030: f44f 3300 mov.w r3, #131072 ; 0x20000 - 8007034: 663b str r3, [r7, #96] ; 0x60 - 8007036: 6e3b ldr r3, [r7, #96] ; 0x60 - 8007038: fa93 f3a3 rbit r3, r3 - 800703c: 65fb str r3, [r7, #92] ; 0x5c - 800703e: 4b67 ldr r3, [pc, #412] ; (80071dc ) - 8007040: 6a5b ldr r3, [r3, #36] ; 0x24 - 8007042: f44f 3200 mov.w r2, #131072 ; 0x20000 - 8007046: 65ba str r2, [r7, #88] ; 0x58 - 8007048: 6dba ldr r2, [r7, #88] ; 0x58 - 800704a: fa92 f2a2 rbit r2, r2 - 800704e: 657a str r2, [r7, #84] ; 0x54 - return result; - 8007050: 6d7a ldr r2, [r7, #84] ; 0x54 - 8007052: fab2 f282 clz r2, r2 - 8007056: b2d2 uxtb r2, r2 - 8007058: f042 0220 orr.w r2, r2, #32 - 800705c: b2d2 uxtb r2, r2 - 800705e: f002 021f and.w r2, r2, #31 - 8007062: 2101 movs r1, #1 - 8007064: fa01 f202 lsl.w r2, r1, r2 - 8007068: 4013 ands r3, r2 - 800706a: 2b00 cmp r3, #0 - 800706c: d17b bne.n 8007166 - { - return HAL_ERROR; - 800706e: 2301 movs r3, #1 - 8007070: e0f3 b.n 800725a - } - } - /* PLL is selected as System Clock Source */ - else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 8007072: 687b ldr r3, [r7, #4] - 8007074: 685b ldr r3, [r3, #4] - 8007076: 2b02 cmp r3, #2 - 8007078: d13c bne.n 80070f4 - 800707a: f04f 7300 mov.w r3, #33554432 ; 0x2000000 - 800707e: 653b str r3, [r7, #80] ; 0x50 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8007080: 6d3b ldr r3, [r7, #80] ; 0x50 - 8007082: fa93 f3a3 rbit r3, r3 - 8007086: 64fb str r3, [r7, #76] ; 0x4c - return result; - 8007088: 6cfb ldr r3, [r7, #76] ; 0x4c - { - /* Check the PLL ready flag */ - if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 800708a: fab3 f383 clz r3, r3 - 800708e: b2db uxtb r3, r3 - 8007090: 095b lsrs r3, r3, #5 - 8007092: b2db uxtb r3, r3 - 8007094: f043 0301 orr.w r3, r3, #1 - 8007098: b2db uxtb r3, r3 - 800709a: 2b01 cmp r3, #1 - 800709c: d102 bne.n 80070a4 - 800709e: 4b4f ldr r3, [pc, #316] ; (80071dc ) - 80070a0: 681b ldr r3, [r3, #0] - 80070a2: e00f b.n 80070c4 - 80070a4: f04f 7300 mov.w r3, #33554432 ; 0x2000000 - 80070a8: 64bb str r3, [r7, #72] ; 0x48 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80070aa: 6cbb ldr r3, [r7, #72] ; 0x48 - 80070ac: fa93 f3a3 rbit r3, r3 - 80070b0: 647b str r3, [r7, #68] ; 0x44 - 80070b2: f04f 7300 mov.w r3, #33554432 ; 0x2000000 - 80070b6: 643b str r3, [r7, #64] ; 0x40 - 80070b8: 6c3b ldr r3, [r7, #64] ; 0x40 - 80070ba: fa93 f3a3 rbit r3, r3 - 80070be: 63fb str r3, [r7, #60] ; 0x3c - 80070c0: 4b46 ldr r3, [pc, #280] ; (80071dc ) - 80070c2: 6a5b ldr r3, [r3, #36] ; 0x24 - 80070c4: f04f 7200 mov.w r2, #33554432 ; 0x2000000 - 80070c8: 63ba str r2, [r7, #56] ; 0x38 - 80070ca: 6bba ldr r2, [r7, #56] ; 0x38 - 80070cc: fa92 f2a2 rbit r2, r2 - 80070d0: 637a str r2, [r7, #52] ; 0x34 - return result; - 80070d2: 6b7a ldr r2, [r7, #52] ; 0x34 - 80070d4: fab2 f282 clz r2, r2 - 80070d8: b2d2 uxtb r2, r2 - 80070da: f042 0220 orr.w r2, r2, #32 - 80070de: b2d2 uxtb r2, r2 - 80070e0: f002 021f and.w r2, r2, #31 - 80070e4: 2101 movs r1, #1 - 80070e6: fa01 f202 lsl.w r2, r1, r2 - 80070ea: 4013 ands r3, r2 - 80070ec: 2b00 cmp r3, #0 - 80070ee: d13a bne.n 8007166 - { - return HAL_ERROR; - 80070f0: 2301 movs r3, #1 - 80070f2: e0b2 b.n 800725a - 80070f4: 2302 movs r3, #2 - 80070f6: 633b str r3, [r7, #48] ; 0x30 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80070f8: 6b3b ldr r3, [r7, #48] ; 0x30 - 80070fa: fa93 f3a3 rbit r3, r3 - 80070fe: 62fb str r3, [r7, #44] ; 0x2c - return result; - 8007100: 6afb ldr r3, [r7, #44] ; 0x2c - } - /* HSI is selected as System Clock Source */ - else - { - /* Check the HSI ready flag */ - if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8007102: fab3 f383 clz r3, r3 - 8007106: b2db uxtb r3, r3 - 8007108: 095b lsrs r3, r3, #5 - 800710a: b2db uxtb r3, r3 - 800710c: f043 0301 orr.w r3, r3, #1 - 8007110: b2db uxtb r3, r3 - 8007112: 2b01 cmp r3, #1 - 8007114: d102 bne.n 800711c - 8007116: 4b31 ldr r3, [pc, #196] ; (80071dc ) - 8007118: 681b ldr r3, [r3, #0] - 800711a: e00d b.n 8007138 - 800711c: 2302 movs r3, #2 - 800711e: 62bb str r3, [r7, #40] ; 0x28 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8007120: 6abb ldr r3, [r7, #40] ; 0x28 - 8007122: fa93 f3a3 rbit r3, r3 - 8007126: 627b str r3, [r7, #36] ; 0x24 - 8007128: 2302 movs r3, #2 - 800712a: 623b str r3, [r7, #32] - 800712c: 6a3b ldr r3, [r7, #32] - 800712e: fa93 f3a3 rbit r3, r3 - 8007132: 61fb str r3, [r7, #28] - 8007134: 4b29 ldr r3, [pc, #164] ; (80071dc ) - 8007136: 6a5b ldr r3, [r3, #36] ; 0x24 - 8007138: 2202 movs r2, #2 - 800713a: 61ba str r2, [r7, #24] - 800713c: 69ba ldr r2, [r7, #24] - 800713e: fa92 f2a2 rbit r2, r2 - 8007142: 617a str r2, [r7, #20] - return result; - 8007144: 697a ldr r2, [r7, #20] - 8007146: fab2 f282 clz r2, r2 - 800714a: b2d2 uxtb r2, r2 - 800714c: f042 0220 orr.w r2, r2, #32 - 8007150: b2d2 uxtb r2, r2 - 8007152: f002 021f and.w r2, r2, #31 - 8007156: 2101 movs r1, #1 - 8007158: fa01 f202 lsl.w r2, r1, r2 - 800715c: 4013 ands r3, r2 - 800715e: 2b00 cmp r3, #0 - 8007160: d101 bne.n 8007166 - { - return HAL_ERROR; - 8007162: 2301 movs r3, #1 - 8007164: e079 b.n 800725a - } - } - - __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 8007166: 4b1d ldr r3, [pc, #116] ; (80071dc ) - 8007168: 685b ldr r3, [r3, #4] - 800716a: f023 0203 bic.w r2, r3, #3 - 800716e: 687b ldr r3, [r7, #4] - 8007170: 685b ldr r3, [r3, #4] - 8007172: 491a ldr r1, [pc, #104] ; (80071dc ) - 8007174: 4313 orrs r3, r2 - 8007176: 604b str r3, [r1, #4] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8007178: f7fb fee8 bl 8002f4c - 800717c: 6778 str r0, [r7, #116] ; 0x74 - - while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 800717e: e00a b.n 8007196 - { - if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8007180: f7fb fee4 bl 8002f4c - 8007184: 4602 mov r2, r0 - 8007186: 6f7b ldr r3, [r7, #116] ; 0x74 - 8007188: 1ad3 subs r3, r2, r3 - 800718a: f241 3288 movw r2, #5000 ; 0x1388 - 800718e: 4293 cmp r3, r2 - 8007190: d901 bls.n 8007196 - { - return HAL_TIMEOUT; - 8007192: 2303 movs r3, #3 - 8007194: e061 b.n 800725a - while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8007196: 4b11 ldr r3, [pc, #68] ; (80071dc ) - 8007198: 685b ldr r3, [r3, #4] - 800719a: f003 020c and.w r2, r3, #12 - 800719e: 687b ldr r3, [r7, #4] - 80071a0: 685b ldr r3, [r3, #4] - 80071a2: 009b lsls r3, r3, #2 - 80071a4: 429a cmp r2, r3 - 80071a6: d1eb bne.n 8007180 - } - } - } - /* Decreasing the number of wait states because of lower CPU frequency */ - if(FLatency < __HAL_FLASH_GET_LATENCY()) - 80071a8: 4b0b ldr r3, [pc, #44] ; (80071d8 ) - 80071aa: 681b ldr r3, [r3, #0] - 80071ac: f003 0307 and.w r3, r3, #7 - 80071b0: 683a ldr r2, [r7, #0] - 80071b2: 429a cmp r2, r3 - 80071b4: d214 bcs.n 80071e0 - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - 80071b6: 4b08 ldr r3, [pc, #32] ; (80071d8 ) - 80071b8: 681b ldr r3, [r3, #0] - 80071ba: f023 0207 bic.w r2, r3, #7 - 80071be: 4906 ldr r1, [pc, #24] ; (80071d8 ) - 80071c0: 683b ldr r3, [r7, #0] - 80071c2: 4313 orrs r3, r2 - 80071c4: 600b str r3, [r1, #0] - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(__HAL_FLASH_GET_LATENCY() != FLatency) - 80071c6: 4b04 ldr r3, [pc, #16] ; (80071d8 ) - 80071c8: 681b ldr r3, [r3, #0] - 80071ca: f003 0307 and.w r3, r3, #7 - 80071ce: 683a ldr r2, [r7, #0] - 80071d0: 429a cmp r2, r3 - 80071d2: d005 beq.n 80071e0 - { - return HAL_ERROR; - 80071d4: 2301 movs r3, #1 - 80071d6: e040 b.n 800725a - 80071d8: 40022000 .word 0x40022000 - 80071dc: 40021000 .word 0x40021000 - } - } - - /*-------------------------- PCLK1 Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 80071e0: 687b ldr r3, [r7, #4] - 80071e2: 681b ldr r3, [r3, #0] - 80071e4: f003 0304 and.w r3, r3, #4 - 80071e8: 2b00 cmp r3, #0 - 80071ea: d008 beq.n 80071fe - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 80071ec: 4b1d ldr r3, [pc, #116] ; (8007264 ) - 80071ee: 685b ldr r3, [r3, #4] - 80071f0: f423 62e0 bic.w r2, r3, #1792 ; 0x700 - 80071f4: 687b ldr r3, [r7, #4] - 80071f6: 68db ldr r3, [r3, #12] - 80071f8: 491a ldr r1, [pc, #104] ; (8007264 ) - 80071fa: 4313 orrs r3, r2 - 80071fc: 604b str r3, [r1, #4] - } - - /*-------------------------- PCLK2 Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 80071fe: 687b ldr r3, [r7, #4] - 8007200: 681b ldr r3, [r3, #0] - 8007202: f003 0308 and.w r3, r3, #8 - 8007206: 2b00 cmp r3, #0 - 8007208: d009 beq.n 800721e - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - 800720a: 4b16 ldr r3, [pc, #88] ; (8007264 ) - 800720c: 685b ldr r3, [r3, #4] - 800720e: f423 5260 bic.w r2, r3, #14336 ; 0x3800 - 8007212: 687b ldr r3, [r7, #4] - 8007214: 691b ldr r3, [r3, #16] - 8007216: 00db lsls r3, r3, #3 - 8007218: 4912 ldr r1, [pc, #72] ; (8007264 ) - 800721a: 4313 orrs r3, r2 - 800721c: 604b str r3, [r1, #4] - } - - /* Update the SystemCoreClock global variable */ - SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER]; - 800721e: f000 f829 bl 8007274 - 8007222: 4601 mov r1, r0 - 8007224: 4b0f ldr r3, [pc, #60] ; (8007264 ) - 8007226: 685b ldr r3, [r3, #4] - 8007228: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 800722c: 22f0 movs r2, #240 ; 0xf0 - 800722e: 613a str r2, [r7, #16] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8007230: 693a ldr r2, [r7, #16] - 8007232: fa92 f2a2 rbit r2, r2 - 8007236: 60fa str r2, [r7, #12] - return result; - 8007238: 68fa ldr r2, [r7, #12] - 800723a: fab2 f282 clz r2, r2 - 800723e: b2d2 uxtb r2, r2 - 8007240: 40d3 lsrs r3, r2 - 8007242: 4a09 ldr r2, [pc, #36] ; (8007268 ) - 8007244: 5cd3 ldrb r3, [r2, r3] - 8007246: fa21 f303 lsr.w r3, r1, r3 - 800724a: 4a08 ldr r2, [pc, #32] ; (800726c ) - 800724c: 6013 str r3, [r2, #0] - - /* Configure the source of time base considering new system clocks settings*/ - HAL_InitTick (uwTickPrio); - 800724e: 4b08 ldr r3, [pc, #32] ; (8007270 ) - 8007250: 681b ldr r3, [r3, #0] - 8007252: 4618 mov r0, r3 - 8007254: f7fb fd08 bl 8002c68 - - return HAL_OK; - 8007258: 2300 movs r3, #0 -} - 800725a: 4618 mov r0, r3 - 800725c: 3778 adds r7, #120 ; 0x78 - 800725e: 46bd mov sp, r7 - 8007260: bd80 pop {r7, pc} - 8007262: bf00 nop - 8007264: 40021000 .word 0x40021000 - 8007268: 0800bf30 .word 0x0800bf30 - 800726c: 20000008 .word 0x20000008 - 8007270: 2000000c .word 0x2000000c - -08007274 : - * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. - * - * @retval SYSCLK frequency - */ -uint32_t HAL_RCC_GetSysClockFreq(void) -{ - 8007274: b480 push {r7} - 8007276: b08b sub sp, #44 ; 0x2c - 8007278: af00 add r7, sp, #0 - uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 800727a: 2300 movs r3, #0 - 800727c: 61fb str r3, [r7, #28] - 800727e: 2300 movs r3, #0 - 8007280: 61bb str r3, [r7, #24] - 8007282: 2300 movs r3, #0 - 8007284: 627b str r3, [r7, #36] ; 0x24 - 8007286: 2300 movs r3, #0 - 8007288: 617b str r3, [r7, #20] - uint32_t sysclockfreq = 0U; - 800728a: 2300 movs r3, #0 - 800728c: 623b str r3, [r7, #32] - - tmpreg = RCC->CFGR; - 800728e: 4b29 ldr r3, [pc, #164] ; (8007334 ) - 8007290: 685b ldr r3, [r3, #4] - 8007292: 61fb str r3, [r7, #28] - - /* Get SYSCLK source -------------------------------------------------------*/ - switch (tmpreg & RCC_CFGR_SWS) - 8007294: 69fb ldr r3, [r7, #28] - 8007296: f003 030c and.w r3, r3, #12 - 800729a: 2b04 cmp r3, #4 - 800729c: d002 beq.n 80072a4 - 800729e: 2b08 cmp r3, #8 - 80072a0: d003 beq.n 80072aa - 80072a2: e03c b.n 800731e - { - case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ - { - sysclockfreq = HSE_VALUE; - 80072a4: 4b24 ldr r3, [pc, #144] ; (8007338 ) - 80072a6: 623b str r3, [r7, #32] - break; - 80072a8: e03c b.n 8007324 - } - case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ - { - pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> POSITION_VAL(RCC_CFGR_PLLMUL)]; - 80072aa: 69fb ldr r3, [r7, #28] - 80072ac: f403 1370 and.w r3, r3, #3932160 ; 0x3c0000 - 80072b0: f44f 1270 mov.w r2, #3932160 ; 0x3c0000 - 80072b4: 60ba str r2, [r7, #8] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80072b6: 68ba ldr r2, [r7, #8] - 80072b8: fa92 f2a2 rbit r2, r2 - 80072bc: 607a str r2, [r7, #4] - return result; - 80072be: 687a ldr r2, [r7, #4] - 80072c0: fab2 f282 clz r2, r2 - 80072c4: b2d2 uxtb r2, r2 - 80072c6: 40d3 lsrs r3, r2 - 80072c8: 4a1c ldr r2, [pc, #112] ; (800733c ) - 80072ca: 5cd3 ldrb r3, [r2, r3] - 80072cc: 617b str r3, [r7, #20] - prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFGR2_PREDIV)]; - 80072ce: 4b19 ldr r3, [pc, #100] ; (8007334 ) - 80072d0: 6adb ldr r3, [r3, #44] ; 0x2c - 80072d2: f003 030f and.w r3, r3, #15 - 80072d6: 220f movs r2, #15 - 80072d8: 613a str r2, [r7, #16] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80072da: 693a ldr r2, [r7, #16] - 80072dc: fa92 f2a2 rbit r2, r2 - 80072e0: 60fa str r2, [r7, #12] - return result; - 80072e2: 68fa ldr r2, [r7, #12] - 80072e4: fab2 f282 clz r2, r2 - 80072e8: b2d2 uxtb r2, r2 - 80072ea: 40d3 lsrs r3, r2 - 80072ec: 4a14 ldr r2, [pc, #80] ; (8007340 ) - 80072ee: 5cd3 ldrb r3, [r2, r3] - 80072f0: 61bb str r3, [r7, #24] -#if defined(RCC_CFGR_PLLSRC_HSI_DIV2) - if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI) - 80072f2: 69fb ldr r3, [r7, #28] - 80072f4: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 80072f8: 2b00 cmp r3, #0 - 80072fa: d008 beq.n 800730e - { - /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ - pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); - 80072fc: 4a0e ldr r2, [pc, #56] ; (8007338 ) - 80072fe: 69bb ldr r3, [r7, #24] - 8007300: fbb2 f2f3 udiv r2, r2, r3 - 8007304: 697b ldr r3, [r7, #20] - 8007306: fb02 f303 mul.w r3, r2, r3 - 800730a: 627b str r3, [r7, #36] ; 0x24 - 800730c: e004 b.n 8007318 - } - else - { - /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ - pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); - 800730e: 697b ldr r3, [r7, #20] - 8007310: 4a0c ldr r2, [pc, #48] ; (8007344 ) - 8007312: fb02 f303 mul.w r3, r2, r3 - 8007316: 627b str r3, [r7, #36] ; 0x24 - { - /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ - pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); - } -#endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ - sysclockfreq = pllclk; - 8007318: 6a7b ldr r3, [r7, #36] ; 0x24 - 800731a: 623b str r3, [r7, #32] - break; - 800731c: e002 b.n 8007324 - } - case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ - default: /* HSI used as system clock */ - { - sysclockfreq = HSI_VALUE; - 800731e: 4b06 ldr r3, [pc, #24] ; (8007338 ) - 8007320: 623b str r3, [r7, #32] - break; - 8007322: bf00 nop - } - } - return sysclockfreq; - 8007324: 6a3b ldr r3, [r7, #32] -} - 8007326: 4618 mov r0, r3 - 8007328: 372c adds r7, #44 ; 0x2c - 800732a: 46bd mov sp, r7 - 800732c: f85d 7b04 ldr.w r7, [sp], #4 - 8007330: 4770 bx lr - 8007332: bf00 nop - 8007334: 40021000 .word 0x40021000 - 8007338: 007a1200 .word 0x007a1200 - 800733c: 0800bf48 .word 0x0800bf48 - 8007340: 0800bf58 .word 0x0800bf58 - 8007344: 003d0900 .word 0x003d0900 - -08007348 : - * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency - * and updated within this function - * @retval HCLK frequency - */ -uint32_t HAL_RCC_GetHCLKFreq(void) -{ - 8007348: b480 push {r7} - 800734a: af00 add r7, sp, #0 - return SystemCoreClock; - 800734c: 4b03 ldr r3, [pc, #12] ; (800735c ) - 800734e: 681b ldr r3, [r3, #0] -} - 8007350: 4618 mov r0, r3 - 8007352: 46bd mov sp, r7 - 8007354: f85d 7b04 ldr.w r7, [sp], #4 - 8007358: 4770 bx lr - 800735a: bf00 nop - 800735c: 20000008 .word 0x20000008 - -08007360 : - * @note Each time PCLK1 changes, this function must be called to update the - * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK1 frequency - */ -uint32_t HAL_RCC_GetPCLK1Freq(void) -{ - 8007360: b580 push {r7, lr} - 8007362: b082 sub sp, #8 - 8007364: af00 add r7, sp, #0 - /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BITNUMBER]); - 8007366: f7ff ffef bl 8007348 - 800736a: 4601 mov r1, r0 - 800736c: 4b0b ldr r3, [pc, #44] ; (800739c ) - 800736e: 685b ldr r3, [r3, #4] - 8007370: f403 63e0 and.w r3, r3, #1792 ; 0x700 - 8007374: f44f 62e0 mov.w r2, #1792 ; 0x700 - 8007378: 607a str r2, [r7, #4] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800737a: 687a ldr r2, [r7, #4] - 800737c: fa92 f2a2 rbit r2, r2 - 8007380: 603a str r2, [r7, #0] - return result; - 8007382: 683a ldr r2, [r7, #0] - 8007384: fab2 f282 clz r2, r2 - 8007388: b2d2 uxtb r2, r2 - 800738a: 40d3 lsrs r3, r2 - 800738c: 4a04 ldr r2, [pc, #16] ; (80073a0 ) - 800738e: 5cd3 ldrb r3, [r2, r3] - 8007390: fa21 f303 lsr.w r3, r1, r3 -} - 8007394: 4618 mov r0, r3 - 8007396: 3708 adds r7, #8 - 8007398: 46bd mov sp, r7 - 800739a: bd80 pop {r7, pc} - 800739c: 40021000 .word 0x40021000 - 80073a0: 0800bf40 .word 0x0800bf40 - -080073a4 : - * @note Each time PCLK2 changes, this function must be called to update the - * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK2 frequency - */ -uint32_t HAL_RCC_GetPCLK2Freq(void) -{ - 80073a4: b580 push {r7, lr} - 80073a6: b082 sub sp, #8 - 80073a8: af00 add r7, sp, #0 - /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITNUMBER]); - 80073aa: f7ff ffcd bl 8007348 - 80073ae: 4601 mov r1, r0 - 80073b0: 4b0b ldr r3, [pc, #44] ; (80073e0 ) - 80073b2: 685b ldr r3, [r3, #4] - 80073b4: f403 5360 and.w r3, r3, #14336 ; 0x3800 - 80073b8: f44f 5260 mov.w r2, #14336 ; 0x3800 - 80073bc: 607a str r2, [r7, #4] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80073be: 687a ldr r2, [r7, #4] - 80073c0: fa92 f2a2 rbit r2, r2 - 80073c4: 603a str r2, [r7, #0] - return result; - 80073c6: 683a ldr r2, [r7, #0] - 80073c8: fab2 f282 clz r2, r2 - 80073cc: b2d2 uxtb r2, r2 - 80073ce: 40d3 lsrs r3, r2 - 80073d0: 4a04 ldr r2, [pc, #16] ; (80073e4 ) - 80073d2: 5cd3 ldrb r3, [r2, r3] - 80073d4: fa21 f303 lsr.w r3, r1, r3 -} - 80073d8: 4618 mov r0, r3 - 80073da: 3708 adds r7, #8 - 80073dc: 46bd mov sp, r7 - 80073de: bd80 pop {r7, pc} - 80073e0: 40021000 .word 0x40021000 - 80073e4: 0800bf40 .word 0x0800bf40 - -080073e8 : - * contains the current clock configuration. - * @param pFLatency Pointer on the Flash Latency. - * @retval None - */ -void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) -{ - 80073e8: b480 push {r7} - 80073ea: b083 sub sp, #12 - 80073ec: af00 add r7, sp, #0 - 80073ee: 6078 str r0, [r7, #4] - 80073f0: 6039 str r1, [r7, #0] - /* Check the parameters */ - assert_param(RCC_ClkInitStruct != NULL); - assert_param(pFLatency != NULL); - - /* Set all possible values for the Clock type parameter --------------------*/ - RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - 80073f2: 687b ldr r3, [r7, #4] - 80073f4: 220f movs r2, #15 - 80073f6: 601a str r2, [r3, #0] - - /* Get the SYSCLK configuration --------------------------------------------*/ - RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); - 80073f8: 4b12 ldr r3, [pc, #72] ; (8007444 ) - 80073fa: 685b ldr r3, [r3, #4] - 80073fc: f003 0203 and.w r2, r3, #3 - 8007400: 687b ldr r3, [r7, #4] - 8007402: 605a str r2, [r3, #4] - - /* Get the HCLK configuration ----------------------------------------------*/ - RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); - 8007404: 4b0f ldr r3, [pc, #60] ; (8007444 ) - 8007406: 685b ldr r3, [r3, #4] - 8007408: f003 02f0 and.w r2, r3, #240 ; 0xf0 - 800740c: 687b ldr r3, [r7, #4] - 800740e: 609a str r2, [r3, #8] - - /* Get the APB1 configuration ----------------------------------------------*/ - RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); - 8007410: 4b0c ldr r3, [pc, #48] ; (8007444 ) - 8007412: 685b ldr r3, [r3, #4] - 8007414: f403 62e0 and.w r2, r3, #1792 ; 0x700 - 8007418: 687b ldr r3, [r7, #4] - 800741a: 60da str r2, [r3, #12] - - /* Get the APB2 configuration ----------------------------------------------*/ - RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); - 800741c: 4b09 ldr r3, [pc, #36] ; (8007444 ) - 800741e: 685b ldr r3, [r3, #4] - 8007420: 08db lsrs r3, r3, #3 - 8007422: f403 62e0 and.w r2, r3, #1792 ; 0x700 - 8007426: 687b ldr r3, [r7, #4] - 8007428: 611a str r2, [r3, #16] - - /* Get the Flash Wait State (Latency) configuration ------------------------*/ - *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); - 800742a: 4b07 ldr r3, [pc, #28] ; (8007448 ) - 800742c: 681b ldr r3, [r3, #0] - 800742e: f003 0207 and.w r2, r3, #7 - 8007432: 683b ldr r3, [r7, #0] - 8007434: 601a str r2, [r3, #0] -} - 8007436: bf00 nop - 8007438: 370c adds r7, #12 - 800743a: 46bd mov sp, r7 - 800743c: f85d 7b04 ldr.w r7, [sp], #4 - 8007440: 4770 bx lr - 8007442: bf00 nop - 8007444: 40021000 .word 0x40021000 - 8007448: 40022000 .word 0x40022000 - -0800744c : - * When the TIMx clock source is PLL clock, so the TIMx clock is PLL clock x 2. - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) -{ - 800744c: b580 push {r7, lr} - 800744e: b092 sub sp, #72 ; 0x48 - 8007450: af00 add r7, sp, #0 - 8007452: 6078 str r0, [r7, #4] - uint32_t tickstart = 0U; - 8007454: 2300 movs r3, #0 - 8007456: 643b str r3, [r7, #64] ; 0x40 - uint32_t temp_reg = 0U; - 8007458: 2300 movs r3, #0 - 800745a: 63fb str r3, [r7, #60] ; 0x3c - - /* Check the parameters */ - assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); - - /*---------------------------- RTC configuration -------------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) - 800745c: 687b ldr r3, [r7, #4] - 800745e: 681b ldr r3, [r3, #0] - 8007460: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8007464: 2b00 cmp r3, #0 - 8007466: f000 80d7 beq.w 8007618 - { - /* check for RTC Parameters used to output RTCCLK */ - assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); - - FlagStatus pwrclkchanged = RESET; - 800746a: 2300 movs r3, #0 - 800746c: f887 3047 strb.w r3, [r7, #71] ; 0x47 - - /* As soon as function is called to change RTC clock source, activation of the - power domain is done. */ - /* Requires to enable write access to Backup Domain of necessary */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8007470: 4b4e ldr r3, [pc, #312] ; (80075ac ) - 8007472: 69db ldr r3, [r3, #28] - 8007474: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8007478: 2b00 cmp r3, #0 - 800747a: d10e bne.n 800749a - { - __HAL_RCC_PWR_CLK_ENABLE(); - 800747c: 4b4b ldr r3, [pc, #300] ; (80075ac ) - 800747e: 69db ldr r3, [r3, #28] - 8007480: 4a4a ldr r2, [pc, #296] ; (80075ac ) - 8007482: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8007486: 61d3 str r3, [r2, #28] - 8007488: 4b48 ldr r3, [pc, #288] ; (80075ac ) - 800748a: 69db ldr r3, [r3, #28] - 800748c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8007490: 60bb str r3, [r7, #8] - 8007492: 68bb ldr r3, [r7, #8] - pwrclkchanged = SET; - 8007494: 2301 movs r3, #1 - 8007496: f887 3047 strb.w r3, [r7, #71] ; 0x47 - } - - if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800749a: 4b45 ldr r3, [pc, #276] ; (80075b0 ) - 800749c: 681b ldr r3, [r3, #0] - 800749e: f403 7380 and.w r3, r3, #256 ; 0x100 - 80074a2: 2b00 cmp r3, #0 - 80074a4: d118 bne.n 80074d8 - { - /* Enable write access to Backup domain */ - SET_BIT(PWR->CR, PWR_CR_DBP); - 80074a6: 4b42 ldr r3, [pc, #264] ; (80075b0 ) - 80074a8: 681b ldr r3, [r3, #0] - 80074aa: 4a41 ldr r2, [pc, #260] ; (80075b0 ) - 80074ac: f443 7380 orr.w r3, r3, #256 ; 0x100 - 80074b0: 6013 str r3, [r2, #0] - - /* Wait for Backup domain Write protection disable */ - tickstart = HAL_GetTick(); - 80074b2: f7fb fd4b bl 8002f4c - 80074b6: 6438 str r0, [r7, #64] ; 0x40 - - while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80074b8: e008 b.n 80074cc - { - if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80074ba: f7fb fd47 bl 8002f4c - 80074be: 4602 mov r2, r0 - 80074c0: 6c3b ldr r3, [r7, #64] ; 0x40 - 80074c2: 1ad3 subs r3, r2, r3 - 80074c4: 2b64 cmp r3, #100 ; 0x64 - 80074c6: d901 bls.n 80074cc - { - return HAL_TIMEOUT; - 80074c8: 2303 movs r3, #3 - 80074ca: e169 b.n 80077a0 - while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80074cc: 4b38 ldr r3, [pc, #224] ; (80075b0 ) - 80074ce: 681b ldr r3, [r3, #0] - 80074d0: f403 7380 and.w r3, r3, #256 ; 0x100 - 80074d4: 2b00 cmp r3, #0 - 80074d6: d0f0 beq.n 80074ba - } - } - } - - /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ - temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); - 80074d8: 4b34 ldr r3, [pc, #208] ; (80075ac ) - 80074da: 6a1b ldr r3, [r3, #32] - 80074dc: f403 7340 and.w r3, r3, #768 ; 0x300 - 80074e0: 63fb str r3, [r7, #60] ; 0x3c - if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) - 80074e2: 6bfb ldr r3, [r7, #60] ; 0x3c - 80074e4: 2b00 cmp r3, #0 - 80074e6: f000 8084 beq.w 80075f2 - 80074ea: 687b ldr r3, [r7, #4] - 80074ec: 685b ldr r3, [r3, #4] - 80074ee: f403 7340 and.w r3, r3, #768 ; 0x300 - 80074f2: 6bfa ldr r2, [r7, #60] ; 0x3c - 80074f4: 429a cmp r2, r3 - 80074f6: d07c beq.n 80075f2 - { - /* Store the content of BDCR register before the reset of Backup Domain */ - temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 80074f8: 4b2c ldr r3, [pc, #176] ; (80075ac ) - 80074fa: 6a1b ldr r3, [r3, #32] - 80074fc: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8007500: 63fb str r3, [r7, #60] ; 0x3c - 8007502: f44f 3380 mov.w r3, #65536 ; 0x10000 - 8007506: 633b str r3, [r7, #48] ; 0x30 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8007508: 6b3b ldr r3, [r7, #48] ; 0x30 - 800750a: fa93 f3a3 rbit r3, r3 - 800750e: 62fb str r3, [r7, #44] ; 0x2c - return result; - 8007510: 6afb ldr r3, [r7, #44] ; 0x2c - /* RTC Clock selection can be changed only if the Backup Domain is reset */ - __HAL_RCC_BACKUPRESET_FORCE(); - 8007512: fab3 f383 clz r3, r3 - 8007516: b2db uxtb r3, r3 - 8007518: 461a mov r2, r3 - 800751a: 4b26 ldr r3, [pc, #152] ; (80075b4 ) - 800751c: 4413 add r3, r2 - 800751e: 009b lsls r3, r3, #2 - 8007520: 461a mov r2, r3 - 8007522: 2301 movs r3, #1 - 8007524: 6013 str r3, [r2, #0] - 8007526: f44f 3380 mov.w r3, #65536 ; 0x10000 - 800752a: 63bb str r3, [r7, #56] ; 0x38 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800752c: 6bbb ldr r3, [r7, #56] ; 0x38 - 800752e: fa93 f3a3 rbit r3, r3 - 8007532: 637b str r3, [r7, #52] ; 0x34 - return result; - 8007534: 6b7b ldr r3, [r7, #52] ; 0x34 - __HAL_RCC_BACKUPRESET_RELEASE(); - 8007536: fab3 f383 clz r3, r3 - 800753a: b2db uxtb r3, r3 - 800753c: 461a mov r2, r3 - 800753e: 4b1d ldr r3, [pc, #116] ; (80075b4 ) - 8007540: 4413 add r3, r2 - 8007542: 009b lsls r3, r3, #2 - 8007544: 461a mov r2, r3 - 8007546: 2300 movs r3, #0 - 8007548: 6013 str r3, [r2, #0] - /* Restore the Content of BDCR register */ - RCC->BDCR = temp_reg; - 800754a: 4a18 ldr r2, [pc, #96] ; (80075ac ) - 800754c: 6bfb ldr r3, [r7, #60] ; 0x3c - 800754e: 6213 str r3, [r2, #32] - - /* Wait for LSERDY if LSE was enabled */ - if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) - 8007550: 6bfb ldr r3, [r7, #60] ; 0x3c - 8007552: f003 0301 and.w r3, r3, #1 - 8007556: 2b00 cmp r3, #0 - 8007558: d04b beq.n 80075f2 - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 800755a: f7fb fcf7 bl 8002f4c - 800755e: 6438 str r0, [r7, #64] ; 0x40 - - /* Wait till LSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8007560: e00a b.n 8007578 - { - if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8007562: f7fb fcf3 bl 8002f4c - 8007566: 4602 mov r2, r0 - 8007568: 6c3b ldr r3, [r7, #64] ; 0x40 - 800756a: 1ad3 subs r3, r2, r3 - 800756c: f241 3288 movw r2, #5000 ; 0x1388 - 8007570: 4293 cmp r3, r2 - 8007572: d901 bls.n 8007578 - { - return HAL_TIMEOUT; - 8007574: 2303 movs r3, #3 - 8007576: e113 b.n 80077a0 - 8007578: 2302 movs r3, #2 - 800757a: 62bb str r3, [r7, #40] ; 0x28 - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800757c: 6abb ldr r3, [r7, #40] ; 0x28 - 800757e: fa93 f3a3 rbit r3, r3 - 8007582: 627b str r3, [r7, #36] ; 0x24 - 8007584: 2302 movs r3, #2 - 8007586: 623b str r3, [r7, #32] - 8007588: 6a3b ldr r3, [r7, #32] - 800758a: fa93 f3a3 rbit r3, r3 - 800758e: 61fb str r3, [r7, #28] - return result; - 8007590: 69fb ldr r3, [r7, #28] - while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8007592: fab3 f383 clz r3, r3 - 8007596: b2db uxtb r3, r3 - 8007598: 095b lsrs r3, r3, #5 - 800759a: b2db uxtb r3, r3 - 800759c: f043 0302 orr.w r3, r3, #2 - 80075a0: b2db uxtb r3, r3 - 80075a2: 2b02 cmp r3, #2 - 80075a4: d108 bne.n 80075b8 - 80075a6: 4b01 ldr r3, [pc, #4] ; (80075ac ) - 80075a8: 6a1b ldr r3, [r3, #32] - 80075aa: e00d b.n 80075c8 - 80075ac: 40021000 .word 0x40021000 - 80075b0: 40007000 .word 0x40007000 - 80075b4: 10908100 .word 0x10908100 - 80075b8: 2302 movs r3, #2 - 80075ba: 61bb str r3, [r7, #24] - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80075bc: 69bb ldr r3, [r7, #24] - 80075be: fa93 f3a3 rbit r3, r3 - 80075c2: 617b str r3, [r7, #20] - 80075c4: 4b78 ldr r3, [pc, #480] ; (80077a8 ) - 80075c6: 6a5b ldr r3, [r3, #36] ; 0x24 - 80075c8: 2202 movs r2, #2 - 80075ca: 613a str r2, [r7, #16] - 80075cc: 693a ldr r2, [r7, #16] - 80075ce: fa92 f2a2 rbit r2, r2 - 80075d2: 60fa str r2, [r7, #12] - return result; - 80075d4: 68fa ldr r2, [r7, #12] - 80075d6: fab2 f282 clz r2, r2 - 80075da: b2d2 uxtb r2, r2 - 80075dc: f042 0240 orr.w r2, r2, #64 ; 0x40 - 80075e0: b2d2 uxtb r2, r2 - 80075e2: f002 021f and.w r2, r2, #31 - 80075e6: 2101 movs r1, #1 - 80075e8: fa01 f202 lsl.w r2, r1, r2 - 80075ec: 4013 ands r3, r2 - 80075ee: 2b00 cmp r3, #0 - 80075f0: d0b7 beq.n 8007562 - } - } - } - } - __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 80075f2: 4b6d ldr r3, [pc, #436] ; (80077a8 ) - 80075f4: 6a1b ldr r3, [r3, #32] - 80075f6: f423 7240 bic.w r2, r3, #768 ; 0x300 - 80075fa: 687b ldr r3, [r7, #4] - 80075fc: 685b ldr r3, [r3, #4] - 80075fe: 496a ldr r1, [pc, #424] ; (80077a8 ) - 8007600: 4313 orrs r3, r2 - 8007602: 620b str r3, [r1, #32] - - /* Require to disable power clock if necessary */ - if(pwrclkchanged == SET) - 8007604: f897 3047 ldrb.w r3, [r7, #71] ; 0x47 - 8007608: 2b01 cmp r3, #1 - 800760a: d105 bne.n 8007618 - { - __HAL_RCC_PWR_CLK_DISABLE(); - 800760c: 4b66 ldr r3, [pc, #408] ; (80077a8 ) - 800760e: 69db ldr r3, [r3, #28] - 8007610: 4a65 ldr r2, [pc, #404] ; (80077a8 ) - 8007612: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 8007616: 61d3 str r3, [r2, #28] - } - } - - /*------------------------------- USART1 Configuration ------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) - 8007618: 687b ldr r3, [r7, #4] - 800761a: 681b ldr r3, [r3, #0] - 800761c: f003 0301 and.w r3, r3, #1 - 8007620: 2b00 cmp r3, #0 - 8007622: d008 beq.n 8007636 - { - /* Check the parameters */ - assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); - - /* Configure the USART1 clock source */ - __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); - 8007624: 4b60 ldr r3, [pc, #384] ; (80077a8 ) - 8007626: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007628: f023 0203 bic.w r2, r3, #3 - 800762c: 687b ldr r3, [r7, #4] - 800762e: 689b ldr r3, [r3, #8] - 8007630: 495d ldr r1, [pc, #372] ; (80077a8 ) - 8007632: 4313 orrs r3, r2 - 8007634: 630b str r3, [r1, #48] ; 0x30 - } - -#if defined(RCC_CFGR3_USART2SW) - /*----------------------------- USART2 Configuration --------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) - 8007636: 687b ldr r3, [r7, #4] - 8007638: 681b ldr r3, [r3, #0] - 800763a: f003 0302 and.w r3, r3, #2 - 800763e: 2b00 cmp r3, #0 - 8007640: d008 beq.n 8007654 - { - /* Check the parameters */ - assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); - - /* Configure the USART2 clock source */ - __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); - 8007642: 4b59 ldr r3, [pc, #356] ; (80077a8 ) - 8007644: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007646: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 800764a: 687b ldr r3, [r7, #4] - 800764c: 68db ldr r3, [r3, #12] - 800764e: 4956 ldr r1, [pc, #344] ; (80077a8 ) - 8007650: 4313 orrs r3, r2 - 8007652: 630b str r3, [r1, #48] ; 0x30 - } -#endif /* RCC_CFGR3_USART2SW */ - -#if defined(RCC_CFGR3_USART3SW) - /*------------------------------ USART3 Configuration ------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) - 8007654: 687b ldr r3, [r7, #4] - 8007656: 681b ldr r3, [r3, #0] - 8007658: f003 0304 and.w r3, r3, #4 - 800765c: 2b00 cmp r3, #0 - 800765e: d008 beq.n 8007672 - { - /* Check the parameters */ - assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); - - /* Configure the USART3 clock source */ - __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); - 8007660: 4b51 ldr r3, [pc, #324] ; (80077a8 ) - 8007662: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007664: f423 2240 bic.w r2, r3, #786432 ; 0xc0000 - 8007668: 687b ldr r3, [r7, #4] - 800766a: 691b ldr r3, [r3, #16] - 800766c: 494e ldr r1, [pc, #312] ; (80077a8 ) - 800766e: 4313 orrs r3, r2 - 8007670: 630b str r3, [r1, #48] ; 0x30 - } -#endif /* RCC_CFGR3_USART3SW */ - - /*------------------------------ I2C1 Configuration ------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) - 8007672: 687b ldr r3, [r7, #4] - 8007674: 681b ldr r3, [r3, #0] - 8007676: f003 0320 and.w r3, r3, #32 - 800767a: 2b00 cmp r3, #0 - 800767c: d008 beq.n 8007690 - { - /* Check the parameters */ - assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); - - /* Configure the I2C1 clock source */ - __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); - 800767e: 4b4a ldr r3, [pc, #296] ; (80077a8 ) - 8007680: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007682: f023 0210 bic.w r2, r3, #16 - 8007686: 687b ldr r3, [r7, #4] - 8007688: 69db ldr r3, [r3, #28] - 800768a: 4947 ldr r1, [pc, #284] ; (80077a8 ) - 800768c: 4313 orrs r3, r2 - 800768e: 630b str r3, [r1, #48] ; 0x30 -#if defined(STM32F302xE) || defined(STM32F303xE)\ - || defined(STM32F302xC) || defined(STM32F303xC)\ - || defined(STM32F302x8) \ - || defined(STM32F373xC) - /*------------------------------ USB Configuration ------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) - 8007690: 687b ldr r3, [r7, #4] - 8007692: 681b ldr r3, [r3, #0] - 8007694: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8007698: 2b00 cmp r3, #0 - 800769a: d008 beq.n 80076ae - { - /* Check the parameters */ - assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->USBClockSelection)); - - /* Configure the USB clock source */ - __HAL_RCC_USB_CONFIG(PeriphClkInit->USBClockSelection); - 800769c: 4b42 ldr r3, [pc, #264] ; (80077a8 ) - 800769e: 685b ldr r3, [r3, #4] - 80076a0: f423 0280 bic.w r2, r3, #4194304 ; 0x400000 - 80076a4: 687b ldr r3, [r7, #4] - 80076a6: 6b9b ldr r3, [r3, #56] ; 0x38 - 80076a8: 493f ldr r1, [pc, #252] ; (80077a8 ) - 80076aa: 4313 orrs r3, r2 - 80076ac: 604b str r3, [r1, #4] - || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ - || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\ - || defined(STM32F373xC) || defined(STM32F378xx) - - /*------------------------------ I2C2 Configuration ------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) - 80076ae: 687b ldr r3, [r7, #4] - 80076b0: 681b ldr r3, [r3, #0] - 80076b2: f003 0340 and.w r3, r3, #64 ; 0x40 - 80076b6: 2b00 cmp r3, #0 - 80076b8: d008 beq.n 80076cc - { - /* Check the parameters */ - assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); - - /* Configure the I2C2 clock source */ - __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); - 80076ba: 4b3b ldr r3, [pc, #236] ; (80077a8 ) - 80076bc: 6b1b ldr r3, [r3, #48] ; 0x30 - 80076be: f023 0220 bic.w r2, r3, #32 - 80076c2: 687b ldr r3, [r7, #4] - 80076c4: 6a1b ldr r3, [r3, #32] - 80076c6: 4938 ldr r1, [pc, #224] ; (80077a8 ) - 80076c8: 4313 orrs r3, r2 - 80076ca: 630b str r3, [r1, #48] ; 0x30 - -#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ - || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) - - /*------------------------------ UART4 Configuration ------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) - 80076cc: 687b ldr r3, [r7, #4] - 80076ce: 681b ldr r3, [r3, #0] - 80076d0: f003 0308 and.w r3, r3, #8 - 80076d4: 2b00 cmp r3, #0 - 80076d6: d008 beq.n 80076ea - { - /* Check the parameters */ - assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); - - /* Configure the UART4 clock source */ - __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); - 80076d8: 4b33 ldr r3, [pc, #204] ; (80077a8 ) - 80076da: 6b1b ldr r3, [r3, #48] ; 0x30 - 80076dc: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 - 80076e0: 687b ldr r3, [r7, #4] - 80076e2: 695b ldr r3, [r3, #20] - 80076e4: 4930 ldr r1, [pc, #192] ; (80077a8 ) - 80076e6: 4313 orrs r3, r2 - 80076e8: 630b str r3, [r1, #48] ; 0x30 - } - - /*------------------------------ UART5 Configuration ------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) - 80076ea: 687b ldr r3, [r7, #4] - 80076ec: 681b ldr r3, [r3, #0] - 80076ee: f003 0310 and.w r3, r3, #16 - 80076f2: 2b00 cmp r3, #0 - 80076f4: d008 beq.n 8007708 - { - /* Check the parameters */ - assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); - - /* Configure the UART5 clock source */ - __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); - 80076f6: 4b2c ldr r3, [pc, #176] ; (80077a8 ) - 80076f8: 6b1b ldr r3, [r3, #48] ; 0x30 - 80076fa: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000 - 80076fe: 687b ldr r3, [r7, #4] - 8007700: 699b ldr r3, [r3, #24] - 8007702: 4929 ldr r1, [pc, #164] ; (80077a8 ) - 8007704: 4313 orrs r3, r2 - 8007706: 630b str r3, [r1, #48] ; 0x30 - -#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ - || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ - || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) - /*------------------------------ I2S Configuration ------------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) - 8007708: 687b ldr r3, [r7, #4] - 800770a: 681b ldr r3, [r3, #0] - 800770c: f403 7300 and.w r3, r3, #512 ; 0x200 - 8007710: 2b00 cmp r3, #0 - 8007712: d008 beq.n 8007726 - { - /* Check the parameters */ - assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection)); - - /* Configure the I2S clock source */ - __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection); - 8007714: 4b24 ldr r3, [pc, #144] ; (80077a8 ) - 8007716: 685b ldr r3, [r3, #4] - 8007718: f423 0200 bic.w r2, r3, #8388608 ; 0x800000 - 800771c: 687b ldr r3, [r7, #4] - 800771e: 6adb ldr r3, [r3, #44] ; 0x2c - 8007720: 4921 ldr r1, [pc, #132] ; (80077a8 ) - 8007722: 4313 orrs r3, r2 - 8007724: 604b str r3, [r1, #4] -#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ - || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ - || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) - - /*------------------------------ ADC1 & ADC2 clock Configuration -------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC12) == RCC_PERIPHCLK_ADC12) - 8007726: 687b ldr r3, [r7, #4] - 8007728: 681b ldr r3, [r3, #0] - 800772a: f003 0380 and.w r3, r3, #128 ; 0x80 - 800772e: 2b00 cmp r3, #0 - 8007730: d008 beq.n 8007744 - { - /* Check the parameters */ - assert_param(IS_RCC_ADC12PLLCLK_DIV(PeriphClkInit->Adc12ClockSelection)); - - /* Configure the ADC12 clock source */ - __HAL_RCC_ADC12_CONFIG(PeriphClkInit->Adc12ClockSelection); - 8007732: 4b1d ldr r3, [pc, #116] ; (80077a8 ) - 8007734: 6adb ldr r3, [r3, #44] ; 0x2c - 8007736: f423 72f8 bic.w r2, r3, #496 ; 0x1f0 - 800773a: 687b ldr r3, [r7, #4] - 800773c: 6a5b ldr r3, [r3, #36] ; 0x24 - 800773e: 491a ldr r1, [pc, #104] ; (80077a8 ) - 8007740: 4313 orrs r3, r2 - 8007742: 62cb str r3, [r1, #44] ; 0x2c - -#if defined(STM32F303xE) || defined(STM32F398xx)\ - || defined(STM32F303xC) || defined(STM32F358xx) - - /*------------------------------ ADC3 & ADC4 clock Configuration -------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC34) == RCC_PERIPHCLK_ADC34) - 8007744: 687b ldr r3, [r7, #4] - 8007746: 681b ldr r3, [r3, #0] - 8007748: f403 7380 and.w r3, r3, #256 ; 0x100 - 800774c: 2b00 cmp r3, #0 - 800774e: d008 beq.n 8007762 - { - /* Check the parameters */ - assert_param(IS_RCC_ADC34PLLCLK_DIV(PeriphClkInit->Adc34ClockSelection)); - - /* Configure the ADC34 clock source */ - __HAL_RCC_ADC34_CONFIG(PeriphClkInit->Adc34ClockSelection); - 8007750: 4b15 ldr r3, [pc, #84] ; (80077a8 ) - 8007752: 6adb ldr r3, [r3, #44] ; 0x2c - 8007754: f423 5278 bic.w r2, r3, #15872 ; 0x3e00 - 8007758: 687b ldr r3, [r7, #4] - 800775a: 6a9b ldr r3, [r3, #40] ; 0x28 - 800775c: 4912 ldr r1, [pc, #72] ; (80077a8 ) - 800775e: 4313 orrs r3, r2 - 8007760: 62cb str r3, [r1, #44] ; 0x2c - || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ - || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)\ - || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) - - /*------------------------------ TIM1 clock Configuration ----------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM1) == RCC_PERIPHCLK_TIM1) - 8007762: 687b ldr r3, [r7, #4] - 8007764: 681b ldr r3, [r3, #0] - 8007766: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 800776a: 2b00 cmp r3, #0 - 800776c: d008 beq.n 8007780 - { - /* Check the parameters */ - assert_param(IS_RCC_TIM1CLKSOURCE(PeriphClkInit->Tim1ClockSelection)); - - /* Configure the TIM1 clock source */ - __HAL_RCC_TIM1_CONFIG(PeriphClkInit->Tim1ClockSelection); - 800776e: 4b0e ldr r3, [pc, #56] ; (80077a8 ) - 8007770: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007772: f423 7280 bic.w r2, r3, #256 ; 0x100 - 8007776: 687b ldr r3, [r7, #4] - 8007778: 6b1b ldr r3, [r3, #48] ; 0x30 - 800777a: 490b ldr r1, [pc, #44] ; (80077a8 ) - 800777c: 4313 orrs r3, r2 - 800777e: 630b str r3, [r1, #48] ; 0x30 - -#if defined(STM32F303xE) || defined(STM32F398xx)\ - || defined(STM32F303xC) || defined(STM32F358xx) - - /*------------------------------ TIM8 clock Configuration ----------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM8) == RCC_PERIPHCLK_TIM8) - 8007780: 687b ldr r3, [r7, #4] - 8007782: 681b ldr r3, [r3, #0] - 8007784: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 8007788: 2b00 cmp r3, #0 - 800778a: d008 beq.n 800779e - { - /* Check the parameters */ - assert_param(IS_RCC_TIM8CLKSOURCE(PeriphClkInit->Tim8ClockSelection)); - - /* Configure the TIM8 clock source */ - __HAL_RCC_TIM8_CONFIG(PeriphClkInit->Tim8ClockSelection); - 800778c: 4b06 ldr r3, [pc, #24] ; (80077a8 ) - 800778e: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007790: f423 7200 bic.w r2, r3, #512 ; 0x200 - 8007794: 687b ldr r3, [r7, #4] - 8007796: 6b5b ldr r3, [r3, #52] ; 0x34 - 8007798: 4903 ldr r1, [pc, #12] ; (80077a8 ) - 800779a: 4313 orrs r3, r2 - 800779c: 630b str r3, [r1, #48] ; 0x30 - __HAL_RCC_TIM20_CONFIG(PeriphClkInit->Tim20ClockSelection); - } -#endif /* STM32F303xE || STM32F398xx */ - - - return HAL_OK; - 800779e: 2300 movs r3, #0 -} - 80077a0: 4618 mov r0, r3 - 80077a2: 3748 adds r7, #72 ; 0x48 - 80077a4: 46bd mov sp, r7 - 80077a6: bd80 pop {r7, pc} - 80077a8: 40021000 .word 0x40021000 - -080077ac : - * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) -{ - 80077ac: b580 push {r7, lr} - 80077ae: b082 sub sp, #8 - 80077b0: af00 add r7, sp, #0 - 80077b2: 6078 str r0, [r7, #4] - /* Check the TIM handle allocation */ - if (htim == NULL) - 80077b4: 687b ldr r3, [r7, #4] - 80077b6: 2b00 cmp r3, #0 - 80077b8: d101 bne.n 80077be - { - return HAL_ERROR; - 80077ba: 2301 movs r3, #1 - 80077bc: e01d b.n 80077fa - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if (htim->State == HAL_TIM_STATE_RESET) - 80077be: 687b ldr r3, [r7, #4] - 80077c0: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 80077c4: b2db uxtb r3, r3 - 80077c6: 2b00 cmp r3, #0 - 80077c8: d106 bne.n 80077d8 - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 80077ca: 687b ldr r3, [r7, #4] - 80077cc: 2200 movs r2, #0 - 80077ce: f883 203c strb.w r2, [r3, #60] ; 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->Base_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspInit(htim); - 80077d2: 6878 ldr r0, [r7, #4] - 80077d4: f7fb f8ba bl 800294c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 80077d8: 687b ldr r3, [r7, #4] - 80077da: 2202 movs r2, #2 - 80077dc: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Set the Time Base configuration */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 80077e0: 687b ldr r3, [r7, #4] - 80077e2: 681a ldr r2, [r3, #0] - 80077e4: 687b ldr r3, [r7, #4] - 80077e6: 3304 adds r3, #4 - 80077e8: 4619 mov r1, r3 - 80077ea: 4610 mov r0, r2 - 80077ec: f000 fcf0 bl 80081d0 - - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 80077f0: 687b ldr r3, [r7, #4] - 80077f2: 2201 movs r2, #1 - 80077f4: f883 203d strb.w r2, [r3, #61] ; 0x3d - - return HAL_OK; - 80077f8: 2300 movs r3, #0 -} - 80077fa: 4618 mov r0, r3 - 80077fc: 3708 adds r7, #8 - 80077fe: 46bd mov sp, r7 - 8007800: bd80 pop {r7, pc} - ... - -08007804 : - * @brief Starts the TIM Base generation in interrupt mode. - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) -{ - 8007804: b480 push {r7} - 8007806: b085 sub sp, #20 - 8007808: af00 add r7, sp, #0 - 800780a: 6078 str r0, [r7, #4] - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Enable the TIM Update interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 800780c: 687b ldr r3, [r7, #4] - 800780e: 681b ldr r3, [r3, #0] - 8007810: 68da ldr r2, [r3, #12] - 8007812: 687b ldr r3, [r7, #4] - 8007814: 681b ldr r3, [r3, #0] - 8007816: f042 0201 orr.w r2, r2, #1 - 800781a: 60da str r2, [r3, #12] - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 800781c: 687b ldr r3, [r7, #4] - 800781e: 681b ldr r3, [r3, #0] - 8007820: 689a ldr r2, [r3, #8] - 8007822: 4b0c ldr r3, [pc, #48] ; (8007854 ) - 8007824: 4013 ands r3, r2 - 8007826: 60fb str r3, [r7, #12] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8007828: 68fb ldr r3, [r7, #12] - 800782a: 2b06 cmp r3, #6 - 800782c: d00b beq.n 8007846 - 800782e: 68fb ldr r3, [r7, #12] - 8007830: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8007834: d007 beq.n 8007846 - { - __HAL_TIM_ENABLE(htim); - 8007836: 687b ldr r3, [r7, #4] - 8007838: 681b ldr r3, [r3, #0] - 800783a: 681a ldr r2, [r3, #0] - 800783c: 687b ldr r3, [r7, #4] - 800783e: 681b ldr r3, [r3, #0] - 8007840: f042 0201 orr.w r2, r2, #1 - 8007844: 601a str r2, [r3, #0] - } - - /* Return function status */ - return HAL_OK; - 8007846: 2300 movs r3, #0 -} - 8007848: 4618 mov r0, r3 - 800784a: 3714 adds r7, #20 - 800784c: 46bd mov sp, r7 - 800784e: f85d 7b04 ldr.w r7, [sp], #4 - 8007852: 4770 bx lr - 8007854: 00010007 .word 0x00010007 - -08007858 : - * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() - * @param htim TIM PWM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) -{ - 8007858: b580 push {r7, lr} - 800785a: b082 sub sp, #8 - 800785c: af00 add r7, sp, #0 - 800785e: 6078 str r0, [r7, #4] - /* Check the TIM handle allocation */ - if (htim == NULL) - 8007860: 687b ldr r3, [r7, #4] - 8007862: 2b00 cmp r3, #0 - 8007864: d101 bne.n 800786a - { - return HAL_ERROR; - 8007866: 2301 movs r3, #1 - 8007868: e01d b.n 80078a6 - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if (htim->State == HAL_TIM_STATE_RESET) - 800786a: 687b ldr r3, [r7, #4] - 800786c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8007870: b2db uxtb r3, r3 - 8007872: 2b00 cmp r3, #0 - 8007874: d106 bne.n 8007884 - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 8007876: 687b ldr r3, [r7, #4] - 8007878: 2200 movs r2, #0 - 800787a: f883 203c strb.w r2, [r3, #60] ; 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->PWM_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspInit(htim); - 800787e: 6878 ldr r0, [r7, #4] - 8007880: f7fb f844 bl 800290c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 8007884: 687b ldr r3, [r7, #4] - 8007886: 2202 movs r2, #2 - 8007888: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Init the base time for the PWM */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 800788c: 687b ldr r3, [r7, #4] - 800788e: 681a ldr r2, [r3, #0] - 8007890: 687b ldr r3, [r7, #4] - 8007892: 3304 adds r3, #4 - 8007894: 4619 mov r1, r3 - 8007896: 4610 mov r0, r2 - 8007898: f000 fc9a bl 80081d0 - - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 800789c: 687b ldr r3, [r7, #4] - 800789e: 2201 movs r2, #1 - 80078a0: f883 203d strb.w r2, [r3, #61] ; 0x3d - - return HAL_OK; - 80078a4: 2300 movs r3, #0 -} - 80078a6: 4618 mov r0, r3 - 80078a8: 3708 adds r7, #8 - 80078aa: 46bd mov sp, r7 - 80078ac: bd80 pop {r7, pc} - ... - -080078b0 : - * @arg TIM_CHANNEL_6: TIM Channel 6 selected (*) - * (*) Value not defined for all devices - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - 80078b0: b580 push {r7, lr} - 80078b2: b084 sub sp, #16 - 80078b4: af00 add r7, sp, #0 - 80078b6: 6078 str r0, [r7, #4] - 80078b8: 6039 str r1, [r7, #0] - - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - 80078ba: 687b ldr r3, [r7, #4] - 80078bc: 681b ldr r3, [r3, #0] - 80078be: 2201 movs r2, #1 - 80078c0: 6839 ldr r1, [r7, #0] - 80078c2: 4618 mov r0, r3 - 80078c4: f001 fa0f bl 8008ce6 - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - 80078c8: 687b ldr r3, [r7, #4] - 80078ca: 681b ldr r3, [r3, #0] - 80078cc: 4a1e ldr r2, [pc, #120] ; (8007948 ) - 80078ce: 4293 cmp r3, r2 - 80078d0: d013 beq.n 80078fa - 80078d2: 687b ldr r3, [r7, #4] - 80078d4: 681b ldr r3, [r3, #0] - 80078d6: 4a1d ldr r2, [pc, #116] ; (800794c ) - 80078d8: 4293 cmp r3, r2 - 80078da: d00e beq.n 80078fa - 80078dc: 687b ldr r3, [r7, #4] - 80078de: 681b ldr r3, [r3, #0] - 80078e0: 4a1b ldr r2, [pc, #108] ; (8007950 ) - 80078e2: 4293 cmp r3, r2 - 80078e4: d009 beq.n 80078fa - 80078e6: 687b ldr r3, [r7, #4] - 80078e8: 681b ldr r3, [r3, #0] - 80078ea: 4a1a ldr r2, [pc, #104] ; (8007954 ) - 80078ec: 4293 cmp r3, r2 - 80078ee: d004 beq.n 80078fa - 80078f0: 687b ldr r3, [r7, #4] - 80078f2: 681b ldr r3, [r3, #0] - 80078f4: 4a18 ldr r2, [pc, #96] ; (8007958 ) - 80078f6: 4293 cmp r3, r2 - 80078f8: d101 bne.n 80078fe - 80078fa: 2301 movs r3, #1 - 80078fc: e000 b.n 8007900 - 80078fe: 2300 movs r3, #0 - 8007900: 2b00 cmp r3, #0 - 8007902: d007 beq.n 8007914 - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - 8007904: 687b ldr r3, [r7, #4] - 8007906: 681b ldr r3, [r3, #0] - 8007908: 6c5a ldr r2, [r3, #68] ; 0x44 - 800790a: 687b ldr r3, [r7, #4] - 800790c: 681b ldr r3, [r3, #0] - 800790e: f442 4200 orr.w r2, r2, #32768 ; 0x8000 - 8007912: 645a str r2, [r3, #68] ; 0x44 - } - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8007914: 687b ldr r3, [r7, #4] - 8007916: 681b ldr r3, [r3, #0] - 8007918: 689a ldr r2, [r3, #8] - 800791a: 4b10 ldr r3, [pc, #64] ; (800795c ) - 800791c: 4013 ands r3, r2 - 800791e: 60fb str r3, [r7, #12] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8007920: 68fb ldr r3, [r7, #12] - 8007922: 2b06 cmp r3, #6 - 8007924: d00b beq.n 800793e - 8007926: 68fb ldr r3, [r7, #12] - 8007928: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 800792c: d007 beq.n 800793e - { - __HAL_TIM_ENABLE(htim); - 800792e: 687b ldr r3, [r7, #4] - 8007930: 681b ldr r3, [r3, #0] - 8007932: 681a ldr r2, [r3, #0] - 8007934: 687b ldr r3, [r7, #4] - 8007936: 681b ldr r3, [r3, #0] - 8007938: f042 0201 orr.w r2, r2, #1 - 800793c: 601a str r2, [r3, #0] - } - - /* Return function status */ - return HAL_OK; - 800793e: 2300 movs r3, #0 -} - 8007940: 4618 mov r0, r3 - 8007942: 3710 adds r7, #16 - 8007944: 46bd mov sp, r7 - 8007946: bd80 pop {r7, pc} - 8007948: 40012c00 .word 0x40012c00 - 800794c: 40013400 .word 0x40013400 - 8007950: 40014000 .word 0x40014000 - 8007954: 40014400 .word 0x40014400 - 8007958: 40014800 .word 0x40014800 - 800795c: 00010007 .word 0x00010007 - -08007960 : - * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init() - * @param htim TIM Input Capture handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) -{ - 8007960: b580 push {r7, lr} - 8007962: b082 sub sp, #8 - 8007964: af00 add r7, sp, #0 - 8007966: 6078 str r0, [r7, #4] - /* Check the TIM handle allocation */ - if (htim == NULL) - 8007968: 687b ldr r3, [r7, #4] - 800796a: 2b00 cmp r3, #0 - 800796c: d101 bne.n 8007972 - { - return HAL_ERROR; - 800796e: 2301 movs r3, #1 - 8007970: e01d b.n 80079ae - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if (htim->State == HAL_TIM_STATE_RESET) - 8007972: 687b ldr r3, [r7, #4] - 8007974: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8007978: b2db uxtb r3, r3 - 800797a: 2b00 cmp r3, #0 - 800797c: d106 bne.n 800798c - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 800797e: 687b ldr r3, [r7, #4] - 8007980: 2200 movs r2, #0 - 8007982: f883 203c strb.w r2, [r3, #60] ; 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->IC_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_IC_MspInit(htim); - 8007986: 6878 ldr r0, [r7, #4] - 8007988: f000 f815 bl 80079b6 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 800798c: 687b ldr r3, [r7, #4] - 800798e: 2202 movs r2, #2 - 8007990: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Init the base time for the input capture */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8007994: 687b ldr r3, [r7, #4] - 8007996: 681a ldr r2, [r3, #0] - 8007998: 687b ldr r3, [r7, #4] - 800799a: 3304 adds r3, #4 - 800799c: 4619 mov r1, r3 - 800799e: 4610 mov r0, r2 - 80079a0: f000 fc16 bl 80081d0 - - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 80079a4: 687b ldr r3, [r7, #4] - 80079a6: 2201 movs r2, #1 - 80079a8: f883 203d strb.w r2, [r3, #61] ; 0x3d - - return HAL_OK; - 80079ac: 2300 movs r3, #0 -} - 80079ae: 4618 mov r0, r3 - 80079b0: 3708 adds r7, #8 - 80079b2: 46bd mov sp, r7 - 80079b4: bd80 pop {r7, pc} - -080079b6 : - * @brief Initializes the TIM Input Capture MSP. - * @param htim TIM Input Capture handle - * @retval None - */ -__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) -{ - 80079b6: b480 push {r7} - 80079b8: b083 sub sp, #12 - 80079ba: af00 add r7, sp, #0 - 80079bc: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_MspInit could be implemented in the user file - */ -} - 80079be: bf00 nop - 80079c0: 370c adds r7, #12 - 80079c2: 46bd mov sp, r7 - 80079c4: f85d 7b04 ldr.w r7, [sp], #4 - 80079c8: 4770 bx lr - ... - -080079cc : - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - 80079cc: b580 push {r7, lr} - 80079ce: b084 sub sp, #16 - 80079d0: af00 add r7, sp, #0 - 80079d2: 6078 str r0, [r7, #4] - 80079d4: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; - - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - 80079d6: 683b ldr r3, [r7, #0] - 80079d8: 2b0c cmp r3, #12 - 80079da: d841 bhi.n 8007a60 - 80079dc: a201 add r2, pc, #4 ; (adr r2, 80079e4 ) - 80079de: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80079e2: bf00 nop - 80079e4: 08007a19 .word 0x08007a19 - 80079e8: 08007a61 .word 0x08007a61 - 80079ec: 08007a61 .word 0x08007a61 - 80079f0: 08007a61 .word 0x08007a61 - 80079f4: 08007a2b .word 0x08007a2b - 80079f8: 08007a61 .word 0x08007a61 - 80079fc: 08007a61 .word 0x08007a61 - 8007a00: 08007a61 .word 0x08007a61 - 8007a04: 08007a3d .word 0x08007a3d - 8007a08: 08007a61 .word 0x08007a61 - 8007a0c: 08007a61 .word 0x08007a61 - 8007a10: 08007a61 .word 0x08007a61 - 8007a14: 08007a4f .word 0x08007a4f - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - 8007a18: 687b ldr r3, [r7, #4] - 8007a1a: 681b ldr r3, [r3, #0] - 8007a1c: 68da ldr r2, [r3, #12] - 8007a1e: 687b ldr r3, [r7, #4] - 8007a20: 681b ldr r3, [r3, #0] - 8007a22: f042 0202 orr.w r2, r2, #2 - 8007a26: 60da str r2, [r3, #12] - break; - 8007a28: e01b b.n 8007a62 - } - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - 8007a2a: 687b ldr r3, [r7, #4] - 8007a2c: 681b ldr r3, [r3, #0] - 8007a2e: 68da ldr r2, [r3, #12] - 8007a30: 687b ldr r3, [r7, #4] - 8007a32: 681b ldr r3, [r3, #0] - 8007a34: f042 0204 orr.w r2, r2, #4 - 8007a38: 60da str r2, [r3, #12] - break; - 8007a3a: e012 b.n 8007a62 - } - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - 8007a3c: 687b ldr r3, [r7, #4] - 8007a3e: 681b ldr r3, [r3, #0] - 8007a40: 68da ldr r2, [r3, #12] - 8007a42: 687b ldr r3, [r7, #4] - 8007a44: 681b ldr r3, [r3, #0] - 8007a46: f042 0208 orr.w r2, r2, #8 - 8007a4a: 60da str r2, [r3, #12] - break; - 8007a4c: e009 b.n 8007a62 - } - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - 8007a4e: 687b ldr r3, [r7, #4] - 8007a50: 681b ldr r3, [r3, #0] - 8007a52: 68da ldr r2, [r3, #12] - 8007a54: 687b ldr r3, [r7, #4] - 8007a56: 681b ldr r3, [r3, #0] - 8007a58: f042 0210 orr.w r2, r2, #16 - 8007a5c: 60da str r2, [r3, #12] - break; - 8007a5e: e000 b.n 8007a62 - } - - default: - break; - 8007a60: bf00 nop - } - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - 8007a62: 687b ldr r3, [r7, #4] - 8007a64: 681b ldr r3, [r3, #0] - 8007a66: 2201 movs r2, #1 - 8007a68: 6839 ldr r1, [r7, #0] - 8007a6a: 4618 mov r0, r3 - 8007a6c: f001 f93b bl 8008ce6 - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8007a70: 687b ldr r3, [r7, #4] - 8007a72: 681b ldr r3, [r3, #0] - 8007a74: 689a ldr r2, [r3, #8] - 8007a76: 4b0b ldr r3, [pc, #44] ; (8007aa4 ) - 8007a78: 4013 ands r3, r2 - 8007a7a: 60fb str r3, [r7, #12] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8007a7c: 68fb ldr r3, [r7, #12] - 8007a7e: 2b06 cmp r3, #6 - 8007a80: d00b beq.n 8007a9a - 8007a82: 68fb ldr r3, [r7, #12] - 8007a84: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8007a88: d007 beq.n 8007a9a - { - __HAL_TIM_ENABLE(htim); - 8007a8a: 687b ldr r3, [r7, #4] - 8007a8c: 681b ldr r3, [r3, #0] - 8007a8e: 681a ldr r2, [r3, #0] - 8007a90: 687b ldr r3, [r7, #4] - 8007a92: 681b ldr r3, [r3, #0] - 8007a94: f042 0201 orr.w r2, r2, #1 - 8007a98: 601a str r2, [r3, #0] - } - - /* Return function status */ - return HAL_OK; - 8007a9a: 2300 movs r3, #0 -} - 8007a9c: 4618 mov r0, r3 - 8007a9e: 3710 adds r7, #16 - 8007aa0: 46bd mov sp, r7 - 8007aa2: bd80 pop {r7, pc} - 8007aa4: 00010007 .word 0x00010007 - -08007aa8 : - * @brief This function handles TIM interrupts requests. - * @param htim TIM handle - * @retval None - */ -void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) -{ - 8007aa8: b580 push {r7, lr} - 8007aaa: b082 sub sp, #8 - 8007aac: af00 add r7, sp, #0 - 8007aae: 6078 str r0, [r7, #4] - /* Capture compare 1 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - 8007ab0: 687b ldr r3, [r7, #4] - 8007ab2: 681b ldr r3, [r3, #0] - 8007ab4: 691b ldr r3, [r3, #16] - 8007ab6: f003 0302 and.w r3, r3, #2 - 8007aba: 2b02 cmp r3, #2 - 8007abc: d122 bne.n 8007b04 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) - 8007abe: 687b ldr r3, [r7, #4] - 8007ac0: 681b ldr r3, [r3, #0] - 8007ac2: 68db ldr r3, [r3, #12] - 8007ac4: f003 0302 and.w r3, r3, #2 - 8007ac8: 2b02 cmp r3, #2 - 8007aca: d11b bne.n 8007b04 - { - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - 8007acc: 687b ldr r3, [r7, #4] - 8007ace: 681b ldr r3, [r3, #0] - 8007ad0: f06f 0202 mvn.w r2, #2 - 8007ad4: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8007ad6: 687b ldr r3, [r7, #4] - 8007ad8: 2201 movs r2, #1 - 8007ada: 771a strb r2, [r3, #28] - - /* Input capture event */ - if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 8007adc: 687b ldr r3, [r7, #4] - 8007ade: 681b ldr r3, [r3, #0] - 8007ae0: 699b ldr r3, [r3, #24] - 8007ae2: f003 0303 and.w r3, r3, #3 - 8007ae6: 2b00 cmp r3, #0 - 8007ae8: d003 beq.n 8007af2 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8007aea: 6878 ldr r0, [r7, #4] - 8007aec: f7f9 fc56 bl 800139c - 8007af0: e005 b.n 8007afe - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8007af2: 6878 ldr r0, [r7, #4] - 8007af4: f000 fb4e bl 8008194 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 8007af8: 6878 ldr r0, [r7, #4] - 8007afa: f000 fb55 bl 80081a8 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8007afe: 687b ldr r3, [r7, #4] - 8007b00: 2200 movs r2, #0 - 8007b02: 771a strb r2, [r3, #28] - } - } - } - /* Capture compare 2 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - 8007b04: 687b ldr r3, [r7, #4] - 8007b06: 681b ldr r3, [r3, #0] - 8007b08: 691b ldr r3, [r3, #16] - 8007b0a: f003 0304 and.w r3, r3, #4 - 8007b0e: 2b04 cmp r3, #4 - 8007b10: d122 bne.n 8007b58 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) - 8007b12: 687b ldr r3, [r7, #4] - 8007b14: 681b ldr r3, [r3, #0] - 8007b16: 68db ldr r3, [r3, #12] - 8007b18: f003 0304 and.w r3, r3, #4 - 8007b1c: 2b04 cmp r3, #4 - 8007b1e: d11b bne.n 8007b58 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - 8007b20: 687b ldr r3, [r7, #4] - 8007b22: 681b ldr r3, [r3, #0] - 8007b24: f06f 0204 mvn.w r2, #4 - 8007b28: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 8007b2a: 687b ldr r3, [r7, #4] - 8007b2c: 2202 movs r2, #2 - 8007b2e: 771a strb r2, [r3, #28] - /* Input capture event */ - if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 8007b30: 687b ldr r3, [r7, #4] - 8007b32: 681b ldr r3, [r3, #0] - 8007b34: 699b ldr r3, [r3, #24] - 8007b36: f403 7340 and.w r3, r3, #768 ; 0x300 - 8007b3a: 2b00 cmp r3, #0 - 8007b3c: d003 beq.n 8007b46 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8007b3e: 6878 ldr r0, [r7, #4] - 8007b40: f7f9 fc2c bl 800139c - 8007b44: e005 b.n 8007b52 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8007b46: 6878 ldr r0, [r7, #4] - 8007b48: f000 fb24 bl 8008194 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 8007b4c: 6878 ldr r0, [r7, #4] - 8007b4e: f000 fb2b bl 80081a8 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8007b52: 687b ldr r3, [r7, #4] - 8007b54: 2200 movs r2, #0 - 8007b56: 771a strb r2, [r3, #28] - } - } - /* Capture compare 3 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - 8007b58: 687b ldr r3, [r7, #4] - 8007b5a: 681b ldr r3, [r3, #0] - 8007b5c: 691b ldr r3, [r3, #16] - 8007b5e: f003 0308 and.w r3, r3, #8 - 8007b62: 2b08 cmp r3, #8 - 8007b64: d122 bne.n 8007bac - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) - 8007b66: 687b ldr r3, [r7, #4] - 8007b68: 681b ldr r3, [r3, #0] - 8007b6a: 68db ldr r3, [r3, #12] - 8007b6c: f003 0308 and.w r3, r3, #8 - 8007b70: 2b08 cmp r3, #8 - 8007b72: d11b bne.n 8007bac - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - 8007b74: 687b ldr r3, [r7, #4] - 8007b76: 681b ldr r3, [r3, #0] - 8007b78: f06f 0208 mvn.w r2, #8 - 8007b7c: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8007b7e: 687b ldr r3, [r7, #4] - 8007b80: 2204 movs r2, #4 - 8007b82: 771a strb r2, [r3, #28] - /* Input capture event */ - if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8007b84: 687b ldr r3, [r7, #4] - 8007b86: 681b ldr r3, [r3, #0] - 8007b88: 69db ldr r3, [r3, #28] - 8007b8a: f003 0303 and.w r3, r3, #3 - 8007b8e: 2b00 cmp r3, #0 - 8007b90: d003 beq.n 8007b9a - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8007b92: 6878 ldr r0, [r7, #4] - 8007b94: f7f9 fc02 bl 800139c - 8007b98: e005 b.n 8007ba6 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8007b9a: 6878 ldr r0, [r7, #4] - 8007b9c: f000 fafa bl 8008194 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 8007ba0: 6878 ldr r0, [r7, #4] - 8007ba2: f000 fb01 bl 80081a8 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8007ba6: 687b ldr r3, [r7, #4] - 8007ba8: 2200 movs r2, #0 - 8007baa: 771a strb r2, [r3, #28] - } - } - /* Capture compare 4 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - 8007bac: 687b ldr r3, [r7, #4] - 8007bae: 681b ldr r3, [r3, #0] - 8007bb0: 691b ldr r3, [r3, #16] - 8007bb2: f003 0310 and.w r3, r3, #16 - 8007bb6: 2b10 cmp r3, #16 - 8007bb8: d122 bne.n 8007c00 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) - 8007bba: 687b ldr r3, [r7, #4] - 8007bbc: 681b ldr r3, [r3, #0] - 8007bbe: 68db ldr r3, [r3, #12] - 8007bc0: f003 0310 and.w r3, r3, #16 - 8007bc4: 2b10 cmp r3, #16 - 8007bc6: d11b bne.n 8007c00 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - 8007bc8: 687b ldr r3, [r7, #4] - 8007bca: 681b ldr r3, [r3, #0] - 8007bcc: f06f 0210 mvn.w r2, #16 - 8007bd0: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 8007bd2: 687b ldr r3, [r7, #4] - 8007bd4: 2208 movs r2, #8 - 8007bd6: 771a strb r2, [r3, #28] - /* Input capture event */ - if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8007bd8: 687b ldr r3, [r7, #4] - 8007bda: 681b ldr r3, [r3, #0] - 8007bdc: 69db ldr r3, [r3, #28] - 8007bde: f403 7340 and.w r3, r3, #768 ; 0x300 - 8007be2: 2b00 cmp r3, #0 - 8007be4: d003 beq.n 8007bee - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8007be6: 6878 ldr r0, [r7, #4] - 8007be8: f7f9 fbd8 bl 800139c - 8007bec: e005 b.n 8007bfa - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8007bee: 6878 ldr r0, [r7, #4] - 8007bf0: f000 fad0 bl 8008194 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 8007bf4: 6878 ldr r0, [r7, #4] - 8007bf6: f000 fad7 bl 80081a8 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8007bfa: 687b ldr r3, [r7, #4] - 8007bfc: 2200 movs r2, #0 - 8007bfe: 771a strb r2, [r3, #28] - } - } - /* TIM Update event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - 8007c00: 687b ldr r3, [r7, #4] - 8007c02: 681b ldr r3, [r3, #0] - 8007c04: 691b ldr r3, [r3, #16] - 8007c06: f003 0301 and.w r3, r3, #1 - 8007c0a: 2b01 cmp r3, #1 - 8007c0c: d10e bne.n 8007c2c - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) - 8007c0e: 687b ldr r3, [r7, #4] - 8007c10: 681b ldr r3, [r3, #0] - 8007c12: 68db ldr r3, [r3, #12] - 8007c14: f003 0301 and.w r3, r3, #1 - 8007c18: 2b01 cmp r3, #1 - 8007c1a: d107 bne.n 8007c2c - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 8007c1c: 687b ldr r3, [r7, #4] - 8007c1e: 681b ldr r3, [r3, #0] - 8007c20: f06f 0201 mvn.w r2, #1 - 8007c24: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->PeriodElapsedCallback(htim); -#else - HAL_TIM_PeriodElapsedCallback(htim); - 8007c26: 6878 ldr r0, [r7, #4] - 8007c28: f7fa fb42 bl 80022b0 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } - /* TIM Break input event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - 8007c2c: 687b ldr r3, [r7, #4] - 8007c2e: 681b ldr r3, [r3, #0] - 8007c30: 691b ldr r3, [r3, #16] - 8007c32: f003 0380 and.w r3, r3, #128 ; 0x80 - 8007c36: 2b80 cmp r3, #128 ; 0x80 - 8007c38: d10e bne.n 8007c58 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 8007c3a: 687b ldr r3, [r7, #4] - 8007c3c: 681b ldr r3, [r3, #0] - 8007c3e: 68db ldr r3, [r3, #12] - 8007c40: f003 0380 and.w r3, r3, #128 ; 0x80 - 8007c44: 2b80 cmp r3, #128 ; 0x80 - 8007c46: d107 bne.n 8007c58 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - 8007c48: 687b ldr r3, [r7, #4] - 8007c4a: 681b ldr r3, [r3, #0] - 8007c4c: f06f 0280 mvn.w r2, #128 ; 0x80 - 8007c50: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->BreakCallback(htim); -#else - HAL_TIMEx_BreakCallback(htim); - 8007c52: 6878 ldr r0, [r7, #4] - 8007c54: f001 f9a4 bl 8008fa0 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } -#if defined(TIM_BDTR_BK2E) - /* TIM Break2 input event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET) - 8007c58: 687b ldr r3, [r7, #4] - 8007c5a: 681b ldr r3, [r3, #0] - 8007c5c: 691b ldr r3, [r3, #16] - 8007c5e: f403 7380 and.w r3, r3, #256 ; 0x100 - 8007c62: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8007c66: d10e bne.n 8007c86 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 8007c68: 687b ldr r3, [r7, #4] - 8007c6a: 681b ldr r3, [r3, #0] - 8007c6c: 68db ldr r3, [r3, #12] - 8007c6e: f003 0380 and.w r3, r3, #128 ; 0x80 - 8007c72: 2b80 cmp r3, #128 ; 0x80 - 8007c74: d107 bne.n 8007c86 - { - __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); - 8007c76: 687b ldr r3, [r7, #4] - 8007c78: 681b ldr r3, [r3, #0] - 8007c7a: f46f 7280 mvn.w r2, #256 ; 0x100 - 8007c7e: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->Break2Callback(htim); -#else - HAL_TIMEx_Break2Callback(htim); - 8007c80: 6878 ldr r0, [r7, #4] - 8007c82: f001 f997 bl 8008fb4 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } -#endif /* TIM_BDTR_BK2E */ - /* TIM Trigger detection event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - 8007c86: 687b ldr r3, [r7, #4] - 8007c88: 681b ldr r3, [r3, #0] - 8007c8a: 691b ldr r3, [r3, #16] - 8007c8c: f003 0340 and.w r3, r3, #64 ; 0x40 - 8007c90: 2b40 cmp r3, #64 ; 0x40 - 8007c92: d10e bne.n 8007cb2 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) - 8007c94: 687b ldr r3, [r7, #4] - 8007c96: 681b ldr r3, [r3, #0] - 8007c98: 68db ldr r3, [r3, #12] - 8007c9a: f003 0340 and.w r3, r3, #64 ; 0x40 - 8007c9e: 2b40 cmp r3, #64 ; 0x40 - 8007ca0: d107 bne.n 8007cb2 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - 8007ca2: 687b ldr r3, [r7, #4] - 8007ca4: 681b ldr r3, [r3, #0] - 8007ca6: f06f 0240 mvn.w r2, #64 ; 0x40 - 8007caa: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->TriggerCallback(htim); -#else - HAL_TIM_TriggerCallback(htim); - 8007cac: 6878 ldr r0, [r7, #4] - 8007cae: f000 fa85 bl 80081bc -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } - /* TIM commutation event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - 8007cb2: 687b ldr r3, [r7, #4] - 8007cb4: 681b ldr r3, [r3, #0] - 8007cb6: 691b ldr r3, [r3, #16] - 8007cb8: f003 0320 and.w r3, r3, #32 - 8007cbc: 2b20 cmp r3, #32 - 8007cbe: d10e bne.n 8007cde - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) - 8007cc0: 687b ldr r3, [r7, #4] - 8007cc2: 681b ldr r3, [r3, #0] - 8007cc4: 68db ldr r3, [r3, #12] - 8007cc6: f003 0320 and.w r3, r3, #32 - 8007cca: 2b20 cmp r3, #32 - 8007ccc: d107 bne.n 8007cde - { - __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - 8007cce: 687b ldr r3, [r7, #4] - 8007cd0: 681b ldr r3, [r3, #0] - 8007cd2: f06f 0220 mvn.w r2, #32 - 8007cd6: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->CommutationCallback(htim); -#else - HAL_TIMEx_CommutCallback(htim); - 8007cd8: 6878 ldr r0, [r7, #4] - 8007cda: f001 f957 bl 8008f8c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } -} - 8007cde: bf00 nop - 8007ce0: 3708 adds r7, #8 - 8007ce2: 46bd mov sp, r7 - 8007ce4: bd80 pop {r7, pc} - -08007ce6 : - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel) -{ - 8007ce6: b580 push {r7, lr} - 8007ce8: b084 sub sp, #16 - 8007cea: af00 add r7, sp, #0 - 8007cec: 60f8 str r0, [r7, #12] - 8007cee: 60b9 str r1, [r7, #8] - 8007cf0: 607a str r2, [r7, #4] - assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); - - /* Process Locked */ - __HAL_LOCK(htim); - 8007cf2: 68fb ldr r3, [r7, #12] - 8007cf4: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8007cf8: 2b01 cmp r3, #1 - 8007cfa: d101 bne.n 8007d00 - 8007cfc: 2302 movs r3, #2 - 8007cfe: e08a b.n 8007e16 - 8007d00: 68fb ldr r3, [r7, #12] - 8007d02: 2201 movs r2, #1 - 8007d04: f883 203c strb.w r2, [r3, #60] ; 0x3c - - htim->State = HAL_TIM_STATE_BUSY; - 8007d08: 68fb ldr r3, [r7, #12] - 8007d0a: 2202 movs r2, #2 - 8007d0c: f883 203d strb.w r2, [r3, #61] ; 0x3d - - if (Channel == TIM_CHANNEL_1) - 8007d10: 687b ldr r3, [r7, #4] - 8007d12: 2b00 cmp r3, #0 - 8007d14: d11b bne.n 8007d4e - { - /* TI1 Configuration */ - TIM_TI1_SetConfig(htim->Instance, - 8007d16: 68fb ldr r3, [r7, #12] - 8007d18: 6818 ldr r0, [r3, #0] - 8007d1a: 68bb ldr r3, [r7, #8] - 8007d1c: 6819 ldr r1, [r3, #0] - 8007d1e: 68bb ldr r3, [r7, #8] - 8007d20: 685a ldr r2, [r3, #4] - 8007d22: 68bb ldr r3, [r7, #8] - 8007d24: 68db ldr r3, [r3, #12] - 8007d26: f000 fe41 bl 80089ac - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - 8007d2a: 68fb ldr r3, [r7, #12] - 8007d2c: 681b ldr r3, [r3, #0] - 8007d2e: 699a ldr r2, [r3, #24] - 8007d30: 68fb ldr r3, [r7, #12] - 8007d32: 681b ldr r3, [r3, #0] - 8007d34: f022 020c bic.w r2, r2, #12 - 8007d38: 619a str r2, [r3, #24] - - /* Set the IC1PSC value */ - htim->Instance->CCMR1 |= sConfig->ICPrescaler; - 8007d3a: 68fb ldr r3, [r7, #12] - 8007d3c: 681b ldr r3, [r3, #0] - 8007d3e: 6999 ldr r1, [r3, #24] - 8007d40: 68bb ldr r3, [r7, #8] - 8007d42: 689a ldr r2, [r3, #8] - 8007d44: 68fb ldr r3, [r7, #12] - 8007d46: 681b ldr r3, [r3, #0] - 8007d48: 430a orrs r2, r1 - 8007d4a: 619a str r2, [r3, #24] - 8007d4c: e05a b.n 8007e04 - } - else if (Channel == TIM_CHANNEL_2) - 8007d4e: 687b ldr r3, [r7, #4] - 8007d50: 2b04 cmp r3, #4 - 8007d52: d11c bne.n 8007d8e - { - /* TI2 Configuration */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_TI2_SetConfig(htim->Instance, - 8007d54: 68fb ldr r3, [r7, #12] - 8007d56: 6818 ldr r0, [r3, #0] - 8007d58: 68bb ldr r3, [r7, #8] - 8007d5a: 6819 ldr r1, [r3, #0] - 8007d5c: 68bb ldr r3, [r7, #8] - 8007d5e: 685a ldr r2, [r3, #4] - 8007d60: 68bb ldr r3, [r7, #8] - 8007d62: 68db ldr r3, [r3, #12] - 8007d64: f000 feb9 bl 8008ada - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC2PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; - 8007d68: 68fb ldr r3, [r7, #12] - 8007d6a: 681b ldr r3, [r3, #0] - 8007d6c: 699a ldr r2, [r3, #24] - 8007d6e: 68fb ldr r3, [r7, #12] - 8007d70: 681b ldr r3, [r3, #0] - 8007d72: f422 6240 bic.w r2, r2, #3072 ; 0xc00 - 8007d76: 619a str r2, [r3, #24] - - /* Set the IC2PSC value */ - htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U); - 8007d78: 68fb ldr r3, [r7, #12] - 8007d7a: 681b ldr r3, [r3, #0] - 8007d7c: 6999 ldr r1, [r3, #24] - 8007d7e: 68bb ldr r3, [r7, #8] - 8007d80: 689b ldr r3, [r3, #8] - 8007d82: 021a lsls r2, r3, #8 - 8007d84: 68fb ldr r3, [r7, #12] - 8007d86: 681b ldr r3, [r3, #0] - 8007d88: 430a orrs r2, r1 - 8007d8a: 619a str r2, [r3, #24] - 8007d8c: e03a b.n 8007e04 - } - else if (Channel == TIM_CHANNEL_3) - 8007d8e: 687b ldr r3, [r7, #4] - 8007d90: 2b08 cmp r3, #8 - 8007d92: d11b bne.n 8007dcc - { - /* TI3 Configuration */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - TIM_TI3_SetConfig(htim->Instance, - 8007d94: 68fb ldr r3, [r7, #12] - 8007d96: 6818 ldr r0, [r3, #0] - 8007d98: 68bb ldr r3, [r7, #8] - 8007d9a: 6819 ldr r1, [r3, #0] - 8007d9c: 68bb ldr r3, [r7, #8] - 8007d9e: 685a ldr r2, [r3, #4] - 8007da0: 68bb ldr r3, [r7, #8] - 8007da2: 68db ldr r3, [r3, #12] - 8007da4: f000 ff06 bl 8008bb4 - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC3PSC Bits */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; - 8007da8: 68fb ldr r3, [r7, #12] - 8007daa: 681b ldr r3, [r3, #0] - 8007dac: 69da ldr r2, [r3, #28] - 8007dae: 68fb ldr r3, [r7, #12] - 8007db0: 681b ldr r3, [r3, #0] - 8007db2: f022 020c bic.w r2, r2, #12 - 8007db6: 61da str r2, [r3, #28] - - /* Set the IC3PSC value */ - htim->Instance->CCMR2 |= sConfig->ICPrescaler; - 8007db8: 68fb ldr r3, [r7, #12] - 8007dba: 681b ldr r3, [r3, #0] - 8007dbc: 69d9 ldr r1, [r3, #28] - 8007dbe: 68bb ldr r3, [r7, #8] - 8007dc0: 689a ldr r2, [r3, #8] - 8007dc2: 68fb ldr r3, [r7, #12] - 8007dc4: 681b ldr r3, [r3, #0] - 8007dc6: 430a orrs r2, r1 - 8007dc8: 61da str r2, [r3, #28] - 8007dca: e01b b.n 8007e04 - else - { - /* TI4 Configuration */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - TIM_TI4_SetConfig(htim->Instance, - 8007dcc: 68fb ldr r3, [r7, #12] - 8007dce: 6818 ldr r0, [r3, #0] - 8007dd0: 68bb ldr r3, [r7, #8] - 8007dd2: 6819 ldr r1, [r3, #0] - 8007dd4: 68bb ldr r3, [r7, #8] - 8007dd6: 685a ldr r2, [r3, #4] - 8007dd8: 68bb ldr r3, [r7, #8] - 8007dda: 68db ldr r3, [r3, #12] - 8007ddc: f000 ff26 bl 8008c2c - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC4PSC Bits */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; - 8007de0: 68fb ldr r3, [r7, #12] - 8007de2: 681b ldr r3, [r3, #0] - 8007de4: 69da ldr r2, [r3, #28] - 8007de6: 68fb ldr r3, [r7, #12] - 8007de8: 681b ldr r3, [r3, #0] - 8007dea: f422 6240 bic.w r2, r2, #3072 ; 0xc00 - 8007dee: 61da str r2, [r3, #28] - - /* Set the IC4PSC value */ - htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U); - 8007df0: 68fb ldr r3, [r7, #12] - 8007df2: 681b ldr r3, [r3, #0] - 8007df4: 69d9 ldr r1, [r3, #28] - 8007df6: 68bb ldr r3, [r7, #8] - 8007df8: 689b ldr r3, [r3, #8] - 8007dfa: 021a lsls r2, r3, #8 - 8007dfc: 68fb ldr r3, [r7, #12] - 8007dfe: 681b ldr r3, [r3, #0] - 8007e00: 430a orrs r2, r1 - 8007e02: 61da str r2, [r3, #28] - } - - htim->State = HAL_TIM_STATE_READY; - 8007e04: 68fb ldr r3, [r7, #12] - 8007e06: 2201 movs r2, #1 - 8007e08: f883 203d strb.w r2, [r3, #61] ; 0x3d - - __HAL_UNLOCK(htim); - 8007e0c: 68fb ldr r3, [r7, #12] - 8007e0e: 2200 movs r2, #0 - 8007e10: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_OK; - 8007e14: 2300 movs r3, #0 -} - 8007e16: 4618 mov r0, r3 - 8007e18: 3710 adds r7, #16 - 8007e1a: 46bd mov sp, r7 - 8007e1c: bd80 pop {r7, pc} - ... - -08007e20 : - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, - TIM_OC_InitTypeDef *sConfig, - uint32_t Channel) -{ - 8007e20: b580 push {r7, lr} - 8007e22: b084 sub sp, #16 - 8007e24: af00 add r7, sp, #0 - 8007e26: 60f8 str r0, [r7, #12] - 8007e28: 60b9 str r1, [r7, #8] - 8007e2a: 607a str r2, [r7, #4] - assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); - - /* Process Locked */ - __HAL_LOCK(htim); - 8007e2c: 68fb ldr r3, [r7, #12] - 8007e2e: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8007e32: 2b01 cmp r3, #1 - 8007e34: d101 bne.n 8007e3a - 8007e36: 2302 movs r3, #2 - 8007e38: e105 b.n 8008046 - 8007e3a: 68fb ldr r3, [r7, #12] - 8007e3c: 2201 movs r2, #1 - 8007e3e: f883 203c strb.w r2, [r3, #60] ; 0x3c - - htim->State = HAL_TIM_STATE_BUSY; - 8007e42: 68fb ldr r3, [r7, #12] - 8007e44: 2202 movs r2, #2 - 8007e46: f883 203d strb.w r2, [r3, #61] ; 0x3d - - switch (Channel) - 8007e4a: 687b ldr r3, [r7, #4] - 8007e4c: 2b14 cmp r3, #20 - 8007e4e: f200 80f0 bhi.w 8008032 - 8007e52: a201 add r2, pc, #4 ; (adr r2, 8007e58 ) - 8007e54: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8007e58: 08007ead .word 0x08007ead - 8007e5c: 08008033 .word 0x08008033 - 8007e60: 08008033 .word 0x08008033 - 8007e64: 08008033 .word 0x08008033 - 8007e68: 08007eed .word 0x08007eed - 8007e6c: 08008033 .word 0x08008033 - 8007e70: 08008033 .word 0x08008033 - 8007e74: 08008033 .word 0x08008033 - 8007e78: 08007f2f .word 0x08007f2f - 8007e7c: 08008033 .word 0x08008033 - 8007e80: 08008033 .word 0x08008033 - 8007e84: 08008033 .word 0x08008033 - 8007e88: 08007f6f .word 0x08007f6f - 8007e8c: 08008033 .word 0x08008033 - 8007e90: 08008033 .word 0x08008033 - 8007e94: 08008033 .word 0x08008033 - 8007e98: 08007fb1 .word 0x08007fb1 - 8007e9c: 08008033 .word 0x08008033 - 8007ea0: 08008033 .word 0x08008033 - 8007ea4: 08008033 .word 0x08008033 - 8007ea8: 08007ff1 .word 0x08007ff1 - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Configure the Channel 1 in PWM mode */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - 8007eac: 68fb ldr r3, [r7, #12] - 8007eae: 681b ldr r3, [r3, #0] - 8007eb0: 68b9 ldr r1, [r7, #8] - 8007eb2: 4618 mov r0, r3 - 8007eb4: f000 fa1c bl 80082f0 - - /* Set the Preload enable bit for channel1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - 8007eb8: 68fb ldr r3, [r7, #12] - 8007eba: 681b ldr r3, [r3, #0] - 8007ebc: 699a ldr r2, [r3, #24] - 8007ebe: 68fb ldr r3, [r7, #12] - 8007ec0: 681b ldr r3, [r3, #0] - 8007ec2: f042 0208 orr.w r2, r2, #8 - 8007ec6: 619a str r2, [r3, #24] - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - 8007ec8: 68fb ldr r3, [r7, #12] - 8007eca: 681b ldr r3, [r3, #0] - 8007ecc: 699a ldr r2, [r3, #24] - 8007ece: 68fb ldr r3, [r7, #12] - 8007ed0: 681b ldr r3, [r3, #0] - 8007ed2: f022 0204 bic.w r2, r2, #4 - 8007ed6: 619a str r2, [r3, #24] - htim->Instance->CCMR1 |= sConfig->OCFastMode; - 8007ed8: 68fb ldr r3, [r7, #12] - 8007eda: 681b ldr r3, [r3, #0] - 8007edc: 6999 ldr r1, [r3, #24] - 8007ede: 68bb ldr r3, [r7, #8] - 8007ee0: 691a ldr r2, [r3, #16] - 8007ee2: 68fb ldr r3, [r7, #12] - 8007ee4: 681b ldr r3, [r3, #0] - 8007ee6: 430a orrs r2, r1 - 8007ee8: 619a str r2, [r3, #24] - break; - 8007eea: e0a3 b.n 8008034 - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Configure the Channel 2 in PWM mode */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - 8007eec: 68fb ldr r3, [r7, #12] - 8007eee: 681b ldr r3, [r3, #0] - 8007ef0: 68b9 ldr r1, [r7, #8] - 8007ef2: 4618 mov r0, r3 - 8007ef4: f000 fa8c bl 8008410 - - /* Set the Preload enable bit for channel2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; - 8007ef8: 68fb ldr r3, [r7, #12] - 8007efa: 681b ldr r3, [r3, #0] - 8007efc: 699a ldr r2, [r3, #24] - 8007efe: 68fb ldr r3, [r7, #12] - 8007f00: 681b ldr r3, [r3, #0] - 8007f02: f442 6200 orr.w r2, r2, #2048 ; 0x800 - 8007f06: 619a str r2, [r3, #24] - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; - 8007f08: 68fb ldr r3, [r7, #12] - 8007f0a: 681b ldr r3, [r3, #0] - 8007f0c: 699a ldr r2, [r3, #24] - 8007f0e: 68fb ldr r3, [r7, #12] - 8007f10: 681b ldr r3, [r3, #0] - 8007f12: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 8007f16: 619a str r2, [r3, #24] - htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; - 8007f18: 68fb ldr r3, [r7, #12] - 8007f1a: 681b ldr r3, [r3, #0] - 8007f1c: 6999 ldr r1, [r3, #24] - 8007f1e: 68bb ldr r3, [r7, #8] - 8007f20: 691b ldr r3, [r3, #16] - 8007f22: 021a lsls r2, r3, #8 - 8007f24: 68fb ldr r3, [r7, #12] - 8007f26: 681b ldr r3, [r3, #0] - 8007f28: 430a orrs r2, r1 - 8007f2a: 619a str r2, [r3, #24] - break; - 8007f2c: e082 b.n 8008034 - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Configure the Channel 3 in PWM mode */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - 8007f2e: 68fb ldr r3, [r7, #12] - 8007f30: 681b ldr r3, [r3, #0] - 8007f32: 68b9 ldr r1, [r7, #8] - 8007f34: 4618 mov r0, r3 - 8007f36: f000 faf5 bl 8008524 - - /* Set the Preload enable bit for channel3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; - 8007f3a: 68fb ldr r3, [r7, #12] - 8007f3c: 681b ldr r3, [r3, #0] - 8007f3e: 69da ldr r2, [r3, #28] - 8007f40: 68fb ldr r3, [r7, #12] - 8007f42: 681b ldr r3, [r3, #0] - 8007f44: f042 0208 orr.w r2, r2, #8 - 8007f48: 61da str r2, [r3, #28] - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - 8007f4a: 68fb ldr r3, [r7, #12] - 8007f4c: 681b ldr r3, [r3, #0] - 8007f4e: 69da ldr r2, [r3, #28] - 8007f50: 68fb ldr r3, [r7, #12] - 8007f52: 681b ldr r3, [r3, #0] - 8007f54: f022 0204 bic.w r2, r2, #4 - 8007f58: 61da str r2, [r3, #28] - htim->Instance->CCMR2 |= sConfig->OCFastMode; - 8007f5a: 68fb ldr r3, [r7, #12] - 8007f5c: 681b ldr r3, [r3, #0] - 8007f5e: 69d9 ldr r1, [r3, #28] - 8007f60: 68bb ldr r3, [r7, #8] - 8007f62: 691a ldr r2, [r3, #16] - 8007f64: 68fb ldr r3, [r7, #12] - 8007f66: 681b ldr r3, [r3, #0] - 8007f68: 430a orrs r2, r1 - 8007f6a: 61da str r2, [r3, #28] - break; - 8007f6c: e062 b.n 8008034 - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Configure the Channel 4 in PWM mode */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - 8007f6e: 68fb ldr r3, [r7, #12] - 8007f70: 681b ldr r3, [r3, #0] - 8007f72: 68b9 ldr r1, [r7, #8] - 8007f74: 4618 mov r0, r3 - 8007f76: f000 fb5d bl 8008634 - - /* Set the Preload enable bit for channel4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; - 8007f7a: 68fb ldr r3, [r7, #12] - 8007f7c: 681b ldr r3, [r3, #0] - 8007f7e: 69da ldr r2, [r3, #28] - 8007f80: 68fb ldr r3, [r7, #12] - 8007f82: 681b ldr r3, [r3, #0] - 8007f84: f442 6200 orr.w r2, r2, #2048 ; 0x800 - 8007f88: 61da str r2, [r3, #28] - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; - 8007f8a: 68fb ldr r3, [r7, #12] - 8007f8c: 681b ldr r3, [r3, #0] - 8007f8e: 69da ldr r2, [r3, #28] - 8007f90: 68fb ldr r3, [r7, #12] - 8007f92: 681b ldr r3, [r3, #0] - 8007f94: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 8007f98: 61da str r2, [r3, #28] - htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; - 8007f9a: 68fb ldr r3, [r7, #12] - 8007f9c: 681b ldr r3, [r3, #0] - 8007f9e: 69d9 ldr r1, [r3, #28] - 8007fa0: 68bb ldr r3, [r7, #8] - 8007fa2: 691b ldr r3, [r3, #16] - 8007fa4: 021a lsls r2, r3, #8 - 8007fa6: 68fb ldr r3, [r7, #12] - 8007fa8: 681b ldr r3, [r3, #0] - 8007faa: 430a orrs r2, r1 - 8007fac: 61da str r2, [r3, #28] - break; - 8007fae: e041 b.n 8008034 - { - /* Check the parameters */ - assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); - - /* Configure the Channel 5 in PWM mode */ - TIM_OC5_SetConfig(htim->Instance, sConfig); - 8007fb0: 68fb ldr r3, [r7, #12] - 8007fb2: 681b ldr r3, [r3, #0] - 8007fb4: 68b9 ldr r1, [r7, #8] - 8007fb6: 4618 mov r0, r3 - 8007fb8: f000 fba6 bl 8008708 - - /* Set the Preload enable bit for channel5*/ - htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; - 8007fbc: 68fb ldr r3, [r7, #12] - 8007fbe: 681b ldr r3, [r3, #0] - 8007fc0: 6d5a ldr r2, [r3, #84] ; 0x54 - 8007fc2: 68fb ldr r3, [r7, #12] - 8007fc4: 681b ldr r3, [r3, #0] - 8007fc6: f042 0208 orr.w r2, r2, #8 - 8007fca: 655a str r2, [r3, #84] ; 0x54 - - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; - 8007fcc: 68fb ldr r3, [r7, #12] - 8007fce: 681b ldr r3, [r3, #0] - 8007fd0: 6d5a ldr r2, [r3, #84] ; 0x54 - 8007fd2: 68fb ldr r3, [r7, #12] - 8007fd4: 681b ldr r3, [r3, #0] - 8007fd6: f022 0204 bic.w r2, r2, #4 - 8007fda: 655a str r2, [r3, #84] ; 0x54 - htim->Instance->CCMR3 |= sConfig->OCFastMode; - 8007fdc: 68fb ldr r3, [r7, #12] - 8007fde: 681b ldr r3, [r3, #0] - 8007fe0: 6d59 ldr r1, [r3, #84] ; 0x54 - 8007fe2: 68bb ldr r3, [r7, #8] - 8007fe4: 691a ldr r2, [r3, #16] - 8007fe6: 68fb ldr r3, [r7, #12] - 8007fe8: 681b ldr r3, [r3, #0] - 8007fea: 430a orrs r2, r1 - 8007fec: 655a str r2, [r3, #84] ; 0x54 - break; - 8007fee: e021 b.n 8008034 - { - /* Check the parameters */ - assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); - - /* Configure the Channel 6 in PWM mode */ - TIM_OC6_SetConfig(htim->Instance, sConfig); - 8007ff0: 68fb ldr r3, [r7, #12] - 8007ff2: 681b ldr r3, [r3, #0] - 8007ff4: 68b9 ldr r1, [r7, #8] - 8007ff6: 4618 mov r0, r3 - 8007ff8: f000 fbea bl 80087d0 - - /* Set the Preload enable bit for channel6 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; - 8007ffc: 68fb ldr r3, [r7, #12] - 8007ffe: 681b ldr r3, [r3, #0] - 8008000: 6d5a ldr r2, [r3, #84] ; 0x54 - 8008002: 68fb ldr r3, [r7, #12] - 8008004: 681b ldr r3, [r3, #0] - 8008006: f442 6200 orr.w r2, r2, #2048 ; 0x800 - 800800a: 655a str r2, [r3, #84] ; 0x54 - - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; - 800800c: 68fb ldr r3, [r7, #12] - 800800e: 681b ldr r3, [r3, #0] - 8008010: 6d5a ldr r2, [r3, #84] ; 0x54 - 8008012: 68fb ldr r3, [r7, #12] - 8008014: 681b ldr r3, [r3, #0] - 8008016: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 800801a: 655a str r2, [r3, #84] ; 0x54 - htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; - 800801c: 68fb ldr r3, [r7, #12] - 800801e: 681b ldr r3, [r3, #0] - 8008020: 6d59 ldr r1, [r3, #84] ; 0x54 - 8008022: 68bb ldr r3, [r7, #8] - 8008024: 691b ldr r3, [r3, #16] - 8008026: 021a lsls r2, r3, #8 - 8008028: 68fb ldr r3, [r7, #12] - 800802a: 681b ldr r3, [r3, #0] - 800802c: 430a orrs r2, r1 - 800802e: 655a str r2, [r3, #84] ; 0x54 - break; - 8008030: e000 b.n 8008034 - } -#endif /* TIM_CCER_CC6E */ - - default: - break; - 8008032: bf00 nop - } - - htim->State = HAL_TIM_STATE_READY; - 8008034: 68fb ldr r3, [r7, #12] - 8008036: 2201 movs r2, #1 - 8008038: f883 203d strb.w r2, [r3, #61] ; 0x3d - - __HAL_UNLOCK(htim); - 800803c: 68fb ldr r3, [r7, #12] - 800803e: 2200 movs r2, #0 - 8008040: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_OK; - 8008044: 2300 movs r3, #0 -} - 8008046: 4618 mov r0, r3 - 8008048: 3710 adds r7, #16 - 800804a: 46bd mov sp, r7 - 800804c: bd80 pop {r7, pc} - 800804e: bf00 nop - -08008050 : - * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3 - * pins are connected to the TI1 input (XOR combination) - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection) -{ - 8008050: b480 push {r7} - 8008052: b085 sub sp, #20 - 8008054: af00 add r7, sp, #0 - 8008056: 6078 str r0, [r7, #4] - 8008058: 6039 str r1, [r7, #0] - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - 800805a: 687b ldr r3, [r7, #4] - 800805c: 681b ldr r3, [r3, #0] - 800805e: 685b ldr r3, [r3, #4] - 8008060: 60fb str r3, [r7, #12] - - /* Reset the TI1 selection */ - tmpcr2 &= ~TIM_CR2_TI1S; - 8008062: 68fb ldr r3, [r7, #12] - 8008064: f023 0380 bic.w r3, r3, #128 ; 0x80 - 8008068: 60fb str r3, [r7, #12] - - /* Set the TI1 selection */ - tmpcr2 |= TI1_Selection; - 800806a: 68fa ldr r2, [r7, #12] - 800806c: 683b ldr r3, [r7, #0] - 800806e: 4313 orrs r3, r2 - 8008070: 60fb str r3, [r7, #12] - - /* Write to TIMxCR2 */ - htim->Instance->CR2 = tmpcr2; - 8008072: 687b ldr r3, [r7, #4] - 8008074: 681b ldr r3, [r3, #0] - 8008076: 68fa ldr r2, [r7, #12] - 8008078: 605a str r2, [r3, #4] - - return HAL_OK; - 800807a: 2300 movs r3, #0 -} - 800807c: 4618 mov r0, r3 - 800807e: 3714 adds r7, #20 - 8008080: 46bd mov sp, r7 - 8008082: f85d 7b04 ldr.w r7, [sp], #4 - 8008086: 4770 bx lr - -08008088 : - * timer input or external trigger input) and the Slave mode - * (Disable, Reset, Gated, Trigger, External clock mode 1). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig) -{ - 8008088: b580 push {r7, lr} - 800808a: b082 sub sp, #8 - 800808c: af00 add r7, sp, #0 - 800808e: 6078 str r0, [r7, #4] - 8008090: 6039 str r1, [r7, #0] - /* Check the parameters */ - assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); - assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); - assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); - - __HAL_LOCK(htim); - 8008092: 687b ldr r3, [r7, #4] - 8008094: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8008098: 2b01 cmp r3, #1 - 800809a: d101 bne.n 80080a0 - 800809c: 2302 movs r3, #2 - 800809e: e031 b.n 8008104 - 80080a0: 687b ldr r3, [r7, #4] - 80080a2: 2201 movs r2, #1 - 80080a4: f883 203c strb.w r2, [r3, #60] ; 0x3c - - htim->State = HAL_TIM_STATE_BUSY; - 80080a8: 687b ldr r3, [r7, #4] - 80080aa: 2202 movs r2, #2 - 80080ac: f883 203d strb.w r2, [r3, #61] ; 0x3d - - if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) - 80080b0: 6839 ldr r1, [r7, #0] - 80080b2: 6878 ldr r0, [r7, #4] - 80080b4: f000 fbf2 bl 800889c - 80080b8: 4603 mov r3, r0 - 80080ba: 2b00 cmp r3, #0 - 80080bc: d009 beq.n 80080d2 - { - htim->State = HAL_TIM_STATE_READY; - 80080be: 687b ldr r3, [r7, #4] - 80080c0: 2201 movs r2, #1 - 80080c2: f883 203d strb.w r2, [r3, #61] ; 0x3d - __HAL_UNLOCK(htim); - 80080c6: 687b ldr r3, [r7, #4] - 80080c8: 2200 movs r2, #0 - 80080ca: f883 203c strb.w r2, [r3, #60] ; 0x3c - return HAL_ERROR; - 80080ce: 2301 movs r3, #1 - 80080d0: e018 b.n 8008104 - } - - /* Disable Trigger Interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER); - 80080d2: 687b ldr r3, [r7, #4] - 80080d4: 681b ldr r3, [r3, #0] - 80080d6: 68da ldr r2, [r3, #12] - 80080d8: 687b ldr r3, [r7, #4] - 80080da: 681b ldr r3, [r3, #0] - 80080dc: f022 0240 bic.w r2, r2, #64 ; 0x40 - 80080e0: 60da str r2, [r3, #12] - - /* Disable Trigger DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); - 80080e2: 687b ldr r3, [r7, #4] - 80080e4: 681b ldr r3, [r3, #0] - 80080e6: 68da ldr r2, [r3, #12] - 80080e8: 687b ldr r3, [r7, #4] - 80080ea: 681b ldr r3, [r3, #0] - 80080ec: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 80080f0: 60da str r2, [r3, #12] - - htim->State = HAL_TIM_STATE_READY; - 80080f2: 687b ldr r3, [r7, #4] - 80080f4: 2201 movs r2, #1 - 80080f6: f883 203d strb.w r2, [r3, #61] ; 0x3d - - __HAL_UNLOCK(htim); - 80080fa: 687b ldr r3, [r7, #4] - 80080fc: 2200 movs r2, #0 - 80080fe: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_OK; - 8008102: 2300 movs r3, #0 -} - 8008104: 4618 mov r0, r3 - 8008106: 3708 adds r7, #8 - 8008108: 46bd mov sp, r7 - 800810a: bd80 pop {r7, pc} - -0800810c : - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval Captured value - */ -uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - 800810c: b480 push {r7} - 800810e: b085 sub sp, #20 - 8008110: af00 add r7, sp, #0 - 8008112: 6078 str r0, [r7, #4] - 8008114: 6039 str r1, [r7, #0] - uint32_t tmpreg = 0U; - 8008116: 2300 movs r3, #0 - 8008118: 60fb str r3, [r7, #12] - - switch (Channel) - 800811a: 683b ldr r3, [r7, #0] - 800811c: 2b0c cmp r3, #12 - 800811e: d831 bhi.n 8008184 - 8008120: a201 add r2, pc, #4 ; (adr r2, 8008128 ) - 8008122: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8008126: bf00 nop - 8008128: 0800815d .word 0x0800815d - 800812c: 08008185 .word 0x08008185 - 8008130: 08008185 .word 0x08008185 - 8008134: 08008185 .word 0x08008185 - 8008138: 08008167 .word 0x08008167 - 800813c: 08008185 .word 0x08008185 - 8008140: 08008185 .word 0x08008185 - 8008144: 08008185 .word 0x08008185 - 8008148: 08008171 .word 0x08008171 - 800814c: 08008185 .word 0x08008185 - 8008150: 08008185 .word 0x08008185 - 8008154: 08008185 .word 0x08008185 - 8008158: 0800817b .word 0x0800817b - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Return the capture 1 value */ - tmpreg = htim->Instance->CCR1; - 800815c: 687b ldr r3, [r7, #4] - 800815e: 681b ldr r3, [r3, #0] - 8008160: 6b5b ldr r3, [r3, #52] ; 0x34 - 8008162: 60fb str r3, [r7, #12] - - break; - 8008164: e00f b.n 8008186 - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Return the capture 2 value */ - tmpreg = htim->Instance->CCR2; - 8008166: 687b ldr r3, [r7, #4] - 8008168: 681b ldr r3, [r3, #0] - 800816a: 6b9b ldr r3, [r3, #56] ; 0x38 - 800816c: 60fb str r3, [r7, #12] - - break; - 800816e: e00a b.n 8008186 - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Return the capture 3 value */ - tmpreg = htim->Instance->CCR3; - 8008170: 687b ldr r3, [r7, #4] - 8008172: 681b ldr r3, [r3, #0] - 8008174: 6bdb ldr r3, [r3, #60] ; 0x3c - 8008176: 60fb str r3, [r7, #12] - - break; - 8008178: e005 b.n 8008186 - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Return the capture 4 value */ - tmpreg = htim->Instance->CCR4; - 800817a: 687b ldr r3, [r7, #4] - 800817c: 681b ldr r3, [r3, #0] - 800817e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8008180: 60fb str r3, [r7, #12] - - break; - 8008182: e000 b.n 8008186 - } - - default: - break; - 8008184: bf00 nop - } - - return tmpreg; - 8008186: 68fb ldr r3, [r7, #12] -} - 8008188: 4618 mov r0, r3 - 800818a: 3714 adds r7, #20 - 800818c: 46bd mov sp, r7 - 800818e: f85d 7b04 ldr.w r7, [sp], #4 - 8008192: 4770 bx lr - -08008194 : - * @brief Output Compare callback in non-blocking mode - * @param htim TIM OC handle - * @retval None - */ -__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) -{ - 8008194: b480 push {r7} - 8008196: b083 sub sp, #12 - 8008198: af00 add r7, sp, #0 - 800819a: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file - */ -} - 800819c: bf00 nop - 800819e: 370c adds r7, #12 - 80081a0: 46bd mov sp, r7 - 80081a2: f85d 7b04 ldr.w r7, [sp], #4 - 80081a6: 4770 bx lr - -080081a8 : - * @brief PWM Pulse finished callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) -{ - 80081a8: b480 push {r7} - 80081aa: b083 sub sp, #12 - 80081ac: af00 add r7, sp, #0 - 80081ae: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file - */ -} - 80081b0: bf00 nop - 80081b2: 370c adds r7, #12 - 80081b4: 46bd mov sp, r7 - 80081b6: f85d 7b04 ldr.w r7, [sp], #4 - 80081ba: 4770 bx lr - -080081bc : - * @brief Hall Trigger detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) -{ - 80081bc: b480 push {r7} - 80081be: b083 sub sp, #12 - 80081c0: af00 add r7, sp, #0 - 80081c2: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_TriggerCallback could be implemented in the user file - */ -} - 80081c4: bf00 nop - 80081c6: 370c adds r7, #12 - 80081c8: 46bd mov sp, r7 - 80081ca: f85d 7b04 ldr.w r7, [sp], #4 - 80081ce: 4770 bx lr - -080081d0 : - * @param TIMx TIM peripheral - * @param Structure TIM Base configuration structure - * @retval None - */ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) -{ - 80081d0: b480 push {r7} - 80081d2: b085 sub sp, #20 - 80081d4: af00 add r7, sp, #0 - 80081d6: 6078 str r0, [r7, #4] - 80081d8: 6039 str r1, [r7, #0] - uint32_t tmpcr1; - tmpcr1 = TIMx->CR1; - 80081da: 687b ldr r3, [r7, #4] - 80081dc: 681b ldr r3, [r3, #0] - 80081de: 60fb str r3, [r7, #12] - - /* Set TIM Time Base Unit parameters ---------------------------------------*/ - if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 80081e0: 687b ldr r3, [r7, #4] - 80081e2: 4a3c ldr r2, [pc, #240] ; (80082d4 ) - 80081e4: 4293 cmp r3, r2 - 80081e6: d00f beq.n 8008208 - 80081e8: 687b ldr r3, [r7, #4] - 80081ea: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 80081ee: d00b beq.n 8008208 - 80081f0: 687b ldr r3, [r7, #4] - 80081f2: 4a39 ldr r2, [pc, #228] ; (80082d8 ) - 80081f4: 4293 cmp r3, r2 - 80081f6: d007 beq.n 8008208 - 80081f8: 687b ldr r3, [r7, #4] - 80081fa: 4a38 ldr r2, [pc, #224] ; (80082dc ) - 80081fc: 4293 cmp r3, r2 - 80081fe: d003 beq.n 8008208 - 8008200: 687b ldr r3, [r7, #4] - 8008202: 4a37 ldr r2, [pc, #220] ; (80082e0 ) - 8008204: 4293 cmp r3, r2 - 8008206: d108 bne.n 800821a - { - /* Select the Counter Mode */ - tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8008208: 68fb ldr r3, [r7, #12] - 800820a: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800820e: 60fb str r3, [r7, #12] - tmpcr1 |= Structure->CounterMode; - 8008210: 683b ldr r3, [r7, #0] - 8008212: 685b ldr r3, [r3, #4] - 8008214: 68fa ldr r2, [r7, #12] - 8008216: 4313 orrs r3, r2 - 8008218: 60fb str r3, [r7, #12] - } - - if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 800821a: 687b ldr r3, [r7, #4] - 800821c: 4a2d ldr r2, [pc, #180] ; (80082d4 ) - 800821e: 4293 cmp r3, r2 - 8008220: d01b beq.n 800825a - 8008222: 687b ldr r3, [r7, #4] - 8008224: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8008228: d017 beq.n 800825a - 800822a: 687b ldr r3, [r7, #4] - 800822c: 4a2a ldr r2, [pc, #168] ; (80082d8 ) - 800822e: 4293 cmp r3, r2 - 8008230: d013 beq.n 800825a - 8008232: 687b ldr r3, [r7, #4] - 8008234: 4a29 ldr r2, [pc, #164] ; (80082dc ) - 8008236: 4293 cmp r3, r2 - 8008238: d00f beq.n 800825a - 800823a: 687b ldr r3, [r7, #4] - 800823c: 4a28 ldr r2, [pc, #160] ; (80082e0 ) - 800823e: 4293 cmp r3, r2 - 8008240: d00b beq.n 800825a - 8008242: 687b ldr r3, [r7, #4] - 8008244: 4a27 ldr r2, [pc, #156] ; (80082e4 ) - 8008246: 4293 cmp r3, r2 - 8008248: d007 beq.n 800825a - 800824a: 687b ldr r3, [r7, #4] - 800824c: 4a26 ldr r2, [pc, #152] ; (80082e8 ) - 800824e: 4293 cmp r3, r2 - 8008250: d003 beq.n 800825a - 8008252: 687b ldr r3, [r7, #4] - 8008254: 4a25 ldr r2, [pc, #148] ; (80082ec ) - 8008256: 4293 cmp r3, r2 - 8008258: d108 bne.n 800826c - { - /* Set the clock division */ - tmpcr1 &= ~TIM_CR1_CKD; - 800825a: 68fb ldr r3, [r7, #12] - 800825c: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8008260: 60fb str r3, [r7, #12] - tmpcr1 |= (uint32_t)Structure->ClockDivision; - 8008262: 683b ldr r3, [r7, #0] - 8008264: 68db ldr r3, [r3, #12] - 8008266: 68fa ldr r2, [r7, #12] - 8008268: 4313 orrs r3, r2 - 800826a: 60fb str r3, [r7, #12] - } - - /* Set the auto-reload preload */ - MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 800826c: 68fb ldr r3, [r7, #12] - 800826e: f023 0280 bic.w r2, r3, #128 ; 0x80 - 8008272: 683b ldr r3, [r7, #0] - 8008274: 695b ldr r3, [r3, #20] - 8008276: 4313 orrs r3, r2 - 8008278: 60fb str r3, [r7, #12] - - TIMx->CR1 = tmpcr1; - 800827a: 687b ldr r3, [r7, #4] - 800827c: 68fa ldr r2, [r7, #12] - 800827e: 601a str r2, [r3, #0] - - /* Set the Autoreload value */ - TIMx->ARR = (uint32_t)Structure->Period ; - 8008280: 683b ldr r3, [r7, #0] - 8008282: 689a ldr r2, [r3, #8] - 8008284: 687b ldr r3, [r7, #4] - 8008286: 62da str r2, [r3, #44] ; 0x2c - - /* Set the Prescaler value */ - TIMx->PSC = Structure->Prescaler; - 8008288: 683b ldr r3, [r7, #0] - 800828a: 681a ldr r2, [r3, #0] - 800828c: 687b ldr r3, [r7, #4] - 800828e: 629a str r2, [r3, #40] ; 0x28 - - if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 8008290: 687b ldr r3, [r7, #4] - 8008292: 4a10 ldr r2, [pc, #64] ; (80082d4 ) - 8008294: 4293 cmp r3, r2 - 8008296: d00f beq.n 80082b8 - 8008298: 687b ldr r3, [r7, #4] - 800829a: 4a11 ldr r2, [pc, #68] ; (80082e0 ) - 800829c: 4293 cmp r3, r2 - 800829e: d00b beq.n 80082b8 - 80082a0: 687b ldr r3, [r7, #4] - 80082a2: 4a10 ldr r2, [pc, #64] ; (80082e4 ) - 80082a4: 4293 cmp r3, r2 - 80082a6: d007 beq.n 80082b8 - 80082a8: 687b ldr r3, [r7, #4] - 80082aa: 4a0f ldr r2, [pc, #60] ; (80082e8 ) - 80082ac: 4293 cmp r3, r2 - 80082ae: d003 beq.n 80082b8 - 80082b0: 687b ldr r3, [r7, #4] - 80082b2: 4a0e ldr r2, [pc, #56] ; (80082ec ) - 80082b4: 4293 cmp r3, r2 - 80082b6: d103 bne.n 80082c0 - { - /* Set the Repetition Counter value */ - TIMx->RCR = Structure->RepetitionCounter; - 80082b8: 683b ldr r3, [r7, #0] - 80082ba: 691a ldr r2, [r3, #16] - 80082bc: 687b ldr r3, [r7, #4] - 80082be: 631a str r2, [r3, #48] ; 0x30 - } - - /* Generate an update event to reload the Prescaler - and the repetition counter (only for advanced timer) value immediately */ - TIMx->EGR = TIM_EGR_UG; - 80082c0: 687b ldr r3, [r7, #4] - 80082c2: 2201 movs r2, #1 - 80082c4: 615a str r2, [r3, #20] -} - 80082c6: bf00 nop - 80082c8: 3714 adds r7, #20 - 80082ca: 46bd mov sp, r7 - 80082cc: f85d 7b04 ldr.w r7, [sp], #4 - 80082d0: 4770 bx lr - 80082d2: bf00 nop - 80082d4: 40012c00 .word 0x40012c00 - 80082d8: 40000400 .word 0x40000400 - 80082dc: 40000800 .word 0x40000800 - 80082e0: 40013400 .word 0x40013400 - 80082e4: 40014000 .word 0x40014000 - 80082e8: 40014400 .word 0x40014400 - 80082ec: 40014800 .word 0x40014800 - -080082f0 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - 80082f0: b480 push {r7} - 80082f2: b087 sub sp, #28 - 80082f4: af00 add r7, sp, #0 - 80082f6: 6078 str r0, [r7, #4] - 80082f8: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - 80082fa: 687b ldr r3, [r7, #4] - 80082fc: 6a1b ldr r3, [r3, #32] - 80082fe: f023 0201 bic.w r2, r3, #1 - 8008302: 687b ldr r3, [r7, #4] - 8008304: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 8008306: 687b ldr r3, [r7, #4] - 8008308: 6a1b ldr r3, [r3, #32] - 800830a: 617b str r3, [r7, #20] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 800830c: 687b ldr r3, [r7, #4] - 800830e: 685b ldr r3, [r3, #4] - 8008310: 613b str r3, [r7, #16] - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - 8008312: 687b ldr r3, [r7, #4] - 8008314: 699b ldr r3, [r3, #24] - 8008316: 60fb str r3, [r7, #12] - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~TIM_CCMR1_OC1M; - 8008318: 68fb ldr r3, [r7, #12] - 800831a: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 800831e: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8008322: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR1_CC1S; - 8008324: 68fb ldr r3, [r7, #12] - 8008326: f023 0303 bic.w r3, r3, #3 - 800832a: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - 800832c: 683b ldr r3, [r7, #0] - 800832e: 681b ldr r3, [r3, #0] - 8008330: 68fa ldr r2, [r7, #12] - 8008332: 4313 orrs r3, r2 - 8008334: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC1P; - 8008336: 697b ldr r3, [r7, #20] - 8008338: f023 0302 bic.w r3, r3, #2 - 800833c: 617b str r3, [r7, #20] - /* Set the Output Compare Polarity */ - tmpccer |= OC_Config->OCPolarity; - 800833e: 683b ldr r3, [r7, #0] - 8008340: 689b ldr r3, [r3, #8] - 8008342: 697a ldr r2, [r7, #20] - 8008344: 4313 orrs r3, r2 - 8008346: 617b str r3, [r7, #20] - - if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) - 8008348: 687b ldr r3, [r7, #4] - 800834a: 4a2c ldr r2, [pc, #176] ; (80083fc ) - 800834c: 4293 cmp r3, r2 - 800834e: d00f beq.n 8008370 - 8008350: 687b ldr r3, [r7, #4] - 8008352: 4a2b ldr r2, [pc, #172] ; (8008400 ) - 8008354: 4293 cmp r3, r2 - 8008356: d00b beq.n 8008370 - 8008358: 687b ldr r3, [r7, #4] - 800835a: 4a2a ldr r2, [pc, #168] ; (8008404 ) - 800835c: 4293 cmp r3, r2 - 800835e: d007 beq.n 8008370 - 8008360: 687b ldr r3, [r7, #4] - 8008362: 4a29 ldr r2, [pc, #164] ; (8008408 ) - 8008364: 4293 cmp r3, r2 - 8008366: d003 beq.n 8008370 - 8008368: 687b ldr r3, [r7, #4] - 800836a: 4a28 ldr r2, [pc, #160] ; (800840c ) - 800836c: 4293 cmp r3, r2 - 800836e: d10c bne.n 800838a - { - /* Check parameters */ - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC1NP; - 8008370: 697b ldr r3, [r7, #20] - 8008372: f023 0308 bic.w r3, r3, #8 - 8008376: 617b str r3, [r7, #20] - /* Set the Output N Polarity */ - tmpccer |= OC_Config->OCNPolarity; - 8008378: 683b ldr r3, [r7, #0] - 800837a: 68db ldr r3, [r3, #12] - 800837c: 697a ldr r2, [r7, #20] - 800837e: 4313 orrs r3, r2 - 8008380: 617b str r3, [r7, #20] - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC1NE; - 8008382: 697b ldr r3, [r7, #20] - 8008384: f023 0304 bic.w r3, r3, #4 - 8008388: 617b str r3, [r7, #20] - } - - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800838a: 687b ldr r3, [r7, #4] - 800838c: 4a1b ldr r2, [pc, #108] ; (80083fc ) - 800838e: 4293 cmp r3, r2 - 8008390: d00f beq.n 80083b2 - 8008392: 687b ldr r3, [r7, #4] - 8008394: 4a1a ldr r2, [pc, #104] ; (8008400 ) - 8008396: 4293 cmp r3, r2 - 8008398: d00b beq.n 80083b2 - 800839a: 687b ldr r3, [r7, #4] - 800839c: 4a19 ldr r2, [pc, #100] ; (8008404 ) - 800839e: 4293 cmp r3, r2 - 80083a0: d007 beq.n 80083b2 - 80083a2: 687b ldr r3, [r7, #4] - 80083a4: 4a18 ldr r2, [pc, #96] ; (8008408 ) - 80083a6: 4293 cmp r3, r2 - 80083a8: d003 beq.n 80083b2 - 80083aa: 687b ldr r3, [r7, #4] - 80083ac: 4a17 ldr r2, [pc, #92] ; (800840c ) - 80083ae: 4293 cmp r3, r2 - 80083b0: d111 bne.n 80083d6 - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS1; - 80083b2: 693b ldr r3, [r7, #16] - 80083b4: f423 7380 bic.w r3, r3, #256 ; 0x100 - 80083b8: 613b str r3, [r7, #16] - tmpcr2 &= ~TIM_CR2_OIS1N; - 80083ba: 693b ldr r3, [r7, #16] - 80083bc: f423 7300 bic.w r3, r3, #512 ; 0x200 - 80083c0: 613b str r3, [r7, #16] - /* Set the Output Idle state */ - tmpcr2 |= OC_Config->OCIdleState; - 80083c2: 683b ldr r3, [r7, #0] - 80083c4: 695b ldr r3, [r3, #20] - 80083c6: 693a ldr r2, [r7, #16] - 80083c8: 4313 orrs r3, r2 - 80083ca: 613b str r3, [r7, #16] - /* Set the Output N Idle state */ - tmpcr2 |= OC_Config->OCNIdleState; - 80083cc: 683b ldr r3, [r7, #0] - 80083ce: 699b ldr r3, [r3, #24] - 80083d0: 693a ldr r2, [r7, #16] - 80083d2: 4313 orrs r3, r2 - 80083d4: 613b str r3, [r7, #16] - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 80083d6: 687b ldr r3, [r7, #4] - 80083d8: 693a ldr r2, [r7, #16] - 80083da: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - 80083dc: 687b ldr r3, [r7, #4] - 80083de: 68fa ldr r2, [r7, #12] - 80083e0: 619a str r2, [r3, #24] - - /* Set the Capture Compare Register value */ - TIMx->CCR1 = OC_Config->Pulse; - 80083e2: 683b ldr r3, [r7, #0] - 80083e4: 685a ldr r2, [r3, #4] - 80083e6: 687b ldr r3, [r7, #4] - 80083e8: 635a str r2, [r3, #52] ; 0x34 - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 80083ea: 687b ldr r3, [r7, #4] - 80083ec: 697a ldr r2, [r7, #20] - 80083ee: 621a str r2, [r3, #32] -} - 80083f0: bf00 nop - 80083f2: 371c adds r7, #28 - 80083f4: 46bd mov sp, r7 - 80083f6: f85d 7b04 ldr.w r7, [sp], #4 - 80083fa: 4770 bx lr - 80083fc: 40012c00 .word 0x40012c00 - 8008400: 40013400 .word 0x40013400 - 8008404: 40014000 .word 0x40014000 - 8008408: 40014400 .word 0x40014400 - 800840c: 40014800 .word 0x40014800 - -08008410 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - 8008410: b480 push {r7} - 8008412: b087 sub sp, #28 - 8008414: af00 add r7, sp, #0 - 8008416: 6078 str r0, [r7, #4] - 8008418: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - 800841a: 687b ldr r3, [r7, #4] - 800841c: 6a1b ldr r3, [r3, #32] - 800841e: f023 0210 bic.w r2, r3, #16 - 8008422: 687b ldr r3, [r7, #4] - 8008424: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 8008426: 687b ldr r3, [r7, #4] - 8008428: 6a1b ldr r3, [r3, #32] - 800842a: 617b str r3, [r7, #20] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 800842c: 687b ldr r3, [r7, #4] - 800842e: 685b ldr r3, [r3, #4] - 8008430: 613b str r3, [r7, #16] - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - 8008432: 687b ldr r3, [r7, #4] - 8008434: 699b ldr r3, [r3, #24] - 8008436: 60fb str r3, [r7, #12] - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR1_OC2M; - 8008438: 68fb ldr r3, [r7, #12] - 800843a: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 800843e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8008442: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR1_CC2S; - 8008444: 68fb ldr r3, [r7, #12] - 8008446: f423 7340 bic.w r3, r3, #768 ; 0x300 - 800844a: 60fb str r3, [r7, #12] - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8U); - 800844c: 683b ldr r3, [r7, #0] - 800844e: 681b ldr r3, [r3, #0] - 8008450: 021b lsls r3, r3, #8 - 8008452: 68fa ldr r2, [r7, #12] - 8008454: 4313 orrs r3, r2 - 8008456: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC2P; - 8008458: 697b ldr r3, [r7, #20] - 800845a: f023 0320 bic.w r3, r3, #32 - 800845e: 617b str r3, [r7, #20] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 4U); - 8008460: 683b ldr r3, [r7, #0] - 8008462: 689b ldr r3, [r3, #8] - 8008464: 011b lsls r3, r3, #4 - 8008466: 697a ldr r2, [r7, #20] - 8008468: 4313 orrs r3, r2 - 800846a: 617b str r3, [r7, #20] - - if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) - 800846c: 687b ldr r3, [r7, #4] - 800846e: 4a28 ldr r2, [pc, #160] ; (8008510 ) - 8008470: 4293 cmp r3, r2 - 8008472: d003 beq.n 800847c - 8008474: 687b ldr r3, [r7, #4] - 8008476: 4a27 ldr r2, [pc, #156] ; (8008514 ) - 8008478: 4293 cmp r3, r2 - 800847a: d10d bne.n 8008498 - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC2NP; - 800847c: 697b ldr r3, [r7, #20] - 800847e: f023 0380 bic.w r3, r3, #128 ; 0x80 - 8008482: 617b str r3, [r7, #20] - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 4U); - 8008484: 683b ldr r3, [r7, #0] - 8008486: 68db ldr r3, [r3, #12] - 8008488: 011b lsls r3, r3, #4 - 800848a: 697a ldr r2, [r7, #20] - 800848c: 4313 orrs r3, r2 - 800848e: 617b str r3, [r7, #20] - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC2NE; - 8008490: 697b ldr r3, [r7, #20] - 8008492: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8008496: 617b str r3, [r7, #20] - - } - - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8008498: 687b ldr r3, [r7, #4] - 800849a: 4a1d ldr r2, [pc, #116] ; (8008510 ) - 800849c: 4293 cmp r3, r2 - 800849e: d00f beq.n 80084c0 - 80084a0: 687b ldr r3, [r7, #4] - 80084a2: 4a1c ldr r2, [pc, #112] ; (8008514 ) - 80084a4: 4293 cmp r3, r2 - 80084a6: d00b beq.n 80084c0 - 80084a8: 687b ldr r3, [r7, #4] - 80084aa: 4a1b ldr r2, [pc, #108] ; (8008518 ) - 80084ac: 4293 cmp r3, r2 - 80084ae: d007 beq.n 80084c0 - 80084b0: 687b ldr r3, [r7, #4] - 80084b2: 4a1a ldr r2, [pc, #104] ; (800851c ) - 80084b4: 4293 cmp r3, r2 - 80084b6: d003 beq.n 80084c0 - 80084b8: 687b ldr r3, [r7, #4] - 80084ba: 4a19 ldr r2, [pc, #100] ; (8008520 ) - 80084bc: 4293 cmp r3, r2 - 80084be: d113 bne.n 80084e8 - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS2; - 80084c0: 693b ldr r3, [r7, #16] - 80084c2: f423 6380 bic.w r3, r3, #1024 ; 0x400 - 80084c6: 613b str r3, [r7, #16] -#if defined(TIM_CR2_OIS2N) - tmpcr2 &= ~TIM_CR2_OIS2N; - 80084c8: 693b ldr r3, [r7, #16] - 80084ca: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 80084ce: 613b str r3, [r7, #16] -#endif /* TIM_CR2_OIS2N */ - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 2U); - 80084d0: 683b ldr r3, [r7, #0] - 80084d2: 695b ldr r3, [r3, #20] - 80084d4: 009b lsls r3, r3, #2 - 80084d6: 693a ldr r2, [r7, #16] - 80084d8: 4313 orrs r3, r2 - 80084da: 613b str r3, [r7, #16] - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 2U); - 80084dc: 683b ldr r3, [r7, #0] - 80084de: 699b ldr r3, [r3, #24] - 80084e0: 009b lsls r3, r3, #2 - 80084e2: 693a ldr r2, [r7, #16] - 80084e4: 4313 orrs r3, r2 - 80084e6: 613b str r3, [r7, #16] - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 80084e8: 687b ldr r3, [r7, #4] - 80084ea: 693a ldr r2, [r7, #16] - 80084ec: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - 80084ee: 687b ldr r3, [r7, #4] - 80084f0: 68fa ldr r2, [r7, #12] - 80084f2: 619a str r2, [r3, #24] - - /* Set the Capture Compare Register value */ - TIMx->CCR2 = OC_Config->Pulse; - 80084f4: 683b ldr r3, [r7, #0] - 80084f6: 685a ldr r2, [r3, #4] - 80084f8: 687b ldr r3, [r7, #4] - 80084fa: 639a str r2, [r3, #56] ; 0x38 - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 80084fc: 687b ldr r3, [r7, #4] - 80084fe: 697a ldr r2, [r7, #20] - 8008500: 621a str r2, [r3, #32] -} - 8008502: bf00 nop - 8008504: 371c adds r7, #28 - 8008506: 46bd mov sp, r7 - 8008508: f85d 7b04 ldr.w r7, [sp], #4 - 800850c: 4770 bx lr - 800850e: bf00 nop - 8008510: 40012c00 .word 0x40012c00 - 8008514: 40013400 .word 0x40013400 - 8008518: 40014000 .word 0x40014000 - 800851c: 40014400 .word 0x40014400 - 8008520: 40014800 .word 0x40014800 - -08008524 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - 8008524: b480 push {r7} - 8008526: b087 sub sp, #28 - 8008528: af00 add r7, sp, #0 - 800852a: 6078 str r0, [r7, #4] - 800852c: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 3: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - 800852e: 687b ldr r3, [r7, #4] - 8008530: 6a1b ldr r3, [r3, #32] - 8008532: f423 7280 bic.w r2, r3, #256 ; 0x100 - 8008536: 687b ldr r3, [r7, #4] - 8008538: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 800853a: 687b ldr r3, [r7, #4] - 800853c: 6a1b ldr r3, [r3, #32] - 800853e: 617b str r3, [r7, #20] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8008540: 687b ldr r3, [r7, #4] - 8008542: 685b ldr r3, [r3, #4] - 8008544: 613b str r3, [r7, #16] - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - 8008546: 687b ldr r3, [r7, #4] - 8008548: 69db ldr r3, [r3, #28] - 800854a: 60fb str r3, [r7, #12] - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC3M; - 800854c: 68fb ldr r3, [r7, #12] - 800854e: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8008552: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8008556: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR2_CC3S; - 8008558: 68fb ldr r3, [r7, #12] - 800855a: f023 0303 bic.w r3, r3, #3 - 800855e: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - 8008560: 683b ldr r3, [r7, #0] - 8008562: 681b ldr r3, [r3, #0] - 8008564: 68fa ldr r2, [r7, #12] - 8008566: 4313 orrs r3, r2 - 8008568: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC3P; - 800856a: 697b ldr r3, [r7, #20] - 800856c: f423 7300 bic.w r3, r3, #512 ; 0x200 - 8008570: 617b str r3, [r7, #20] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 8U); - 8008572: 683b ldr r3, [r7, #0] - 8008574: 689b ldr r3, [r3, #8] - 8008576: 021b lsls r3, r3, #8 - 8008578: 697a ldr r2, [r7, #20] - 800857a: 4313 orrs r3, r2 - 800857c: 617b str r3, [r7, #20] - - if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) - 800857e: 687b ldr r3, [r7, #4] - 8008580: 4a27 ldr r2, [pc, #156] ; (8008620 ) - 8008582: 4293 cmp r3, r2 - 8008584: d003 beq.n 800858e - 8008586: 687b ldr r3, [r7, #4] - 8008588: 4a26 ldr r2, [pc, #152] ; (8008624 ) - 800858a: 4293 cmp r3, r2 - 800858c: d10d bne.n 80085aa - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC3NP; - 800858e: 697b ldr r3, [r7, #20] - 8008590: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 8008594: 617b str r3, [r7, #20] - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 8U); - 8008596: 683b ldr r3, [r7, #0] - 8008598: 68db ldr r3, [r3, #12] - 800859a: 021b lsls r3, r3, #8 - 800859c: 697a ldr r2, [r7, #20] - 800859e: 4313 orrs r3, r2 - 80085a0: 617b str r3, [r7, #20] - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC3NE; - 80085a2: 697b ldr r3, [r7, #20] - 80085a4: f423 6380 bic.w r3, r3, #1024 ; 0x400 - 80085a8: 617b str r3, [r7, #20] - } - -#if defined(TIM_CR2_OIS3) - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 80085aa: 687b ldr r3, [r7, #4] - 80085ac: 4a1c ldr r2, [pc, #112] ; (8008620 ) - 80085ae: 4293 cmp r3, r2 - 80085b0: d00f beq.n 80085d2 - 80085b2: 687b ldr r3, [r7, #4] - 80085b4: 4a1b ldr r2, [pc, #108] ; (8008624 ) - 80085b6: 4293 cmp r3, r2 - 80085b8: d00b beq.n 80085d2 - 80085ba: 687b ldr r3, [r7, #4] - 80085bc: 4a1a ldr r2, [pc, #104] ; (8008628 ) - 80085be: 4293 cmp r3, r2 - 80085c0: d007 beq.n 80085d2 - 80085c2: 687b ldr r3, [r7, #4] - 80085c4: 4a19 ldr r2, [pc, #100] ; (800862c ) - 80085c6: 4293 cmp r3, r2 - 80085c8: d003 beq.n 80085d2 - 80085ca: 687b ldr r3, [r7, #4] - 80085cc: 4a18 ldr r2, [pc, #96] ; (8008630 ) - 80085ce: 4293 cmp r3, r2 - 80085d0: d113 bne.n 80085fa - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS3; - 80085d2: 693b ldr r3, [r7, #16] - 80085d4: f423 5380 bic.w r3, r3, #4096 ; 0x1000 - 80085d8: 613b str r3, [r7, #16] - tmpcr2 &= ~TIM_CR2_OIS3N; - 80085da: 693b ldr r3, [r7, #16] - 80085dc: f423 5300 bic.w r3, r3, #8192 ; 0x2000 - 80085e0: 613b str r3, [r7, #16] - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 4U); - 80085e2: 683b ldr r3, [r7, #0] - 80085e4: 695b ldr r3, [r3, #20] - 80085e6: 011b lsls r3, r3, #4 - 80085e8: 693a ldr r2, [r7, #16] - 80085ea: 4313 orrs r3, r2 - 80085ec: 613b str r3, [r7, #16] - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 4U); - 80085ee: 683b ldr r3, [r7, #0] - 80085f0: 699b ldr r3, [r3, #24] - 80085f2: 011b lsls r3, r3, #4 - 80085f4: 693a ldr r2, [r7, #16] - 80085f6: 4313 orrs r3, r2 - 80085f8: 613b str r3, [r7, #16] - } -#endif /* TIM_CR2_OIS3 */ - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 80085fa: 687b ldr r3, [r7, #4] - 80085fc: 693a ldr r2, [r7, #16] - 80085fe: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - 8008600: 687b ldr r3, [r7, #4] - 8008602: 68fa ldr r2, [r7, #12] - 8008604: 61da str r2, [r3, #28] - - /* Set the Capture Compare Register value */ - TIMx->CCR3 = OC_Config->Pulse; - 8008606: 683b ldr r3, [r7, #0] - 8008608: 685a ldr r2, [r3, #4] - 800860a: 687b ldr r3, [r7, #4] - 800860c: 63da str r2, [r3, #60] ; 0x3c - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 800860e: 687b ldr r3, [r7, #4] - 8008610: 697a ldr r2, [r7, #20] - 8008612: 621a str r2, [r3, #32] -} - 8008614: bf00 nop - 8008616: 371c adds r7, #28 - 8008618: 46bd mov sp, r7 - 800861a: f85d 7b04 ldr.w r7, [sp], #4 - 800861e: 4770 bx lr - 8008620: 40012c00 .word 0x40012c00 - 8008624: 40013400 .word 0x40013400 - 8008628: 40014000 .word 0x40014000 - 800862c: 40014400 .word 0x40014400 - 8008630: 40014800 .word 0x40014800 - -08008634 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - 8008634: b480 push {r7} - 8008636: b087 sub sp, #28 - 8008638: af00 add r7, sp, #0 - 800863a: 6078 str r0, [r7, #4] - 800863c: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - 800863e: 687b ldr r3, [r7, #4] - 8008640: 6a1b ldr r3, [r3, #32] - 8008642: f423 5280 bic.w r2, r3, #4096 ; 0x1000 - 8008646: 687b ldr r3, [r7, #4] - 8008648: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 800864a: 687b ldr r3, [r7, #4] - 800864c: 6a1b ldr r3, [r3, #32] - 800864e: 613b str r3, [r7, #16] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8008650: 687b ldr r3, [r7, #4] - 8008652: 685b ldr r3, [r3, #4] - 8008654: 617b str r3, [r7, #20] - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - 8008656: 687b ldr r3, [r7, #4] - 8008658: 69db ldr r3, [r3, #28] - 800865a: 60fb str r3, [r7, #12] - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC4M; - 800865c: 68fb ldr r3, [r7, #12] - 800865e: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 8008662: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8008666: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR2_CC4S; - 8008668: 68fb ldr r3, [r7, #12] - 800866a: f423 7340 bic.w r3, r3, #768 ; 0x300 - 800866e: 60fb str r3, [r7, #12] - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8U); - 8008670: 683b ldr r3, [r7, #0] - 8008672: 681b ldr r3, [r3, #0] - 8008674: 021b lsls r3, r3, #8 - 8008676: 68fa ldr r2, [r7, #12] - 8008678: 4313 orrs r3, r2 - 800867a: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC4P; - 800867c: 693b ldr r3, [r7, #16] - 800867e: f423 5300 bic.w r3, r3, #8192 ; 0x2000 - 8008682: 613b str r3, [r7, #16] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 12U); - 8008684: 683b ldr r3, [r7, #0] - 8008686: 689b ldr r3, [r3, #8] - 8008688: 031b lsls r3, r3, #12 - 800868a: 693a ldr r2, [r7, #16] - 800868c: 4313 orrs r3, r2 - 800868e: 613b str r3, [r7, #16] - -#if defined(TIM_CR2_OIS4) - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8008690: 687b ldr r3, [r7, #4] - 8008692: 4a18 ldr r2, [pc, #96] ; (80086f4 ) - 8008694: 4293 cmp r3, r2 - 8008696: d00f beq.n 80086b8 - 8008698: 687b ldr r3, [r7, #4] - 800869a: 4a17 ldr r2, [pc, #92] ; (80086f8 ) - 800869c: 4293 cmp r3, r2 - 800869e: d00b beq.n 80086b8 - 80086a0: 687b ldr r3, [r7, #4] - 80086a2: 4a16 ldr r2, [pc, #88] ; (80086fc ) - 80086a4: 4293 cmp r3, r2 - 80086a6: d007 beq.n 80086b8 - 80086a8: 687b ldr r3, [r7, #4] - 80086aa: 4a15 ldr r2, [pc, #84] ; (8008700 ) - 80086ac: 4293 cmp r3, r2 - 80086ae: d003 beq.n 80086b8 - 80086b0: 687b ldr r3, [r7, #4] - 80086b2: 4a14 ldr r2, [pc, #80] ; (8008704 ) - 80086b4: 4293 cmp r3, r2 - 80086b6: d109 bne.n 80086cc - { - /* Check parameters */ - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS4; - 80086b8: 697b ldr r3, [r7, #20] - 80086ba: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 80086be: 617b str r3, [r7, #20] - - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 6U); - 80086c0: 683b ldr r3, [r7, #0] - 80086c2: 695b ldr r3, [r3, #20] - 80086c4: 019b lsls r3, r3, #6 - 80086c6: 697a ldr r2, [r7, #20] - 80086c8: 4313 orrs r3, r2 - 80086ca: 617b str r3, [r7, #20] - } -#endif /* TIM_CR2_OIS4 */ - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 80086cc: 687b ldr r3, [r7, #4] - 80086ce: 697a ldr r2, [r7, #20] - 80086d0: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - 80086d2: 687b ldr r3, [r7, #4] - 80086d4: 68fa ldr r2, [r7, #12] - 80086d6: 61da str r2, [r3, #28] - - /* Set the Capture Compare Register value */ - TIMx->CCR4 = OC_Config->Pulse; - 80086d8: 683b ldr r3, [r7, #0] - 80086da: 685a ldr r2, [r3, #4] - 80086dc: 687b ldr r3, [r7, #4] - 80086de: 641a str r2, [r3, #64] ; 0x40 - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 80086e0: 687b ldr r3, [r7, #4] - 80086e2: 693a ldr r2, [r7, #16] - 80086e4: 621a str r2, [r3, #32] -} - 80086e6: bf00 nop - 80086e8: 371c adds r7, #28 - 80086ea: 46bd mov sp, r7 - 80086ec: f85d 7b04 ldr.w r7, [sp], #4 - 80086f0: 4770 bx lr - 80086f2: bf00 nop - 80086f4: 40012c00 .word 0x40012c00 - 80086f8: 40013400 .word 0x40013400 - 80086fc: 40014000 .word 0x40014000 - 8008700: 40014400 .word 0x40014400 - 8008704: 40014800 .word 0x40014800 - -08008708 : - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - 8008708: b480 push {r7} - 800870a: b087 sub sp, #28 - 800870c: af00 add r7, sp, #0 - 800870e: 6078 str r0, [r7, #4] - 8008710: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC5E; - 8008712: 687b ldr r3, [r7, #4] - 8008714: 6a1b ldr r3, [r3, #32] - 8008716: f423 3280 bic.w r2, r3, #65536 ; 0x10000 - 800871a: 687b ldr r3, [r7, #4] - 800871c: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 800871e: 687b ldr r3, [r7, #4] - 8008720: 6a1b ldr r3, [r3, #32] - 8008722: 613b str r3, [r7, #16] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8008724: 687b ldr r3, [r7, #4] - 8008726: 685b ldr r3, [r3, #4] - 8008728: 617b str r3, [r7, #20] - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - 800872a: 687b ldr r3, [r7, #4] - 800872c: 6d5b ldr r3, [r3, #84] ; 0x54 - 800872e: 60fb str r3, [r7, #12] - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC5M); - 8008730: 68fb ldr r3, [r7, #12] - 8008732: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8008736: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800873a: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - 800873c: 683b ldr r3, [r7, #0] - 800873e: 681b ldr r3, [r3, #0] - 8008740: 68fa ldr r2, [r7, #12] - 8008742: 4313 orrs r3, r2 - 8008744: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC5P; - 8008746: 693b ldr r3, [r7, #16] - 8008748: f423 3300 bic.w r3, r3, #131072 ; 0x20000 - 800874c: 613b str r3, [r7, #16] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 16U); - 800874e: 683b ldr r3, [r7, #0] - 8008750: 689b ldr r3, [r3, #8] - 8008752: 041b lsls r3, r3, #16 - 8008754: 693a ldr r2, [r7, #16] - 8008756: 4313 orrs r3, r2 - 8008758: 613b str r3, [r7, #16] - - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800875a: 687b ldr r3, [r7, #4] - 800875c: 4a17 ldr r2, [pc, #92] ; (80087bc ) - 800875e: 4293 cmp r3, r2 - 8008760: d00f beq.n 8008782 - 8008762: 687b ldr r3, [r7, #4] - 8008764: 4a16 ldr r2, [pc, #88] ; (80087c0 ) - 8008766: 4293 cmp r3, r2 - 8008768: d00b beq.n 8008782 - 800876a: 687b ldr r3, [r7, #4] - 800876c: 4a15 ldr r2, [pc, #84] ; (80087c4 ) - 800876e: 4293 cmp r3, r2 - 8008770: d007 beq.n 8008782 - 8008772: 687b ldr r3, [r7, #4] - 8008774: 4a14 ldr r2, [pc, #80] ; (80087c8 ) - 8008776: 4293 cmp r3, r2 - 8008778: d003 beq.n 8008782 - 800877a: 687b ldr r3, [r7, #4] - 800877c: 4a13 ldr r2, [pc, #76] ; (80087cc ) - 800877e: 4293 cmp r3, r2 - 8008780: d109 bne.n 8008796 - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS5; - 8008782: 697b ldr r3, [r7, #20] - 8008784: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8008788: 617b str r3, [r7, #20] - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 8U); - 800878a: 683b ldr r3, [r7, #0] - 800878c: 695b ldr r3, [r3, #20] - 800878e: 021b lsls r3, r3, #8 - 8008790: 697a ldr r2, [r7, #20] - 8008792: 4313 orrs r3, r2 - 8008794: 617b str r3, [r7, #20] - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 8008796: 687b ldr r3, [r7, #4] - 8008798: 697a ldr r2, [r7, #20] - 800879a: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - 800879c: 687b ldr r3, [r7, #4] - 800879e: 68fa ldr r2, [r7, #12] - 80087a0: 655a str r2, [r3, #84] ; 0x54 - - /* Set the Capture Compare Register value */ - TIMx->CCR5 = OC_Config->Pulse; - 80087a2: 683b ldr r3, [r7, #0] - 80087a4: 685a ldr r2, [r3, #4] - 80087a6: 687b ldr r3, [r7, #4] - 80087a8: 659a str r2, [r3, #88] ; 0x58 - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 80087aa: 687b ldr r3, [r7, #4] - 80087ac: 693a ldr r2, [r7, #16] - 80087ae: 621a str r2, [r3, #32] -} - 80087b0: bf00 nop - 80087b2: 371c adds r7, #28 - 80087b4: 46bd mov sp, r7 - 80087b6: f85d 7b04 ldr.w r7, [sp], #4 - 80087ba: 4770 bx lr - 80087bc: 40012c00 .word 0x40012c00 - 80087c0: 40013400 .word 0x40013400 - 80087c4: 40014000 .word 0x40014000 - 80087c8: 40014400 .word 0x40014400 - 80087cc: 40014800 .word 0x40014800 - -080087d0 : - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - 80087d0: b480 push {r7} - 80087d2: b087 sub sp, #28 - 80087d4: af00 add r7, sp, #0 - 80087d6: 6078 str r0, [r7, #4] - 80087d8: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC6E; - 80087da: 687b ldr r3, [r7, #4] - 80087dc: 6a1b ldr r3, [r3, #32] - 80087de: f423 1280 bic.w r2, r3, #1048576 ; 0x100000 - 80087e2: 687b ldr r3, [r7, #4] - 80087e4: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 80087e6: 687b ldr r3, [r7, #4] - 80087e8: 6a1b ldr r3, [r3, #32] - 80087ea: 613b str r3, [r7, #16] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 80087ec: 687b ldr r3, [r7, #4] - 80087ee: 685b ldr r3, [r3, #4] - 80087f0: 617b str r3, [r7, #20] - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - 80087f2: 687b ldr r3, [r7, #4] - 80087f4: 6d5b ldr r3, [r3, #84] ; 0x54 - 80087f6: 60fb str r3, [r7, #12] - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC6M); - 80087f8: 68fb ldr r3, [r7, #12] - 80087fa: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 80087fe: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8008802: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8U); - 8008804: 683b ldr r3, [r7, #0] - 8008806: 681b ldr r3, [r3, #0] - 8008808: 021b lsls r3, r3, #8 - 800880a: 68fa ldr r2, [r7, #12] - 800880c: 4313 orrs r3, r2 - 800880e: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= (uint32_t)~TIM_CCER_CC6P; - 8008810: 693b ldr r3, [r7, #16] - 8008812: f423 1300 bic.w r3, r3, #2097152 ; 0x200000 - 8008816: 613b str r3, [r7, #16] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 20U); - 8008818: 683b ldr r3, [r7, #0] - 800881a: 689b ldr r3, [r3, #8] - 800881c: 051b lsls r3, r3, #20 - 800881e: 693a ldr r2, [r7, #16] - 8008820: 4313 orrs r3, r2 - 8008822: 613b str r3, [r7, #16] - - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8008824: 687b ldr r3, [r7, #4] - 8008826: 4a18 ldr r2, [pc, #96] ; (8008888 ) - 8008828: 4293 cmp r3, r2 - 800882a: d00f beq.n 800884c - 800882c: 687b ldr r3, [r7, #4] - 800882e: 4a17 ldr r2, [pc, #92] ; (800888c ) - 8008830: 4293 cmp r3, r2 - 8008832: d00b beq.n 800884c - 8008834: 687b ldr r3, [r7, #4] - 8008836: 4a16 ldr r2, [pc, #88] ; (8008890 ) - 8008838: 4293 cmp r3, r2 - 800883a: d007 beq.n 800884c - 800883c: 687b ldr r3, [r7, #4] - 800883e: 4a15 ldr r2, [pc, #84] ; (8008894 ) - 8008840: 4293 cmp r3, r2 - 8008842: d003 beq.n 800884c - 8008844: 687b ldr r3, [r7, #4] - 8008846: 4a14 ldr r2, [pc, #80] ; (8008898 ) - 8008848: 4293 cmp r3, r2 - 800884a: d109 bne.n 8008860 - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS6; - 800884c: 697b ldr r3, [r7, #20] - 800884e: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 8008852: 617b str r3, [r7, #20] - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 10U); - 8008854: 683b ldr r3, [r7, #0] - 8008856: 695b ldr r3, [r3, #20] - 8008858: 029b lsls r3, r3, #10 - 800885a: 697a ldr r2, [r7, #20] - 800885c: 4313 orrs r3, r2 - 800885e: 617b str r3, [r7, #20] - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 8008860: 687b ldr r3, [r7, #4] - 8008862: 697a ldr r2, [r7, #20] - 8008864: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - 8008866: 687b ldr r3, [r7, #4] - 8008868: 68fa ldr r2, [r7, #12] - 800886a: 655a str r2, [r3, #84] ; 0x54 - - /* Set the Capture Compare Register value */ - TIMx->CCR6 = OC_Config->Pulse; - 800886c: 683b ldr r3, [r7, #0] - 800886e: 685a ldr r2, [r3, #4] - 8008870: 687b ldr r3, [r7, #4] - 8008872: 65da str r2, [r3, #92] ; 0x5c - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 8008874: 687b ldr r3, [r7, #4] - 8008876: 693a ldr r2, [r7, #16] - 8008878: 621a str r2, [r3, #32] -} - 800887a: bf00 nop - 800887c: 371c adds r7, #28 - 800887e: 46bd mov sp, r7 - 8008880: f85d 7b04 ldr.w r7, [sp], #4 - 8008884: 4770 bx lr - 8008886: bf00 nop - 8008888: 40012c00 .word 0x40012c00 - 800888c: 40013400 .word 0x40013400 - 8008890: 40014000 .word 0x40014000 - 8008894: 40014400 .word 0x40014400 - 8008898: 40014800 .word 0x40014800 - -0800889c : - * @param sSlaveConfig Slave timer configuration - * @retval None - */ -static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef *sSlaveConfig) -{ - 800889c: b580 push {r7, lr} - 800889e: b086 sub sp, #24 - 80088a0: af00 add r7, sp, #0 - 80088a2: 6078 str r0, [r7, #4] - 80088a4: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - 80088a6: 687b ldr r3, [r7, #4] - 80088a8: 681b ldr r3, [r3, #0] - 80088aa: 689b ldr r3, [r3, #8] - 80088ac: 617b str r3, [r7, #20] - - /* Reset the Trigger Selection Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - 80088ae: 697b ldr r3, [r7, #20] - 80088b0: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80088b4: 617b str r3, [r7, #20] - /* Set the Input Trigger source */ - tmpsmcr |= sSlaveConfig->InputTrigger; - 80088b6: 683b ldr r3, [r7, #0] - 80088b8: 685b ldr r3, [r3, #4] - 80088ba: 697a ldr r2, [r7, #20] - 80088bc: 4313 orrs r3, r2 - 80088be: 617b str r3, [r7, #20] - - /* Reset the slave mode Bits */ - tmpsmcr &= ~TIM_SMCR_SMS; - 80088c0: 697b ldr r3, [r7, #20] - 80088c2: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 80088c6: f023 0307 bic.w r3, r3, #7 - 80088ca: 617b str r3, [r7, #20] - /* Set the slave mode */ - tmpsmcr |= sSlaveConfig->SlaveMode; - 80088cc: 683b ldr r3, [r7, #0] - 80088ce: 681b ldr r3, [r3, #0] - 80088d0: 697a ldr r2, [r7, #20] - 80088d2: 4313 orrs r3, r2 - 80088d4: 617b str r3, [r7, #20] - - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - 80088d6: 687b ldr r3, [r7, #4] - 80088d8: 681b ldr r3, [r3, #0] - 80088da: 697a ldr r2, [r7, #20] - 80088dc: 609a str r2, [r3, #8] - - /* Configure the trigger prescaler, filter, and polarity */ - switch (sSlaveConfig->InputTrigger) - 80088de: 683b ldr r3, [r7, #0] - 80088e0: 685b ldr r3, [r3, #4] - 80088e2: 2b30 cmp r3, #48 ; 0x30 - 80088e4: d05c beq.n 80089a0 - 80088e6: 2b30 cmp r3, #48 ; 0x30 - 80088e8: d806 bhi.n 80088f8 - 80088ea: 2b10 cmp r3, #16 - 80088ec: d058 beq.n 80089a0 - 80088ee: 2b20 cmp r3, #32 - 80088f0: d056 beq.n 80089a0 - 80088f2: 2b00 cmp r3, #0 - 80088f4: d054 beq.n 80089a0 - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - break; - } - - default: - break; - 80088f6: e054 b.n 80089a2 - switch (sSlaveConfig->InputTrigger) - 80088f8: 2b50 cmp r3, #80 ; 0x50 - 80088fa: d03d beq.n 8008978 - 80088fc: 2b50 cmp r3, #80 ; 0x50 - 80088fe: d802 bhi.n 8008906 - 8008900: 2b40 cmp r3, #64 ; 0x40 - 8008902: d010 beq.n 8008926 - break; - 8008904: e04d b.n 80089a2 - switch (sSlaveConfig->InputTrigger) - 8008906: 2b60 cmp r3, #96 ; 0x60 - 8008908: d040 beq.n 800898c - 800890a: 2b70 cmp r3, #112 ; 0x70 - 800890c: d000 beq.n 8008910 - break; - 800890e: e048 b.n 80089a2 - TIM_ETR_SetConfig(htim->Instance, - 8008910: 687b ldr r3, [r7, #4] - 8008912: 6818 ldr r0, [r3, #0] - 8008914: 683b ldr r3, [r7, #0] - 8008916: 68d9 ldr r1, [r3, #12] - 8008918: 683b ldr r3, [r7, #0] - 800891a: 689a ldr r2, [r3, #8] - 800891c: 683b ldr r3, [r7, #0] - 800891e: 691b ldr r3, [r3, #16] - 8008920: f000 f9c1 bl 8008ca6 - break; - 8008924: e03d b.n 80089a2 - if(sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED) - 8008926: 683b ldr r3, [r7, #0] - 8008928: 681b ldr r3, [r3, #0] - 800892a: 2b05 cmp r3, #5 - 800892c: d101 bne.n 8008932 - return HAL_ERROR; - 800892e: 2301 movs r3, #1 - 8008930: e038 b.n 80089a4 - tmpccer = htim->Instance->CCER; - 8008932: 687b ldr r3, [r7, #4] - 8008934: 681b ldr r3, [r3, #0] - 8008936: 6a1b ldr r3, [r3, #32] - 8008938: 613b str r3, [r7, #16] - htim->Instance->CCER &= ~TIM_CCER_CC1E; - 800893a: 687b ldr r3, [r7, #4] - 800893c: 681b ldr r3, [r3, #0] - 800893e: 6a1a ldr r2, [r3, #32] - 8008940: 687b ldr r3, [r7, #4] - 8008942: 681b ldr r3, [r3, #0] - 8008944: f022 0201 bic.w r2, r2, #1 - 8008948: 621a str r2, [r3, #32] - tmpccmr1 = htim->Instance->CCMR1; - 800894a: 687b ldr r3, [r7, #4] - 800894c: 681b ldr r3, [r3, #0] - 800894e: 699b ldr r3, [r3, #24] - 8008950: 60fb str r3, [r7, #12] - tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8008952: 68fb ldr r3, [r7, #12] - 8008954: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 8008958: 60fb str r3, [r7, #12] - tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); - 800895a: 683b ldr r3, [r7, #0] - 800895c: 691b ldr r3, [r3, #16] - 800895e: 011b lsls r3, r3, #4 - 8008960: 68fa ldr r2, [r7, #12] - 8008962: 4313 orrs r3, r2 - 8008964: 60fb str r3, [r7, #12] - htim->Instance->CCMR1 = tmpccmr1; - 8008966: 687b ldr r3, [r7, #4] - 8008968: 681b ldr r3, [r3, #0] - 800896a: 68fa ldr r2, [r7, #12] - 800896c: 619a str r2, [r3, #24] - htim->Instance->CCER = tmpccer; - 800896e: 687b ldr r3, [r7, #4] - 8008970: 681b ldr r3, [r3, #0] - 8008972: 693a ldr r2, [r7, #16] - 8008974: 621a str r2, [r3, #32] - break; - 8008976: e014 b.n 80089a2 - TIM_TI1_ConfigInputStage(htim->Instance, - 8008978: 687b ldr r3, [r7, #4] - 800897a: 6818 ldr r0, [r3, #0] - 800897c: 683b ldr r3, [r7, #0] - 800897e: 6899 ldr r1, [r3, #8] - 8008980: 683b ldr r3, [r7, #0] - 8008982: 691b ldr r3, [r3, #16] - 8008984: 461a mov r2, r3 - 8008986: f000 f879 bl 8008a7c - break; - 800898a: e00a b.n 80089a2 - TIM_TI2_ConfigInputStage(htim->Instance, - 800898c: 687b ldr r3, [r7, #4] - 800898e: 6818 ldr r0, [r3, #0] - 8008990: 683b ldr r3, [r7, #0] - 8008992: 6899 ldr r1, [r3, #8] - 8008994: 683b ldr r3, [r7, #0] - 8008996: 691b ldr r3, [r3, #16] - 8008998: 461a mov r2, r3 - 800899a: f000 f8db bl 8008b54 - break; - 800899e: e000 b.n 80089a2 - break; - 80089a0: bf00 nop - } - return HAL_OK; - 80089a2: 2300 movs r3, #0 -} - 80089a4: 4618 mov r0, r3 - 80089a6: 3718 adds r7, #24 - 80089a8: 46bd mov sp, r7 - 80089aa: bd80 pop {r7, pc} - -080089ac : - * (on channel2 path) is used as the input signal. Therefore CCMR1 must be - * protected against un-initialized filter and polarity values. - */ -void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - 80089ac: b480 push {r7} - 80089ae: b087 sub sp, #28 - 80089b0: af00 add r7, sp, #0 - 80089b2: 60f8 str r0, [r7, #12] - 80089b4: 60b9 str r1, [r7, #8] - 80089b6: 607a str r2, [r7, #4] - 80089b8: 603b str r3, [r7, #0] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - 80089ba: 68fb ldr r3, [r7, #12] - 80089bc: 6a1b ldr r3, [r3, #32] - 80089be: f023 0201 bic.w r2, r3, #1 - 80089c2: 68fb ldr r3, [r7, #12] - 80089c4: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 80089c6: 68fb ldr r3, [r7, #12] - 80089c8: 699b ldr r3, [r3, #24] - 80089ca: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 80089cc: 68fb ldr r3, [r7, #12] - 80089ce: 6a1b ldr r3, [r3, #32] - 80089d0: 613b str r3, [r7, #16] - - /* Select the Input */ - if (IS_TIM_CC2_INSTANCE(TIMx) != RESET) - 80089d2: 68fb ldr r3, [r7, #12] - 80089d4: 4a24 ldr r2, [pc, #144] ; (8008a68 ) - 80089d6: 4293 cmp r3, r2 - 80089d8: d013 beq.n 8008a02 - 80089da: 68fb ldr r3, [r7, #12] - 80089dc: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 80089e0: d00f beq.n 8008a02 - 80089e2: 68fb ldr r3, [r7, #12] - 80089e4: 4a21 ldr r2, [pc, #132] ; (8008a6c ) - 80089e6: 4293 cmp r3, r2 - 80089e8: d00b beq.n 8008a02 - 80089ea: 68fb ldr r3, [r7, #12] - 80089ec: 4a20 ldr r2, [pc, #128] ; (8008a70 ) - 80089ee: 4293 cmp r3, r2 - 80089f0: d007 beq.n 8008a02 - 80089f2: 68fb ldr r3, [r7, #12] - 80089f4: 4a1f ldr r2, [pc, #124] ; (8008a74 ) - 80089f6: 4293 cmp r3, r2 - 80089f8: d003 beq.n 8008a02 - 80089fa: 68fb ldr r3, [r7, #12] - 80089fc: 4a1e ldr r2, [pc, #120] ; (8008a78 ) - 80089fe: 4293 cmp r3, r2 - 8008a00: d101 bne.n 8008a06 - 8008a02: 2301 movs r3, #1 - 8008a04: e000 b.n 8008a08 - 8008a06: 2300 movs r3, #0 - 8008a08: 2b00 cmp r3, #0 - 8008a0a: d008 beq.n 8008a1e - { - tmpccmr1 &= ~TIM_CCMR1_CC1S; - 8008a0c: 697b ldr r3, [r7, #20] - 8008a0e: f023 0303 bic.w r3, r3, #3 - 8008a12: 617b str r3, [r7, #20] - tmpccmr1 |= TIM_ICSelection; - 8008a14: 697a ldr r2, [r7, #20] - 8008a16: 687b ldr r3, [r7, #4] - 8008a18: 4313 orrs r3, r2 - 8008a1a: 617b str r3, [r7, #20] - 8008a1c: e003 b.n 8008a26 - } - else - { - tmpccmr1 |= TIM_CCMR1_CC1S_0; - 8008a1e: 697b ldr r3, [r7, #20] - 8008a20: f043 0301 orr.w r3, r3, #1 - 8008a24: 617b str r3, [r7, #20] - } - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8008a26: 697b ldr r3, [r7, #20] - 8008a28: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 8008a2c: 617b str r3, [r7, #20] - tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); - 8008a2e: 683b ldr r3, [r7, #0] - 8008a30: 011b lsls r3, r3, #4 - 8008a32: b2db uxtb r3, r3 - 8008a34: 697a ldr r2, [r7, #20] - 8008a36: 4313 orrs r3, r2 - 8008a38: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 8008a3a: 693b ldr r3, [r7, #16] - 8008a3c: f023 030a bic.w r3, r3, #10 - 8008a40: 613b str r3, [r7, #16] - tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); - 8008a42: 68bb ldr r3, [r7, #8] - 8008a44: f003 030a and.w r3, r3, #10 - 8008a48: 693a ldr r2, [r7, #16] - 8008a4a: 4313 orrs r3, r2 - 8008a4c: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - 8008a4e: 68fb ldr r3, [r7, #12] - 8008a50: 697a ldr r2, [r7, #20] - 8008a52: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 8008a54: 68fb ldr r3, [r7, #12] - 8008a56: 693a ldr r2, [r7, #16] - 8008a58: 621a str r2, [r3, #32] -} - 8008a5a: bf00 nop - 8008a5c: 371c adds r7, #28 - 8008a5e: 46bd mov sp, r7 - 8008a60: f85d 7b04 ldr.w r7, [sp], #4 - 8008a64: 4770 bx lr - 8008a66: bf00 nop - 8008a68: 40012c00 .word 0x40012c00 - 8008a6c: 40000400 .word 0x40000400 - 8008a70: 40000800 .word 0x40000800 - 8008a74: 40013400 .word 0x40013400 - 8008a78: 40014000 .word 0x40014000 - -08008a7c : - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - 8008a7c: b480 push {r7} - 8008a7e: b087 sub sp, #28 - 8008a80: af00 add r7, sp, #0 - 8008a82: 60f8 str r0, [r7, #12] - 8008a84: 60b9 str r1, [r7, #8] - 8008a86: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = TIMx->CCER; - 8008a88: 68fb ldr r3, [r7, #12] - 8008a8a: 6a1b ldr r3, [r3, #32] - 8008a8c: 617b str r3, [r7, #20] - TIMx->CCER &= ~TIM_CCER_CC1E; - 8008a8e: 68fb ldr r3, [r7, #12] - 8008a90: 6a1b ldr r3, [r3, #32] - 8008a92: f023 0201 bic.w r2, r3, #1 - 8008a96: 68fb ldr r3, [r7, #12] - 8008a98: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 8008a9a: 68fb ldr r3, [r7, #12] - 8008a9c: 699b ldr r3, [r3, #24] - 8008a9e: 613b str r3, [r7, #16] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8008aa0: 693b ldr r3, [r7, #16] - 8008aa2: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 8008aa6: 613b str r3, [r7, #16] - tmpccmr1 |= (TIM_ICFilter << 4U); - 8008aa8: 687b ldr r3, [r7, #4] - 8008aaa: 011b lsls r3, r3, #4 - 8008aac: 693a ldr r2, [r7, #16] - 8008aae: 4313 orrs r3, r2 - 8008ab0: 613b str r3, [r7, #16] - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 8008ab2: 697b ldr r3, [r7, #20] - 8008ab4: f023 030a bic.w r3, r3, #10 - 8008ab8: 617b str r3, [r7, #20] - tmpccer |= TIM_ICPolarity; - 8008aba: 697a ldr r2, [r7, #20] - 8008abc: 68bb ldr r3, [r7, #8] - 8008abe: 4313 orrs r3, r2 - 8008ac0: 617b str r3, [r7, #20] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - 8008ac2: 68fb ldr r3, [r7, #12] - 8008ac4: 693a ldr r2, [r7, #16] - 8008ac6: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 8008ac8: 68fb ldr r3, [r7, #12] - 8008aca: 697a ldr r2, [r7, #20] - 8008acc: 621a str r2, [r3, #32] -} - 8008ace: bf00 nop - 8008ad0: 371c adds r7, #28 - 8008ad2: 46bd mov sp, r7 - 8008ad4: f85d 7b04 ldr.w r7, [sp], #4 - 8008ad8: 4770 bx lr - -08008ada : - * (on channel1 path) is used as the input signal. Therefore CCMR1 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - 8008ada: b480 push {r7} - 8008adc: b087 sub sp, #28 - 8008ade: af00 add r7, sp, #0 - 8008ae0: 60f8 str r0, [r7, #12] - 8008ae2: 60b9 str r1, [r7, #8] - 8008ae4: 607a str r2, [r7, #4] - 8008ae6: 603b str r3, [r7, #0] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - 8008ae8: 68fb ldr r3, [r7, #12] - 8008aea: 6a1b ldr r3, [r3, #32] - 8008aec: f023 0210 bic.w r2, r3, #16 - 8008af0: 68fb ldr r3, [r7, #12] - 8008af2: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 8008af4: 68fb ldr r3, [r7, #12] - 8008af6: 699b ldr r3, [r3, #24] - 8008af8: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 8008afa: 68fb ldr r3, [r7, #12] - 8008afc: 6a1b ldr r3, [r3, #32] - 8008afe: 613b str r3, [r7, #16] - - /* Select the Input */ - tmpccmr1 &= ~TIM_CCMR1_CC2S; - 8008b00: 697b ldr r3, [r7, #20] - 8008b02: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8008b06: 617b str r3, [r7, #20] - tmpccmr1 |= (TIM_ICSelection << 8U); - 8008b08: 687b ldr r3, [r7, #4] - 8008b0a: 021b lsls r3, r3, #8 - 8008b0c: 697a ldr r2, [r7, #20] - 8008b0e: 4313 orrs r3, r2 - 8008b10: 617b str r3, [r7, #20] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - 8008b12: 697b ldr r3, [r7, #20] - 8008b14: f423 4370 bic.w r3, r3, #61440 ; 0xf000 - 8008b18: 617b str r3, [r7, #20] - tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F); - 8008b1a: 683b ldr r3, [r7, #0] - 8008b1c: 031b lsls r3, r3, #12 - 8008b1e: b29b uxth r3, r3 - 8008b20: 697a ldr r2, [r7, #20] - 8008b22: 4313 orrs r3, r2 - 8008b24: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 8008b26: 693b ldr r3, [r7, #16] - 8008b28: f023 03a0 bic.w r3, r3, #160 ; 0xa0 - 8008b2c: 613b str r3, [r7, #16] - tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP)); - 8008b2e: 68bb ldr r3, [r7, #8] - 8008b30: 011b lsls r3, r3, #4 - 8008b32: f003 03a0 and.w r3, r3, #160 ; 0xa0 - 8008b36: 693a ldr r2, [r7, #16] - 8008b38: 4313 orrs r3, r2 - 8008b3a: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - 8008b3c: 68fb ldr r3, [r7, #12] - 8008b3e: 697a ldr r2, [r7, #20] - 8008b40: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 8008b42: 68fb ldr r3, [r7, #12] - 8008b44: 693a ldr r2, [r7, #16] - 8008b46: 621a str r2, [r3, #32] -} - 8008b48: bf00 nop - 8008b4a: 371c adds r7, #28 - 8008b4c: 46bd mov sp, r7 - 8008b4e: f85d 7b04 ldr.w r7, [sp], #4 - 8008b52: 4770 bx lr - -08008b54 : - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - 8008b54: b480 push {r7} - 8008b56: b087 sub sp, #28 - 8008b58: af00 add r7, sp, #0 - 8008b5a: 60f8 str r0, [r7, #12] - 8008b5c: 60b9 str r1, [r7, #8] - 8008b5e: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - 8008b60: 68fb ldr r3, [r7, #12] - 8008b62: 6a1b ldr r3, [r3, #32] - 8008b64: f023 0210 bic.w r2, r3, #16 - 8008b68: 68fb ldr r3, [r7, #12] - 8008b6a: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 8008b6c: 68fb ldr r3, [r7, #12] - 8008b6e: 699b ldr r3, [r3, #24] - 8008b70: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 8008b72: 68fb ldr r3, [r7, #12] - 8008b74: 6a1b ldr r3, [r3, #32] - 8008b76: 613b str r3, [r7, #16] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - 8008b78: 697b ldr r3, [r7, #20] - 8008b7a: f423 4370 bic.w r3, r3, #61440 ; 0xf000 - 8008b7e: 617b str r3, [r7, #20] - tmpccmr1 |= (TIM_ICFilter << 12U); - 8008b80: 687b ldr r3, [r7, #4] - 8008b82: 031b lsls r3, r3, #12 - 8008b84: 697a ldr r2, [r7, #20] - 8008b86: 4313 orrs r3, r2 - 8008b88: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 8008b8a: 693b ldr r3, [r7, #16] - 8008b8c: f023 03a0 bic.w r3, r3, #160 ; 0xa0 - 8008b90: 613b str r3, [r7, #16] - tmpccer |= (TIM_ICPolarity << 4U); - 8008b92: 68bb ldr r3, [r7, #8] - 8008b94: 011b lsls r3, r3, #4 - 8008b96: 693a ldr r2, [r7, #16] - 8008b98: 4313 orrs r3, r2 - 8008b9a: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - 8008b9c: 68fb ldr r3, [r7, #12] - 8008b9e: 697a ldr r2, [r7, #20] - 8008ba0: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 8008ba2: 68fb ldr r3, [r7, #12] - 8008ba4: 693a ldr r2, [r7, #16] - 8008ba6: 621a str r2, [r3, #32] -} - 8008ba8: bf00 nop - 8008baa: 371c adds r7, #28 - 8008bac: 46bd mov sp, r7 - 8008bae: f85d 7b04 ldr.w r7, [sp], #4 - 8008bb2: 4770 bx lr - -08008bb4 : - * (on channel1 path) is used as the input signal. Therefore CCMR2 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - 8008bb4: b480 push {r7} - 8008bb6: b087 sub sp, #28 - 8008bb8: af00 add r7, sp, #0 - 8008bba: 60f8 str r0, [r7, #12] - 8008bbc: 60b9 str r1, [r7, #8] - 8008bbe: 607a str r2, [r7, #4] - 8008bc0: 603b str r3, [r7, #0] - uint32_t tmpccmr2; - uint32_t tmpccer; - - /* Disable the Channel 3: Reset the CC3E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - 8008bc2: 68fb ldr r3, [r7, #12] - 8008bc4: 6a1b ldr r3, [r3, #32] - 8008bc6: f423 7280 bic.w r2, r3, #256 ; 0x100 - 8008bca: 68fb ldr r3, [r7, #12] - 8008bcc: 621a str r2, [r3, #32] - tmpccmr2 = TIMx->CCMR2; - 8008bce: 68fb ldr r3, [r7, #12] - 8008bd0: 69db ldr r3, [r3, #28] - 8008bd2: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 8008bd4: 68fb ldr r3, [r7, #12] - 8008bd6: 6a1b ldr r3, [r3, #32] - 8008bd8: 613b str r3, [r7, #16] - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC3S; - 8008bda: 697b ldr r3, [r7, #20] - 8008bdc: f023 0303 bic.w r3, r3, #3 - 8008be0: 617b str r3, [r7, #20] - tmpccmr2 |= TIM_ICSelection; - 8008be2: 697a ldr r2, [r7, #20] - 8008be4: 687b ldr r3, [r7, #4] - 8008be6: 4313 orrs r3, r2 - 8008be8: 617b str r3, [r7, #20] - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC3F; - 8008bea: 697b ldr r3, [r7, #20] - 8008bec: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 8008bf0: 617b str r3, [r7, #20] - tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F); - 8008bf2: 683b ldr r3, [r7, #0] - 8008bf4: 011b lsls r3, r3, #4 - 8008bf6: b2db uxtb r3, r3 - 8008bf8: 697a ldr r2, [r7, #20] - 8008bfa: 4313 orrs r3, r2 - 8008bfc: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC3E Bit */ - tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP); - 8008bfe: 693b ldr r3, [r7, #16] - 8008c00: f423 6320 bic.w r3, r3, #2560 ; 0xa00 - 8008c04: 613b str r3, [r7, #16] - tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP)); - 8008c06: 68bb ldr r3, [r7, #8] - 8008c08: 021b lsls r3, r3, #8 - 8008c0a: f403 6320 and.w r3, r3, #2560 ; 0xa00 - 8008c0e: 693a ldr r2, [r7, #16] - 8008c10: 4313 orrs r3, r2 - 8008c12: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - 8008c14: 68fb ldr r3, [r7, #12] - 8008c16: 697a ldr r2, [r7, #20] - 8008c18: 61da str r2, [r3, #28] - TIMx->CCER = tmpccer; - 8008c1a: 68fb ldr r3, [r7, #12] - 8008c1c: 693a ldr r2, [r7, #16] - 8008c1e: 621a str r2, [r3, #32] -} - 8008c20: bf00 nop - 8008c22: 371c adds r7, #28 - 8008c24: 46bd mov sp, r7 - 8008c26: f85d 7b04 ldr.w r7, [sp], #4 - 8008c2a: 4770 bx lr - -08008c2c : - * protected against un-initialized filter and polarity values. - * @retval None - */ -static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - 8008c2c: b480 push {r7} - 8008c2e: b087 sub sp, #28 - 8008c30: af00 add r7, sp, #0 - 8008c32: 60f8 str r0, [r7, #12] - 8008c34: 60b9 str r1, [r7, #8] - 8008c36: 607a str r2, [r7, #4] - 8008c38: 603b str r3, [r7, #0] - uint32_t tmpccmr2; - uint32_t tmpccer; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - 8008c3a: 68fb ldr r3, [r7, #12] - 8008c3c: 6a1b ldr r3, [r3, #32] - 8008c3e: f423 5280 bic.w r2, r3, #4096 ; 0x1000 - 8008c42: 68fb ldr r3, [r7, #12] - 8008c44: 621a str r2, [r3, #32] - tmpccmr2 = TIMx->CCMR2; - 8008c46: 68fb ldr r3, [r7, #12] - 8008c48: 69db ldr r3, [r3, #28] - 8008c4a: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 8008c4c: 68fb ldr r3, [r7, #12] - 8008c4e: 6a1b ldr r3, [r3, #32] - 8008c50: 613b str r3, [r7, #16] - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC4S; - 8008c52: 697b ldr r3, [r7, #20] - 8008c54: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8008c58: 617b str r3, [r7, #20] - tmpccmr2 |= (TIM_ICSelection << 8U); - 8008c5a: 687b ldr r3, [r7, #4] - 8008c5c: 021b lsls r3, r3, #8 - 8008c5e: 697a ldr r2, [r7, #20] - 8008c60: 4313 orrs r3, r2 - 8008c62: 617b str r3, [r7, #20] - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC4F; - 8008c64: 697b ldr r3, [r7, #20] - 8008c66: f423 4370 bic.w r3, r3, #61440 ; 0xf000 - 8008c6a: 617b str r3, [r7, #20] - tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F); - 8008c6c: 683b ldr r3, [r7, #0] - 8008c6e: 031b lsls r3, r3, #12 - 8008c70: b29b uxth r3, r3 - 8008c72: 697a ldr r2, [r7, #20] - 8008c74: 4313 orrs r3, r2 - 8008c76: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC4E Bit */ - tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP); - 8008c78: 693b ldr r3, [r7, #16] - 8008c7a: f423 4320 bic.w r3, r3, #40960 ; 0xa000 - 8008c7e: 613b str r3, [r7, #16] - tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP)); - 8008c80: 68bb ldr r3, [r7, #8] - 8008c82: 031b lsls r3, r3, #12 - 8008c84: f403 4320 and.w r3, r3, #40960 ; 0xa000 - 8008c88: 693a ldr r2, [r7, #16] - 8008c8a: 4313 orrs r3, r2 - 8008c8c: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - 8008c8e: 68fb ldr r3, [r7, #12] - 8008c90: 697a ldr r2, [r7, #20] - 8008c92: 61da str r2, [r3, #28] - TIMx->CCER = tmpccer ; - 8008c94: 68fb ldr r3, [r7, #12] - 8008c96: 693a ldr r2, [r7, #16] - 8008c98: 621a str r2, [r3, #32] -} - 8008c9a: bf00 nop - 8008c9c: 371c adds r7, #28 - 8008c9e: 46bd mov sp, r7 - 8008ca0: f85d 7b04 ldr.w r7, [sp], #4 - 8008ca4: 4770 bx lr - -08008ca6 : - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) -{ - 8008ca6: b480 push {r7} - 8008ca8: b087 sub sp, #28 - 8008caa: af00 add r7, sp, #0 - 8008cac: 60f8 str r0, [r7, #12] - 8008cae: 60b9 str r1, [r7, #8] - 8008cb0: 607a str r2, [r7, #4] - 8008cb2: 603b str r3, [r7, #0] - uint32_t tmpsmcr; - - tmpsmcr = TIMx->SMCR; - 8008cb4: 68fb ldr r3, [r7, #12] - 8008cb6: 689b ldr r3, [r3, #8] - 8008cb8: 617b str r3, [r7, #20] - - /* Reset the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8008cba: 697b ldr r3, [r7, #20] - 8008cbc: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 8008cc0: 617b str r3, [r7, #20] - - /* Set the Prescaler, the Filter value and the Polarity */ - tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 8008cc2: 683b ldr r3, [r7, #0] - 8008cc4: 021a lsls r2, r3, #8 - 8008cc6: 687b ldr r3, [r7, #4] - 8008cc8: 431a orrs r2, r3 - 8008cca: 68bb ldr r3, [r7, #8] - 8008ccc: 4313 orrs r3, r2 - 8008cce: 697a ldr r2, [r7, #20] - 8008cd0: 4313 orrs r3, r2 - 8008cd2: 617b str r3, [r7, #20] - - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - 8008cd4: 68fb ldr r3, [r7, #12] - 8008cd6: 697a ldr r2, [r7, #20] - 8008cd8: 609a str r2, [r3, #8] -} - 8008cda: bf00 nop - 8008cdc: 371c adds r7, #28 - 8008cde: 46bd mov sp, r7 - 8008ce0: f85d 7b04 ldr.w r7, [sp], #4 - 8008ce4: 4770 bx lr - -08008ce6 : - * @param ChannelState specifies the TIM Channel CCxE bit new state. - * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. - * @retval None - */ -void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) -{ - 8008ce6: b480 push {r7} - 8008ce8: b087 sub sp, #28 - 8008cea: af00 add r7, sp, #0 - 8008cec: 60f8 str r0, [r7, #12] - 8008cee: 60b9 str r1, [r7, #8] - 8008cf0: 607a str r2, [r7, #4] - - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(TIMx)); - assert_param(IS_TIM_CHANNELS(Channel)); - - tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ - 8008cf2: 68bb ldr r3, [r7, #8] - 8008cf4: f003 031f and.w r3, r3, #31 - 8008cf8: 2201 movs r2, #1 - 8008cfa: fa02 f303 lsl.w r3, r2, r3 - 8008cfe: 617b str r3, [r7, #20] - - /* Reset the CCxE Bit */ - TIMx->CCER &= ~tmp; - 8008d00: 68fb ldr r3, [r7, #12] - 8008d02: 6a1a ldr r2, [r3, #32] - 8008d04: 697b ldr r3, [r7, #20] - 8008d06: 43db mvns r3, r3 - 8008d08: 401a ands r2, r3 - 8008d0a: 68fb ldr r3, [r7, #12] - 8008d0c: 621a str r2, [r3, #32] - - /* Set or reset the CCxE Bit */ - TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 8008d0e: 68fb ldr r3, [r7, #12] - 8008d10: 6a1a ldr r2, [r3, #32] - 8008d12: 68bb ldr r3, [r7, #8] - 8008d14: f003 031f and.w r3, r3, #31 - 8008d18: 6879 ldr r1, [r7, #4] - 8008d1a: fa01 f303 lsl.w r3, r1, r3 - 8008d1e: 431a orrs r2, r3 - 8008d20: 68fb ldr r3, [r7, #12] - 8008d22: 621a str r2, [r3, #32] -} - 8008d24: bf00 nop - 8008d26: 371c adds r7, #28 - 8008d28: 46bd mov sp, r7 - 8008d2a: f85d 7b04 ldr.w r7, [sp], #4 - 8008d2e: 4770 bx lr - -08008d30 : - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - 8008d30: b580 push {r7, lr} - 8008d32: b084 sub sp, #16 - 8008d34: af00 add r7, sp, #0 - 8008d36: 6078 str r0, [r7, #4] - 8008d38: 6039 str r1, [r7, #0] - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - 8008d3a: 687b ldr r3, [r7, #4] - 8008d3c: 681b ldr r3, [r3, #0] - 8008d3e: 2204 movs r2, #4 - 8008d40: 6839 ldr r1, [r7, #0] - 8008d42: 4618 mov r0, r3 - 8008d44: f000 f940 bl 8008fc8 - - /* Enable the Main Output */ - __HAL_TIM_MOE_ENABLE(htim); - 8008d48: 687b ldr r3, [r7, #4] - 8008d4a: 681b ldr r3, [r3, #0] - 8008d4c: 6c5a ldr r2, [r3, #68] ; 0x44 - 8008d4e: 687b ldr r3, [r7, #4] - 8008d50: 681b ldr r3, [r3, #0] - 8008d52: f442 4200 orr.w r2, r2, #32768 ; 0x8000 - 8008d56: 645a str r2, [r3, #68] ; 0x44 - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8008d58: 687b ldr r3, [r7, #4] - 8008d5a: 681b ldr r3, [r3, #0] - 8008d5c: 689a ldr r2, [r3, #8] - 8008d5e: 4b0b ldr r3, [pc, #44] ; (8008d8c ) - 8008d60: 4013 ands r3, r2 - 8008d62: 60fb str r3, [r7, #12] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8008d64: 68fb ldr r3, [r7, #12] - 8008d66: 2b06 cmp r3, #6 - 8008d68: d00b beq.n 8008d82 - 8008d6a: 68fb ldr r3, [r7, #12] - 8008d6c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8008d70: d007 beq.n 8008d82 - { - __HAL_TIM_ENABLE(htim); - 8008d72: 687b ldr r3, [r7, #4] - 8008d74: 681b ldr r3, [r3, #0] - 8008d76: 681a ldr r2, [r3, #0] - 8008d78: 687b ldr r3, [r7, #4] - 8008d7a: 681b ldr r3, [r3, #0] - 8008d7c: f042 0201 orr.w r2, r2, #1 - 8008d80: 601a str r2, [r3, #0] - } - - /* Return function status */ - return HAL_OK; - 8008d82: 2300 movs r3, #0 -} - 8008d84: 4618 mov r0, r3 - 8008d86: 3710 adds r7, #16 - 8008d88: 46bd mov sp, r7 - 8008d8a: bd80 pop {r7, pc} - 8008d8c: 00010007 .word 0x00010007 - -08008d90 : - * mode. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, - TIM_MasterConfigTypeDef *sMasterConfig) -{ - 8008d90: b480 push {r7} - 8008d92: b085 sub sp, #20 - 8008d94: af00 add r7, sp, #0 - 8008d96: 6078 str r0, [r7, #4] - 8008d98: 6039 str r1, [r7, #0] - assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); - assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); - - /* Check input state */ - __HAL_LOCK(htim); - 8008d9a: 687b ldr r3, [r7, #4] - 8008d9c: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8008da0: 2b01 cmp r3, #1 - 8008da2: d101 bne.n 8008da8 - 8008da4: 2302 movs r3, #2 - 8008da6: e063 b.n 8008e70 - 8008da8: 687b ldr r3, [r7, #4] - 8008daa: 2201 movs r2, #1 - 8008dac: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Change the handler state */ - htim->State = HAL_TIM_STATE_BUSY; - 8008db0: 687b ldr r3, [r7, #4] - 8008db2: 2202 movs r2, #2 - 8008db4: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - 8008db8: 687b ldr r3, [r7, #4] - 8008dba: 681b ldr r3, [r3, #0] - 8008dbc: 685b ldr r3, [r3, #4] - 8008dbe: 60fb str r3, [r7, #12] - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - 8008dc0: 687b ldr r3, [r7, #4] - 8008dc2: 681b ldr r3, [r3, #0] - 8008dc4: 689b ldr r3, [r3, #8] - 8008dc6: 60bb str r3, [r7, #8] - -#if defined(TIM_CR2_MMS2) - /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ - if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - 8008dc8: 687b ldr r3, [r7, #4] - 8008dca: 681b ldr r3, [r3, #0] - 8008dcc: 4a2b ldr r2, [pc, #172] ; (8008e7c ) - 8008dce: 4293 cmp r3, r2 - 8008dd0: d004 beq.n 8008ddc - 8008dd2: 687b ldr r3, [r7, #4] - 8008dd4: 681b ldr r3, [r3, #0] - 8008dd6: 4a2a ldr r2, [pc, #168] ; (8008e80 ) - 8008dd8: 4293 cmp r3, r2 - 8008dda: d108 bne.n 8008dee - { - /* Check the parameters */ - assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); - - /* Clear the MMS2 bits */ - tmpcr2 &= ~TIM_CR2_MMS2; - 8008ddc: 68fb ldr r3, [r7, #12] - 8008dde: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 - 8008de2: 60fb str r3, [r7, #12] - /* Select the TRGO2 source*/ - tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - 8008de4: 683b ldr r3, [r7, #0] - 8008de6: 685b ldr r3, [r3, #4] - 8008de8: 68fa ldr r2, [r7, #12] - 8008dea: 4313 orrs r3, r2 - 8008dec: 60fb str r3, [r7, #12] - } -#endif /* TIM_CR2_MMS2 */ - - /* Reset the MMS Bits */ - tmpcr2 &= ~TIM_CR2_MMS; - 8008dee: 68fb ldr r3, [r7, #12] - 8008df0: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8008df4: 60fb str r3, [r7, #12] - /* Select the TRGO source */ - tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 8008df6: 683b ldr r3, [r7, #0] - 8008df8: 681b ldr r3, [r3, #0] - 8008dfa: 68fa ldr r2, [r7, #12] - 8008dfc: 4313 orrs r3, r2 - 8008dfe: 60fb str r3, [r7, #12] - - /* Update TIMx CR2 */ - htim->Instance->CR2 = tmpcr2; - 8008e00: 687b ldr r3, [r7, #4] - 8008e02: 681b ldr r3, [r3, #0] - 8008e04: 68fa ldr r2, [r7, #12] - 8008e06: 605a str r2, [r3, #4] - - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8008e08: 687b ldr r3, [r7, #4] - 8008e0a: 681b ldr r3, [r3, #0] - 8008e0c: 4a1b ldr r2, [pc, #108] ; (8008e7c ) - 8008e0e: 4293 cmp r3, r2 - 8008e10: d018 beq.n 8008e44 - 8008e12: 687b ldr r3, [r7, #4] - 8008e14: 681b ldr r3, [r3, #0] - 8008e16: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8008e1a: d013 beq.n 8008e44 - 8008e1c: 687b ldr r3, [r7, #4] - 8008e1e: 681b ldr r3, [r3, #0] - 8008e20: 4a18 ldr r2, [pc, #96] ; (8008e84 ) - 8008e22: 4293 cmp r3, r2 - 8008e24: d00e beq.n 8008e44 - 8008e26: 687b ldr r3, [r7, #4] - 8008e28: 681b ldr r3, [r3, #0] - 8008e2a: 4a17 ldr r2, [pc, #92] ; (8008e88 ) - 8008e2c: 4293 cmp r3, r2 - 8008e2e: d009 beq.n 8008e44 - 8008e30: 687b ldr r3, [r7, #4] - 8008e32: 681b ldr r3, [r3, #0] - 8008e34: 4a12 ldr r2, [pc, #72] ; (8008e80 ) - 8008e36: 4293 cmp r3, r2 - 8008e38: d004 beq.n 8008e44 - 8008e3a: 687b ldr r3, [r7, #4] - 8008e3c: 681b ldr r3, [r3, #0] - 8008e3e: 4a13 ldr r2, [pc, #76] ; (8008e8c ) - 8008e40: 4293 cmp r3, r2 - 8008e42: d10c bne.n 8008e5e - { - /* Reset the MSM Bit */ - tmpsmcr &= ~TIM_SMCR_MSM; - 8008e44: 68bb ldr r3, [r7, #8] - 8008e46: f023 0380 bic.w r3, r3, #128 ; 0x80 - 8008e4a: 60bb str r3, [r7, #8] - /* Set master mode */ - tmpsmcr |= sMasterConfig->MasterSlaveMode; - 8008e4c: 683b ldr r3, [r7, #0] - 8008e4e: 689b ldr r3, [r3, #8] - 8008e50: 68ba ldr r2, [r7, #8] - 8008e52: 4313 orrs r3, r2 - 8008e54: 60bb str r3, [r7, #8] - - /* Update TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - 8008e56: 687b ldr r3, [r7, #4] - 8008e58: 681b ldr r3, [r3, #0] - 8008e5a: 68ba ldr r2, [r7, #8] - 8008e5c: 609a str r2, [r3, #8] - } - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - 8008e5e: 687b ldr r3, [r7, #4] - 8008e60: 2201 movs r2, #1 - 8008e62: f883 203d strb.w r2, [r3, #61] ; 0x3d - - __HAL_UNLOCK(htim); - 8008e66: 687b ldr r3, [r7, #4] - 8008e68: 2200 movs r2, #0 - 8008e6a: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_OK; - 8008e6e: 2300 movs r3, #0 -} - 8008e70: 4618 mov r0, r3 - 8008e72: 3714 adds r7, #20 - 8008e74: 46bd mov sp, r7 - 8008e76: f85d 7b04 ldr.w r7, [sp], #4 - 8008e7a: 4770 bx lr - 8008e7c: 40012c00 .word 0x40012c00 - 8008e80: 40013400 .word 0x40013400 - 8008e84: 40000400 .word 0x40000400 - 8008e88: 40000800 .word 0x40000800 - 8008e8c: 40014000 .word 0x40014000 - -08008e90 : - * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, - TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) -{ - 8008e90: b480 push {r7} - 8008e92: b085 sub sp, #20 - 8008e94: af00 add r7, sp, #0 - 8008e96: 6078 str r0, [r7, #4] - 8008e98: 6039 str r1, [r7, #0] - /* Keep this variable initialized to 0 as it is used to configure BDTR register */ - uint32_t tmpbdtr = 0U; - 8008e9a: 2300 movs r3, #0 - 8008e9c: 60fb str r3, [r7, #12] - assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); -#endif /* TIM_BDTR_BKF */ - assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); - - /* Check input state */ - __HAL_LOCK(htim); - 8008e9e: 687b ldr r3, [r7, #4] - 8008ea0: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8008ea4: 2b01 cmp r3, #1 - 8008ea6: d101 bne.n 8008eac - 8008ea8: 2302 movs r3, #2 - 8008eaa: e065 b.n 8008f78 - 8008eac: 687b ldr r3, [r7, #4] - 8008eae: 2201 movs r2, #1 - 8008eb0: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, - the OSSI State, the dead time value and the Automatic Output Enable Bit */ - - /* Set the BDTR bits */ - MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); - 8008eb4: 68fb ldr r3, [r7, #12] - 8008eb6: f023 02ff bic.w r2, r3, #255 ; 0xff - 8008eba: 683b ldr r3, [r7, #0] - 8008ebc: 68db ldr r3, [r3, #12] - 8008ebe: 4313 orrs r3, r2 - 8008ec0: 60fb str r3, [r7, #12] - MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); - 8008ec2: 68fb ldr r3, [r7, #12] - 8008ec4: f423 7240 bic.w r2, r3, #768 ; 0x300 - 8008ec8: 683b ldr r3, [r7, #0] - 8008eca: 689b ldr r3, [r3, #8] - 8008ecc: 4313 orrs r3, r2 - 8008ece: 60fb str r3, [r7, #12] - MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); - 8008ed0: 68fb ldr r3, [r7, #12] - 8008ed2: f423 6280 bic.w r2, r3, #1024 ; 0x400 - 8008ed6: 683b ldr r3, [r7, #0] - 8008ed8: 685b ldr r3, [r3, #4] - 8008eda: 4313 orrs r3, r2 - 8008edc: 60fb str r3, [r7, #12] - MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); - 8008ede: 68fb ldr r3, [r7, #12] - 8008ee0: f423 6200 bic.w r2, r3, #2048 ; 0x800 - 8008ee4: 683b ldr r3, [r7, #0] - 8008ee6: 681b ldr r3, [r3, #0] - 8008ee8: 4313 orrs r3, r2 - 8008eea: 60fb str r3, [r7, #12] - MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); - 8008eec: 68fb ldr r3, [r7, #12] - 8008eee: f423 5280 bic.w r2, r3, #4096 ; 0x1000 - 8008ef2: 683b ldr r3, [r7, #0] - 8008ef4: 691b ldr r3, [r3, #16] - 8008ef6: 4313 orrs r3, r2 - 8008ef8: 60fb str r3, [r7, #12] - MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); - 8008efa: 68fb ldr r3, [r7, #12] - 8008efc: f423 5200 bic.w r2, r3, #8192 ; 0x2000 - 8008f00: 683b ldr r3, [r7, #0] - 8008f02: 695b ldr r3, [r3, #20] - 8008f04: 4313 orrs r3, r2 - 8008f06: 60fb str r3, [r7, #12] - MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); - 8008f08: 68fb ldr r3, [r7, #12] - 8008f0a: f423 4280 bic.w r2, r3, #16384 ; 0x4000 - 8008f0e: 683b ldr r3, [r7, #0] - 8008f10: 6a9b ldr r3, [r3, #40] ; 0x28 - 8008f12: 4313 orrs r3, r2 - 8008f14: 60fb str r3, [r7, #12] -#if defined(TIM_BDTR_BKF) - MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); - 8008f16: 68fb ldr r3, [r7, #12] - 8008f18: f423 2270 bic.w r2, r3, #983040 ; 0xf0000 - 8008f1c: 683b ldr r3, [r7, #0] - 8008f1e: 699b ldr r3, [r3, #24] - 8008f20: 041b lsls r3, r3, #16 - 8008f22: 4313 orrs r3, r2 - 8008f24: 60fb str r3, [r7, #12] -#endif /* TIM_BDTR_BKF */ - -#if defined(TIM_BDTR_BK2E) - if (IS_TIM_BKIN2_INSTANCE(htim->Instance)) - 8008f26: 687b ldr r3, [r7, #4] - 8008f28: 681b ldr r3, [r3, #0] - 8008f2a: 4a16 ldr r2, [pc, #88] ; (8008f84 ) - 8008f2c: 4293 cmp r3, r2 - 8008f2e: d004 beq.n 8008f3a - 8008f30: 687b ldr r3, [r7, #4] - 8008f32: 681b ldr r3, [r3, #0] - 8008f34: 4a14 ldr r2, [pc, #80] ; (8008f88 ) - 8008f36: 4293 cmp r3, r2 - 8008f38: d115 bne.n 8008f66 - assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State)); - assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); - assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); - - /* Set the BREAK2 input related BDTR bits */ - MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos)); - 8008f3a: 68fb ldr r3, [r7, #12] - 8008f3c: f423 0270 bic.w r2, r3, #15728640 ; 0xf00000 - 8008f40: 683b ldr r3, [r7, #0] - 8008f42: 6a5b ldr r3, [r3, #36] ; 0x24 - 8008f44: 051b lsls r3, r3, #20 - 8008f46: 4313 orrs r3, r2 - 8008f48: 60fb str r3, [r7, #12] - MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State); - 8008f4a: 68fb ldr r3, [r7, #12] - 8008f4c: f023 7280 bic.w r2, r3, #16777216 ; 0x1000000 - 8008f50: 683b ldr r3, [r7, #0] - 8008f52: 69db ldr r3, [r3, #28] - 8008f54: 4313 orrs r3, r2 - 8008f56: 60fb str r3, [r7, #12] - MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity); - 8008f58: 68fb ldr r3, [r7, #12] - 8008f5a: f023 7200 bic.w r2, r3, #33554432 ; 0x2000000 - 8008f5e: 683b ldr r3, [r7, #0] - 8008f60: 6a1b ldr r3, [r3, #32] - 8008f62: 4313 orrs r3, r2 - 8008f64: 60fb str r3, [r7, #12] - } -#endif /* TIM_BDTR_BK2E */ - - /* Set TIMx_BDTR */ - htim->Instance->BDTR = tmpbdtr; - 8008f66: 687b ldr r3, [r7, #4] - 8008f68: 681b ldr r3, [r3, #0] - 8008f6a: 68fa ldr r2, [r7, #12] - 8008f6c: 645a str r2, [r3, #68] ; 0x44 - - __HAL_UNLOCK(htim); - 8008f6e: 687b ldr r3, [r7, #4] - 8008f70: 2200 movs r2, #0 - 8008f72: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_OK; - 8008f76: 2300 movs r3, #0 -} - 8008f78: 4618 mov r0, r3 - 8008f7a: 3714 adds r7, #20 - 8008f7c: 46bd mov sp, r7 - 8008f7e: f85d 7b04 ldr.w r7, [sp], #4 - 8008f82: 4770 bx lr - 8008f84: 40012c00 .word 0x40012c00 - 8008f88: 40013400 .word 0x40013400 - -08008f8c : - * @brief Hall commutation changed callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) -{ - 8008f8c: b480 push {r7} - 8008f8e: b083 sub sp, #12 - 8008f90: af00 add r7, sp, #0 - 8008f92: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_CommutCallback could be implemented in the user file - */ -} - 8008f94: bf00 nop - 8008f96: 370c adds r7, #12 - 8008f98: 46bd mov sp, r7 - 8008f9a: f85d 7b04 ldr.w r7, [sp], #4 - 8008f9e: 4770 bx lr - -08008fa0 : - * @brief Hall Break detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) -{ - 8008fa0: b480 push {r7} - 8008fa2: b083 sub sp, #12 - 8008fa4: af00 add r7, sp, #0 - 8008fa6: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_BreakCallback could be implemented in the user file - */ -} - 8008fa8: bf00 nop - 8008faa: 370c adds r7, #12 - 8008fac: 46bd mov sp, r7 - 8008fae: f85d 7b04 ldr.w r7, [sp], #4 - 8008fb2: 4770 bx lr - -08008fb4 : - * @brief Hall Break2 detection callback in non blocking mode - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) -{ - 8008fb4: b480 push {r7} - 8008fb6: b083 sub sp, #12 - 8008fb8: af00 add r7, sp, #0 - 8008fba: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function Should not be modified, when the callback is needed, - the HAL_TIMEx_Break2Callback could be implemented in the user file - */ -} - 8008fbc: bf00 nop - 8008fbe: 370c adds r7, #12 - 8008fc0: 46bd mov sp, r7 - 8008fc2: f85d 7b04 ldr.w r7, [sp], #4 - 8008fc6: 4770 bx lr - -08008fc8 : - * @param ChannelNState specifies the TIM Channel CCxNE bit new state. - * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. - * @retval None - */ -static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState) -{ - 8008fc8: b480 push {r7} - 8008fca: b087 sub sp, #28 - 8008fcc: af00 add r7, sp, #0 - 8008fce: 60f8 str r0, [r7, #12] - 8008fd0: 60b9 str r1, [r7, #8] - 8008fd2: 607a str r2, [r7, #4] - uint32_t tmp; - - tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ - 8008fd4: 68bb ldr r3, [r7, #8] - 8008fd6: f003 031f and.w r3, r3, #31 - 8008fda: 2204 movs r2, #4 - 8008fdc: fa02 f303 lsl.w r3, r2, r3 - 8008fe0: 617b str r3, [r7, #20] - - /* Reset the CCxNE Bit */ - TIMx->CCER &= ~tmp; - 8008fe2: 68fb ldr r3, [r7, #12] - 8008fe4: 6a1a ldr r2, [r3, #32] - 8008fe6: 697b ldr r3, [r7, #20] - 8008fe8: 43db mvns r3, r3 - 8008fea: 401a ands r2, r3 - 8008fec: 68fb ldr r3, [r7, #12] - 8008fee: 621a str r2, [r3, #32] - - /* Set or reset the CCxNE Bit */ - TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 8008ff0: 68fb ldr r3, [r7, #12] - 8008ff2: 6a1a ldr r2, [r3, #32] - 8008ff4: 68bb ldr r3, [r7, #8] - 8008ff6: f003 031f and.w r3, r3, #31 - 8008ffa: 6879 ldr r1, [r7, #4] - 8008ffc: fa01 f303 lsl.w r3, r1, r3 - 8009000: 431a orrs r2, r3 - 8009002: 68fb ldr r3, [r7, #12] - 8009004: 621a str r2, [r3, #32] -} - 8009006: bf00 nop - 8009008: 371c adds r7, #28 - 800900a: 46bd mov sp, r7 - 800900c: f85d 7b04 ldr.w r7, [sp], #4 - 8009010: 4770 bx lr - -08009012 : - * parameters in the UART_InitTypeDef and initialize the associated handle. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) -{ - 8009012: b580 push {r7, lr} - 8009014: b082 sub sp, #8 - 8009016: af00 add r7, sp, #0 - 8009018: 6078 str r0, [r7, #4] - /* Check the UART handle allocation */ - if (huart == NULL) - 800901a: 687b ldr r3, [r7, #4] - 800901c: 2b00 cmp r3, #0 - 800901e: d101 bne.n 8009024 - { - return HAL_ERROR; - 8009020: 2301 movs r3, #1 - 8009022: e040 b.n 80090a6 - { - /* Check the parameters */ - assert_param(IS_UART_INSTANCE(huart->Instance)); - } - - if (huart->gState == HAL_UART_STATE_RESET) - 8009024: 687b ldr r3, [r7, #4] - 8009026: 6f5b ldr r3, [r3, #116] ; 0x74 - 8009028: 2b00 cmp r3, #0 - 800902a: d106 bne.n 800903a - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - 800902c: 687b ldr r3, [r7, #4] - 800902e: 2200 movs r2, #0 - 8009030: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - /* Init the low level hardware */ - huart->MspInitCallback(huart); -#else - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - 8009034: 6878 ldr r0, [r7, #4] - 8009036: f7f9 fd6d bl 8002b14 -#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ - } - - huart->gState = HAL_UART_STATE_BUSY; - 800903a: 687b ldr r3, [r7, #4] - 800903c: 2224 movs r2, #36 ; 0x24 - 800903e: 675a str r2, [r3, #116] ; 0x74 - - __HAL_UART_DISABLE(huart); - 8009040: 687b ldr r3, [r7, #4] - 8009042: 681b ldr r3, [r3, #0] - 8009044: 681a ldr r2, [r3, #0] - 8009046: 687b ldr r3, [r7, #4] - 8009048: 681b ldr r3, [r3, #0] - 800904a: f022 0201 bic.w r2, r2, #1 - 800904e: 601a str r2, [r3, #0] - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - 8009050: 6878 ldr r0, [r7, #4] - 8009052: f000 f8bf bl 80091d4 - 8009056: 4603 mov r3, r0 - 8009058: 2b01 cmp r3, #1 - 800905a: d101 bne.n 8009060 - { - return HAL_ERROR; - 800905c: 2301 movs r3, #1 - 800905e: e022 b.n 80090a6 - } - - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 8009060: 687b ldr r3, [r7, #4] - 8009062: 6a5b ldr r3, [r3, #36] ; 0x24 - 8009064: 2b00 cmp r3, #0 - 8009066: d002 beq.n 800906e - { - UART_AdvFeatureConfig(huart); - 8009068: 6878 ldr r0, [r7, #4] - 800906a: f000 facd bl 8009608 - } - - /* In asynchronous mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 800906e: 687b ldr r3, [r7, #4] - 8009070: 681b ldr r3, [r3, #0] - 8009072: 685a ldr r2, [r3, #4] - 8009074: 687b ldr r3, [r7, #4] - 8009076: 681b ldr r3, [r3, #0] - 8009078: f422 4290 bic.w r2, r2, #18432 ; 0x4800 - 800907c: 605a str r2, [r3, #4] - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 800907e: 687b ldr r3, [r7, #4] - 8009080: 681b ldr r3, [r3, #0] - 8009082: 689a ldr r2, [r3, #8] - 8009084: 687b ldr r3, [r7, #4] - 8009086: 681b ldr r3, [r3, #0] - 8009088: f022 022a bic.w r2, r2, #42 ; 0x2a - 800908c: 609a str r2, [r3, #8] - - __HAL_UART_ENABLE(huart); - 800908e: 687b ldr r3, [r7, #4] - 8009090: 681b ldr r3, [r3, #0] - 8009092: 681a ldr r2, [r3, #0] - 8009094: 687b ldr r3, [r7, #4] - 8009096: 681b ldr r3, [r3, #0] - 8009098: f042 0201 orr.w r2, r2, #1 - 800909c: 601a str r2, [r3, #0] - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); - 800909e: 6878 ldr r0, [r7, #4] - 80090a0: f000 fb54 bl 800974c - 80090a4: 4603 mov r3, r0 -} - 80090a6: 4618 mov r0, r3 - 80090a8: 3708 adds r7, #8 - 80090aa: 46bd mov sp, r7 - 80090ac: bd80 pop {r7, pc} - -080090ae : - * @param Size Amount of data elements (u8 or u16) to be sent. - * @param Timeout Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - 80090ae: b580 push {r7, lr} - 80090b0: b08a sub sp, #40 ; 0x28 - 80090b2: af02 add r7, sp, #8 - 80090b4: 60f8 str r0, [r7, #12] - 80090b6: 60b9 str r1, [r7, #8] - 80090b8: 603b str r3, [r7, #0] - 80090ba: 4613 mov r3, r2 - 80090bc: 80fb strh r3, [r7, #6] - uint8_t *pdata8bits; - uint16_t *pdata16bits; - uint32_t tickstart; - - /* Check that a Tx process is not already ongoing */ - if (huart->gState == HAL_UART_STATE_READY) - 80090be: 68fb ldr r3, [r7, #12] - 80090c0: 6f5b ldr r3, [r3, #116] ; 0x74 - 80090c2: 2b20 cmp r3, #32 - 80090c4: f040 8081 bne.w 80091ca - { - if ((pData == NULL) || (Size == 0U)) - 80090c8: 68bb ldr r3, [r7, #8] - 80090ca: 2b00 cmp r3, #0 - 80090cc: d002 beq.n 80090d4 - 80090ce: 88fb ldrh r3, [r7, #6] - 80090d0: 2b00 cmp r3, #0 - 80090d2: d101 bne.n 80090d8 - { - return HAL_ERROR; - 80090d4: 2301 movs r3, #1 - 80090d6: e079 b.n 80091cc - } - - __HAL_LOCK(huart); - 80090d8: 68fb ldr r3, [r7, #12] - 80090da: f893 3070 ldrb.w r3, [r3, #112] ; 0x70 - 80090de: 2b01 cmp r3, #1 - 80090e0: d101 bne.n 80090e6 - 80090e2: 2302 movs r3, #2 - 80090e4: e072 b.n 80091cc - 80090e6: 68fb ldr r3, [r7, #12] - 80090e8: 2201 movs r2, #1 - 80090ea: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - huart->ErrorCode = HAL_UART_ERROR_NONE; - 80090ee: 68fb ldr r3, [r7, #12] - 80090f0: 2200 movs r2, #0 - 80090f2: 67da str r2, [r3, #124] ; 0x7c - huart->gState = HAL_UART_STATE_BUSY_TX; - 80090f4: 68fb ldr r3, [r7, #12] - 80090f6: 2221 movs r2, #33 ; 0x21 - 80090f8: 675a str r2, [r3, #116] ; 0x74 - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - 80090fa: f7f9 ff27 bl 8002f4c - 80090fe: 6178 str r0, [r7, #20] - - huart->TxXferSize = Size; - 8009100: 68fb ldr r3, [r7, #12] - 8009102: 88fa ldrh r2, [r7, #6] - 8009104: f8a3 2050 strh.w r2, [r3, #80] ; 0x50 - huart->TxXferCount = Size; - 8009108: 68fb ldr r3, [r7, #12] - 800910a: 88fa ldrh r2, [r7, #6] - 800910c: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 - - /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8009110: 68fb ldr r3, [r7, #12] - 8009112: 689b ldr r3, [r3, #8] - 8009114: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8009118: d108 bne.n 800912c - 800911a: 68fb ldr r3, [r7, #12] - 800911c: 691b ldr r3, [r3, #16] - 800911e: 2b00 cmp r3, #0 - 8009120: d104 bne.n 800912c - { - pdata8bits = NULL; - 8009122: 2300 movs r3, #0 - 8009124: 61fb str r3, [r7, #28] - pdata16bits = (uint16_t *) pData; - 8009126: 68bb ldr r3, [r7, #8] - 8009128: 61bb str r3, [r7, #24] - 800912a: e003 b.n 8009134 - } - else - { - pdata8bits = pData; - 800912c: 68bb ldr r3, [r7, #8] - 800912e: 61fb str r3, [r7, #28] - pdata16bits = NULL; - 8009130: 2300 movs r3, #0 - 8009132: 61bb str r3, [r7, #24] - } - - while (huart->TxXferCount > 0U) - 8009134: e02d b.n 8009192 - { - if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 8009136: 683b ldr r3, [r7, #0] - 8009138: 9300 str r3, [sp, #0] - 800913a: 697b ldr r3, [r7, #20] - 800913c: 2200 movs r2, #0 - 800913e: 2180 movs r1, #128 ; 0x80 - 8009140: 68f8 ldr r0, [r7, #12] - 8009142: f000 fb48 bl 80097d6 - 8009146: 4603 mov r3, r0 - 8009148: 2b00 cmp r3, #0 - 800914a: d001 beq.n 8009150 - { - return HAL_TIMEOUT; - 800914c: 2303 movs r3, #3 - 800914e: e03d b.n 80091cc - } - if (pdata8bits == NULL) - 8009150: 69fb ldr r3, [r7, #28] - 8009152: 2b00 cmp r3, #0 - 8009154: d10b bne.n 800916e - { - huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); - 8009156: 69bb ldr r3, [r7, #24] - 8009158: 881a ldrh r2, [r3, #0] - 800915a: 68fb ldr r3, [r7, #12] - 800915c: 681b ldr r3, [r3, #0] - 800915e: f3c2 0208 ubfx r2, r2, #0, #9 - 8009162: b292 uxth r2, r2 - 8009164: 851a strh r2, [r3, #40] ; 0x28 - pdata16bits++; - 8009166: 69bb ldr r3, [r7, #24] - 8009168: 3302 adds r3, #2 - 800916a: 61bb str r3, [r7, #24] - 800916c: e008 b.n 8009180 - } - else - { - huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); - 800916e: 69fb ldr r3, [r7, #28] - 8009170: 781a ldrb r2, [r3, #0] - 8009172: 68fb ldr r3, [r7, #12] - 8009174: 681b ldr r3, [r3, #0] - 8009176: b292 uxth r2, r2 - 8009178: 851a strh r2, [r3, #40] ; 0x28 - pdata8bits++; - 800917a: 69fb ldr r3, [r7, #28] - 800917c: 3301 adds r3, #1 - 800917e: 61fb str r3, [r7, #28] - } - huart->TxXferCount--; - 8009180: 68fb ldr r3, [r7, #12] - 8009182: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52 - 8009186: b29b uxth r3, r3 - 8009188: 3b01 subs r3, #1 - 800918a: b29a uxth r2, r3 - 800918c: 68fb ldr r3, [r7, #12] - 800918e: f8a3 2052 strh.w r2, [r3, #82] ; 0x52 - while (huart->TxXferCount > 0U) - 8009192: 68fb ldr r3, [r7, #12] - 8009194: f8b3 3052 ldrh.w r3, [r3, #82] ; 0x52 - 8009198: b29b uxth r3, r3 - 800919a: 2b00 cmp r3, #0 - 800919c: d1cb bne.n 8009136 - } - - if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 800919e: 683b ldr r3, [r7, #0] - 80091a0: 9300 str r3, [sp, #0] - 80091a2: 697b ldr r3, [r7, #20] - 80091a4: 2200 movs r2, #0 - 80091a6: 2140 movs r1, #64 ; 0x40 - 80091a8: 68f8 ldr r0, [r7, #12] - 80091aa: f000 fb14 bl 80097d6 - 80091ae: 4603 mov r3, r0 - 80091b0: 2b00 cmp r3, #0 - 80091b2: d001 beq.n 80091b8 - { - return HAL_TIMEOUT; - 80091b4: 2303 movs r3, #3 - 80091b6: e009 b.n 80091cc - } - - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - 80091b8: 68fb ldr r3, [r7, #12] - 80091ba: 2220 movs r2, #32 - 80091bc: 675a str r2, [r3, #116] ; 0x74 - - __HAL_UNLOCK(huart); - 80091be: 68fb ldr r3, [r7, #12] - 80091c0: 2200 movs r2, #0 - 80091c2: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - return HAL_OK; - 80091c6: 2300 movs r3, #0 - 80091c8: e000 b.n 80091cc - } - else - { - return HAL_BUSY; - 80091ca: 2302 movs r3, #2 - } -} - 80091cc: 4618 mov r0, r3 - 80091ce: 3720 adds r7, #32 - 80091d0: 46bd mov sp, r7 - 80091d2: bd80 pop {r7, pc} - -080091d4 : - * @brief Configure the UART peripheral. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) -{ - 80091d4: b580 push {r7, lr} - 80091d6: b088 sub sp, #32 - 80091d8: af00 add r7, sp, #0 - 80091da: 6078 str r0, [r7, #4] - uint32_t tmpreg; - uint16_t brrtemp; - UART_ClockSourceTypeDef clocksource; - uint32_t usartdiv = 0x00000000U; - 80091dc: 2300 movs r3, #0 - 80091de: 61bb str r3, [r7, #24] - HAL_StatusTypeDef ret = HAL_OK; - 80091e0: 2300 movs r3, #0 - 80091e2: 75fb strb r3, [r7, #23] - * the UART Word Length, Parity, Mode and oversampling: - * set the M bits according to huart->Init.WordLength value - * set PCE and PS bits according to huart->Init.Parity value - * set TE and RE bits according to huart->Init.Mode value - * set OVER8 bit according to huart->Init.OverSampling value */ - tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 80091e4: 687b ldr r3, [r7, #4] - 80091e6: 689a ldr r2, [r3, #8] - 80091e8: 687b ldr r3, [r7, #4] - 80091ea: 691b ldr r3, [r3, #16] - 80091ec: 431a orrs r2, r3 - 80091ee: 687b ldr r3, [r7, #4] - 80091f0: 695b ldr r3, [r3, #20] - 80091f2: 431a orrs r2, r3 - 80091f4: 687b ldr r3, [r7, #4] - 80091f6: 69db ldr r3, [r3, #28] - 80091f8: 4313 orrs r3, r2 - 80091fa: 613b str r3, [r7, #16] - MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 80091fc: 687b ldr r3, [r7, #4] - 80091fe: 681b ldr r3, [r3, #0] - 8009200: 681b ldr r3, [r3, #0] - 8009202: f423 4316 bic.w r3, r3, #38400 ; 0x9600 - 8009206: f023 030c bic.w r3, r3, #12 - 800920a: 687a ldr r2, [r7, #4] - 800920c: 6812 ldr r2, [r2, #0] - 800920e: 6939 ldr r1, [r7, #16] - 8009210: 430b orrs r3, r1 - 8009212: 6013 str r3, [r2, #0] - - /*-------------------------- USART CR2 Configuration -----------------------*/ - /* Configure the UART Stop Bits: Set STOP[13:12] bits according - * to huart->Init.StopBits value */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8009214: 687b ldr r3, [r7, #4] - 8009216: 681b ldr r3, [r3, #0] - 8009218: 685b ldr r3, [r3, #4] - 800921a: f423 5140 bic.w r1, r3, #12288 ; 0x3000 - 800921e: 687b ldr r3, [r7, #4] - 8009220: 68da ldr r2, [r3, #12] - 8009222: 687b ldr r3, [r7, #4] - 8009224: 681b ldr r3, [r3, #0] - 8009226: 430a orrs r2, r1 - 8009228: 605a str r2, [r3, #4] - /* Configure - * - UART HardWare Flow Control: set CTSE and RTSE bits according - * to huart->Init.HwFlowCtl value - * - one-bit sampling method versus three samples' majority rule according - * to huart->Init.OneBitSampling (not applicable to LPUART) */ - tmpreg = (uint32_t)huart->Init.HwFlowCtl; - 800922a: 687b ldr r3, [r7, #4] - 800922c: 699b ldr r3, [r3, #24] - 800922e: 613b str r3, [r7, #16] - - tmpreg |= huart->Init.OneBitSampling; - 8009230: 687b ldr r3, [r7, #4] - 8009232: 6a1b ldr r3, [r3, #32] - 8009234: 693a ldr r2, [r7, #16] - 8009236: 4313 orrs r3, r2 - 8009238: 613b str r3, [r7, #16] - MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 800923a: 687b ldr r3, [r7, #4] - 800923c: 681b ldr r3, [r3, #0] - 800923e: 689b ldr r3, [r3, #8] - 8009240: f423 6130 bic.w r1, r3, #2816 ; 0xb00 - 8009244: 687b ldr r3, [r7, #4] - 8009246: 681b ldr r3, [r3, #0] - 8009248: 693a ldr r2, [r7, #16] - 800924a: 430a orrs r2, r1 - 800924c: 609a str r2, [r3, #8] - - - /*-------------------------- USART BRR Configuration -----------------------*/ - UART_GETCLOCKSOURCE(huart, clocksource); - 800924e: 687b ldr r3, [r7, #4] - 8009250: 681b ldr r3, [r3, #0] - 8009252: 4aa9 ldr r2, [pc, #676] ; (80094f8 ) - 8009254: 4293 cmp r3, r2 - 8009256: d121 bne.n 800929c - 8009258: 4ba8 ldr r3, [pc, #672] ; (80094fc ) - 800925a: 6b1b ldr r3, [r3, #48] ; 0x30 - 800925c: f003 0303 and.w r3, r3, #3 - 8009260: 2b03 cmp r3, #3 - 8009262: d817 bhi.n 8009294 - 8009264: a201 add r2, pc, #4 ; (adr r2, 800926c ) - 8009266: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 800926a: bf00 nop - 800926c: 0800927d .word 0x0800927d - 8009270: 08009289 .word 0x08009289 - 8009274: 0800928f .word 0x0800928f - 8009278: 08009283 .word 0x08009283 - 800927c: 2301 movs r3, #1 - 800927e: 77fb strb r3, [r7, #31] - 8009280: e0b2 b.n 80093e8 - 8009282: 2302 movs r3, #2 - 8009284: 77fb strb r3, [r7, #31] - 8009286: e0af b.n 80093e8 - 8009288: 2304 movs r3, #4 - 800928a: 77fb strb r3, [r7, #31] - 800928c: e0ac b.n 80093e8 - 800928e: 2308 movs r3, #8 - 8009290: 77fb strb r3, [r7, #31] - 8009292: e0a9 b.n 80093e8 - 8009294: 2310 movs r3, #16 - 8009296: 77fb strb r3, [r7, #31] - 8009298: bf00 nop - 800929a: e0a5 b.n 80093e8 - 800929c: 687b ldr r3, [r7, #4] - 800929e: 681b ldr r3, [r3, #0] - 80092a0: 4a97 ldr r2, [pc, #604] ; (8009500 ) - 80092a2: 4293 cmp r3, r2 - 80092a4: d123 bne.n 80092ee - 80092a6: 4b95 ldr r3, [pc, #596] ; (80094fc ) - 80092a8: 6b1b ldr r3, [r3, #48] ; 0x30 - 80092aa: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 80092ae: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80092b2: d012 beq.n 80092da - 80092b4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80092b8: d802 bhi.n 80092c0 - 80092ba: 2b00 cmp r3, #0 - 80092bc: d007 beq.n 80092ce - 80092be: e012 b.n 80092e6 - 80092c0: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80092c4: d00c beq.n 80092e0 - 80092c6: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 - 80092ca: d003 beq.n 80092d4 - 80092cc: e00b b.n 80092e6 - 80092ce: 2300 movs r3, #0 - 80092d0: 77fb strb r3, [r7, #31] - 80092d2: e089 b.n 80093e8 - 80092d4: 2302 movs r3, #2 - 80092d6: 77fb strb r3, [r7, #31] - 80092d8: e086 b.n 80093e8 - 80092da: 2304 movs r3, #4 - 80092dc: 77fb strb r3, [r7, #31] - 80092de: e083 b.n 80093e8 - 80092e0: 2308 movs r3, #8 - 80092e2: 77fb strb r3, [r7, #31] - 80092e4: e080 b.n 80093e8 - 80092e6: 2310 movs r3, #16 - 80092e8: 77fb strb r3, [r7, #31] - 80092ea: bf00 nop - 80092ec: e07c b.n 80093e8 - 80092ee: 687b ldr r3, [r7, #4] - 80092f0: 681b ldr r3, [r3, #0] - 80092f2: 4a84 ldr r2, [pc, #528] ; (8009504 ) - 80092f4: 4293 cmp r3, r2 - 80092f6: d123 bne.n 8009340 - 80092f8: 4b80 ldr r3, [pc, #512] ; (80094fc ) - 80092fa: 6b1b ldr r3, [r3, #48] ; 0x30 - 80092fc: f403 2340 and.w r3, r3, #786432 ; 0xc0000 - 8009300: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 - 8009304: d012 beq.n 800932c - 8009306: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 - 800930a: d802 bhi.n 8009312 - 800930c: 2b00 cmp r3, #0 - 800930e: d007 beq.n 8009320 - 8009310: e012 b.n 8009338 - 8009312: f5b3 2f00 cmp.w r3, #524288 ; 0x80000 - 8009316: d00c beq.n 8009332 - 8009318: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000 - 800931c: d003 beq.n 8009326 - 800931e: e00b b.n 8009338 - 8009320: 2300 movs r3, #0 - 8009322: 77fb strb r3, [r7, #31] - 8009324: e060 b.n 80093e8 - 8009326: 2302 movs r3, #2 - 8009328: 77fb strb r3, [r7, #31] - 800932a: e05d b.n 80093e8 - 800932c: 2304 movs r3, #4 - 800932e: 77fb strb r3, [r7, #31] - 8009330: e05a b.n 80093e8 - 8009332: 2308 movs r3, #8 - 8009334: 77fb strb r3, [r7, #31] - 8009336: e057 b.n 80093e8 - 8009338: 2310 movs r3, #16 - 800933a: 77fb strb r3, [r7, #31] - 800933c: bf00 nop - 800933e: e053 b.n 80093e8 - 8009340: 687b ldr r3, [r7, #4] - 8009342: 681b ldr r3, [r3, #0] - 8009344: 4a70 ldr r2, [pc, #448] ; (8009508 ) - 8009346: 4293 cmp r3, r2 - 8009348: d123 bne.n 8009392 - 800934a: 4b6c ldr r3, [pc, #432] ; (80094fc ) - 800934c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800934e: f403 1340 and.w r3, r3, #3145728 ; 0x300000 - 8009352: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8009356: d012 beq.n 800937e - 8009358: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 800935c: d802 bhi.n 8009364 - 800935e: 2b00 cmp r3, #0 - 8009360: d007 beq.n 8009372 - 8009362: e012 b.n 800938a - 8009364: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 8009368: d00c beq.n 8009384 - 800936a: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 - 800936e: d003 beq.n 8009378 - 8009370: e00b b.n 800938a - 8009372: 2300 movs r3, #0 - 8009374: 77fb strb r3, [r7, #31] - 8009376: e037 b.n 80093e8 - 8009378: 2302 movs r3, #2 - 800937a: 77fb strb r3, [r7, #31] - 800937c: e034 b.n 80093e8 - 800937e: 2304 movs r3, #4 - 8009380: 77fb strb r3, [r7, #31] - 8009382: e031 b.n 80093e8 - 8009384: 2308 movs r3, #8 - 8009386: 77fb strb r3, [r7, #31] - 8009388: e02e b.n 80093e8 - 800938a: 2310 movs r3, #16 - 800938c: 77fb strb r3, [r7, #31] - 800938e: bf00 nop - 8009390: e02a b.n 80093e8 - 8009392: 687b ldr r3, [r7, #4] - 8009394: 681b ldr r3, [r3, #0] - 8009396: 4a5d ldr r2, [pc, #372] ; (800950c ) - 8009398: 4293 cmp r3, r2 - 800939a: d123 bne.n 80093e4 - 800939c: 4b57 ldr r3, [pc, #348] ; (80094fc ) - 800939e: 6b1b ldr r3, [r3, #48] ; 0x30 - 80093a0: f403 0340 and.w r3, r3, #12582912 ; 0xc00000 - 80093a4: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 80093a8: d012 beq.n 80093d0 - 80093aa: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 80093ae: d802 bhi.n 80093b6 - 80093b0: 2b00 cmp r3, #0 - 80093b2: d007 beq.n 80093c4 - 80093b4: e012 b.n 80093dc - 80093b6: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 80093ba: d00c beq.n 80093d6 - 80093bc: f5b3 0f40 cmp.w r3, #12582912 ; 0xc00000 - 80093c0: d003 beq.n 80093ca - 80093c2: e00b b.n 80093dc - 80093c4: 2300 movs r3, #0 - 80093c6: 77fb strb r3, [r7, #31] - 80093c8: e00e b.n 80093e8 - 80093ca: 2302 movs r3, #2 - 80093cc: 77fb strb r3, [r7, #31] - 80093ce: e00b b.n 80093e8 - 80093d0: 2304 movs r3, #4 - 80093d2: 77fb strb r3, [r7, #31] - 80093d4: e008 b.n 80093e8 - 80093d6: 2308 movs r3, #8 - 80093d8: 77fb strb r3, [r7, #31] - 80093da: e005 b.n 80093e8 - 80093dc: 2310 movs r3, #16 - 80093de: 77fb strb r3, [r7, #31] - 80093e0: bf00 nop - 80093e2: e001 b.n 80093e8 - 80093e4: 2310 movs r3, #16 - 80093e6: 77fb strb r3, [r7, #31] - - if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 80093e8: 687b ldr r3, [r7, #4] - 80093ea: 69db ldr r3, [r3, #28] - 80093ec: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 80093f0: f040 808e bne.w 8009510 - { - switch (clocksource) - 80093f4: 7ffb ldrb r3, [r7, #31] - 80093f6: 2b08 cmp r3, #8 - 80093f8: d85e bhi.n 80094b8 - 80093fa: a201 add r2, pc, #4 ; (adr r2, 8009400 ) - 80093fc: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8009400: 08009425 .word 0x08009425 - 8009404: 08009445 .word 0x08009445 - 8009408: 08009465 .word 0x08009465 - 800940c: 080094b9 .word 0x080094b9 - 8009410: 08009481 .word 0x08009481 - 8009414: 080094b9 .word 0x080094b9 - 8009418: 080094b9 .word 0x080094b9 - 800941c: 080094b9 .word 0x080094b9 - 8009420: 080094a1 .word 0x080094a1 - { - case UART_CLOCKSOURCE_PCLK1: - pclk = HAL_RCC_GetPCLK1Freq(); - 8009424: f7fd ff9c bl 8007360 - 8009428: 60f8 str r0, [r7, #12] - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); - 800942a: 68fb ldr r3, [r7, #12] - 800942c: 005a lsls r2, r3, #1 - 800942e: 687b ldr r3, [r7, #4] - 8009430: 685b ldr r3, [r3, #4] - 8009432: 085b lsrs r3, r3, #1 - 8009434: 441a add r2, r3 - 8009436: 687b ldr r3, [r7, #4] - 8009438: 685b ldr r3, [r3, #4] - 800943a: fbb2 f3f3 udiv r3, r2, r3 - 800943e: b29b uxth r3, r3 - 8009440: 61bb str r3, [r7, #24] - break; - 8009442: e03c b.n 80094be - case UART_CLOCKSOURCE_PCLK2: - pclk = HAL_RCC_GetPCLK2Freq(); - 8009444: f7fd ffae bl 80073a4 - 8009448: 60f8 str r0, [r7, #12] - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); - 800944a: 68fb ldr r3, [r7, #12] - 800944c: 005a lsls r2, r3, #1 - 800944e: 687b ldr r3, [r7, #4] - 8009450: 685b ldr r3, [r3, #4] - 8009452: 085b lsrs r3, r3, #1 - 8009454: 441a add r2, r3 - 8009456: 687b ldr r3, [r7, #4] - 8009458: 685b ldr r3, [r3, #4] - 800945a: fbb2 f3f3 udiv r3, r2, r3 - 800945e: b29b uxth r3, r3 - 8009460: 61bb str r3, [r7, #24] - break; - 8009462: e02c b.n 80094be - case UART_CLOCKSOURCE_HSI: - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate)); - 8009464: 687b ldr r3, [r7, #4] - 8009466: 685b ldr r3, [r3, #4] - 8009468: 085b lsrs r3, r3, #1 - 800946a: f503 0374 add.w r3, r3, #15990784 ; 0xf40000 - 800946e: f503 5310 add.w r3, r3, #9216 ; 0x2400 - 8009472: 687a ldr r2, [r7, #4] - 8009474: 6852 ldr r2, [r2, #4] - 8009476: fbb3 f3f2 udiv r3, r3, r2 - 800947a: b29b uxth r3, r3 - 800947c: 61bb str r3, [r7, #24] - break; - 800947e: e01e b.n 80094be - case UART_CLOCKSOURCE_SYSCLK: - pclk = HAL_RCC_GetSysClockFreq(); - 8009480: f7fd fef8 bl 8007274 - 8009484: 60f8 str r0, [r7, #12] - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); - 8009486: 68fb ldr r3, [r7, #12] - 8009488: 005a lsls r2, r3, #1 - 800948a: 687b ldr r3, [r7, #4] - 800948c: 685b ldr r3, [r3, #4] - 800948e: 085b lsrs r3, r3, #1 - 8009490: 441a add r2, r3 - 8009492: 687b ldr r3, [r7, #4] - 8009494: 685b ldr r3, [r3, #4] - 8009496: fbb2 f3f3 udiv r3, r2, r3 - 800949a: b29b uxth r3, r3 - 800949c: 61bb str r3, [r7, #24] - break; - 800949e: e00e b.n 80094be - case UART_CLOCKSOURCE_LSE: - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate)); - 80094a0: 687b ldr r3, [r7, #4] - 80094a2: 685b ldr r3, [r3, #4] - 80094a4: 085b lsrs r3, r3, #1 - 80094a6: f503 3280 add.w r2, r3, #65536 ; 0x10000 - 80094aa: 687b ldr r3, [r7, #4] - 80094ac: 685b ldr r3, [r3, #4] - 80094ae: fbb2 f3f3 udiv r3, r2, r3 - 80094b2: b29b uxth r3, r3 - 80094b4: 61bb str r3, [r7, #24] - break; - 80094b6: e002 b.n 80094be - default: - ret = HAL_ERROR; - 80094b8: 2301 movs r3, #1 - 80094ba: 75fb strb r3, [r7, #23] - break; - 80094bc: bf00 nop - } - - /* USARTDIV must be greater than or equal to 0d16 */ - if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 80094be: 69bb ldr r3, [r7, #24] - 80094c0: 2b0f cmp r3, #15 - 80094c2: d916 bls.n 80094f2 - 80094c4: 69bb ldr r3, [r7, #24] - 80094c6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80094ca: d212 bcs.n 80094f2 - { - brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 80094cc: 69bb ldr r3, [r7, #24] - 80094ce: b29b uxth r3, r3 - 80094d0: f023 030f bic.w r3, r3, #15 - 80094d4: 817b strh r3, [r7, #10] - brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 80094d6: 69bb ldr r3, [r7, #24] - 80094d8: 085b lsrs r3, r3, #1 - 80094da: b29b uxth r3, r3 - 80094dc: f003 0307 and.w r3, r3, #7 - 80094e0: b29a uxth r2, r3 - 80094e2: 897b ldrh r3, [r7, #10] - 80094e4: 4313 orrs r3, r2 - 80094e6: 817b strh r3, [r7, #10] - huart->Instance->BRR = brrtemp; - 80094e8: 687b ldr r3, [r7, #4] - 80094ea: 681b ldr r3, [r3, #0] - 80094ec: 897a ldrh r2, [r7, #10] - 80094ee: 60da str r2, [r3, #12] - 80094f0: e07e b.n 80095f0 - } - else - { - ret = HAL_ERROR; - 80094f2: 2301 movs r3, #1 - 80094f4: 75fb strb r3, [r7, #23] - 80094f6: e07b b.n 80095f0 - 80094f8: 40013800 .word 0x40013800 - 80094fc: 40021000 .word 0x40021000 - 8009500: 40004400 .word 0x40004400 - 8009504: 40004800 .word 0x40004800 - 8009508: 40004c00 .word 0x40004c00 - 800950c: 40005000 .word 0x40005000 - } - } - else - { - switch (clocksource) - 8009510: 7ffb ldrb r3, [r7, #31] - 8009512: 2b08 cmp r3, #8 - 8009514: d85b bhi.n 80095ce - 8009516: a201 add r2, pc, #4 ; (adr r2, 800951c ) - 8009518: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 800951c: 08009541 .word 0x08009541 - 8009520: 0800955f .word 0x0800955f - 8009524: 0800957d .word 0x0800957d - 8009528: 080095cf .word 0x080095cf - 800952c: 08009599 .word 0x08009599 - 8009530: 080095cf .word 0x080095cf - 8009534: 080095cf .word 0x080095cf - 8009538: 080095cf .word 0x080095cf - 800953c: 080095b7 .word 0x080095b7 - { - case UART_CLOCKSOURCE_PCLK1: - pclk = HAL_RCC_GetPCLK1Freq(); - 8009540: f7fd ff0e bl 8007360 - 8009544: 60f8 str r0, [r7, #12] - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); - 8009546: 687b ldr r3, [r7, #4] - 8009548: 685b ldr r3, [r3, #4] - 800954a: 085a lsrs r2, r3, #1 - 800954c: 68fb ldr r3, [r7, #12] - 800954e: 441a add r2, r3 - 8009550: 687b ldr r3, [r7, #4] - 8009552: 685b ldr r3, [r3, #4] - 8009554: fbb2 f3f3 udiv r3, r2, r3 - 8009558: b29b uxth r3, r3 - 800955a: 61bb str r3, [r7, #24] - break; - 800955c: e03a b.n 80095d4 - case UART_CLOCKSOURCE_PCLK2: - pclk = HAL_RCC_GetPCLK2Freq(); - 800955e: f7fd ff21 bl 80073a4 - 8009562: 60f8 str r0, [r7, #12] - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); - 8009564: 687b ldr r3, [r7, #4] - 8009566: 685b ldr r3, [r3, #4] - 8009568: 085a lsrs r2, r3, #1 - 800956a: 68fb ldr r3, [r7, #12] - 800956c: 441a add r2, r3 - 800956e: 687b ldr r3, [r7, #4] - 8009570: 685b ldr r3, [r3, #4] - 8009572: fbb2 f3f3 udiv r3, r2, r3 - 8009576: b29b uxth r3, r3 - 8009578: 61bb str r3, [r7, #24] - break; - 800957a: e02b b.n 80095d4 - case UART_CLOCKSOURCE_HSI: - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate)); - 800957c: 687b ldr r3, [r7, #4] - 800957e: 685b ldr r3, [r3, #4] - 8009580: 085b lsrs r3, r3, #1 - 8009582: f503 03f4 add.w r3, r3, #7995392 ; 0x7a0000 - 8009586: f503 5390 add.w r3, r3, #4608 ; 0x1200 - 800958a: 687a ldr r2, [r7, #4] - 800958c: 6852 ldr r2, [r2, #4] - 800958e: fbb3 f3f2 udiv r3, r3, r2 - 8009592: b29b uxth r3, r3 - 8009594: 61bb str r3, [r7, #24] - break; - 8009596: e01d b.n 80095d4 - case UART_CLOCKSOURCE_SYSCLK: - pclk = HAL_RCC_GetSysClockFreq(); - 8009598: f7fd fe6c bl 8007274 - 800959c: 60f8 str r0, [r7, #12] - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); - 800959e: 687b ldr r3, [r7, #4] - 80095a0: 685b ldr r3, [r3, #4] - 80095a2: 085a lsrs r2, r3, #1 - 80095a4: 68fb ldr r3, [r7, #12] - 80095a6: 441a add r2, r3 - 80095a8: 687b ldr r3, [r7, #4] - 80095aa: 685b ldr r3, [r3, #4] - 80095ac: fbb2 f3f3 udiv r3, r2, r3 - 80095b0: b29b uxth r3, r3 - 80095b2: 61bb str r3, [r7, #24] - break; - 80095b4: e00e b.n 80095d4 - case UART_CLOCKSOURCE_LSE: - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate)); - 80095b6: 687b ldr r3, [r7, #4] - 80095b8: 685b ldr r3, [r3, #4] - 80095ba: 085b lsrs r3, r3, #1 - 80095bc: f503 4200 add.w r2, r3, #32768 ; 0x8000 - 80095c0: 687b ldr r3, [r7, #4] - 80095c2: 685b ldr r3, [r3, #4] - 80095c4: fbb2 f3f3 udiv r3, r2, r3 - 80095c8: b29b uxth r3, r3 - 80095ca: 61bb str r3, [r7, #24] - break; - 80095cc: e002 b.n 80095d4 - default: - ret = HAL_ERROR; - 80095ce: 2301 movs r3, #1 - 80095d0: 75fb strb r3, [r7, #23] - break; - 80095d2: bf00 nop - } - - /* USARTDIV must be greater than or equal to 0d16 */ - if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 80095d4: 69bb ldr r3, [r7, #24] - 80095d6: 2b0f cmp r3, #15 - 80095d8: d908 bls.n 80095ec - 80095da: 69bb ldr r3, [r7, #24] - 80095dc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80095e0: d204 bcs.n 80095ec - { - huart->Instance->BRR = usartdiv; - 80095e2: 687b ldr r3, [r7, #4] - 80095e4: 681b ldr r3, [r3, #0] - 80095e6: 69ba ldr r2, [r7, #24] - 80095e8: 60da str r2, [r3, #12] - 80095ea: e001 b.n 80095f0 - } - else - { - ret = HAL_ERROR; - 80095ec: 2301 movs r3, #1 - 80095ee: 75fb strb r3, [r7, #23] - } - } - - - /* Clear ISR function pointers */ - huart->RxISR = NULL; - 80095f0: 687b ldr r3, [r7, #4] - 80095f2: 2200 movs r2, #0 - 80095f4: 661a str r2, [r3, #96] ; 0x60 - huart->TxISR = NULL; - 80095f6: 687b ldr r3, [r7, #4] - 80095f8: 2200 movs r2, #0 - 80095fa: 665a str r2, [r3, #100] ; 0x64 - - return ret; - 80095fc: 7dfb ldrb r3, [r7, #23] -} - 80095fe: 4618 mov r0, r3 - 8009600: 3720 adds r7, #32 - 8009602: 46bd mov sp, r7 - 8009604: bd80 pop {r7, pc} - 8009606: bf00 nop - -08009608 : - * @brief Configure the UART peripheral advanced features. - * @param huart UART handle. - * @retval None - */ -void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) -{ - 8009608: b480 push {r7} - 800960a: b083 sub sp, #12 - 800960c: af00 add r7, sp, #0 - 800960e: 6078 str r0, [r7, #4] - /* Check whether the set of advanced features to configure is properly set */ - assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); - - /* if required, configure TX pin active level inversion */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - 8009610: 687b ldr r3, [r7, #4] - 8009612: 6a5b ldr r3, [r3, #36] ; 0x24 - 8009614: f003 0301 and.w r3, r3, #1 - 8009618: 2b00 cmp r3, #0 - 800961a: d00a beq.n 8009632 - { - assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - 800961c: 687b ldr r3, [r7, #4] - 800961e: 681b ldr r3, [r3, #0] - 8009620: 685b ldr r3, [r3, #4] - 8009622: f423 3100 bic.w r1, r3, #131072 ; 0x20000 - 8009626: 687b ldr r3, [r7, #4] - 8009628: 6a9a ldr r2, [r3, #40] ; 0x28 - 800962a: 687b ldr r3, [r7, #4] - 800962c: 681b ldr r3, [r3, #0] - 800962e: 430a orrs r2, r1 - 8009630: 605a str r2, [r3, #4] - } - - /* if required, configure RX pin active level inversion */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - 8009632: 687b ldr r3, [r7, #4] - 8009634: 6a5b ldr r3, [r3, #36] ; 0x24 - 8009636: f003 0302 and.w r3, r3, #2 - 800963a: 2b00 cmp r3, #0 - 800963c: d00a beq.n 8009654 - { - assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - 800963e: 687b ldr r3, [r7, #4] - 8009640: 681b ldr r3, [r3, #0] - 8009642: 685b ldr r3, [r3, #4] - 8009644: f423 3180 bic.w r1, r3, #65536 ; 0x10000 - 8009648: 687b ldr r3, [r7, #4] - 800964a: 6ada ldr r2, [r3, #44] ; 0x2c - 800964c: 687b ldr r3, [r7, #4] - 800964e: 681b ldr r3, [r3, #0] - 8009650: 430a orrs r2, r1 - 8009652: 605a str r2, [r3, #4] - } - - /* if required, configure data inversion */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - 8009654: 687b ldr r3, [r7, #4] - 8009656: 6a5b ldr r3, [r3, #36] ; 0x24 - 8009658: f003 0304 and.w r3, r3, #4 - 800965c: 2b00 cmp r3, #0 - 800965e: d00a beq.n 8009676 - { - assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - 8009660: 687b ldr r3, [r7, #4] - 8009662: 681b ldr r3, [r3, #0] - 8009664: 685b ldr r3, [r3, #4] - 8009666: f423 2180 bic.w r1, r3, #262144 ; 0x40000 - 800966a: 687b ldr r3, [r7, #4] - 800966c: 6b1a ldr r2, [r3, #48] ; 0x30 - 800966e: 687b ldr r3, [r7, #4] - 8009670: 681b ldr r3, [r3, #0] - 8009672: 430a orrs r2, r1 - 8009674: 605a str r2, [r3, #4] - } - - /* if required, configure RX/TX pins swap */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 8009676: 687b ldr r3, [r7, #4] - 8009678: 6a5b ldr r3, [r3, #36] ; 0x24 - 800967a: f003 0308 and.w r3, r3, #8 - 800967e: 2b00 cmp r3, #0 - 8009680: d00a beq.n 8009698 - { - assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - 8009682: 687b ldr r3, [r7, #4] - 8009684: 681b ldr r3, [r3, #0] - 8009686: 685b ldr r3, [r3, #4] - 8009688: f423 4100 bic.w r1, r3, #32768 ; 0x8000 - 800968c: 687b ldr r3, [r7, #4] - 800968e: 6b5a ldr r2, [r3, #52] ; 0x34 - 8009690: 687b ldr r3, [r7, #4] - 8009692: 681b ldr r3, [r3, #0] - 8009694: 430a orrs r2, r1 - 8009696: 605a str r2, [r3, #4] - } - - /* if required, configure RX overrun detection disabling */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - 8009698: 687b ldr r3, [r7, #4] - 800969a: 6a5b ldr r3, [r3, #36] ; 0x24 - 800969c: f003 0310 and.w r3, r3, #16 - 80096a0: 2b00 cmp r3, #0 - 80096a2: d00a beq.n 80096ba - { - assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); - MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - 80096a4: 687b ldr r3, [r7, #4] - 80096a6: 681b ldr r3, [r3, #0] - 80096a8: 689b ldr r3, [r3, #8] - 80096aa: f423 5180 bic.w r1, r3, #4096 ; 0x1000 - 80096ae: 687b ldr r3, [r7, #4] - 80096b0: 6b9a ldr r2, [r3, #56] ; 0x38 - 80096b2: 687b ldr r3, [r7, #4] - 80096b4: 681b ldr r3, [r3, #0] - 80096b6: 430a orrs r2, r1 - 80096b8: 609a str r2, [r3, #8] - } - - /* if required, configure DMA disabling on reception error */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - 80096ba: 687b ldr r3, [r7, #4] - 80096bc: 6a5b ldr r3, [r3, #36] ; 0x24 - 80096be: f003 0320 and.w r3, r3, #32 - 80096c2: 2b00 cmp r3, #0 - 80096c4: d00a beq.n 80096dc - { - assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); - MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - 80096c6: 687b ldr r3, [r7, #4] - 80096c8: 681b ldr r3, [r3, #0] - 80096ca: 689b ldr r3, [r3, #8] - 80096cc: f423 5100 bic.w r1, r3, #8192 ; 0x2000 - 80096d0: 687b ldr r3, [r7, #4] - 80096d2: 6bda ldr r2, [r3, #60] ; 0x3c - 80096d4: 687b ldr r3, [r7, #4] - 80096d6: 681b ldr r3, [r3, #0] - 80096d8: 430a orrs r2, r1 - 80096da: 609a str r2, [r3, #8] - } - - /* if required, configure auto Baud rate detection scheme */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - 80096dc: 687b ldr r3, [r7, #4] - 80096de: 6a5b ldr r3, [r3, #36] ; 0x24 - 80096e0: f003 0340 and.w r3, r3, #64 ; 0x40 - 80096e4: 2b00 cmp r3, #0 - 80096e6: d01a beq.n 800971e - { - assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); - assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - 80096e8: 687b ldr r3, [r7, #4] - 80096ea: 681b ldr r3, [r3, #0] - 80096ec: 685b ldr r3, [r3, #4] - 80096ee: f423 1180 bic.w r1, r3, #1048576 ; 0x100000 - 80096f2: 687b ldr r3, [r7, #4] - 80096f4: 6c1a ldr r2, [r3, #64] ; 0x40 - 80096f6: 687b ldr r3, [r7, #4] - 80096f8: 681b ldr r3, [r3, #0] - 80096fa: 430a orrs r2, r1 - 80096fc: 605a str r2, [r3, #4] - /* set auto Baudrate detection parameters if detection is enabled */ - if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - 80096fe: 687b ldr r3, [r7, #4] - 8009700: 6c1b ldr r3, [r3, #64] ; 0x40 - 8009702: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8009706: d10a bne.n 800971e - { - assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - 8009708: 687b ldr r3, [r7, #4] - 800970a: 681b ldr r3, [r3, #0] - 800970c: 685b ldr r3, [r3, #4] - 800970e: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000 - 8009712: 687b ldr r3, [r7, #4] - 8009714: 6c5a ldr r2, [r3, #68] ; 0x44 - 8009716: 687b ldr r3, [r7, #4] - 8009718: 681b ldr r3, [r3, #0] - 800971a: 430a orrs r2, r1 - 800971c: 605a str r2, [r3, #4] - } - } - - /* if required, configure MSB first on communication line */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - 800971e: 687b ldr r3, [r7, #4] - 8009720: 6a5b ldr r3, [r3, #36] ; 0x24 - 8009722: f003 0380 and.w r3, r3, #128 ; 0x80 - 8009726: 2b00 cmp r3, #0 - 8009728: d00a beq.n 8009740 - { - assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - 800972a: 687b ldr r3, [r7, #4] - 800972c: 681b ldr r3, [r3, #0] - 800972e: 685b ldr r3, [r3, #4] - 8009730: f423 2100 bic.w r1, r3, #524288 ; 0x80000 - 8009734: 687b ldr r3, [r7, #4] - 8009736: 6c9a ldr r2, [r3, #72] ; 0x48 - 8009738: 687b ldr r3, [r7, #4] - 800973a: 681b ldr r3, [r3, #0] - 800973c: 430a orrs r2, r1 - 800973e: 605a str r2, [r3, #4] - } -} - 8009740: bf00 nop - 8009742: 370c adds r7, #12 - 8009744: 46bd mov sp, r7 - 8009746: f85d 7b04 ldr.w r7, [sp], #4 - 800974a: 4770 bx lr - -0800974c : - * @brief Check the UART Idle State. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) -{ - 800974c: b580 push {r7, lr} - 800974e: b086 sub sp, #24 - 8009750: af02 add r7, sp, #8 - 8009752: 6078 str r0, [r7, #4] - uint32_t tickstart; - - /* Initialize the UART ErrorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - 8009754: 687b ldr r3, [r7, #4] - 8009756: 2200 movs r2, #0 - 8009758: 67da str r2, [r3, #124] ; 0x7c - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - 800975a: f7f9 fbf7 bl 8002f4c - 800975e: 60f8 str r0, [r7, #12] - - /* Check if the Transmitter is enabled */ - if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 8009760: 687b ldr r3, [r7, #4] - 8009762: 681b ldr r3, [r3, #0] - 8009764: 681b ldr r3, [r3, #0] - 8009766: f003 0308 and.w r3, r3, #8 - 800976a: 2b08 cmp r3, #8 - 800976c: d10e bne.n 800978c - { - /* Wait until TEACK flag is set */ - if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 800976e: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 - 8009772: 9300 str r3, [sp, #0] - 8009774: 68fb ldr r3, [r7, #12] - 8009776: 2200 movs r2, #0 - 8009778: f44f 1100 mov.w r1, #2097152 ; 0x200000 - 800977c: 6878 ldr r0, [r7, #4] - 800977e: f000 f82a bl 80097d6 - 8009782: 4603 mov r3, r0 - 8009784: 2b00 cmp r3, #0 - 8009786: d001 beq.n 800978c - { - /* Timeout occurred */ - return HAL_TIMEOUT; - 8009788: 2303 movs r3, #3 - 800978a: e020 b.n 80097ce - } - } - - /* Check if the Receiver is enabled */ - if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - 800978c: 687b ldr r3, [r7, #4] - 800978e: 681b ldr r3, [r3, #0] - 8009790: 681b ldr r3, [r3, #0] - 8009792: f003 0304 and.w r3, r3, #4 - 8009796: 2b04 cmp r3, #4 - 8009798: d10e bne.n 80097b8 - { - /* Wait until REACK flag is set */ - if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 800979a: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 - 800979e: 9300 str r3, [sp, #0] - 80097a0: 68fb ldr r3, [r7, #12] - 80097a2: 2200 movs r2, #0 - 80097a4: f44f 0180 mov.w r1, #4194304 ; 0x400000 - 80097a8: 6878 ldr r0, [r7, #4] - 80097aa: f000 f814 bl 80097d6 - 80097ae: 4603 mov r3, r0 - 80097b0: 2b00 cmp r3, #0 - 80097b2: d001 beq.n 80097b8 - { - /* Timeout occurred */ - return HAL_TIMEOUT; - 80097b4: 2303 movs r3, #3 - 80097b6: e00a b.n 80097ce - } - } - - /* Initialize the UART State */ - huart->gState = HAL_UART_STATE_READY; - 80097b8: 687b ldr r3, [r7, #4] - 80097ba: 2220 movs r2, #32 - 80097bc: 675a str r2, [r3, #116] ; 0x74 - huart->RxState = HAL_UART_STATE_READY; - 80097be: 687b ldr r3, [r7, #4] - 80097c0: 2220 movs r2, #32 - 80097c2: 679a str r2, [r3, #120] ; 0x78 - - __HAL_UNLOCK(huart); - 80097c4: 687b ldr r3, [r7, #4] - 80097c6: 2200 movs r2, #0 - 80097c8: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - return HAL_OK; - 80097cc: 2300 movs r3, #0 -} - 80097ce: 4618 mov r0, r3 - 80097d0: 3710 adds r7, #16 - 80097d2: 46bd mov sp, r7 - 80097d4: bd80 pop {r7, pc} - -080097d6 : - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, - uint32_t Tickstart, uint32_t Timeout) -{ - 80097d6: b580 push {r7, lr} - 80097d8: b084 sub sp, #16 - 80097da: af00 add r7, sp, #0 - 80097dc: 60f8 str r0, [r7, #12] - 80097de: 60b9 str r1, [r7, #8] - 80097e0: 603b str r3, [r7, #0] - 80097e2: 4613 mov r3, r2 - 80097e4: 71fb strb r3, [r7, #7] - /* Wait until flag is set */ - while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80097e6: e05d b.n 80098a4 - { - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - 80097e8: 69bb ldr r3, [r7, #24] - 80097ea: f1b3 3fff cmp.w r3, #4294967295 - 80097ee: d059 beq.n 80098a4 - { - if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 80097f0: f7f9 fbac bl 8002f4c - 80097f4: 4602 mov r2, r0 - 80097f6: 683b ldr r3, [r7, #0] - 80097f8: 1ad3 subs r3, r2, r3 - 80097fa: 69ba ldr r2, [r7, #24] - 80097fc: 429a cmp r2, r3 - 80097fe: d302 bcc.n 8009806 - 8009800: 69bb ldr r3, [r7, #24] - 8009802: 2b00 cmp r3, #0 - 8009804: d11b bne.n 800983e - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - 8009806: 68fb ldr r3, [r7, #12] - 8009808: 681b ldr r3, [r3, #0] - 800980a: 681a ldr r2, [r3, #0] - 800980c: 68fb ldr r3, [r7, #12] - 800980e: 681b ldr r3, [r3, #0] - 8009810: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 - 8009814: 601a str r2, [r3, #0] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8009816: 68fb ldr r3, [r7, #12] - 8009818: 681b ldr r3, [r3, #0] - 800981a: 689a ldr r2, [r3, #8] - 800981c: 68fb ldr r3, [r7, #12] - 800981e: 681b ldr r3, [r3, #0] - 8009820: f022 0201 bic.w r2, r2, #1 - 8009824: 609a str r2, [r3, #8] - - huart->gState = HAL_UART_STATE_READY; - 8009826: 68fb ldr r3, [r7, #12] - 8009828: 2220 movs r2, #32 - 800982a: 675a str r2, [r3, #116] ; 0x74 - huart->RxState = HAL_UART_STATE_READY; - 800982c: 68fb ldr r3, [r7, #12] - 800982e: 2220 movs r2, #32 - 8009830: 679a str r2, [r3, #120] ; 0x78 - - __HAL_UNLOCK(huart); - 8009832: 68fb ldr r3, [r7, #12] - 8009834: 2200 movs r2, #0 - 8009836: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - return HAL_TIMEOUT; - 800983a: 2303 movs r3, #3 - 800983c: e042 b.n 80098c4 - } - - if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) - 800983e: 68fb ldr r3, [r7, #12] - 8009840: 681b ldr r3, [r3, #0] - 8009842: 681b ldr r3, [r3, #0] - 8009844: f003 0304 and.w r3, r3, #4 - 8009848: 2b00 cmp r3, #0 - 800984a: d02b beq.n 80098a4 - { - if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) - 800984c: 68fb ldr r3, [r7, #12] - 800984e: 681b ldr r3, [r3, #0] - 8009850: 69db ldr r3, [r3, #28] - 8009852: f403 6300 and.w r3, r3, #2048 ; 0x800 - 8009856: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 800985a: d123 bne.n 80098a4 - { - /* Clear Receiver Timeout flag*/ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 800985c: 68fb ldr r3, [r7, #12] - 800985e: 681b ldr r3, [r3, #0] - 8009860: f44f 6200 mov.w r2, #2048 ; 0x800 - 8009864: 621a str r2, [r3, #32] - - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - 8009866: 68fb ldr r3, [r7, #12] - 8009868: 681b ldr r3, [r3, #0] - 800986a: 681a ldr r2, [r3, #0] - 800986c: 68fb ldr r3, [r7, #12] - 800986e: 681b ldr r3, [r3, #0] - 8009870: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 - 8009874: 601a str r2, [r3, #0] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8009876: 68fb ldr r3, [r7, #12] - 8009878: 681b ldr r3, [r3, #0] - 800987a: 689a ldr r2, [r3, #8] - 800987c: 68fb ldr r3, [r7, #12] - 800987e: 681b ldr r3, [r3, #0] - 8009880: f022 0201 bic.w r2, r2, #1 - 8009884: 609a str r2, [r3, #8] - - huart->gState = HAL_UART_STATE_READY; - 8009886: 68fb ldr r3, [r7, #12] - 8009888: 2220 movs r2, #32 - 800988a: 675a str r2, [r3, #116] ; 0x74 - huart->RxState = HAL_UART_STATE_READY; - 800988c: 68fb ldr r3, [r7, #12] - 800988e: 2220 movs r2, #32 - 8009890: 679a str r2, [r3, #120] ; 0x78 - huart->ErrorCode = HAL_UART_ERROR_RTO; - 8009892: 68fb ldr r3, [r7, #12] - 8009894: 2220 movs r2, #32 - 8009896: 67da str r2, [r3, #124] ; 0x7c - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 8009898: 68fb ldr r3, [r7, #12] - 800989a: 2200 movs r2, #0 - 800989c: f883 2070 strb.w r2, [r3, #112] ; 0x70 - - return HAL_TIMEOUT; - 80098a0: 2303 movs r3, #3 - 80098a2: e00f b.n 80098c4 - while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80098a4: 68fb ldr r3, [r7, #12] - 80098a6: 681b ldr r3, [r3, #0] - 80098a8: 69da ldr r2, [r3, #28] - 80098aa: 68bb ldr r3, [r7, #8] - 80098ac: 4013 ands r3, r2 - 80098ae: 68ba ldr r2, [r7, #8] - 80098b0: 429a cmp r2, r3 - 80098b2: bf0c ite eq - 80098b4: 2301 moveq r3, #1 - 80098b6: 2300 movne r3, #0 - 80098b8: b2db uxtb r3, r3 - 80098ba: 461a mov r2, r3 - 80098bc: 79fb ldrb r3, [r7, #7] - 80098be: 429a cmp r2, r3 - 80098c0: d092 beq.n 80097e8 - } - } - } - } - return HAL_OK; - 80098c2: 2300 movs r3, #0 -} - 80098c4: 4618 mov r0, r3 - 80098c6: 3710 adds r7, #16 - 80098c8: 46bd mov sp, r7 - 80098ca: bd80 pop {r7, pc} - -080098cc : - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - 80098cc: b490 push {r4, r7} - 80098ce: b086 sub sp, #24 - 80098d0: af00 add r7, sp, #0 - 80098d2: 6078 str r0, [r7, #4] - 80098d4: 6039 str r1, [r7, #0] - HAL_StatusTypeDef ret = HAL_OK; - 80098d6: 2300 movs r3, #0 - 80098d8: 75fb strb r3, [r7, #23] - uint16_t wEpRegVal; - - wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK; - 80098da: 687a ldr r2, [r7, #4] - 80098dc: 683b ldr r3, [r7, #0] - 80098de: 781b ldrb r3, [r3, #0] - 80098e0: 009b lsls r3, r3, #2 - 80098e2: 4413 add r3, r2 - 80098e4: 881b ldrh r3, [r3, #0] - 80098e6: b29b uxth r3, r3 - 80098e8: f423 43ec bic.w r3, r3, #30208 ; 0x7600 - 80098ec: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80098f0: 82bb strh r3, [r7, #20] - - /* initialize Endpoint */ - switch (ep->type) - 80098f2: 683b ldr r3, [r7, #0] - 80098f4: 78db ldrb r3, [r3, #3] - 80098f6: 2b03 cmp r3, #3 - 80098f8: d819 bhi.n 800992e - 80098fa: a201 add r2, pc, #4 ; (adr r2, 8009900 ) - 80098fc: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8009900: 08009911 .word 0x08009911 - 8009904: 08009925 .word 0x08009925 - 8009908: 08009935 .word 0x08009935 - 800990c: 0800991b .word 0x0800991b - { - case EP_TYPE_CTRL: - wEpRegVal |= USB_EP_CONTROL; - 8009910: 8abb ldrh r3, [r7, #20] - 8009912: f443 7300 orr.w r3, r3, #512 ; 0x200 - 8009916: 82bb strh r3, [r7, #20] - break; - 8009918: e00d b.n 8009936 - case EP_TYPE_BULK: - wEpRegVal |= USB_EP_BULK; - break; - - case EP_TYPE_INTR: - wEpRegVal |= USB_EP_INTERRUPT; - 800991a: 8abb ldrh r3, [r7, #20] - 800991c: f443 63c0 orr.w r3, r3, #1536 ; 0x600 - 8009920: 82bb strh r3, [r7, #20] - break; - 8009922: e008 b.n 8009936 - - case EP_TYPE_ISOC: - wEpRegVal |= USB_EP_ISOCHRONOUS; - 8009924: 8abb ldrh r3, [r7, #20] - 8009926: f443 6380 orr.w r3, r3, #1024 ; 0x400 - 800992a: 82bb strh r3, [r7, #20] - break; - 800992c: e003 b.n 8009936 - - default: - ret = HAL_ERROR; - 800992e: 2301 movs r3, #1 - 8009930: 75fb strb r3, [r7, #23] - break; - 8009932: e000 b.n 8009936 - break; - 8009934: bf00 nop - } - - PCD_SET_ENDPOINT(USBx, ep->num, wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX); - 8009936: 687a ldr r2, [r7, #4] - 8009938: 683b ldr r3, [r7, #0] - 800993a: 781b ldrb r3, [r3, #0] - 800993c: 009b lsls r3, r3, #2 - 800993e: 441a add r2, r3 - 8009940: 8abb ldrh r3, [r7, #20] - 8009942: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000 - 8009946: f443 037f orr.w r3, r3, #16711680 ; 0xff0000 - 800994a: f443 4300 orr.w r3, r3, #32768 ; 0x8000 - 800994e: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8009952: b29b uxth r3, r3 - 8009954: 8013 strh r3, [r2, #0] - - PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); - 8009956: 687a ldr r2, [r7, #4] - 8009958: 683b ldr r3, [r7, #0] - 800995a: 781b ldrb r3, [r3, #0] - 800995c: 009b lsls r3, r3, #2 - 800995e: 4413 add r3, r2 - 8009960: 881b ldrh r3, [r3, #0] - 8009962: b29b uxth r3, r3 - 8009964: b21b sxth r3, r3 - 8009966: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 800996a: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800996e: b21a sxth r2, r3 - 8009970: 683b ldr r3, [r7, #0] - 8009972: 781b ldrb r3, [r3, #0] - 8009974: b21b sxth r3, r3 - 8009976: 4313 orrs r3, r2 - 8009978: b21b sxth r3, r3 - 800997a: b29c uxth r4, r3 - 800997c: 687a ldr r2, [r7, #4] - 800997e: 683b ldr r3, [r7, #0] - 8009980: 781b ldrb r3, [r3, #0] - 8009982: 009b lsls r3, r3, #2 - 8009984: 441a add r2, r3 - 8009986: 4b8c ldr r3, [pc, #560] ; (8009bb8 ) - 8009988: 4323 orrs r3, r4 - 800998a: b29b uxth r3, r3 - 800998c: 8013 strh r3, [r2, #0] - - if (ep->doublebuffer == 0U) - 800998e: 683b ldr r3, [r7, #0] - 8009990: 7b1b ldrb r3, [r3, #12] - 8009992: 2b00 cmp r3, #0 - 8009994: f040 8116 bne.w 8009bc4 - { - if (ep->is_in != 0U) - 8009998: 683b ldr r3, [r7, #0] - 800999a: 785b ldrb r3, [r3, #1] - 800999c: 2b00 cmp r3, #0 - 800999e: d067 beq.n 8009a70 - { - /*Set the endpoint Transmit buffer address */ - PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); - 80099a0: 687c ldr r4, [r7, #4] - 80099a2: 687b ldr r3, [r7, #4] - 80099a4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 80099a8: b29b uxth r3, r3 - 80099aa: 441c add r4, r3 - 80099ac: 683b ldr r3, [r7, #0] - 80099ae: 781b ldrb r3, [r3, #0] - 80099b0: 011b lsls r3, r3, #4 - 80099b2: 4423 add r3, r4 - 80099b4: f503 6380 add.w r3, r3, #1024 ; 0x400 - 80099b8: 461c mov r4, r3 - 80099ba: 683b ldr r3, [r7, #0] - 80099bc: 88db ldrh r3, [r3, #6] - 80099be: 085b lsrs r3, r3, #1 - 80099c0: b29b uxth r3, r3 - 80099c2: 005b lsls r3, r3, #1 - 80099c4: b29b uxth r3, r3 - 80099c6: 8023 strh r3, [r4, #0] - PCD_CLEAR_TX_DTOG(USBx, ep->num); - 80099c8: 687a ldr r2, [r7, #4] - 80099ca: 683b ldr r3, [r7, #0] - 80099cc: 781b ldrb r3, [r3, #0] - 80099ce: 009b lsls r3, r3, #2 - 80099d0: 4413 add r3, r2 - 80099d2: 881b ldrh r3, [r3, #0] - 80099d4: b29c uxth r4, r3 - 80099d6: 4623 mov r3, r4 - 80099d8: f003 0340 and.w r3, r3, #64 ; 0x40 - 80099dc: 2b00 cmp r3, #0 - 80099de: d014 beq.n 8009a0a - 80099e0: 687a ldr r2, [r7, #4] - 80099e2: 683b ldr r3, [r7, #0] - 80099e4: 781b ldrb r3, [r3, #0] - 80099e6: 009b lsls r3, r3, #2 - 80099e8: 4413 add r3, r2 - 80099ea: 881b ldrh r3, [r3, #0] - 80099ec: b29b uxth r3, r3 - 80099ee: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 80099f2: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80099f6: b29c uxth r4, r3 - 80099f8: 687a ldr r2, [r7, #4] - 80099fa: 683b ldr r3, [r7, #0] - 80099fc: 781b ldrb r3, [r3, #0] - 80099fe: 009b lsls r3, r3, #2 - 8009a00: 441a add r2, r3 - 8009a02: 4b6e ldr r3, [pc, #440] ; (8009bbc ) - 8009a04: 4323 orrs r3, r4 - 8009a06: b29b uxth r3, r3 - 8009a08: 8013 strh r3, [r2, #0] - - if (ep->type != EP_TYPE_ISOC) - 8009a0a: 683b ldr r3, [r7, #0] - 8009a0c: 78db ldrb r3, [r3, #3] - 8009a0e: 2b01 cmp r3, #1 - 8009a10: d018 beq.n 8009a44 - { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - 8009a12: 687a ldr r2, [r7, #4] - 8009a14: 683b ldr r3, [r7, #0] - 8009a16: 781b ldrb r3, [r3, #0] - 8009a18: 009b lsls r3, r3, #2 - 8009a1a: 4413 add r3, r2 - 8009a1c: 881b ldrh r3, [r3, #0] - 8009a1e: b29b uxth r3, r3 - 8009a20: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009a24: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8009a28: b29c uxth r4, r3 - 8009a2a: f084 0320 eor.w r3, r4, #32 - 8009a2e: b29c uxth r4, r3 - 8009a30: 687a ldr r2, [r7, #4] - 8009a32: 683b ldr r3, [r7, #0] - 8009a34: 781b ldrb r3, [r3, #0] - 8009a36: 009b lsls r3, r3, #2 - 8009a38: 441a add r2, r3 - 8009a3a: 4b5f ldr r3, [pc, #380] ; (8009bb8 ) - 8009a3c: 4323 orrs r3, r4 - 8009a3e: b29b uxth r3, r3 - 8009a40: 8013 strh r3, [r2, #0] - 8009a42: e22f b.n 8009ea4 - } - else - { - /* Configure TX Endpoint to disabled state */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - 8009a44: 687a ldr r2, [r7, #4] - 8009a46: 683b ldr r3, [r7, #0] - 8009a48: 781b ldrb r3, [r3, #0] - 8009a4a: 009b lsls r3, r3, #2 - 8009a4c: 4413 add r3, r2 - 8009a4e: 881b ldrh r3, [r3, #0] - 8009a50: b29b uxth r3, r3 - 8009a52: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009a56: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8009a5a: b29c uxth r4, r3 - 8009a5c: 687a ldr r2, [r7, #4] - 8009a5e: 683b ldr r3, [r7, #0] - 8009a60: 781b ldrb r3, [r3, #0] - 8009a62: 009b lsls r3, r3, #2 - 8009a64: 441a add r2, r3 - 8009a66: 4b54 ldr r3, [pc, #336] ; (8009bb8 ) - 8009a68: 4323 orrs r3, r4 - 8009a6a: b29b uxth r3, r3 - 8009a6c: 8013 strh r3, [r2, #0] - 8009a6e: e219 b.n 8009ea4 - } - } - else - { - /*Set the endpoint Receive buffer address */ - PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); - 8009a70: 687c ldr r4, [r7, #4] - 8009a72: 687b ldr r3, [r7, #4] - 8009a74: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8009a78: b29b uxth r3, r3 - 8009a7a: 441c add r4, r3 - 8009a7c: 683b ldr r3, [r7, #0] - 8009a7e: 781b ldrb r3, [r3, #0] - 8009a80: 011b lsls r3, r3, #4 - 8009a82: 4423 add r3, r4 - 8009a84: f503 6381 add.w r3, r3, #1032 ; 0x408 - 8009a88: 461c mov r4, r3 - 8009a8a: 683b ldr r3, [r7, #0] - 8009a8c: 88db ldrh r3, [r3, #6] - 8009a8e: 085b lsrs r3, r3, #1 - 8009a90: b29b uxth r3, r3 - 8009a92: 005b lsls r3, r3, #1 - 8009a94: b29b uxth r3, r3 - 8009a96: 8023 strh r3, [r4, #0] - /*Set the endpoint Receive buffer counter*/ - PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); - 8009a98: 687c ldr r4, [r7, #4] - 8009a9a: 687b ldr r3, [r7, #4] - 8009a9c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8009aa0: b29b uxth r3, r3 - 8009aa2: 441c add r4, r3 - 8009aa4: 683b ldr r3, [r7, #0] - 8009aa6: 781b ldrb r3, [r3, #0] - 8009aa8: 011b lsls r3, r3, #4 - 8009aaa: 4423 add r3, r4 - 8009aac: f203 430c addw r3, r3, #1036 ; 0x40c - 8009ab0: 60fb str r3, [r7, #12] - 8009ab2: 683b ldr r3, [r7, #0] - 8009ab4: 691b ldr r3, [r3, #16] - 8009ab6: 2b00 cmp r3, #0 - 8009ab8: d110 bne.n 8009adc - 8009aba: 68fb ldr r3, [r7, #12] - 8009abc: 881b ldrh r3, [r3, #0] - 8009abe: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00 - 8009ac2: b29a uxth r2, r3 - 8009ac4: 68fb ldr r3, [r7, #12] - 8009ac6: 801a strh r2, [r3, #0] - 8009ac8: 68fb ldr r3, [r7, #12] - 8009aca: 881b ldrh r3, [r3, #0] - 8009acc: ea6f 4343 mvn.w r3, r3, lsl #17 - 8009ad0: ea6f 4353 mvn.w r3, r3, lsr #17 - 8009ad4: b29a uxth r2, r3 - 8009ad6: 68fb ldr r3, [r7, #12] - 8009ad8: 801a strh r2, [r3, #0] - 8009ada: e02f b.n 8009b3c - 8009adc: 683b ldr r3, [r7, #0] - 8009ade: 691b ldr r3, [r3, #16] - 8009ae0: 2b3e cmp r3, #62 ; 0x3e - 8009ae2: d813 bhi.n 8009b0c - 8009ae4: 683b ldr r3, [r7, #0] - 8009ae6: 691b ldr r3, [r3, #16] - 8009ae8: 085b lsrs r3, r3, #1 - 8009aea: 613b str r3, [r7, #16] - 8009aec: 683b ldr r3, [r7, #0] - 8009aee: 691b ldr r3, [r3, #16] - 8009af0: f003 0301 and.w r3, r3, #1 - 8009af4: 2b00 cmp r3, #0 - 8009af6: d002 beq.n 8009afe - 8009af8: 693b ldr r3, [r7, #16] - 8009afa: 3301 adds r3, #1 - 8009afc: 613b str r3, [r7, #16] - 8009afe: 693b ldr r3, [r7, #16] - 8009b00: b29b uxth r3, r3 - 8009b02: 029b lsls r3, r3, #10 - 8009b04: b29a uxth r2, r3 - 8009b06: 68fb ldr r3, [r7, #12] - 8009b08: 801a strh r2, [r3, #0] - 8009b0a: e017 b.n 8009b3c - 8009b0c: 683b ldr r3, [r7, #0] - 8009b0e: 691b ldr r3, [r3, #16] - 8009b10: 095b lsrs r3, r3, #5 - 8009b12: 613b str r3, [r7, #16] - 8009b14: 683b ldr r3, [r7, #0] - 8009b16: 691b ldr r3, [r3, #16] - 8009b18: f003 031f and.w r3, r3, #31 - 8009b1c: 2b00 cmp r3, #0 - 8009b1e: d102 bne.n 8009b26 - 8009b20: 693b ldr r3, [r7, #16] - 8009b22: 3b01 subs r3, #1 - 8009b24: 613b str r3, [r7, #16] - 8009b26: 693b ldr r3, [r7, #16] - 8009b28: b29b uxth r3, r3 - 8009b2a: 029b lsls r3, r3, #10 - 8009b2c: b29b uxth r3, r3 - 8009b2e: ea6f 4343 mvn.w r3, r3, lsl #17 - 8009b32: ea6f 4353 mvn.w r3, r3, lsr #17 - 8009b36: b29a uxth r2, r3 - 8009b38: 68fb ldr r3, [r7, #12] - 8009b3a: 801a strh r2, [r3, #0] - PCD_CLEAR_RX_DTOG(USBx, ep->num); - 8009b3c: 687a ldr r2, [r7, #4] - 8009b3e: 683b ldr r3, [r7, #0] - 8009b40: 781b ldrb r3, [r3, #0] - 8009b42: 009b lsls r3, r3, #2 - 8009b44: 4413 add r3, r2 - 8009b46: 881b ldrh r3, [r3, #0] - 8009b48: b29c uxth r4, r3 - 8009b4a: 4623 mov r3, r4 - 8009b4c: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8009b50: 2b00 cmp r3, #0 - 8009b52: d014 beq.n 8009b7e - 8009b54: 687a ldr r2, [r7, #4] - 8009b56: 683b ldr r3, [r7, #0] - 8009b58: 781b ldrb r3, [r3, #0] - 8009b5a: 009b lsls r3, r3, #2 - 8009b5c: 4413 add r3, r2 - 8009b5e: 881b ldrh r3, [r3, #0] - 8009b60: b29b uxth r3, r3 - 8009b62: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009b66: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009b6a: b29c uxth r4, r3 - 8009b6c: 687a ldr r2, [r7, #4] - 8009b6e: 683b ldr r3, [r7, #0] - 8009b70: 781b ldrb r3, [r3, #0] - 8009b72: 009b lsls r3, r3, #2 - 8009b74: 441a add r2, r3 - 8009b76: 4b12 ldr r3, [pc, #72] ; (8009bc0 ) - 8009b78: 4323 orrs r3, r4 - 8009b7a: b29b uxth r3, r3 - 8009b7c: 8013 strh r3, [r2, #0] - /* Configure VALID status for the Endpoint*/ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - 8009b7e: 687a ldr r2, [r7, #4] - 8009b80: 683b ldr r3, [r7, #0] - 8009b82: 781b ldrb r3, [r3, #0] - 8009b84: 009b lsls r3, r3, #2 - 8009b86: 4413 add r3, r2 - 8009b88: 881b ldrh r3, [r3, #0] - 8009b8a: b29b uxth r3, r3 - 8009b8c: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 8009b90: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009b94: b29c uxth r4, r3 - 8009b96: f484 5380 eor.w r3, r4, #4096 ; 0x1000 - 8009b9a: b29c uxth r4, r3 - 8009b9c: f484 5300 eor.w r3, r4, #8192 ; 0x2000 - 8009ba0: b29c uxth r4, r3 - 8009ba2: 687a ldr r2, [r7, #4] - 8009ba4: 683b ldr r3, [r7, #0] - 8009ba6: 781b ldrb r3, [r3, #0] - 8009ba8: 009b lsls r3, r3, #2 - 8009baa: 441a add r2, r3 - 8009bac: 4b02 ldr r3, [pc, #8] ; (8009bb8 ) - 8009bae: 4323 orrs r3, r4 - 8009bb0: b29b uxth r3, r3 - 8009bb2: 8013 strh r3, [r2, #0] - 8009bb4: e176 b.n 8009ea4 - 8009bb6: bf00 nop - 8009bb8: ffff8080 .word 0xffff8080 - 8009bbc: ffff80c0 .word 0xffff80c0 - 8009bc0: ffffc080 .word 0xffffc080 - } - /*Double Buffer*/ - else - { - /* Set the endpoint as double buffered */ - PCD_SET_EP_DBUF(USBx, ep->num); - 8009bc4: 687a ldr r2, [r7, #4] - 8009bc6: 683b ldr r3, [r7, #0] - 8009bc8: 781b ldrb r3, [r3, #0] - 8009bca: 009b lsls r3, r3, #2 - 8009bcc: 4413 add r3, r2 - 8009bce: 881b ldrh r3, [r3, #0] - 8009bd0: b29b uxth r3, r3 - 8009bd2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009bd6: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009bda: b29c uxth r4, r3 - 8009bdc: 687a ldr r2, [r7, #4] - 8009bde: 683b ldr r3, [r7, #0] - 8009be0: 781b ldrb r3, [r3, #0] - 8009be2: 009b lsls r3, r3, #2 - 8009be4: 441a add r2, r3 - 8009be6: 4b96 ldr r3, [pc, #600] ; (8009e40 ) - 8009be8: 4323 orrs r3, r4 - 8009bea: b29b uxth r3, r3 - 8009bec: 8013 strh r3, [r2, #0] - /* Set buffer address for double buffered mode */ - PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); - 8009bee: 687c ldr r4, [r7, #4] - 8009bf0: 687b ldr r3, [r7, #4] - 8009bf2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8009bf6: b29b uxth r3, r3 - 8009bf8: 441c add r4, r3 - 8009bfa: 683b ldr r3, [r7, #0] - 8009bfc: 781b ldrb r3, [r3, #0] - 8009bfe: 011b lsls r3, r3, #4 - 8009c00: 4423 add r3, r4 - 8009c02: f503 6380 add.w r3, r3, #1024 ; 0x400 - 8009c06: 461c mov r4, r3 - 8009c08: 683b ldr r3, [r7, #0] - 8009c0a: 891b ldrh r3, [r3, #8] - 8009c0c: 085b lsrs r3, r3, #1 - 8009c0e: b29b uxth r3, r3 - 8009c10: 005b lsls r3, r3, #1 - 8009c12: b29b uxth r3, r3 - 8009c14: 8023 strh r3, [r4, #0] - 8009c16: 687c ldr r4, [r7, #4] - 8009c18: 687b ldr r3, [r7, #4] - 8009c1a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8009c1e: b29b uxth r3, r3 - 8009c20: 441c add r4, r3 - 8009c22: 683b ldr r3, [r7, #0] - 8009c24: 781b ldrb r3, [r3, #0] - 8009c26: 011b lsls r3, r3, #4 - 8009c28: 4423 add r3, r4 - 8009c2a: f503 6381 add.w r3, r3, #1032 ; 0x408 - 8009c2e: 461c mov r4, r3 - 8009c30: 683b ldr r3, [r7, #0] - 8009c32: 895b ldrh r3, [r3, #10] - 8009c34: 085b lsrs r3, r3, #1 - 8009c36: b29b uxth r3, r3 - 8009c38: 005b lsls r3, r3, #1 - 8009c3a: b29b uxth r3, r3 - 8009c3c: 8023 strh r3, [r4, #0] - - if (ep->is_in == 0U) - 8009c3e: 683b ldr r3, [r7, #0] - 8009c40: 785b ldrb r3, [r3, #1] - 8009c42: 2b00 cmp r3, #0 - 8009c44: f040 8088 bne.w 8009d58 - { - /* Clear the data toggle bits for the endpoint IN/OUT */ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - 8009c48: 687a ldr r2, [r7, #4] - 8009c4a: 683b ldr r3, [r7, #0] - 8009c4c: 781b ldrb r3, [r3, #0] - 8009c4e: 009b lsls r3, r3, #2 - 8009c50: 4413 add r3, r2 - 8009c52: 881b ldrh r3, [r3, #0] - 8009c54: b29c uxth r4, r3 - 8009c56: 4623 mov r3, r4 - 8009c58: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8009c5c: 2b00 cmp r3, #0 - 8009c5e: d014 beq.n 8009c8a - 8009c60: 687a ldr r2, [r7, #4] - 8009c62: 683b ldr r3, [r7, #0] - 8009c64: 781b ldrb r3, [r3, #0] - 8009c66: 009b lsls r3, r3, #2 - 8009c68: 4413 add r3, r2 - 8009c6a: 881b ldrh r3, [r3, #0] - 8009c6c: b29b uxth r3, r3 - 8009c6e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009c72: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009c76: b29c uxth r4, r3 - 8009c78: 687a ldr r2, [r7, #4] - 8009c7a: 683b ldr r3, [r7, #0] - 8009c7c: 781b ldrb r3, [r3, #0] - 8009c7e: 009b lsls r3, r3, #2 - 8009c80: 441a add r2, r3 - 8009c82: 4b70 ldr r3, [pc, #448] ; (8009e44 ) - 8009c84: 4323 orrs r3, r4 - 8009c86: b29b uxth r3, r3 - 8009c88: 8013 strh r3, [r2, #0] - PCD_CLEAR_TX_DTOG(USBx, ep->num); - 8009c8a: 687a ldr r2, [r7, #4] - 8009c8c: 683b ldr r3, [r7, #0] - 8009c8e: 781b ldrb r3, [r3, #0] - 8009c90: 009b lsls r3, r3, #2 - 8009c92: 4413 add r3, r2 - 8009c94: 881b ldrh r3, [r3, #0] - 8009c96: b29c uxth r4, r3 - 8009c98: 4623 mov r3, r4 - 8009c9a: f003 0340 and.w r3, r3, #64 ; 0x40 - 8009c9e: 2b00 cmp r3, #0 - 8009ca0: d014 beq.n 8009ccc - 8009ca2: 687a ldr r2, [r7, #4] - 8009ca4: 683b ldr r3, [r7, #0] - 8009ca6: 781b ldrb r3, [r3, #0] - 8009ca8: 009b lsls r3, r3, #2 - 8009caa: 4413 add r3, r2 - 8009cac: 881b ldrh r3, [r3, #0] - 8009cae: b29b uxth r3, r3 - 8009cb0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009cb4: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009cb8: b29c uxth r4, r3 - 8009cba: 687a ldr r2, [r7, #4] - 8009cbc: 683b ldr r3, [r7, #0] - 8009cbe: 781b ldrb r3, [r3, #0] - 8009cc0: 009b lsls r3, r3, #2 - 8009cc2: 441a add r2, r3 - 8009cc4: 4b60 ldr r3, [pc, #384] ; (8009e48 ) - 8009cc6: 4323 orrs r3, r4 - 8009cc8: b29b uxth r3, r3 - 8009cca: 8013 strh r3, [r2, #0] - - /* Reset value of the data toggle bits for the endpoint out */ - PCD_TX_DTOG(USBx, ep->num); - 8009ccc: 687a ldr r2, [r7, #4] - 8009cce: 683b ldr r3, [r7, #0] - 8009cd0: 781b ldrb r3, [r3, #0] - 8009cd2: 009b lsls r3, r3, #2 - 8009cd4: 4413 add r3, r2 - 8009cd6: 881b ldrh r3, [r3, #0] - 8009cd8: b29b uxth r3, r3 - 8009cda: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009cde: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009ce2: b29c uxth r4, r3 - 8009ce4: 687a ldr r2, [r7, #4] - 8009ce6: 683b ldr r3, [r7, #0] - 8009ce8: 781b ldrb r3, [r3, #0] - 8009cea: 009b lsls r3, r3, #2 - 8009cec: 441a add r2, r3 - 8009cee: 4b56 ldr r3, [pc, #344] ; (8009e48 ) - 8009cf0: 4323 orrs r3, r4 - 8009cf2: b29b uxth r3, r3 - 8009cf4: 8013 strh r3, [r2, #0] - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - 8009cf6: 687a ldr r2, [r7, #4] - 8009cf8: 683b ldr r3, [r7, #0] - 8009cfa: 781b ldrb r3, [r3, #0] - 8009cfc: 009b lsls r3, r3, #2 - 8009cfe: 4413 add r3, r2 - 8009d00: 881b ldrh r3, [r3, #0] - 8009d02: b29b uxth r3, r3 - 8009d04: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 8009d08: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009d0c: b29c uxth r4, r3 - 8009d0e: f484 5380 eor.w r3, r4, #4096 ; 0x1000 - 8009d12: b29c uxth r4, r3 - 8009d14: f484 5300 eor.w r3, r4, #8192 ; 0x2000 - 8009d18: b29c uxth r4, r3 - 8009d1a: 687a ldr r2, [r7, #4] - 8009d1c: 683b ldr r3, [r7, #0] - 8009d1e: 781b ldrb r3, [r3, #0] - 8009d20: 009b lsls r3, r3, #2 - 8009d22: 441a add r2, r3 - 8009d24: 4b49 ldr r3, [pc, #292] ; (8009e4c ) - 8009d26: 4323 orrs r3, r4 - 8009d28: b29b uxth r3, r3 - 8009d2a: 8013 strh r3, [r2, #0] - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - 8009d2c: 687a ldr r2, [r7, #4] - 8009d2e: 683b ldr r3, [r7, #0] - 8009d30: 781b ldrb r3, [r3, #0] - 8009d32: 009b lsls r3, r3, #2 - 8009d34: 4413 add r3, r2 - 8009d36: 881b ldrh r3, [r3, #0] - 8009d38: b29b uxth r3, r3 - 8009d3a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009d3e: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8009d42: b29c uxth r4, r3 - 8009d44: 687a ldr r2, [r7, #4] - 8009d46: 683b ldr r3, [r7, #0] - 8009d48: 781b ldrb r3, [r3, #0] - 8009d4a: 009b lsls r3, r3, #2 - 8009d4c: 441a add r2, r3 - 8009d4e: 4b3f ldr r3, [pc, #252] ; (8009e4c ) - 8009d50: 4323 orrs r3, r4 - 8009d52: b29b uxth r3, r3 - 8009d54: 8013 strh r3, [r2, #0] - 8009d56: e0a5 b.n 8009ea4 - } - else - { - /* Clear the data toggle bits for the endpoint IN/OUT */ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - 8009d58: 687a ldr r2, [r7, #4] - 8009d5a: 683b ldr r3, [r7, #0] - 8009d5c: 781b ldrb r3, [r3, #0] - 8009d5e: 009b lsls r3, r3, #2 - 8009d60: 4413 add r3, r2 - 8009d62: 881b ldrh r3, [r3, #0] - 8009d64: b29c uxth r4, r3 - 8009d66: 4623 mov r3, r4 - 8009d68: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8009d6c: 2b00 cmp r3, #0 - 8009d6e: d014 beq.n 8009d9a - 8009d70: 687a ldr r2, [r7, #4] - 8009d72: 683b ldr r3, [r7, #0] - 8009d74: 781b ldrb r3, [r3, #0] - 8009d76: 009b lsls r3, r3, #2 - 8009d78: 4413 add r3, r2 - 8009d7a: 881b ldrh r3, [r3, #0] - 8009d7c: b29b uxth r3, r3 - 8009d7e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009d82: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009d86: b29c uxth r4, r3 - 8009d88: 687a ldr r2, [r7, #4] - 8009d8a: 683b ldr r3, [r7, #0] - 8009d8c: 781b ldrb r3, [r3, #0] - 8009d8e: 009b lsls r3, r3, #2 - 8009d90: 441a add r2, r3 - 8009d92: 4b2c ldr r3, [pc, #176] ; (8009e44 ) - 8009d94: 4323 orrs r3, r4 - 8009d96: b29b uxth r3, r3 - 8009d98: 8013 strh r3, [r2, #0] - PCD_CLEAR_TX_DTOG(USBx, ep->num); - 8009d9a: 687a ldr r2, [r7, #4] - 8009d9c: 683b ldr r3, [r7, #0] - 8009d9e: 781b ldrb r3, [r3, #0] - 8009da0: 009b lsls r3, r3, #2 - 8009da2: 4413 add r3, r2 - 8009da4: 881b ldrh r3, [r3, #0] - 8009da6: b29c uxth r4, r3 - 8009da8: 4623 mov r3, r4 - 8009daa: f003 0340 and.w r3, r3, #64 ; 0x40 - 8009dae: 2b00 cmp r3, #0 - 8009db0: d014 beq.n 8009ddc - 8009db2: 687a ldr r2, [r7, #4] - 8009db4: 683b ldr r3, [r7, #0] - 8009db6: 781b ldrb r3, [r3, #0] - 8009db8: 009b lsls r3, r3, #2 - 8009dba: 4413 add r3, r2 - 8009dbc: 881b ldrh r3, [r3, #0] - 8009dbe: b29b uxth r3, r3 - 8009dc0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009dc4: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009dc8: b29c uxth r4, r3 - 8009dca: 687a ldr r2, [r7, #4] - 8009dcc: 683b ldr r3, [r7, #0] - 8009dce: 781b ldrb r3, [r3, #0] - 8009dd0: 009b lsls r3, r3, #2 - 8009dd2: 441a add r2, r3 - 8009dd4: 4b1c ldr r3, [pc, #112] ; (8009e48 ) - 8009dd6: 4323 orrs r3, r4 - 8009dd8: b29b uxth r3, r3 - 8009dda: 8013 strh r3, [r2, #0] - PCD_RX_DTOG(USBx, ep->num); - 8009ddc: 687a ldr r2, [r7, #4] - 8009dde: 683b ldr r3, [r7, #0] - 8009de0: 781b ldrb r3, [r3, #0] - 8009de2: 009b lsls r3, r3, #2 - 8009de4: 4413 add r3, r2 - 8009de6: 881b ldrh r3, [r3, #0] - 8009de8: b29b uxth r3, r3 - 8009dea: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009dee: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009df2: b29c uxth r4, r3 - 8009df4: 687a ldr r2, [r7, #4] - 8009df6: 683b ldr r3, [r7, #0] - 8009df8: 781b ldrb r3, [r3, #0] - 8009dfa: 009b lsls r3, r3, #2 - 8009dfc: 441a add r2, r3 - 8009dfe: 4b11 ldr r3, [pc, #68] ; (8009e44 ) - 8009e00: 4323 orrs r3, r4 - 8009e02: b29b uxth r3, r3 - 8009e04: 8013 strh r3, [r2, #0] - - if (ep->type != EP_TYPE_ISOC) - 8009e06: 683b ldr r3, [r7, #0] - 8009e08: 78db ldrb r3, [r3, #3] - 8009e0a: 2b01 cmp r3, #1 - 8009e0c: d020 beq.n 8009e50 - { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - 8009e0e: 687a ldr r2, [r7, #4] - 8009e10: 683b ldr r3, [r7, #0] - 8009e12: 781b ldrb r3, [r3, #0] - 8009e14: 009b lsls r3, r3, #2 - 8009e16: 4413 add r3, r2 - 8009e18: 881b ldrh r3, [r3, #0] - 8009e1a: b29b uxth r3, r3 - 8009e1c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009e20: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8009e24: b29c uxth r4, r3 - 8009e26: f084 0320 eor.w r3, r4, #32 - 8009e2a: b29c uxth r4, r3 - 8009e2c: 687a ldr r2, [r7, #4] - 8009e2e: 683b ldr r3, [r7, #0] - 8009e30: 781b ldrb r3, [r3, #0] - 8009e32: 009b lsls r3, r3, #2 - 8009e34: 441a add r2, r3 - 8009e36: 4b05 ldr r3, [pc, #20] ; (8009e4c ) - 8009e38: 4323 orrs r3, r4 - 8009e3a: b29b uxth r3, r3 - 8009e3c: 8013 strh r3, [r2, #0] - 8009e3e: e01c b.n 8009e7a - 8009e40: ffff8180 .word 0xffff8180 - 8009e44: ffffc080 .word 0xffffc080 - 8009e48: ffff80c0 .word 0xffff80c0 - 8009e4c: ffff8080 .word 0xffff8080 - } - else - { - /* Configure TX Endpoint to disabled state */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - 8009e50: 687a ldr r2, [r7, #4] - 8009e52: 683b ldr r3, [r7, #0] - 8009e54: 781b ldrb r3, [r3, #0] - 8009e56: 009b lsls r3, r3, #2 - 8009e58: 4413 add r3, r2 - 8009e5a: 881b ldrh r3, [r3, #0] - 8009e5c: b29b uxth r3, r3 - 8009e5e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 8009e62: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8009e66: b29c uxth r4, r3 - 8009e68: 687a ldr r2, [r7, #4] - 8009e6a: 683b ldr r3, [r7, #0] - 8009e6c: 781b ldrb r3, [r3, #0] - 8009e6e: 009b lsls r3, r3, #2 - 8009e70: 441a add r2, r3 - 8009e72: 4b0f ldr r3, [pc, #60] ; (8009eb0 ) - 8009e74: 4323 orrs r3, r4 - 8009e76: b29b uxth r3, r3 - 8009e78: 8013 strh r3, [r2, #0] - } - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - 8009e7a: 687a ldr r2, [r7, #4] - 8009e7c: 683b ldr r3, [r7, #0] - 8009e7e: 781b ldrb r3, [r3, #0] - 8009e80: 009b lsls r3, r3, #2 - 8009e82: 4413 add r3, r2 - 8009e84: 881b ldrh r3, [r3, #0] - 8009e86: b29b uxth r3, r3 - 8009e88: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 8009e8c: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8009e90: b29c uxth r4, r3 - 8009e92: 687a ldr r2, [r7, #4] - 8009e94: 683b ldr r3, [r7, #0] - 8009e96: 781b ldrb r3, [r3, #0] - 8009e98: 009b lsls r3, r3, #2 - 8009e9a: 441a add r2, r3 - 8009e9c: 4b04 ldr r3, [pc, #16] ; (8009eb0 ) - 8009e9e: 4323 orrs r3, r4 - 8009ea0: b29b uxth r3, r3 - 8009ea2: 8013 strh r3, [r2, #0] - } - } - - return ret; - 8009ea4: 7dfb ldrb r3, [r7, #23] -} - 8009ea6: 4618 mov r0, r3 - 8009ea8: 3718 adds r7, #24 - 8009eaa: 46bd mov sp, r7 - 8009eac: bc90 pop {r4, r7} - 8009eae: 4770 bx lr - 8009eb0: ffff8080 .word 0xffff8080 - -08009eb4 : - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - 8009eb4: b590 push {r4, r7, lr} - 8009eb6: b095 sub sp, #84 ; 0x54 - 8009eb8: af00 add r7, sp, #0 - 8009eba: 6078 str r0, [r7, #4] - 8009ebc: 6039 str r1, [r7, #0] - uint16_t pmabuffer; - uint32_t len; - - /* IN endpoint */ - if (ep->is_in == 1U) - 8009ebe: 683b ldr r3, [r7, #0] - 8009ec0: 785b ldrb r3, [r3, #1] - 8009ec2: 2b01 cmp r3, #1 - 8009ec4: f040 816d bne.w 800a1a2 - { - /*Multi packet transfer*/ - if (ep->xfer_len > ep->maxpacket) - 8009ec8: 683b ldr r3, [r7, #0] - 8009eca: 699a ldr r2, [r3, #24] - 8009ecc: 683b ldr r3, [r7, #0] - 8009ece: 691b ldr r3, [r3, #16] - 8009ed0: 429a cmp r2, r3 - 8009ed2: d909 bls.n 8009ee8 - { - len = ep->maxpacket; - 8009ed4: 683b ldr r3, [r7, #0] - 8009ed6: 691b ldr r3, [r3, #16] - 8009ed8: 64bb str r3, [r7, #72] ; 0x48 - ep->xfer_len -= len; - 8009eda: 683b ldr r3, [r7, #0] - 8009edc: 699a ldr r2, [r3, #24] - 8009ede: 6cbb ldr r3, [r7, #72] ; 0x48 - 8009ee0: 1ad2 subs r2, r2, r3 - 8009ee2: 683b ldr r3, [r7, #0] - 8009ee4: 619a str r2, [r3, #24] - 8009ee6: e005 b.n 8009ef4 - } - else - { - len = ep->xfer_len; - 8009ee8: 683b ldr r3, [r7, #0] - 8009eea: 699b ldr r3, [r3, #24] - 8009eec: 64bb str r3, [r7, #72] ; 0x48 - ep->xfer_len = 0U; - 8009eee: 683b ldr r3, [r7, #0] - 8009ef0: 2200 movs r2, #0 - 8009ef2: 619a str r2, [r3, #24] - } - - /* configure and validate Tx endpoint */ - if (ep->doublebuffer == 0U) - 8009ef4: 683b ldr r3, [r7, #0] - 8009ef6: 7b1b ldrb r3, [r3, #12] - 8009ef8: 2b00 cmp r3, #0 - 8009efa: d11a bne.n 8009f32 - { - USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); - 8009efc: 683b ldr r3, [r7, #0] - 8009efe: 6959 ldr r1, [r3, #20] - 8009f00: 683b ldr r3, [r7, #0] - 8009f02: 88da ldrh r2, [r3, #6] - 8009f04: 6cbb ldr r3, [r7, #72] ; 0x48 - 8009f06: b29b uxth r3, r3 - 8009f08: 6878 ldr r0, [r7, #4] - 8009f0a: f000 fbab bl 800a664 - PCD_SET_EP_TX_CNT(USBx, ep->num, len); - 8009f0e: 687c ldr r4, [r7, #4] - 8009f10: 687b ldr r3, [r7, #4] - 8009f12: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8009f16: b29b uxth r3, r3 - 8009f18: 441c add r4, r3 - 8009f1a: 683b ldr r3, [r7, #0] - 8009f1c: 781b ldrb r3, [r3, #0] - 8009f1e: 011b lsls r3, r3, #4 - 8009f20: 4423 add r3, r4 - 8009f22: f203 4304 addw r3, r3, #1028 ; 0x404 - 8009f26: 60fb str r3, [r7, #12] - 8009f28: 6cbb ldr r3, [r7, #72] ; 0x48 - 8009f2a: b29a uxth r2, r3 - 8009f2c: 68fb ldr r3, [r7, #12] - 8009f2e: 801a strh r2, [r3, #0] - 8009f30: e11b b.n 800a16a - } - else - { - /* Write the data to the USB endpoint */ - if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) - 8009f32: 687a ldr r2, [r7, #4] - 8009f34: 683b ldr r3, [r7, #0] - 8009f36: 781b ldrb r3, [r3, #0] - 8009f38: 009b lsls r3, r3, #2 - 8009f3a: 4413 add r3, r2 - 8009f3c: 881b ldrh r3, [r3, #0] - 8009f3e: b29b uxth r3, r3 - 8009f40: f003 0340 and.w r3, r3, #64 ; 0x40 - 8009f44: 2b00 cmp r3, #0 - 8009f46: d06a beq.n 800a01e - { - /* Set the Double buffer counter for pmabuffer1 */ - PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); - 8009f48: 687c ldr r4, [r7, #4] - 8009f4a: 683b ldr r3, [r7, #0] - 8009f4c: 785b ldrb r3, [r3, #1] - 8009f4e: 2b00 cmp r3, #0 - 8009f50: d14c bne.n 8009fec - 8009f52: 687c ldr r4, [r7, #4] - 8009f54: 687b ldr r3, [r7, #4] - 8009f56: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8009f5a: b29b uxth r3, r3 - 8009f5c: 441c add r4, r3 - 8009f5e: 683b ldr r3, [r7, #0] - 8009f60: 781b ldrb r3, [r3, #0] - 8009f62: 011b lsls r3, r3, #4 - 8009f64: 4423 add r3, r4 - 8009f66: f203 430c addw r3, r3, #1036 ; 0x40c - 8009f6a: 613b str r3, [r7, #16] - 8009f6c: 6cbb ldr r3, [r7, #72] ; 0x48 - 8009f6e: 2b00 cmp r3, #0 - 8009f70: d110 bne.n 8009f94 - 8009f72: 693b ldr r3, [r7, #16] - 8009f74: 881b ldrh r3, [r3, #0] - 8009f76: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00 - 8009f7a: b29a uxth r2, r3 - 8009f7c: 693b ldr r3, [r7, #16] - 8009f7e: 801a strh r2, [r3, #0] - 8009f80: 693b ldr r3, [r7, #16] - 8009f82: 881b ldrh r3, [r3, #0] - 8009f84: ea6f 4343 mvn.w r3, r3, lsl #17 - 8009f88: ea6f 4353 mvn.w r3, r3, lsr #17 - 8009f8c: b29a uxth r2, r3 - 8009f8e: 693b ldr r3, [r7, #16] - 8009f90: 801a strh r2, [r3, #0] - 8009f92: e03f b.n 800a014 - 8009f94: 6cbb ldr r3, [r7, #72] ; 0x48 - 8009f96: 2b3e cmp r3, #62 ; 0x3e - 8009f98: d811 bhi.n 8009fbe - 8009f9a: 6cbb ldr r3, [r7, #72] ; 0x48 - 8009f9c: 085b lsrs r3, r3, #1 - 8009f9e: 647b str r3, [r7, #68] ; 0x44 - 8009fa0: 6cbb ldr r3, [r7, #72] ; 0x48 - 8009fa2: f003 0301 and.w r3, r3, #1 - 8009fa6: 2b00 cmp r3, #0 - 8009fa8: d002 beq.n 8009fb0 - 8009faa: 6c7b ldr r3, [r7, #68] ; 0x44 - 8009fac: 3301 adds r3, #1 - 8009fae: 647b str r3, [r7, #68] ; 0x44 - 8009fb0: 6c7b ldr r3, [r7, #68] ; 0x44 - 8009fb2: b29b uxth r3, r3 - 8009fb4: 029b lsls r3, r3, #10 - 8009fb6: b29a uxth r2, r3 - 8009fb8: 693b ldr r3, [r7, #16] - 8009fba: 801a strh r2, [r3, #0] - 8009fbc: e02a b.n 800a014 - 8009fbe: 6cbb ldr r3, [r7, #72] ; 0x48 - 8009fc0: 095b lsrs r3, r3, #5 - 8009fc2: 647b str r3, [r7, #68] ; 0x44 - 8009fc4: 6cbb ldr r3, [r7, #72] ; 0x48 - 8009fc6: f003 031f and.w r3, r3, #31 - 8009fca: 2b00 cmp r3, #0 - 8009fcc: d102 bne.n 8009fd4 - 8009fce: 6c7b ldr r3, [r7, #68] ; 0x44 - 8009fd0: 3b01 subs r3, #1 - 8009fd2: 647b str r3, [r7, #68] ; 0x44 - 8009fd4: 6c7b ldr r3, [r7, #68] ; 0x44 - 8009fd6: b29b uxth r3, r3 - 8009fd8: 029b lsls r3, r3, #10 - 8009fda: b29b uxth r3, r3 - 8009fdc: ea6f 4343 mvn.w r3, r3, lsl #17 - 8009fe0: ea6f 4353 mvn.w r3, r3, lsr #17 - 8009fe4: b29a uxth r2, r3 - 8009fe6: 693b ldr r3, [r7, #16] - 8009fe8: 801a strh r2, [r3, #0] - 8009fea: e013 b.n 800a014 - 8009fec: 683b ldr r3, [r7, #0] - 8009fee: 785b ldrb r3, [r3, #1] - 8009ff0: 2b01 cmp r3, #1 - 8009ff2: d10f bne.n 800a014 - 8009ff4: 687b ldr r3, [r7, #4] - 8009ff6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 8009ffa: b29b uxth r3, r3 - 8009ffc: 441c add r4, r3 - 8009ffe: 683b ldr r3, [r7, #0] - 800a000: 781b ldrb r3, [r3, #0] - 800a002: 011b lsls r3, r3, #4 - 800a004: 4423 add r3, r4 - 800a006: f203 430c addw r3, r3, #1036 ; 0x40c - 800a00a: 617b str r3, [r7, #20] - 800a00c: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a00e: b29a uxth r2, r3 - 800a010: 697b ldr r3, [r7, #20] - 800a012: 801a strh r2, [r3, #0] - pmabuffer = ep->pmaaddr1; - 800a014: 683b ldr r3, [r7, #0] - 800a016: 895b ldrh r3, [r3, #10] - 800a018: f8a7 304e strh.w r3, [r7, #78] ; 0x4e - 800a01c: e069 b.n 800a0f2 - } - else - { - /* Set the Double buffer counter for pmabuffer0 */ - PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); - 800a01e: 683b ldr r3, [r7, #0] - 800a020: 785b ldrb r3, [r3, #1] - 800a022: 2b00 cmp r3, #0 - 800a024: d14c bne.n 800a0c0 - 800a026: 687c ldr r4, [r7, #4] - 800a028: 687b ldr r3, [r7, #4] - 800a02a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 800a02e: b29b uxth r3, r3 - 800a030: 441c add r4, r3 - 800a032: 683b ldr r3, [r7, #0] - 800a034: 781b ldrb r3, [r3, #0] - 800a036: 011b lsls r3, r3, #4 - 800a038: 4423 add r3, r4 - 800a03a: f203 4304 addw r3, r3, #1028 ; 0x404 - 800a03e: 61bb str r3, [r7, #24] - 800a040: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a042: 2b00 cmp r3, #0 - 800a044: d110 bne.n 800a068 - 800a046: 69bb ldr r3, [r7, #24] - 800a048: 881b ldrh r3, [r3, #0] - 800a04a: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00 - 800a04e: b29a uxth r2, r3 - 800a050: 69bb ldr r3, [r7, #24] - 800a052: 801a strh r2, [r3, #0] - 800a054: 69bb ldr r3, [r7, #24] - 800a056: 881b ldrh r3, [r3, #0] - 800a058: ea6f 4343 mvn.w r3, r3, lsl #17 - 800a05c: ea6f 4353 mvn.w r3, r3, lsr #17 - 800a060: b29a uxth r2, r3 - 800a062: 69bb ldr r3, [r7, #24] - 800a064: 801a strh r2, [r3, #0] - 800a066: e040 b.n 800a0ea - 800a068: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a06a: 2b3e cmp r3, #62 ; 0x3e - 800a06c: d811 bhi.n 800a092 - 800a06e: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a070: 085b lsrs r3, r3, #1 - 800a072: 643b str r3, [r7, #64] ; 0x40 - 800a074: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a076: f003 0301 and.w r3, r3, #1 - 800a07a: 2b00 cmp r3, #0 - 800a07c: d002 beq.n 800a084 - 800a07e: 6c3b ldr r3, [r7, #64] ; 0x40 - 800a080: 3301 adds r3, #1 - 800a082: 643b str r3, [r7, #64] ; 0x40 - 800a084: 6c3b ldr r3, [r7, #64] ; 0x40 - 800a086: b29b uxth r3, r3 - 800a088: 029b lsls r3, r3, #10 - 800a08a: b29a uxth r2, r3 - 800a08c: 69bb ldr r3, [r7, #24] - 800a08e: 801a strh r2, [r3, #0] - 800a090: e02b b.n 800a0ea - 800a092: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a094: 095b lsrs r3, r3, #5 - 800a096: 643b str r3, [r7, #64] ; 0x40 - 800a098: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a09a: f003 031f and.w r3, r3, #31 - 800a09e: 2b00 cmp r3, #0 - 800a0a0: d102 bne.n 800a0a8 - 800a0a2: 6c3b ldr r3, [r7, #64] ; 0x40 - 800a0a4: 3b01 subs r3, #1 - 800a0a6: 643b str r3, [r7, #64] ; 0x40 - 800a0a8: 6c3b ldr r3, [r7, #64] ; 0x40 - 800a0aa: b29b uxth r3, r3 - 800a0ac: 029b lsls r3, r3, #10 - 800a0ae: b29b uxth r3, r3 - 800a0b0: ea6f 4343 mvn.w r3, r3, lsl #17 - 800a0b4: ea6f 4353 mvn.w r3, r3, lsr #17 - 800a0b8: b29a uxth r2, r3 - 800a0ba: 69bb ldr r3, [r7, #24] - 800a0bc: 801a strh r2, [r3, #0] - 800a0be: e014 b.n 800a0ea - 800a0c0: 683b ldr r3, [r7, #0] - 800a0c2: 785b ldrb r3, [r3, #1] - 800a0c4: 2b01 cmp r3, #1 - 800a0c6: d110 bne.n 800a0ea - 800a0c8: 687c ldr r4, [r7, #4] - 800a0ca: 687b ldr r3, [r7, #4] - 800a0cc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 800a0d0: b29b uxth r3, r3 - 800a0d2: 441c add r4, r3 - 800a0d4: 683b ldr r3, [r7, #0] - 800a0d6: 781b ldrb r3, [r3, #0] - 800a0d8: 011b lsls r3, r3, #4 - 800a0da: 4423 add r3, r4 - 800a0dc: f203 4304 addw r3, r3, #1028 ; 0x404 - 800a0e0: 61fb str r3, [r7, #28] - 800a0e2: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a0e4: b29a uxth r2, r3 - 800a0e6: 69fb ldr r3, [r7, #28] - 800a0e8: 801a strh r2, [r3, #0] - pmabuffer = ep->pmaaddr0; - 800a0ea: 683b ldr r3, [r7, #0] - 800a0ec: 891b ldrh r3, [r3, #8] - 800a0ee: f8a7 304e strh.w r3, [r7, #78] ; 0x4e - } - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - 800a0f2: 683b ldr r3, [r7, #0] - 800a0f4: 6959 ldr r1, [r3, #20] - 800a0f6: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a0f8: b29b uxth r3, r3 - 800a0fa: f8b7 204e ldrh.w r2, [r7, #78] ; 0x4e - 800a0fe: 6878 ldr r0, [r7, #4] - 800a100: f000 fab0 bl 800a664 - PCD_FreeUserBuffer(USBx, ep->num, ep->is_in); - 800a104: 683b ldr r3, [r7, #0] - 800a106: 785b ldrb r3, [r3, #1] - 800a108: 2b00 cmp r3, #0 - 800a10a: d115 bne.n 800a138 - 800a10c: 687a ldr r2, [r7, #4] - 800a10e: 683b ldr r3, [r7, #0] - 800a110: 781b ldrb r3, [r3, #0] - 800a112: 009b lsls r3, r3, #2 - 800a114: 4413 add r3, r2 - 800a116: 881b ldrh r3, [r3, #0] - 800a118: b29b uxth r3, r3 - 800a11a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 800a11e: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800a122: b29c uxth r4, r3 - 800a124: 687a ldr r2, [r7, #4] - 800a126: 683b ldr r3, [r7, #0] - 800a128: 781b ldrb r3, [r3, #0] - 800a12a: 009b lsls r3, r3, #2 - 800a12c: 441a add r2, r3 - 800a12e: 4b96 ldr r3, [pc, #600] ; (800a388 ) - 800a130: 4323 orrs r3, r4 - 800a132: b29b uxth r3, r3 - 800a134: 8013 strh r3, [r2, #0] - 800a136: e018 b.n 800a16a - 800a138: 683b ldr r3, [r7, #0] - 800a13a: 785b ldrb r3, [r3, #1] - 800a13c: 2b01 cmp r3, #1 - 800a13e: d114 bne.n 800a16a - 800a140: 687a ldr r2, [r7, #4] - 800a142: 683b ldr r3, [r7, #0] - 800a144: 781b ldrb r3, [r3, #0] - 800a146: 009b lsls r3, r3, #2 - 800a148: 4413 add r3, r2 - 800a14a: 881b ldrh r3, [r3, #0] - 800a14c: b29b uxth r3, r3 - 800a14e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 800a152: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800a156: b29c uxth r4, r3 - 800a158: 687a ldr r2, [r7, #4] - 800a15a: 683b ldr r3, [r7, #0] - 800a15c: 781b ldrb r3, [r3, #0] - 800a15e: 009b lsls r3, r3, #2 - 800a160: 441a add r2, r3 - 800a162: 4b8a ldr r3, [pc, #552] ; (800a38c ) - 800a164: 4323 orrs r3, r4 - 800a166: b29b uxth r3, r3 - 800a168: 8013 strh r3, [r2, #0] - } - - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); - 800a16a: 687a ldr r2, [r7, #4] - 800a16c: 683b ldr r3, [r7, #0] - 800a16e: 781b ldrb r3, [r3, #0] - 800a170: 009b lsls r3, r3, #2 - 800a172: 4413 add r3, r2 - 800a174: 881b ldrh r3, [r3, #0] - 800a176: b29b uxth r3, r3 - 800a178: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 800a17c: f023 0340 bic.w r3, r3, #64 ; 0x40 - 800a180: b29c uxth r4, r3 - 800a182: f084 0310 eor.w r3, r4, #16 - 800a186: b29c uxth r4, r3 - 800a188: f084 0320 eor.w r3, r4, #32 - 800a18c: b29c uxth r4, r3 - 800a18e: 687a ldr r2, [r7, #4] - 800a190: 683b ldr r3, [r7, #0] - 800a192: 781b ldrb r3, [r3, #0] - 800a194: 009b lsls r3, r3, #2 - 800a196: 441a add r2, r3 - 800a198: 4b7d ldr r3, [pc, #500] ; (800a390 ) - 800a19a: 4323 orrs r3, r4 - 800a19c: b29b uxth r3, r3 - 800a19e: 8013 strh r3, [r2, #0] - 800a1a0: e153 b.n 800a44a - } - else /* OUT endpoint */ - { - /* Multi packet transfer*/ - if (ep->xfer_len > ep->maxpacket) - 800a1a2: 683b ldr r3, [r7, #0] - 800a1a4: 699a ldr r2, [r3, #24] - 800a1a6: 683b ldr r3, [r7, #0] - 800a1a8: 691b ldr r3, [r3, #16] - 800a1aa: 429a cmp r2, r3 - 800a1ac: d909 bls.n 800a1c2 - { - len = ep->maxpacket; - 800a1ae: 683b ldr r3, [r7, #0] - 800a1b0: 691b ldr r3, [r3, #16] - 800a1b2: 64bb str r3, [r7, #72] ; 0x48 - ep->xfer_len -= len; - 800a1b4: 683b ldr r3, [r7, #0] - 800a1b6: 699a ldr r2, [r3, #24] - 800a1b8: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a1ba: 1ad2 subs r2, r2, r3 - 800a1bc: 683b ldr r3, [r7, #0] - 800a1be: 619a str r2, [r3, #24] - 800a1c0: e005 b.n 800a1ce - } - else - { - len = ep->xfer_len; - 800a1c2: 683b ldr r3, [r7, #0] - 800a1c4: 699b ldr r3, [r3, #24] - 800a1c6: 64bb str r3, [r7, #72] ; 0x48 - ep->xfer_len = 0U; - 800a1c8: 683b ldr r3, [r7, #0] - 800a1ca: 2200 movs r2, #0 - 800a1cc: 619a str r2, [r3, #24] - } - - /* configure and validate Rx endpoint */ - if (ep->doublebuffer == 0U) - 800a1ce: 683b ldr r3, [r7, #0] - 800a1d0: 7b1b ldrb r3, [r3, #12] - 800a1d2: 2b00 cmp r3, #0 - 800a1d4: d14c bne.n 800a270 - { - /*Set RX buffer count*/ - PCD_SET_EP_RX_CNT(USBx, ep->num, len); - 800a1d6: 687c ldr r4, [r7, #4] - 800a1d8: 687b ldr r3, [r7, #4] - 800a1da: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 800a1de: b29b uxth r3, r3 - 800a1e0: 441c add r4, r3 - 800a1e2: 683b ldr r3, [r7, #0] - 800a1e4: 781b ldrb r3, [r3, #0] - 800a1e6: 011b lsls r3, r3, #4 - 800a1e8: 4423 add r3, r4 - 800a1ea: f203 430c addw r3, r3, #1036 ; 0x40c - 800a1ee: 623b str r3, [r7, #32] - 800a1f0: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a1f2: 2b00 cmp r3, #0 - 800a1f4: d110 bne.n 800a218 - 800a1f6: 6a3b ldr r3, [r7, #32] - 800a1f8: 881b ldrh r3, [r3, #0] - 800a1fa: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00 - 800a1fe: b29a uxth r2, r3 - 800a200: 6a3b ldr r3, [r7, #32] - 800a202: 801a strh r2, [r3, #0] - 800a204: 6a3b ldr r3, [r7, #32] - 800a206: 881b ldrh r3, [r3, #0] - 800a208: ea6f 4343 mvn.w r3, r3, lsl #17 - 800a20c: ea6f 4353 mvn.w r3, r3, lsr #17 - 800a210: b29a uxth r2, r3 - 800a212: 6a3b ldr r3, [r7, #32] - 800a214: 801a strh r2, [r3, #0] - 800a216: e0fd b.n 800a414 - 800a218: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a21a: 2b3e cmp r3, #62 ; 0x3e - 800a21c: d811 bhi.n 800a242 - 800a21e: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a220: 085b lsrs r3, r3, #1 - 800a222: 63fb str r3, [r7, #60] ; 0x3c - 800a224: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a226: f003 0301 and.w r3, r3, #1 - 800a22a: 2b00 cmp r3, #0 - 800a22c: d002 beq.n 800a234 - 800a22e: 6bfb ldr r3, [r7, #60] ; 0x3c - 800a230: 3301 adds r3, #1 - 800a232: 63fb str r3, [r7, #60] ; 0x3c - 800a234: 6bfb ldr r3, [r7, #60] ; 0x3c - 800a236: b29b uxth r3, r3 - 800a238: 029b lsls r3, r3, #10 - 800a23a: b29a uxth r2, r3 - 800a23c: 6a3b ldr r3, [r7, #32] - 800a23e: 801a strh r2, [r3, #0] - 800a240: e0e8 b.n 800a414 - 800a242: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a244: 095b lsrs r3, r3, #5 - 800a246: 63fb str r3, [r7, #60] ; 0x3c - 800a248: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a24a: f003 031f and.w r3, r3, #31 - 800a24e: 2b00 cmp r3, #0 - 800a250: d102 bne.n 800a258 - 800a252: 6bfb ldr r3, [r7, #60] ; 0x3c - 800a254: 3b01 subs r3, #1 - 800a256: 63fb str r3, [r7, #60] ; 0x3c - 800a258: 6bfb ldr r3, [r7, #60] ; 0x3c - 800a25a: b29b uxth r3, r3 - 800a25c: 029b lsls r3, r3, #10 - 800a25e: b29b uxth r3, r3 - 800a260: ea6f 4343 mvn.w r3, r3, lsl #17 - 800a264: ea6f 4353 mvn.w r3, r3, lsr #17 - 800a268: b29a uxth r2, r3 - 800a26a: 6a3b ldr r3, [r7, #32] - 800a26c: 801a strh r2, [r3, #0] - 800a26e: e0d1 b.n 800a414 - } - else - { - /*Set the Double buffer counter*/ - PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); - 800a270: 683b ldr r3, [r7, #0] - 800a272: 785b ldrb r3, [r3, #1] - 800a274: 2b00 cmp r3, #0 - 800a276: d14c bne.n 800a312 - 800a278: 687c ldr r4, [r7, #4] - 800a27a: 687b ldr r3, [r7, #4] - 800a27c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 800a280: b29b uxth r3, r3 - 800a282: 441c add r4, r3 - 800a284: 683b ldr r3, [r7, #0] - 800a286: 781b ldrb r3, [r3, #0] - 800a288: 011b lsls r3, r3, #4 - 800a28a: 4423 add r3, r4 - 800a28c: f203 4304 addw r3, r3, #1028 ; 0x404 - 800a290: 62fb str r3, [r7, #44] ; 0x2c - 800a292: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a294: 2b00 cmp r3, #0 - 800a296: d110 bne.n 800a2ba - 800a298: 6afb ldr r3, [r7, #44] ; 0x2c - 800a29a: 881b ldrh r3, [r3, #0] - 800a29c: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00 - 800a2a0: b29a uxth r2, r3 - 800a2a2: 6afb ldr r3, [r7, #44] ; 0x2c - 800a2a4: 801a strh r2, [r3, #0] - 800a2a6: 6afb ldr r3, [r7, #44] ; 0x2c - 800a2a8: 881b ldrh r3, [r3, #0] - 800a2aa: ea6f 4343 mvn.w r3, r3, lsl #17 - 800a2ae: ea6f 4353 mvn.w r3, r3, lsr #17 - 800a2b2: b29a uxth r2, r3 - 800a2b4: 6afb ldr r3, [r7, #44] ; 0x2c - 800a2b6: 801a strh r2, [r3, #0] - 800a2b8: e040 b.n 800a33c - 800a2ba: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a2bc: 2b3e cmp r3, #62 ; 0x3e - 800a2be: d811 bhi.n 800a2e4 - 800a2c0: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a2c2: 085b lsrs r3, r3, #1 - 800a2c4: 63bb str r3, [r7, #56] ; 0x38 - 800a2c6: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a2c8: f003 0301 and.w r3, r3, #1 - 800a2cc: 2b00 cmp r3, #0 - 800a2ce: d002 beq.n 800a2d6 - 800a2d0: 6bbb ldr r3, [r7, #56] ; 0x38 - 800a2d2: 3301 adds r3, #1 - 800a2d4: 63bb str r3, [r7, #56] ; 0x38 - 800a2d6: 6bbb ldr r3, [r7, #56] ; 0x38 - 800a2d8: b29b uxth r3, r3 - 800a2da: 029b lsls r3, r3, #10 - 800a2dc: b29a uxth r2, r3 - 800a2de: 6afb ldr r3, [r7, #44] ; 0x2c - 800a2e0: 801a strh r2, [r3, #0] - 800a2e2: e02b b.n 800a33c - 800a2e4: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a2e6: 095b lsrs r3, r3, #5 - 800a2e8: 63bb str r3, [r7, #56] ; 0x38 - 800a2ea: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a2ec: f003 031f and.w r3, r3, #31 - 800a2f0: 2b00 cmp r3, #0 - 800a2f2: d102 bne.n 800a2fa - 800a2f4: 6bbb ldr r3, [r7, #56] ; 0x38 - 800a2f6: 3b01 subs r3, #1 - 800a2f8: 63bb str r3, [r7, #56] ; 0x38 - 800a2fa: 6bbb ldr r3, [r7, #56] ; 0x38 - 800a2fc: b29b uxth r3, r3 - 800a2fe: 029b lsls r3, r3, #10 - 800a300: b29b uxth r3, r3 - 800a302: ea6f 4343 mvn.w r3, r3, lsl #17 - 800a306: ea6f 4353 mvn.w r3, r3, lsr #17 - 800a30a: b29a uxth r2, r3 - 800a30c: 6afb ldr r3, [r7, #44] ; 0x2c - 800a30e: 801a strh r2, [r3, #0] - 800a310: e014 b.n 800a33c - 800a312: 683b ldr r3, [r7, #0] - 800a314: 785b ldrb r3, [r3, #1] - 800a316: 2b01 cmp r3, #1 - 800a318: d110 bne.n 800a33c - 800a31a: 687c ldr r4, [r7, #4] - 800a31c: 687b ldr r3, [r7, #4] - 800a31e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 800a322: b29b uxth r3, r3 - 800a324: 441c add r4, r3 - 800a326: 683b ldr r3, [r7, #0] - 800a328: 781b ldrb r3, [r3, #0] - 800a32a: 011b lsls r3, r3, #4 - 800a32c: 4423 add r3, r4 - 800a32e: f203 4304 addw r3, r3, #1028 ; 0x404 - 800a332: 633b str r3, [r7, #48] ; 0x30 - 800a334: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a336: b29a uxth r2, r3 - 800a338: 6b3b ldr r3, [r7, #48] ; 0x30 - 800a33a: 801a strh r2, [r3, #0] - 800a33c: 687c ldr r4, [r7, #4] - 800a33e: 683b ldr r3, [r7, #0] - 800a340: 785b ldrb r3, [r3, #1] - 800a342: 2b00 cmp r3, #0 - 800a344: d152 bne.n 800a3ec - 800a346: 687c ldr r4, [r7, #4] - 800a348: 687b ldr r3, [r7, #4] - 800a34a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 800a34e: b29b uxth r3, r3 - 800a350: 441c add r4, r3 - 800a352: 683b ldr r3, [r7, #0] - 800a354: 781b ldrb r3, [r3, #0] - 800a356: 011b lsls r3, r3, #4 - 800a358: 4423 add r3, r4 - 800a35a: f203 430c addw r3, r3, #1036 ; 0x40c - 800a35e: 627b str r3, [r7, #36] ; 0x24 - 800a360: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a362: 2b00 cmp r3, #0 - 800a364: d116 bne.n 800a394 - 800a366: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a368: 881b ldrh r3, [r3, #0] - 800a36a: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00 - 800a36e: b29a uxth r2, r3 - 800a370: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a372: 801a strh r2, [r3, #0] - 800a374: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a376: 881b ldrh r3, [r3, #0] - 800a378: ea6f 4343 mvn.w r3, r3, lsl #17 - 800a37c: ea6f 4353 mvn.w r3, r3, lsr #17 - 800a380: b29a uxth r2, r3 - 800a382: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a384: 801a strh r2, [r3, #0] - 800a386: e045 b.n 800a414 - 800a388: ffff80c0 .word 0xffff80c0 - 800a38c: ffffc080 .word 0xffffc080 - 800a390: ffff8080 .word 0xffff8080 - 800a394: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a396: 2b3e cmp r3, #62 ; 0x3e - 800a398: d811 bhi.n 800a3be - 800a39a: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a39c: 085b lsrs r3, r3, #1 - 800a39e: 637b str r3, [r7, #52] ; 0x34 - 800a3a0: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a3a2: f003 0301 and.w r3, r3, #1 - 800a3a6: 2b00 cmp r3, #0 - 800a3a8: d002 beq.n 800a3b0 - 800a3aa: 6b7b ldr r3, [r7, #52] ; 0x34 - 800a3ac: 3301 adds r3, #1 - 800a3ae: 637b str r3, [r7, #52] ; 0x34 - 800a3b0: 6b7b ldr r3, [r7, #52] ; 0x34 - 800a3b2: b29b uxth r3, r3 - 800a3b4: 029b lsls r3, r3, #10 - 800a3b6: b29a uxth r2, r3 - 800a3b8: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a3ba: 801a strh r2, [r3, #0] - 800a3bc: e02a b.n 800a414 - 800a3be: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a3c0: 095b lsrs r3, r3, #5 - 800a3c2: 637b str r3, [r7, #52] ; 0x34 - 800a3c4: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a3c6: f003 031f and.w r3, r3, #31 - 800a3ca: 2b00 cmp r3, #0 - 800a3cc: d102 bne.n 800a3d4 - 800a3ce: 6b7b ldr r3, [r7, #52] ; 0x34 - 800a3d0: 3b01 subs r3, #1 - 800a3d2: 637b str r3, [r7, #52] ; 0x34 - 800a3d4: 6b7b ldr r3, [r7, #52] ; 0x34 - 800a3d6: b29b uxth r3, r3 - 800a3d8: 029b lsls r3, r3, #10 - 800a3da: b29b uxth r3, r3 - 800a3dc: ea6f 4343 mvn.w r3, r3, lsl #17 - 800a3e0: ea6f 4353 mvn.w r3, r3, lsr #17 - 800a3e4: b29a uxth r2, r3 - 800a3e6: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a3e8: 801a strh r2, [r3, #0] - 800a3ea: e013 b.n 800a414 - 800a3ec: 683b ldr r3, [r7, #0] - 800a3ee: 785b ldrb r3, [r3, #1] - 800a3f0: 2b01 cmp r3, #1 - 800a3f2: d10f bne.n 800a414 - 800a3f4: 687b ldr r3, [r7, #4] - 800a3f6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50 - 800a3fa: b29b uxth r3, r3 - 800a3fc: 441c add r4, r3 - 800a3fe: 683b ldr r3, [r7, #0] - 800a400: 781b ldrb r3, [r3, #0] - 800a402: 011b lsls r3, r3, #4 - 800a404: 4423 add r3, r4 - 800a406: f203 430c addw r3, r3, #1036 ; 0x40c - 800a40a: 62bb str r3, [r7, #40] ; 0x28 - 800a40c: 6cbb ldr r3, [r7, #72] ; 0x48 - 800a40e: b29a uxth r2, r3 - 800a410: 6abb ldr r3, [r7, #40] ; 0x28 - 800a412: 801a strh r2, [r3, #0] - } - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - 800a414: 687a ldr r2, [r7, #4] - 800a416: 683b ldr r3, [r7, #0] - 800a418: 781b ldrb r3, [r3, #0] - 800a41a: 009b lsls r3, r3, #2 - 800a41c: 4413 add r3, r2 - 800a41e: 881b ldrh r3, [r3, #0] - 800a420: b29b uxth r3, r3 - 800a422: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 800a426: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800a42a: b29c uxth r4, r3 - 800a42c: f484 5380 eor.w r3, r4, #4096 ; 0x1000 - 800a430: b29c uxth r4, r3 - 800a432: f484 5300 eor.w r3, r4, #8192 ; 0x2000 - 800a436: b29c uxth r4, r3 - 800a438: 687a ldr r2, [r7, #4] - 800a43a: 683b ldr r3, [r7, #0] - 800a43c: 781b ldrb r3, [r3, #0] - 800a43e: 009b lsls r3, r3, #2 - 800a440: 441a add r2, r3 - 800a442: 4b04 ldr r3, [pc, #16] ; (800a454 ) - 800a444: 4323 orrs r3, r4 - 800a446: b29b uxth r3, r3 - 800a448: 8013 strh r3, [r2, #0] - } - - return HAL_OK; - 800a44a: 2300 movs r3, #0 -} - 800a44c: 4618 mov r0, r3 - 800a44e: 3754 adds r7, #84 ; 0x54 - 800a450: 46bd mov sp, r7 - 800a452: bd90 pop {r4, r7, pc} - 800a454: ffff8080 .word 0xffff8080 - -0800a458 : - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - 800a458: b490 push {r4, r7} - 800a45a: b082 sub sp, #8 - 800a45c: af00 add r7, sp, #0 - 800a45e: 6078 str r0, [r7, #4] - 800a460: 6039 str r1, [r7, #0] - if (ep->is_in != 0U) - 800a462: 683b ldr r3, [r7, #0] - 800a464: 785b ldrb r3, [r3, #1] - 800a466: 2b00 cmp r3, #0 - 800a468: d018 beq.n 800a49c - { - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL); - 800a46a: 687a ldr r2, [r7, #4] - 800a46c: 683b ldr r3, [r7, #0] - 800a46e: 781b ldrb r3, [r3, #0] - 800a470: 009b lsls r3, r3, #2 - 800a472: 4413 add r3, r2 - 800a474: 881b ldrh r3, [r3, #0] - 800a476: b29b uxth r3, r3 - 800a478: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 800a47c: f023 0340 bic.w r3, r3, #64 ; 0x40 - 800a480: b29c uxth r4, r3 - 800a482: f084 0310 eor.w r3, r4, #16 - 800a486: b29c uxth r4, r3 - 800a488: 687a ldr r2, [r7, #4] - 800a48a: 683b ldr r3, [r7, #0] - 800a48c: 781b ldrb r3, [r3, #0] - 800a48e: 009b lsls r3, r3, #2 - 800a490: 441a add r2, r3 - 800a492: 4b11 ldr r3, [pc, #68] ; (800a4d8 ) - 800a494: 4323 orrs r3, r4 - 800a496: b29b uxth r3, r3 - 800a498: 8013 strh r3, [r2, #0] - 800a49a: e017 b.n 800a4cc - } - else - { - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL); - 800a49c: 687a ldr r2, [r7, #4] - 800a49e: 683b ldr r3, [r7, #0] - 800a4a0: 781b ldrb r3, [r3, #0] - 800a4a2: 009b lsls r3, r3, #2 - 800a4a4: 4413 add r3, r2 - 800a4a6: 881b ldrh r3, [r3, #0] - 800a4a8: b29b uxth r3, r3 - 800a4aa: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 800a4ae: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800a4b2: b29c uxth r4, r3 - 800a4b4: f484 5380 eor.w r3, r4, #4096 ; 0x1000 - 800a4b8: b29c uxth r4, r3 - 800a4ba: 687a ldr r2, [r7, #4] - 800a4bc: 683b ldr r3, [r7, #0] - 800a4be: 781b ldrb r3, [r3, #0] - 800a4c0: 009b lsls r3, r3, #2 - 800a4c2: 441a add r2, r3 - 800a4c4: 4b04 ldr r3, [pc, #16] ; (800a4d8 ) - 800a4c6: 4323 orrs r3, r4 - 800a4c8: b29b uxth r3, r3 - 800a4ca: 8013 strh r3, [r2, #0] - } - - return HAL_OK; - 800a4cc: 2300 movs r3, #0 -} - 800a4ce: 4618 mov r0, r3 - 800a4d0: 3708 adds r7, #8 - 800a4d2: 46bd mov sp, r7 - 800a4d4: bc90 pop {r4, r7} - 800a4d6: 4770 bx lr - 800a4d8: ffff8080 .word 0xffff8080 - -0800a4dc : - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - 800a4dc: b490 push {r4, r7} - 800a4de: b082 sub sp, #8 - 800a4e0: af00 add r7, sp, #0 - 800a4e2: 6078 str r0, [r7, #4] - 800a4e4: 6039 str r1, [r7, #0] - if (ep->doublebuffer == 0U) - 800a4e6: 683b ldr r3, [r7, #0] - 800a4e8: 7b1b ldrb r3, [r3, #12] - 800a4ea: 2b00 cmp r3, #0 - 800a4ec: d17d bne.n 800a5ea - { - if (ep->is_in != 0U) - 800a4ee: 683b ldr r3, [r7, #0] - 800a4f0: 785b ldrb r3, [r3, #1] - 800a4f2: 2b00 cmp r3, #0 - 800a4f4: d03d beq.n 800a572 - { - PCD_CLEAR_TX_DTOG(USBx, ep->num); - 800a4f6: 687a ldr r2, [r7, #4] - 800a4f8: 683b ldr r3, [r7, #0] - 800a4fa: 781b ldrb r3, [r3, #0] - 800a4fc: 009b lsls r3, r3, #2 - 800a4fe: 4413 add r3, r2 - 800a500: 881b ldrh r3, [r3, #0] - 800a502: b29c uxth r4, r3 - 800a504: 4623 mov r3, r4 - 800a506: f003 0340 and.w r3, r3, #64 ; 0x40 - 800a50a: 2b00 cmp r3, #0 - 800a50c: d014 beq.n 800a538 - 800a50e: 687a ldr r2, [r7, #4] - 800a510: 683b ldr r3, [r7, #0] - 800a512: 781b ldrb r3, [r3, #0] - 800a514: 009b lsls r3, r3, #2 - 800a516: 4413 add r3, r2 - 800a518: 881b ldrh r3, [r3, #0] - 800a51a: b29b uxth r3, r3 - 800a51c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 800a520: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800a524: b29c uxth r4, r3 - 800a526: 687a ldr r2, [r7, #4] - 800a528: 683b ldr r3, [r7, #0] - 800a52a: 781b ldrb r3, [r3, #0] - 800a52c: 009b lsls r3, r3, #2 - 800a52e: 441a add r2, r3 - 800a530: 4b31 ldr r3, [pc, #196] ; (800a5f8 ) - 800a532: 4323 orrs r3, r4 - 800a534: b29b uxth r3, r3 - 800a536: 8013 strh r3, [r2, #0] - - if (ep->type != EP_TYPE_ISOC) - 800a538: 683b ldr r3, [r7, #0] - 800a53a: 78db ldrb r3, [r3, #3] - 800a53c: 2b01 cmp r3, #1 - 800a53e: d054 beq.n 800a5ea - { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - 800a540: 687a ldr r2, [r7, #4] - 800a542: 683b ldr r3, [r7, #0] - 800a544: 781b ldrb r3, [r3, #0] - 800a546: 009b lsls r3, r3, #2 - 800a548: 4413 add r3, r2 - 800a54a: 881b ldrh r3, [r3, #0] - 800a54c: b29b uxth r3, r3 - 800a54e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 800a552: f023 0340 bic.w r3, r3, #64 ; 0x40 - 800a556: b29c uxth r4, r3 - 800a558: f084 0320 eor.w r3, r4, #32 - 800a55c: b29c uxth r4, r3 - 800a55e: 687a ldr r2, [r7, #4] - 800a560: 683b ldr r3, [r7, #0] - 800a562: 781b ldrb r3, [r3, #0] - 800a564: 009b lsls r3, r3, #2 - 800a566: 441a add r2, r3 - 800a568: 4b24 ldr r3, [pc, #144] ; (800a5fc ) - 800a56a: 4323 orrs r3, r4 - 800a56c: b29b uxth r3, r3 - 800a56e: 8013 strh r3, [r2, #0] - 800a570: e03b b.n 800a5ea - } - } - else - { - PCD_CLEAR_RX_DTOG(USBx, ep->num); - 800a572: 687a ldr r2, [r7, #4] - 800a574: 683b ldr r3, [r7, #0] - 800a576: 781b ldrb r3, [r3, #0] - 800a578: 009b lsls r3, r3, #2 - 800a57a: 4413 add r3, r2 - 800a57c: 881b ldrh r3, [r3, #0] - 800a57e: b29c uxth r4, r3 - 800a580: 4623 mov r3, r4 - 800a582: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 800a586: 2b00 cmp r3, #0 - 800a588: d014 beq.n 800a5b4 - 800a58a: 687a ldr r2, [r7, #4] - 800a58c: 683b ldr r3, [r7, #0] - 800a58e: 781b ldrb r3, [r3, #0] - 800a590: 009b lsls r3, r3, #2 - 800a592: 4413 add r3, r2 - 800a594: 881b ldrh r3, [r3, #0] - 800a596: b29b uxth r3, r3 - 800a598: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 800a59c: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800a5a0: b29c uxth r4, r3 - 800a5a2: 687a ldr r2, [r7, #4] - 800a5a4: 683b ldr r3, [r7, #0] - 800a5a6: 781b ldrb r3, [r3, #0] - 800a5a8: 009b lsls r3, r3, #2 - 800a5aa: 441a add r2, r3 - 800a5ac: 4b14 ldr r3, [pc, #80] ; (800a600 ) - 800a5ae: 4323 orrs r3, r4 - 800a5b0: b29b uxth r3, r3 - 800a5b2: 8013 strh r3, [r2, #0] - - /* Configure VALID status for the Endpoint*/ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - 800a5b4: 687a ldr r2, [r7, #4] - 800a5b6: 683b ldr r3, [r7, #0] - 800a5b8: 781b ldrb r3, [r3, #0] - 800a5ba: 009b lsls r3, r3, #2 - 800a5bc: 4413 add r3, r2 - 800a5be: 881b ldrh r3, [r3, #0] - 800a5c0: b29b uxth r3, r3 - 800a5c2: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 800a5c6: f023 0370 bic.w r3, r3, #112 ; 0x70 - 800a5ca: b29c uxth r4, r3 - 800a5cc: f484 5380 eor.w r3, r4, #4096 ; 0x1000 - 800a5d0: b29c uxth r4, r3 - 800a5d2: f484 5300 eor.w r3, r4, #8192 ; 0x2000 - 800a5d6: b29c uxth r4, r3 - 800a5d8: 687a ldr r2, [r7, #4] - 800a5da: 683b ldr r3, [r7, #0] - 800a5dc: 781b ldrb r3, [r3, #0] - 800a5de: 009b lsls r3, r3, #2 - 800a5e0: 441a add r2, r3 - 800a5e2: 4b06 ldr r3, [pc, #24] ; (800a5fc ) - 800a5e4: 4323 orrs r3, r4 - 800a5e6: b29b uxth r3, r3 - 800a5e8: 8013 strh r3, [r2, #0] - } - } - - return HAL_OK; - 800a5ea: 2300 movs r3, #0 -} - 800a5ec: 4618 mov r0, r3 - 800a5ee: 3708 adds r7, #8 - 800a5f0: 46bd mov sp, r7 - 800a5f2: bc90 pop {r4, r7} - 800a5f4: 4770 bx lr - 800a5f6: bf00 nop - 800a5f8: ffff80c0 .word 0xffff80c0 - 800a5fc: ffff8080 .word 0xffff8080 - 800a600: ffffc080 .word 0xffffc080 - -0800a604 : - * @param address : new device address to be assigned - * This parameter can be a value from 0 to 255 - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address) -{ - 800a604: b480 push {r7} - 800a606: b083 sub sp, #12 - 800a608: af00 add r7, sp, #0 - 800a60a: 6078 str r0, [r7, #4] - 800a60c: 460b mov r3, r1 - 800a60e: 70fb strb r3, [r7, #3] - if (address == 0U) - 800a610: 78fb ldrb r3, [r7, #3] - 800a612: 2b00 cmp r3, #0 - 800a614: d103 bne.n 800a61e - { - /* set device address and enable function */ - USBx->DADDR = USB_DADDR_EF; - 800a616: 687b ldr r3, [r7, #4] - 800a618: 2280 movs r2, #128 ; 0x80 - 800a61a: f8a3 204c strh.w r2, [r3, #76] ; 0x4c - } - - return HAL_OK; - 800a61e: 2300 movs r3, #0 -} - 800a620: 4618 mov r0, r3 - 800a622: 370c adds r7, #12 - 800a624: 46bd mov sp, r7 - 800a626: f85d 7b04 ldr.w r7, [sp], #4 - 800a62a: 4770 bx lr - -0800a62c : - * @brief USB_ReadInterrupts: return the global USB interrupt status - * @param USBx : Selected device - * @retval HAL status - */ -uint32_t USB_ReadInterrupts(USB_TypeDef *USBx) -{ - 800a62c: b480 push {r7} - 800a62e: b085 sub sp, #20 - 800a630: af00 add r7, sp, #0 - 800a632: 6078 str r0, [r7, #4] - uint32_t tmpreg; - - tmpreg = USBx->ISTR; - 800a634: 687b ldr r3, [r7, #4] - 800a636: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44 - 800a63a: b29b uxth r3, r3 - 800a63c: 60fb str r3, [r7, #12] - return tmpreg; - 800a63e: 68fb ldr r3, [r7, #12] -} - 800a640: 4618 mov r0, r3 - 800a642: 3714 adds r7, #20 - 800a644: 46bd mov sp, r7 - 800a646: f85d 7b04 ldr.w r7, [sp], #4 - 800a64a: 4770 bx lr - -0800a64c : - * @param USBx Selected device - * @param psetup pointer to setup packet - * @retval HAL status - */ -HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup) -{ - 800a64c: b480 push {r7} - 800a64e: b083 sub sp, #12 - 800a650: af00 add r7, sp, #0 - 800a652: 6078 str r0, [r7, #4] - 800a654: 6039 str r1, [r7, #0] - UNUSED(psetup); - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - return HAL_OK; - 800a656: 2300 movs r3, #0 -} - 800a658: 4618 mov r0, r3 - 800a65a: 370c adds r7, #12 - 800a65c: 46bd mov sp, r7 - 800a65e: f85d 7b04 ldr.w r7, [sp], #4 - 800a662: 4770 bx lr - -0800a664 : - * @param wPMABufAddr address into PMA. - * @param wNBytes: no. of bytes to be copied. - * @retval None - */ -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - 800a664: b480 push {r7} - 800a666: b08d sub sp, #52 ; 0x34 - 800a668: af00 add r7, sp, #0 - 800a66a: 60f8 str r0, [r7, #12] - 800a66c: 60b9 str r1, [r7, #8] - 800a66e: 4611 mov r1, r2 - 800a670: 461a mov r2, r3 - 800a672: 460b mov r3, r1 - 800a674: 80fb strh r3, [r7, #6] - 800a676: 4613 mov r3, r2 - 800a678: 80bb strh r3, [r7, #4] - uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; - 800a67a: 88bb ldrh r3, [r7, #4] - 800a67c: 3301 adds r3, #1 - 800a67e: 085b lsrs r3, r3, #1 - 800a680: 623b str r3, [r7, #32] - uint32_t BaseAddr = (uint32_t)USBx; - 800a682: 68fb ldr r3, [r7, #12] - 800a684: 61fb str r3, [r7, #28] - uint32_t i, temp1, temp2; - __IO uint16_t *pdwVal; - uint8_t *pBuf = pbUsrBuf; - 800a686: 68bb ldr r3, [r7, #8] - 800a688: 627b str r3, [r7, #36] ; 0x24 - - pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); - 800a68a: 88fb ldrh r3, [r7, #6] - 800a68c: 005a lsls r2, r3, #1 - 800a68e: 69fb ldr r3, [r7, #28] - 800a690: 4413 add r3, r2 - 800a692: f503 6380 add.w r3, r3, #1024 ; 0x400 - 800a696: 62bb str r3, [r7, #40] ; 0x28 - - for (i = n; i != 0U; i--) - 800a698: 6a3b ldr r3, [r7, #32] - 800a69a: 62fb str r3, [r7, #44] ; 0x2c - 800a69c: e01e b.n 800a6dc - { - temp1 = *pBuf; - 800a69e: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a6a0: 781b ldrb r3, [r3, #0] - 800a6a2: 61bb str r3, [r7, #24] - pBuf++; - 800a6a4: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a6a6: 3301 adds r3, #1 - 800a6a8: 627b str r3, [r7, #36] ; 0x24 - temp2 = temp1 | ((uint16_t)((uint16_t) *pBuf << 8)); - 800a6aa: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a6ac: 781b ldrb r3, [r3, #0] - 800a6ae: b29b uxth r3, r3 - 800a6b0: 021b lsls r3, r3, #8 - 800a6b2: b29b uxth r3, r3 - 800a6b4: 461a mov r2, r3 - 800a6b6: 69bb ldr r3, [r7, #24] - 800a6b8: 4313 orrs r3, r2 - 800a6ba: 617b str r3, [r7, #20] - *pdwVal = (uint16_t)temp2; - 800a6bc: 697b ldr r3, [r7, #20] - 800a6be: b29a uxth r2, r3 - 800a6c0: 6abb ldr r3, [r7, #40] ; 0x28 - 800a6c2: 801a strh r2, [r3, #0] - pdwVal++; - 800a6c4: 6abb ldr r3, [r7, #40] ; 0x28 - 800a6c6: 3302 adds r3, #2 - 800a6c8: 62bb str r3, [r7, #40] ; 0x28 - -#if PMA_ACCESS > 1U - pdwVal++; - 800a6ca: 6abb ldr r3, [r7, #40] ; 0x28 - 800a6cc: 3302 adds r3, #2 - 800a6ce: 62bb str r3, [r7, #40] ; 0x28 -#endif - - pBuf++; - 800a6d0: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a6d2: 3301 adds r3, #1 - 800a6d4: 627b str r3, [r7, #36] ; 0x24 - for (i = n; i != 0U; i--) - 800a6d6: 6afb ldr r3, [r7, #44] ; 0x2c - 800a6d8: 3b01 subs r3, #1 - 800a6da: 62fb str r3, [r7, #44] ; 0x2c - 800a6dc: 6afb ldr r3, [r7, #44] ; 0x2c - 800a6de: 2b00 cmp r3, #0 - 800a6e0: d1dd bne.n 800a69e - } -} - 800a6e2: bf00 nop - 800a6e4: 3734 adds r7, #52 ; 0x34 - 800a6e6: 46bd mov sp, r7 - 800a6e8: f85d 7b04 ldr.w r7, [sp], #4 - 800a6ec: 4770 bx lr - -0800a6ee : - * @param wPMABufAddr address into PMA. - * @param wNBytes: no. of bytes to be copied. - * @retval None - */ -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - 800a6ee: b480 push {r7} - 800a6f0: b08b sub sp, #44 ; 0x2c - 800a6f2: af00 add r7, sp, #0 - 800a6f4: 60f8 str r0, [r7, #12] - 800a6f6: 60b9 str r1, [r7, #8] - 800a6f8: 4611 mov r1, r2 - 800a6fa: 461a mov r2, r3 - 800a6fc: 460b mov r3, r1 - 800a6fe: 80fb strh r3, [r7, #6] - 800a700: 4613 mov r3, r2 - 800a702: 80bb strh r3, [r7, #4] - uint32_t n = (uint32_t)wNBytes >> 1; - 800a704: 88bb ldrh r3, [r7, #4] - 800a706: 085b lsrs r3, r3, #1 - 800a708: b29b uxth r3, r3 - 800a70a: 61bb str r3, [r7, #24] - uint32_t BaseAddr = (uint32_t)USBx; - 800a70c: 68fb ldr r3, [r7, #12] - 800a70e: 617b str r3, [r7, #20] - uint32_t i, temp; - __IO uint16_t *pdwVal; - uint8_t *pBuf = pbUsrBuf; - 800a710: 68bb ldr r3, [r7, #8] - 800a712: 61fb str r3, [r7, #28] - - pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); - 800a714: 88fb ldrh r3, [r7, #6] - 800a716: 005a lsls r2, r3, #1 - 800a718: 697b ldr r3, [r7, #20] - 800a71a: 4413 add r3, r2 - 800a71c: f503 6380 add.w r3, r3, #1024 ; 0x400 - 800a720: 623b str r3, [r7, #32] - - for (i = n; i != 0U; i--) - 800a722: 69bb ldr r3, [r7, #24] - 800a724: 627b str r3, [r7, #36] ; 0x24 - 800a726: e01b b.n 800a760 - { - temp = *(__IO uint16_t *)pdwVal; - 800a728: 6a3b ldr r3, [r7, #32] - 800a72a: 881b ldrh r3, [r3, #0] - 800a72c: b29b uxth r3, r3 - 800a72e: 613b str r3, [r7, #16] - pdwVal++; - 800a730: 6a3b ldr r3, [r7, #32] - 800a732: 3302 adds r3, #2 - 800a734: 623b str r3, [r7, #32] - *pBuf = (uint8_t)((temp >> 0) & 0xFFU); - 800a736: 693b ldr r3, [r7, #16] - 800a738: b2da uxtb r2, r3 - 800a73a: 69fb ldr r3, [r7, #28] - 800a73c: 701a strb r2, [r3, #0] - pBuf++; - 800a73e: 69fb ldr r3, [r7, #28] - 800a740: 3301 adds r3, #1 - 800a742: 61fb str r3, [r7, #28] - *pBuf = (uint8_t)((temp >> 8) & 0xFFU); - 800a744: 693b ldr r3, [r7, #16] - 800a746: 0a1b lsrs r3, r3, #8 - 800a748: b2da uxtb r2, r3 - 800a74a: 69fb ldr r3, [r7, #28] - 800a74c: 701a strb r2, [r3, #0] - pBuf++; - 800a74e: 69fb ldr r3, [r7, #28] - 800a750: 3301 adds r3, #1 - 800a752: 61fb str r3, [r7, #28] - -#if PMA_ACCESS > 1U - pdwVal++; - 800a754: 6a3b ldr r3, [r7, #32] - 800a756: 3302 adds r3, #2 - 800a758: 623b str r3, [r7, #32] - for (i = n; i != 0U; i--) - 800a75a: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a75c: 3b01 subs r3, #1 - 800a75e: 627b str r3, [r7, #36] ; 0x24 - 800a760: 6a7b ldr r3, [r7, #36] ; 0x24 - 800a762: 2b00 cmp r3, #0 - 800a764: d1e0 bne.n 800a728 -#endif - } - - if ((wNBytes % 2U) != 0U) - 800a766: 88bb ldrh r3, [r7, #4] - 800a768: f003 0301 and.w r3, r3, #1 - 800a76c: b29b uxth r3, r3 - 800a76e: 2b00 cmp r3, #0 - 800a770: d007 beq.n 800a782 - { - temp = *pdwVal; - 800a772: 6a3b ldr r3, [r7, #32] - 800a774: 881b ldrh r3, [r3, #0] - 800a776: b29b uxth r3, r3 - 800a778: 613b str r3, [r7, #16] - *pBuf = (uint8_t)((temp >> 0) & 0xFFU); - 800a77a: 693b ldr r3, [r7, #16] - 800a77c: b2da uxtb r2, r3 - 800a77e: 69fb ldr r3, [r7, #28] - 800a780: 701a strb r2, [r3, #0] - } -} - 800a782: bf00 nop - 800a784: 372c adds r7, #44 ; 0x2c - 800a786: 46bd mov sp, r7 - 800a788: f85d 7b04 ldr.w r7, [sp], #4 - 800a78c: 4770 bx lr - -0800a78e : -* Launch test mode process -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev) -{ - 800a78e: b480 push {r7} - 800a790: b083 sub sp, #12 - 800a792: af00 add r7, sp, #0 - 800a794: 6078 str r0, [r7, #4] - /* Prevent unused argument compilation warning */ - UNUSED(pdev); - - return USBD_OK; - 800a796: 2300 movs r3, #0 -} - 800a798: 4618 mov r0, r3 - 800a79a: 370c adds r7, #12 - 800a79c: 46bd mov sp, r7 - 800a79e: f85d 7b04 ldr.w r7, [sp], #4 - 800a7a2: 4770 bx lr - -0800a7a4 : -* @param cfgidx: configuration index -* @retval status -*/ - -USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - 800a7a4: b580 push {r7, lr} - 800a7a6: b084 sub sp, #16 - 800a7a8: af00 add r7, sp, #0 - 800a7aa: 6078 str r0, [r7, #4] - 800a7ac: 460b mov r3, r1 - 800a7ae: 70fb strb r3, [r7, #3] - USBD_StatusTypeDef ret = USBD_FAIL; - 800a7b0: 2302 movs r3, #2 - 800a7b2: 73fb strb r3, [r7, #15] - - if (pdev->pClass != NULL) - 800a7b4: 687b ldr r3, [r7, #4] - 800a7b6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800a7ba: 2b00 cmp r3, #0 - 800a7bc: d00c beq.n 800a7d8 - { - /* Set configuration and Start the Class*/ - if (pdev->pClass->Init(pdev, cfgidx) == 0U) - 800a7be: 687b ldr r3, [r7, #4] - 800a7c0: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800a7c4: 681b ldr r3, [r3, #0] - 800a7c6: 78fa ldrb r2, [r7, #3] - 800a7c8: 4611 mov r1, r2 - 800a7ca: 6878 ldr r0, [r7, #4] - 800a7cc: 4798 blx r3 - 800a7ce: 4603 mov r3, r0 - 800a7d0: 2b00 cmp r3, #0 - 800a7d2: d101 bne.n 800a7d8 - { - ret = USBD_OK; - 800a7d4: 2300 movs r3, #0 - 800a7d6: 73fb strb r3, [r7, #15] - } - } - - return ret; - 800a7d8: 7bfb ldrb r3, [r7, #15] -} - 800a7da: 4618 mov r0, r3 - 800a7dc: 3710 adds r7, #16 - 800a7de: 46bd mov sp, r7 - 800a7e0: bd80 pop {r7, pc} - -0800a7e2 : -* @param pdev: device instance -* @param cfgidx: configuration index -* @retval status: USBD_StatusTypeDef -*/ -USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - 800a7e2: b580 push {r7, lr} - 800a7e4: b082 sub sp, #8 - 800a7e6: af00 add r7, sp, #0 - 800a7e8: 6078 str r0, [r7, #4] - 800a7ea: 460b mov r3, r1 - 800a7ec: 70fb strb r3, [r7, #3] - /* Clear configuration and De-initialize the Class process*/ - pdev->pClass->DeInit(pdev, cfgidx); - 800a7ee: 687b ldr r3, [r7, #4] - 800a7f0: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800a7f4: 685b ldr r3, [r3, #4] - 800a7f6: 78fa ldrb r2, [r7, #3] - 800a7f8: 4611 mov r1, r2 - 800a7fa: 6878 ldr r0, [r7, #4] - 800a7fc: 4798 blx r3 - - return USBD_OK; - 800a7fe: 2300 movs r3, #0 -} - 800a800: 4618 mov r0, r3 - 800a802: 3708 adds r7, #8 - 800a804: 46bd mov sp, r7 - 800a806: bd80 pop {r7, pc} - -0800a808 : -* Handle the setup stage -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) -{ - 800a808: b580 push {r7, lr} - 800a80a: b082 sub sp, #8 - 800a80c: af00 add r7, sp, #0 - 800a80e: 6078 str r0, [r7, #4] - 800a810: 6039 str r1, [r7, #0] - USBD_ParseSetupRequest(&pdev->request, psetup); - 800a812: 687b ldr r3, [r7, #4] - 800a814: f503 732a add.w r3, r3, #680 ; 0x2a8 - 800a818: 6839 ldr r1, [r7, #0] - 800a81a: 4618 mov r0, r3 - 800a81c: f000 fece bl 800b5bc - - pdev->ep0_state = USBD_EP0_SETUP; - 800a820: 687b ldr r3, [r7, #4] - 800a822: 2201 movs r2, #1 - 800a824: f8c3 2294 str.w r2, [r3, #660] ; 0x294 - - pdev->ep0_data_len = pdev->request.wLength; - 800a828: 687b ldr r3, [r7, #4] - 800a82a: f8b3 32ae ldrh.w r3, [r3, #686] ; 0x2ae - 800a82e: 461a mov r2, r3 - 800a830: 687b ldr r3, [r7, #4] - 800a832: f8c3 2298 str.w r2, [r3, #664] ; 0x298 - - switch (pdev->request.bmRequest & 0x1FU) - 800a836: 687b ldr r3, [r7, #4] - 800a838: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8 - 800a83c: f003 031f and.w r3, r3, #31 - 800a840: 2b01 cmp r3, #1 - 800a842: d00c beq.n 800a85e - 800a844: 2b01 cmp r3, #1 - 800a846: d302 bcc.n 800a84e - 800a848: 2b02 cmp r3, #2 - 800a84a: d010 beq.n 800a86e - 800a84c: e017 b.n 800a87e - { - case USB_REQ_RECIPIENT_DEVICE: - USBD_StdDevReq(pdev, &pdev->request); - 800a84e: 687b ldr r3, [r7, #4] - 800a850: f503 732a add.w r3, r3, #680 ; 0x2a8 - 800a854: 4619 mov r1, r3 - 800a856: 6878 ldr r0, [r7, #4] - 800a858: f000 f9ce bl 800abf8 - break; - 800a85c: e01a b.n 800a894 - - case USB_REQ_RECIPIENT_INTERFACE: - USBD_StdItfReq(pdev, &pdev->request); - 800a85e: 687b ldr r3, [r7, #4] - 800a860: f503 732a add.w r3, r3, #680 ; 0x2a8 - 800a864: 4619 mov r1, r3 - 800a866: 6878 ldr r0, [r7, #4] - 800a868: f000 fa30 bl 800accc - break; - 800a86c: e012 b.n 800a894 - - case USB_REQ_RECIPIENT_ENDPOINT: - USBD_StdEPReq(pdev, &pdev->request); - 800a86e: 687b ldr r3, [r7, #4] - 800a870: f503 732a add.w r3, r3, #680 ; 0x2a8 - 800a874: 4619 mov r1, r3 - 800a876: 6878 ldr r0, [r7, #4] - 800a878: f000 fa6e bl 800ad58 - break; - 800a87c: e00a b.n 800a894 - - default: - USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U)); - 800a87e: 687b ldr r3, [r7, #4] - 800a880: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8 - 800a884: f023 037f bic.w r3, r3, #127 ; 0x7f - 800a888: b2db uxtb r3, r3 - 800a88a: 4619 mov r1, r3 - 800a88c: 6878 ldr r0, [r7, #4] - 800a88e: f001 f9ff bl 800bc90 - break; - 800a892: bf00 nop - } - - return USBD_OK; - 800a894: 2300 movs r3, #0 -} - 800a896: 4618 mov r0, r3 - 800a898: 3708 adds r7, #8 - 800a89a: 46bd mov sp, r7 - 800a89c: bd80 pop {r7, pc} - -0800a89e : -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev, - uint8_t epnum, uint8_t *pdata) -{ - 800a89e: b580 push {r7, lr} - 800a8a0: b086 sub sp, #24 - 800a8a2: af00 add r7, sp, #0 - 800a8a4: 60f8 str r0, [r7, #12] - 800a8a6: 460b mov r3, r1 - 800a8a8: 607a str r2, [r7, #4] - 800a8aa: 72fb strb r3, [r7, #11] - USBD_EndpointTypeDef *pep; - - if (epnum == 0U) - 800a8ac: 7afb ldrb r3, [r7, #11] - 800a8ae: 2b00 cmp r3, #0 - 800a8b0: d14b bne.n 800a94a - { - pep = &pdev->ep_out[0]; - 800a8b2: 68fb ldr r3, [r7, #12] - 800a8b4: f503 73aa add.w r3, r3, #340 ; 0x154 - 800a8b8: 617b str r3, [r7, #20] - - if (pdev->ep0_state == USBD_EP0_DATA_OUT) - 800a8ba: 68fb ldr r3, [r7, #12] - 800a8bc: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294 - 800a8c0: 2b03 cmp r3, #3 - 800a8c2: d134 bne.n 800a92e - { - if (pep->rem_length > pep->maxpacket) - 800a8c4: 697b ldr r3, [r7, #20] - 800a8c6: 68da ldr r2, [r3, #12] - 800a8c8: 697b ldr r3, [r7, #20] - 800a8ca: 691b ldr r3, [r3, #16] - 800a8cc: 429a cmp r2, r3 - 800a8ce: d919 bls.n 800a904 - { - pep->rem_length -= pep->maxpacket; - 800a8d0: 697b ldr r3, [r7, #20] - 800a8d2: 68da ldr r2, [r3, #12] - 800a8d4: 697b ldr r3, [r7, #20] - 800a8d6: 691b ldr r3, [r3, #16] - 800a8d8: 1ad2 subs r2, r2, r3 - 800a8da: 697b ldr r3, [r7, #20] - 800a8dc: 60da str r2, [r3, #12] - - USBD_CtlContinueRx(pdev, pdata, - (uint16_t)MIN(pep->rem_length, pep->maxpacket)); - 800a8de: 697b ldr r3, [r7, #20] - 800a8e0: 68da ldr r2, [r3, #12] - 800a8e2: 697b ldr r3, [r7, #20] - 800a8e4: 691b ldr r3, [r3, #16] - USBD_CtlContinueRx(pdev, pdata, - 800a8e6: 429a cmp r2, r3 - 800a8e8: d203 bcs.n 800a8f2 - (uint16_t)MIN(pep->rem_length, pep->maxpacket)); - 800a8ea: 697b ldr r3, [r7, #20] - 800a8ec: 68db ldr r3, [r3, #12] - USBD_CtlContinueRx(pdev, pdata, - 800a8ee: b29b uxth r3, r3 - 800a8f0: e002 b.n 800a8f8 - (uint16_t)MIN(pep->rem_length, pep->maxpacket)); - 800a8f2: 697b ldr r3, [r7, #20] - 800a8f4: 691b ldr r3, [r3, #16] - USBD_CtlContinueRx(pdev, pdata, - 800a8f6: b29b uxth r3, r3 - 800a8f8: 461a mov r2, r3 - 800a8fa: 6879 ldr r1, [r7, #4] - 800a8fc: 68f8 ldr r0, [r7, #12] - 800a8fe: f000 fed9 bl 800b6b4 - 800a902: e038 b.n 800a976 - } - else - { - if ((pdev->pClass->EP0_RxReady != NULL) && - 800a904: 68fb ldr r3, [r7, #12] - 800a906: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800a90a: 691b ldr r3, [r3, #16] - 800a90c: 2b00 cmp r3, #0 - 800a90e: d00a beq.n 800a926 - (pdev->dev_state == USBD_STATE_CONFIGURED)) - 800a910: 68fb ldr r3, [r7, #12] - 800a912: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - if ((pdev->pClass->EP0_RxReady != NULL) && - 800a916: 2b03 cmp r3, #3 - 800a918: d105 bne.n 800a926 - { - pdev->pClass->EP0_RxReady(pdev); - 800a91a: 68fb ldr r3, [r7, #12] - 800a91c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800a920: 691b ldr r3, [r3, #16] - 800a922: 68f8 ldr r0, [r7, #12] - 800a924: 4798 blx r3 - } - USBD_CtlSendStatus(pdev); - 800a926: 68f8 ldr r0, [r7, #12] - 800a928: f000 fed6 bl 800b6d8 - 800a92c: e023 b.n 800a976 - } - } - else - { - if (pdev->ep0_state == USBD_EP0_STATUS_OUT) - 800a92e: 68fb ldr r3, [r7, #12] - 800a930: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294 - 800a934: 2b05 cmp r3, #5 - 800a936: d11e bne.n 800a976 - { - /* - * STATUS PHASE completed, update ep0_state to idle - */ - pdev->ep0_state = USBD_EP0_IDLE; - 800a938: 68fb ldr r3, [r7, #12] - 800a93a: 2200 movs r2, #0 - 800a93c: f8c3 2294 str.w r2, [r3, #660] ; 0x294 - USBD_LL_StallEP(pdev, 0U); - 800a940: 2100 movs r1, #0 - 800a942: 68f8 ldr r0, [r7, #12] - 800a944: f001 f9a4 bl 800bc90 - 800a948: e015 b.n 800a976 - } - } - } - else if ((pdev->pClass->DataOut != NULL) && - 800a94a: 68fb ldr r3, [r7, #12] - 800a94c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800a950: 699b ldr r3, [r3, #24] - 800a952: 2b00 cmp r3, #0 - 800a954: d00d beq.n 800a972 - (pdev->dev_state == USBD_STATE_CONFIGURED)) - 800a956: 68fb ldr r3, [r7, #12] - 800a958: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - else if ((pdev->pClass->DataOut != NULL) && - 800a95c: 2b03 cmp r3, #3 - 800a95e: d108 bne.n 800a972 - { - pdev->pClass->DataOut(pdev, epnum); - 800a960: 68fb ldr r3, [r7, #12] - 800a962: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800a966: 699b ldr r3, [r3, #24] - 800a968: 7afa ldrb r2, [r7, #11] - 800a96a: 4611 mov r1, r2 - 800a96c: 68f8 ldr r0, [r7, #12] - 800a96e: 4798 blx r3 - 800a970: e001 b.n 800a976 - } - else - { - /* should never be in this condition */ - return USBD_FAIL; - 800a972: 2302 movs r3, #2 - 800a974: e000 b.n 800a978 - } - - return USBD_OK; - 800a976: 2300 movs r3, #0 -} - 800a978: 4618 mov r0, r3 - 800a97a: 3718 adds r7, #24 - 800a97c: 46bd mov sp, r7 - 800a97e: bd80 pop {r7, pc} - -0800a980 : -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, - uint8_t epnum, uint8_t *pdata) -{ - 800a980: b580 push {r7, lr} - 800a982: b086 sub sp, #24 - 800a984: af00 add r7, sp, #0 - 800a986: 60f8 str r0, [r7, #12] - 800a988: 460b mov r3, r1 - 800a98a: 607a str r2, [r7, #4] - 800a98c: 72fb strb r3, [r7, #11] - USBD_EndpointTypeDef *pep; - - if (epnum == 0U) - 800a98e: 7afb ldrb r3, [r7, #11] - 800a990: 2b00 cmp r3, #0 - 800a992: d17f bne.n 800aa94 - { - pep = &pdev->ep_in[0]; - 800a994: 68fb ldr r3, [r7, #12] - 800a996: 3314 adds r3, #20 - 800a998: 617b str r3, [r7, #20] - - if (pdev->ep0_state == USBD_EP0_DATA_IN) - 800a99a: 68fb ldr r3, [r7, #12] - 800a99c: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294 - 800a9a0: 2b02 cmp r3, #2 - 800a9a2: d15c bne.n 800aa5e - { - if (pep->rem_length > pep->maxpacket) - 800a9a4: 697b ldr r3, [r7, #20] - 800a9a6: 68da ldr r2, [r3, #12] - 800a9a8: 697b ldr r3, [r7, #20] - 800a9aa: 691b ldr r3, [r3, #16] - 800a9ac: 429a cmp r2, r3 - 800a9ae: d915 bls.n 800a9dc - { - pep->rem_length -= pep->maxpacket; - 800a9b0: 697b ldr r3, [r7, #20] - 800a9b2: 68da ldr r2, [r3, #12] - 800a9b4: 697b ldr r3, [r7, #20] - 800a9b6: 691b ldr r3, [r3, #16] - 800a9b8: 1ad2 subs r2, r2, r3 - 800a9ba: 697b ldr r3, [r7, #20] - 800a9bc: 60da str r2, [r3, #12] - - USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length); - 800a9be: 697b ldr r3, [r7, #20] - 800a9c0: 68db ldr r3, [r3, #12] - 800a9c2: b29b uxth r3, r3 - 800a9c4: 461a mov r2, r3 - 800a9c6: 6879 ldr r1, [r7, #4] - 800a9c8: 68f8 ldr r0, [r7, #12] - 800a9ca: f000 fe61 bl 800b690 - - /* Prepare endpoint for premature end of transfer */ - USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); - 800a9ce: 2300 movs r3, #0 - 800a9d0: 2200 movs r2, #0 - 800a9d2: 2100 movs r1, #0 - 800a9d4: 68f8 ldr r0, [r7, #12] - 800a9d6: f001 fa01 bl 800bddc - 800a9da: e04e b.n 800aa7a - } - else - { - /* last packet is MPS multiple, so send ZLP packet */ - if ((pep->total_length % pep->maxpacket == 0U) && - 800a9dc: 697b ldr r3, [r7, #20] - 800a9de: 689b ldr r3, [r3, #8] - 800a9e0: 697a ldr r2, [r7, #20] - 800a9e2: 6912 ldr r2, [r2, #16] - 800a9e4: fbb3 f1f2 udiv r1, r3, r2 - 800a9e8: fb02 f201 mul.w r2, r2, r1 - 800a9ec: 1a9b subs r3, r3, r2 - 800a9ee: 2b00 cmp r3, #0 - 800a9f0: d11c bne.n 800aa2c - (pep->total_length >= pep->maxpacket) && - 800a9f2: 697b ldr r3, [r7, #20] - 800a9f4: 689a ldr r2, [r3, #8] - 800a9f6: 697b ldr r3, [r7, #20] - 800a9f8: 691b ldr r3, [r3, #16] - if ((pep->total_length % pep->maxpacket == 0U) && - 800a9fa: 429a cmp r2, r3 - 800a9fc: d316 bcc.n 800aa2c - (pep->total_length < pdev->ep0_data_len)) - 800a9fe: 697b ldr r3, [r7, #20] - 800aa00: 689a ldr r2, [r3, #8] - 800aa02: 68fb ldr r3, [r7, #12] - 800aa04: f8d3 3298 ldr.w r3, [r3, #664] ; 0x298 - (pep->total_length >= pep->maxpacket) && - 800aa08: 429a cmp r2, r3 - 800aa0a: d20f bcs.n 800aa2c - { - USBD_CtlContinueSendData(pdev, NULL, 0U); - 800aa0c: 2200 movs r2, #0 - 800aa0e: 2100 movs r1, #0 - 800aa10: 68f8 ldr r0, [r7, #12] - 800aa12: f000 fe3d bl 800b690 - pdev->ep0_data_len = 0U; - 800aa16: 68fb ldr r3, [r7, #12] - 800aa18: 2200 movs r2, #0 - 800aa1a: f8c3 2298 str.w r2, [r3, #664] ; 0x298 - - /* Prepare endpoint for premature end of transfer */ - USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); - 800aa1e: 2300 movs r3, #0 - 800aa20: 2200 movs r2, #0 - 800aa22: 2100 movs r1, #0 - 800aa24: 68f8 ldr r0, [r7, #12] - 800aa26: f001 f9d9 bl 800bddc - 800aa2a: e026 b.n 800aa7a - } - else - { - if ((pdev->pClass->EP0_TxSent != NULL) && - 800aa2c: 68fb ldr r3, [r7, #12] - 800aa2e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800aa32: 68db ldr r3, [r3, #12] - 800aa34: 2b00 cmp r3, #0 - 800aa36: d00a beq.n 800aa4e - (pdev->dev_state == USBD_STATE_CONFIGURED)) - 800aa38: 68fb ldr r3, [r7, #12] - 800aa3a: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - if ((pdev->pClass->EP0_TxSent != NULL) && - 800aa3e: 2b03 cmp r3, #3 - 800aa40: d105 bne.n 800aa4e - { - pdev->pClass->EP0_TxSent(pdev); - 800aa42: 68fb ldr r3, [r7, #12] - 800aa44: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800aa48: 68db ldr r3, [r3, #12] - 800aa4a: 68f8 ldr r0, [r7, #12] - 800aa4c: 4798 blx r3 - } - USBD_LL_StallEP(pdev, 0x80U); - 800aa4e: 2180 movs r1, #128 ; 0x80 - 800aa50: 68f8 ldr r0, [r7, #12] - 800aa52: f001 f91d bl 800bc90 - USBD_CtlReceiveStatus(pdev); - 800aa56: 68f8 ldr r0, [r7, #12] - 800aa58: f000 fe51 bl 800b6fe - 800aa5c: e00d b.n 800aa7a - } - } - } - else - { - if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || - 800aa5e: 68fb ldr r3, [r7, #12] - 800aa60: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294 - 800aa64: 2b04 cmp r3, #4 - 800aa66: d004 beq.n 800aa72 - (pdev->ep0_state == USBD_EP0_IDLE)) - 800aa68: 68fb ldr r3, [r7, #12] - 800aa6a: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294 - if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || - 800aa6e: 2b00 cmp r3, #0 - 800aa70: d103 bne.n 800aa7a - { - USBD_LL_StallEP(pdev, 0x80U); - 800aa72: 2180 movs r1, #128 ; 0x80 - 800aa74: 68f8 ldr r0, [r7, #12] - 800aa76: f001 f90b bl 800bc90 - } - } - - if (pdev->dev_test_mode == 1U) - 800aa7a: 68fb ldr r3, [r7, #12] - 800aa7c: f893 32a0 ldrb.w r3, [r3, #672] ; 0x2a0 - 800aa80: 2b01 cmp r3, #1 - 800aa82: d11d bne.n 800aac0 - { - USBD_RunTestMode(pdev); - 800aa84: 68f8 ldr r0, [r7, #12] - 800aa86: f7ff fe82 bl 800a78e - pdev->dev_test_mode = 0U; - 800aa8a: 68fb ldr r3, [r7, #12] - 800aa8c: 2200 movs r2, #0 - 800aa8e: f883 22a0 strb.w r2, [r3, #672] ; 0x2a0 - 800aa92: e015 b.n 800aac0 - } - } - else if ((pdev->pClass->DataIn != NULL) && - 800aa94: 68fb ldr r3, [r7, #12] - 800aa96: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800aa9a: 695b ldr r3, [r3, #20] - 800aa9c: 2b00 cmp r3, #0 - 800aa9e: d00d beq.n 800aabc - (pdev->dev_state == USBD_STATE_CONFIGURED)) - 800aaa0: 68fb ldr r3, [r7, #12] - 800aaa2: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - else if ((pdev->pClass->DataIn != NULL) && - 800aaa6: 2b03 cmp r3, #3 - 800aaa8: d108 bne.n 800aabc - { - pdev->pClass->DataIn(pdev, epnum); - 800aaaa: 68fb ldr r3, [r7, #12] - 800aaac: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800aab0: 695b ldr r3, [r3, #20] - 800aab2: 7afa ldrb r2, [r7, #11] - 800aab4: 4611 mov r1, r2 - 800aab6: 68f8 ldr r0, [r7, #12] - 800aab8: 4798 blx r3 - 800aaba: e001 b.n 800aac0 - } - else - { - /* should never be in this condition */ - return USBD_FAIL; - 800aabc: 2302 movs r3, #2 - 800aabe: e000 b.n 800aac2 - } - - return USBD_OK; - 800aac0: 2300 movs r3, #0 -} - 800aac2: 4618 mov r0, r3 - 800aac4: 3718 adds r7, #24 - 800aac6: 46bd mov sp, r7 - 800aac8: bd80 pop {r7, pc} - -0800aaca : -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) -{ - 800aaca: b580 push {r7, lr} - 800aacc: b082 sub sp, #8 - 800aace: af00 add r7, sp, #0 - 800aad0: 6078 str r0, [r7, #4] - /* Open EP0 OUT */ - USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); - 800aad2: 2340 movs r3, #64 ; 0x40 - 800aad4: 2200 movs r2, #0 - 800aad6: 2100 movs r1, #0 - 800aad8: 6878 ldr r0, [r7, #4] - 800aada: f001 f8b3 bl 800bc44 - pdev->ep_out[0x00U & 0xFU].is_used = 1U; - 800aade: 687b ldr r3, [r7, #4] - 800aae0: 2201 movs r2, #1 - 800aae2: f8c3 2158 str.w r2, [r3, #344] ; 0x158 - - pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; - 800aae6: 687b ldr r3, [r7, #4] - 800aae8: 2240 movs r2, #64 ; 0x40 - 800aaea: f8c3 2164 str.w r2, [r3, #356] ; 0x164 - - /* Open EP0 IN */ - USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); - 800aaee: 2340 movs r3, #64 ; 0x40 - 800aaf0: 2200 movs r2, #0 - 800aaf2: 2180 movs r1, #128 ; 0x80 - 800aaf4: 6878 ldr r0, [r7, #4] - 800aaf6: f001 f8a5 bl 800bc44 - pdev->ep_in[0x80U & 0xFU].is_used = 1U; - 800aafa: 687b ldr r3, [r7, #4] - 800aafc: 2201 movs r2, #1 - 800aafe: 619a str r2, [r3, #24] - - pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; - 800ab00: 687b ldr r3, [r7, #4] - 800ab02: 2240 movs r2, #64 ; 0x40 - 800ab04: 625a str r2, [r3, #36] ; 0x24 - - /* Upon Reset call user call back */ - pdev->dev_state = USBD_STATE_DEFAULT; - 800ab06: 687b ldr r3, [r7, #4] - 800ab08: 2201 movs r2, #1 - 800ab0a: f883 229c strb.w r2, [r3, #668] ; 0x29c - pdev->ep0_state = USBD_EP0_IDLE; - 800ab0e: 687b ldr r3, [r7, #4] - 800ab10: 2200 movs r2, #0 - 800ab12: f8c3 2294 str.w r2, [r3, #660] ; 0x294 - pdev->dev_config = 0U; - 800ab16: 687b ldr r3, [r7, #4] - 800ab18: 2200 movs r2, #0 - 800ab1a: 605a str r2, [r3, #4] - pdev->dev_remote_wakeup = 0U; - 800ab1c: 687b ldr r3, [r7, #4] - 800ab1e: 2200 movs r2, #0 - 800ab20: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4 - - if (pdev->pClassData) - 800ab24: 687b ldr r3, [r7, #4] - 800ab26: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8 - 800ab2a: 2b00 cmp r3, #0 - 800ab2c: d009 beq.n 800ab42 - { - pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config); - 800ab2e: 687b ldr r3, [r7, #4] - 800ab30: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800ab34: 685b ldr r3, [r3, #4] - 800ab36: 687a ldr r2, [r7, #4] - 800ab38: 6852 ldr r2, [r2, #4] - 800ab3a: b2d2 uxtb r2, r2 - 800ab3c: 4611 mov r1, r2 - 800ab3e: 6878 ldr r0, [r7, #4] - 800ab40: 4798 blx r3 - } - - return USBD_OK; - 800ab42: 2300 movs r3, #0 -} - 800ab44: 4618 mov r0, r3 - 800ab46: 3708 adds r7, #8 - 800ab48: 46bd mov sp, r7 - 800ab4a: bd80 pop {r7, pc} - -0800ab4c : -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, - USBD_SpeedTypeDef speed) -{ - 800ab4c: b480 push {r7} - 800ab4e: b083 sub sp, #12 - 800ab50: af00 add r7, sp, #0 - 800ab52: 6078 str r0, [r7, #4] - 800ab54: 460b mov r3, r1 - 800ab56: 70fb strb r3, [r7, #3] - pdev->dev_speed = speed; - 800ab58: 687b ldr r3, [r7, #4] - 800ab5a: 78fa ldrb r2, [r7, #3] - 800ab5c: 741a strb r2, [r3, #16] - - return USBD_OK; - 800ab5e: 2300 movs r3, #0 -} - 800ab60: 4618 mov r0, r3 - 800ab62: 370c adds r7, #12 - 800ab64: 46bd mov sp, r7 - 800ab66: f85d 7b04 ldr.w r7, [sp], #4 - 800ab6a: 4770 bx lr - -0800ab6c : -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) -{ - 800ab6c: b480 push {r7} - 800ab6e: b083 sub sp, #12 - 800ab70: af00 add r7, sp, #0 - 800ab72: 6078 str r0, [r7, #4] - pdev->dev_old_state = pdev->dev_state; - 800ab74: 687b ldr r3, [r7, #4] - 800ab76: f893 229c ldrb.w r2, [r3, #668] ; 0x29c - 800ab7a: 687b ldr r3, [r7, #4] - 800ab7c: f883 229d strb.w r2, [r3, #669] ; 0x29d - pdev->dev_state = USBD_STATE_SUSPENDED; - 800ab80: 687b ldr r3, [r7, #4] - 800ab82: 2204 movs r2, #4 - 800ab84: f883 229c strb.w r2, [r3, #668] ; 0x29c - - return USBD_OK; - 800ab88: 2300 movs r3, #0 -} - 800ab8a: 4618 mov r0, r3 - 800ab8c: 370c adds r7, #12 - 800ab8e: 46bd mov sp, r7 - 800ab90: f85d 7b04 ldr.w r7, [sp], #4 - 800ab94: 4770 bx lr - -0800ab96 : -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) -{ - 800ab96: b480 push {r7} - 800ab98: b083 sub sp, #12 - 800ab9a: af00 add r7, sp, #0 - 800ab9c: 6078 str r0, [r7, #4] - if (pdev->dev_state == USBD_STATE_SUSPENDED) - 800ab9e: 687b ldr r3, [r7, #4] - 800aba0: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800aba4: 2b04 cmp r3, #4 - 800aba6: d105 bne.n 800abb4 - { - pdev->dev_state = pdev->dev_old_state; - 800aba8: 687b ldr r3, [r7, #4] - 800abaa: f893 229d ldrb.w r2, [r3, #669] ; 0x29d - 800abae: 687b ldr r3, [r7, #4] - 800abb0: f883 229c strb.w r2, [r3, #668] ; 0x29c - } - - return USBD_OK; - 800abb4: 2300 movs r3, #0 -} - 800abb6: 4618 mov r0, r3 - 800abb8: 370c adds r7, #12 - 800abba: 46bd mov sp, r7 - 800abbc: f85d 7b04 ldr.w r7, [sp], #4 - 800abc0: 4770 bx lr - -0800abc2 : -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) -{ - 800abc2: b580 push {r7, lr} - 800abc4: b082 sub sp, #8 - 800abc6: af00 add r7, sp, #0 - 800abc8: 6078 str r0, [r7, #4] - if (pdev->dev_state == USBD_STATE_CONFIGURED) - 800abca: 687b ldr r3, [r7, #4] - 800abcc: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800abd0: 2b03 cmp r3, #3 - 800abd2: d10b bne.n 800abec - { - if (pdev->pClass->SOF != NULL) - 800abd4: 687b ldr r3, [r7, #4] - 800abd6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800abda: 69db ldr r3, [r3, #28] - 800abdc: 2b00 cmp r3, #0 - 800abde: d005 beq.n 800abec - { - pdev->pClass->SOF(pdev); - 800abe0: 687b ldr r3, [r7, #4] - 800abe2: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800abe6: 69db ldr r3, [r3, #28] - 800abe8: 6878 ldr r0, [r7, #4] - 800abea: 4798 blx r3 - } - } - - return USBD_OK; - 800abec: 2300 movs r3, #0 -} - 800abee: 4618 mov r0, r3 - 800abf0: 3708 adds r7, #8 - 800abf2: 46bd mov sp, r7 - 800abf4: bd80 pop {r7, pc} - ... - -0800abf8 : -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - 800abf8: b580 push {r7, lr} - 800abfa: b084 sub sp, #16 - 800abfc: af00 add r7, sp, #0 - 800abfe: 6078 str r0, [r7, #4] - 800ac00: 6039 str r1, [r7, #0] - USBD_StatusTypeDef ret = USBD_OK; - 800ac02: 2300 movs r3, #0 - 800ac04: 73fb strb r3, [r7, #15] - - switch (req->bmRequest & USB_REQ_TYPE_MASK) - 800ac06: 683b ldr r3, [r7, #0] - 800ac08: 781b ldrb r3, [r3, #0] - 800ac0a: f003 0360 and.w r3, r3, #96 ; 0x60 - 800ac0e: 2b20 cmp r3, #32 - 800ac10: d004 beq.n 800ac1c - 800ac12: 2b40 cmp r3, #64 ; 0x40 - 800ac14: d002 beq.n 800ac1c - 800ac16: 2b00 cmp r3, #0 - 800ac18: d008 beq.n 800ac2c - 800ac1a: e04c b.n 800acb6 - { - case USB_REQ_TYPE_CLASS: - case USB_REQ_TYPE_VENDOR: - pdev->pClass->Setup(pdev, req); - 800ac1c: 687b ldr r3, [r7, #4] - 800ac1e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800ac22: 689b ldr r3, [r3, #8] - 800ac24: 6839 ldr r1, [r7, #0] - 800ac26: 6878 ldr r0, [r7, #4] - 800ac28: 4798 blx r3 - break; - 800ac2a: e049 b.n 800acc0 - - case USB_REQ_TYPE_STANDARD: - switch (req->bRequest) - 800ac2c: 683b ldr r3, [r7, #0] - 800ac2e: 785b ldrb r3, [r3, #1] - 800ac30: 2b09 cmp r3, #9 - 800ac32: d83a bhi.n 800acaa - 800ac34: a201 add r2, pc, #4 ; (adr r2, 800ac3c ) - 800ac36: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 800ac3a: bf00 nop - 800ac3c: 0800ac8d .word 0x0800ac8d - 800ac40: 0800aca1 .word 0x0800aca1 - 800ac44: 0800acab .word 0x0800acab - 800ac48: 0800ac97 .word 0x0800ac97 - 800ac4c: 0800acab .word 0x0800acab - 800ac50: 0800ac6f .word 0x0800ac6f - 800ac54: 0800ac65 .word 0x0800ac65 - 800ac58: 0800acab .word 0x0800acab - 800ac5c: 0800ac83 .word 0x0800ac83 - 800ac60: 0800ac79 .word 0x0800ac79 - { - case USB_REQ_GET_DESCRIPTOR: - USBD_GetDescriptor(pdev, req); - 800ac64: 6839 ldr r1, [r7, #0] - 800ac66: 6878 ldr r0, [r7, #4] - 800ac68: f000 f9d4 bl 800b014 - break; - 800ac6c: e022 b.n 800acb4 - - case USB_REQ_SET_ADDRESS: - USBD_SetAddress(pdev, req); - 800ac6e: 6839 ldr r1, [r7, #0] - 800ac70: 6878 ldr r0, [r7, #4] - 800ac72: f000 fb37 bl 800b2e4 - break; - 800ac76: e01d b.n 800acb4 - - case USB_REQ_SET_CONFIGURATION: - USBD_SetConfig(pdev, req); - 800ac78: 6839 ldr r1, [r7, #0] - 800ac7a: 6878 ldr r0, [r7, #4] - 800ac7c: f000 fb74 bl 800b368 - break; - 800ac80: e018 b.n 800acb4 - - case USB_REQ_GET_CONFIGURATION: - USBD_GetConfig(pdev, req); - 800ac82: 6839 ldr r1, [r7, #0] - 800ac84: 6878 ldr r0, [r7, #4] - 800ac86: f000 fbfd bl 800b484 - break; - 800ac8a: e013 b.n 800acb4 - - case USB_REQ_GET_STATUS: - USBD_GetStatus(pdev, req); - 800ac8c: 6839 ldr r1, [r7, #0] - 800ac8e: 6878 ldr r0, [r7, #4] - 800ac90: f000 fc2c bl 800b4ec - break; - 800ac94: e00e b.n 800acb4 - - case USB_REQ_SET_FEATURE: - USBD_SetFeature(pdev, req); - 800ac96: 6839 ldr r1, [r7, #0] - 800ac98: 6878 ldr r0, [r7, #4] - 800ac9a: f000 fc5a bl 800b552 - break; - 800ac9e: e009 b.n 800acb4 - - case USB_REQ_CLEAR_FEATURE: - USBD_ClrFeature(pdev, req); - 800aca0: 6839 ldr r1, [r7, #0] - 800aca2: 6878 ldr r0, [r7, #4] - 800aca4: f000 fc69 bl 800b57a - break; - 800aca8: e004 b.n 800acb4 - - default: - USBD_CtlError(pdev, req); - 800acaa: 6839 ldr r1, [r7, #0] - 800acac: 6878 ldr r0, [r7, #4] - 800acae: f000 fcc2 bl 800b636 - break; - 800acb2: bf00 nop - } - break; - 800acb4: e004 b.n 800acc0 - - default: - USBD_CtlError(pdev, req); - 800acb6: 6839 ldr r1, [r7, #0] - 800acb8: 6878 ldr r0, [r7, #4] - 800acba: f000 fcbc bl 800b636 - break; - 800acbe: bf00 nop - } - - return ret; - 800acc0: 7bfb ldrb r3, [r7, #15] -} - 800acc2: 4618 mov r0, r3 - 800acc4: 3710 adds r7, #16 - 800acc6: 46bd mov sp, r7 - 800acc8: bd80 pop {r7, pc} - 800acca: bf00 nop - -0800accc : -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - 800accc: b580 push {r7, lr} - 800acce: b084 sub sp, #16 - 800acd0: af00 add r7, sp, #0 - 800acd2: 6078 str r0, [r7, #4] - 800acd4: 6039 str r1, [r7, #0] - USBD_StatusTypeDef ret = USBD_OK; - 800acd6: 2300 movs r3, #0 - 800acd8: 73fb strb r3, [r7, #15] - - switch (req->bmRequest & USB_REQ_TYPE_MASK) - 800acda: 683b ldr r3, [r7, #0] - 800acdc: 781b ldrb r3, [r3, #0] - 800acde: f003 0360 and.w r3, r3, #96 ; 0x60 - 800ace2: 2b20 cmp r3, #32 - 800ace4: d003 beq.n 800acee - 800ace6: 2b40 cmp r3, #64 ; 0x40 - 800ace8: d001 beq.n 800acee - 800acea: 2b00 cmp r3, #0 - 800acec: d12a bne.n 800ad44 - { - case USB_REQ_TYPE_CLASS: - case USB_REQ_TYPE_VENDOR: - case USB_REQ_TYPE_STANDARD: - switch (pdev->dev_state) - 800acee: 687b ldr r3, [r7, #4] - 800acf0: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800acf4: 3b01 subs r3, #1 - 800acf6: 2b02 cmp r3, #2 - 800acf8: d81d bhi.n 800ad36 - { - case USBD_STATE_DEFAULT: - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - - if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) - 800acfa: 683b ldr r3, [r7, #0] - 800acfc: 889b ldrh r3, [r3, #4] - 800acfe: b2db uxtb r3, r3 - 800ad00: 2b01 cmp r3, #1 - 800ad02: d813 bhi.n 800ad2c - { - ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); - 800ad04: 687b ldr r3, [r7, #4] - 800ad06: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800ad0a: 689b ldr r3, [r3, #8] - 800ad0c: 6839 ldr r1, [r7, #0] - 800ad0e: 6878 ldr r0, [r7, #4] - 800ad10: 4798 blx r3 - 800ad12: 4603 mov r3, r0 - 800ad14: 73fb strb r3, [r7, #15] - - if ((req->wLength == 0U) && (ret == USBD_OK)) - 800ad16: 683b ldr r3, [r7, #0] - 800ad18: 88db ldrh r3, [r3, #6] - 800ad1a: 2b00 cmp r3, #0 - 800ad1c: d110 bne.n 800ad40 - 800ad1e: 7bfb ldrb r3, [r7, #15] - 800ad20: 2b00 cmp r3, #0 - 800ad22: d10d bne.n 800ad40 - { - USBD_CtlSendStatus(pdev); - 800ad24: 6878 ldr r0, [r7, #4] - 800ad26: f000 fcd7 bl 800b6d8 - } - else - { - USBD_CtlError(pdev, req); - } - break; - 800ad2a: e009 b.n 800ad40 - USBD_CtlError(pdev, req); - 800ad2c: 6839 ldr r1, [r7, #0] - 800ad2e: 6878 ldr r0, [r7, #4] - 800ad30: f000 fc81 bl 800b636 - break; - 800ad34: e004 b.n 800ad40 - - default: - USBD_CtlError(pdev, req); - 800ad36: 6839 ldr r1, [r7, #0] - 800ad38: 6878 ldr r0, [r7, #4] - 800ad3a: f000 fc7c bl 800b636 - break; - 800ad3e: e000 b.n 800ad42 - break; - 800ad40: bf00 nop - } - break; - 800ad42: e004 b.n 800ad4e - - default: - USBD_CtlError(pdev, req); - 800ad44: 6839 ldr r1, [r7, #0] - 800ad46: 6878 ldr r0, [r7, #4] - 800ad48: f000 fc75 bl 800b636 - break; - 800ad4c: bf00 nop - } - - return USBD_OK; - 800ad4e: 2300 movs r3, #0 -} - 800ad50: 4618 mov r0, r3 - 800ad52: 3710 adds r7, #16 - 800ad54: 46bd mov sp, r7 - 800ad56: bd80 pop {r7, pc} - -0800ad58 : -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - 800ad58: b580 push {r7, lr} - 800ad5a: b084 sub sp, #16 - 800ad5c: af00 add r7, sp, #0 - 800ad5e: 6078 str r0, [r7, #4] - 800ad60: 6039 str r1, [r7, #0] - USBD_EndpointTypeDef *pep; - uint8_t ep_addr; - USBD_StatusTypeDef ret = USBD_OK; - 800ad62: 2300 movs r3, #0 - 800ad64: 73fb strb r3, [r7, #15] - ep_addr = LOBYTE(req->wIndex); - 800ad66: 683b ldr r3, [r7, #0] - 800ad68: 889b ldrh r3, [r3, #4] - 800ad6a: 73bb strb r3, [r7, #14] - - switch (req->bmRequest & USB_REQ_TYPE_MASK) - 800ad6c: 683b ldr r3, [r7, #0] - 800ad6e: 781b ldrb r3, [r3, #0] - 800ad70: f003 0360 and.w r3, r3, #96 ; 0x60 - 800ad74: 2b20 cmp r3, #32 - 800ad76: d004 beq.n 800ad82 - 800ad78: 2b40 cmp r3, #64 ; 0x40 - 800ad7a: d002 beq.n 800ad82 - 800ad7c: 2b00 cmp r3, #0 - 800ad7e: d008 beq.n 800ad92 - 800ad80: e13d b.n 800affe - { - case USB_REQ_TYPE_CLASS: - case USB_REQ_TYPE_VENDOR: - pdev->pClass->Setup(pdev, req); - 800ad82: 687b ldr r3, [r7, #4] - 800ad84: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800ad88: 689b ldr r3, [r3, #8] - 800ad8a: 6839 ldr r1, [r7, #0] - 800ad8c: 6878 ldr r0, [r7, #4] - 800ad8e: 4798 blx r3 - break; - 800ad90: e13a b.n 800b008 - - case USB_REQ_TYPE_STANDARD: - /* Check if it is a class request */ - if ((req->bmRequest & 0x60U) == 0x20U) - 800ad92: 683b ldr r3, [r7, #0] - 800ad94: 781b ldrb r3, [r3, #0] - 800ad96: f003 0360 and.w r3, r3, #96 ; 0x60 - 800ad9a: 2b20 cmp r3, #32 - 800ad9c: d10a bne.n 800adb4 - { - ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); - 800ad9e: 687b ldr r3, [r7, #4] - 800ada0: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800ada4: 689b ldr r3, [r3, #8] - 800ada6: 6839 ldr r1, [r7, #0] - 800ada8: 6878 ldr r0, [r7, #4] - 800adaa: 4798 blx r3 - 800adac: 4603 mov r3, r0 - 800adae: 73fb strb r3, [r7, #15] - - return ret; - 800adb0: 7bfb ldrb r3, [r7, #15] - 800adb2: e12a b.n 800b00a - } - - switch (req->bRequest) - 800adb4: 683b ldr r3, [r7, #0] - 800adb6: 785b ldrb r3, [r3, #1] - 800adb8: 2b01 cmp r3, #1 - 800adba: d03e beq.n 800ae3a - 800adbc: 2b03 cmp r3, #3 - 800adbe: d002 beq.n 800adc6 - 800adc0: 2b00 cmp r3, #0 - 800adc2: d070 beq.n 800aea6 - 800adc4: e115 b.n 800aff2 - { - case USB_REQ_SET_FEATURE: - switch (pdev->dev_state) - 800adc6: 687b ldr r3, [r7, #4] - 800adc8: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800adcc: 2b02 cmp r3, #2 - 800adce: d002 beq.n 800add6 - 800add0: 2b03 cmp r3, #3 - 800add2: d015 beq.n 800ae00 - 800add4: e02b b.n 800ae2e - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) - 800add6: 7bbb ldrb r3, [r7, #14] - 800add8: 2b00 cmp r3, #0 - 800adda: d00c beq.n 800adf6 - 800addc: 7bbb ldrb r3, [r7, #14] - 800adde: 2b80 cmp r3, #128 ; 0x80 - 800ade0: d009 beq.n 800adf6 - { - USBD_LL_StallEP(pdev, ep_addr); - 800ade2: 7bbb ldrb r3, [r7, #14] - 800ade4: 4619 mov r1, r3 - 800ade6: 6878 ldr r0, [r7, #4] - 800ade8: f000 ff52 bl 800bc90 - USBD_LL_StallEP(pdev, 0x80U); - 800adec: 2180 movs r1, #128 ; 0x80 - 800adee: 6878 ldr r0, [r7, #4] - 800adf0: f000 ff4e bl 800bc90 - } - else - { - USBD_CtlError(pdev, req); - } - break; - 800adf4: e020 b.n 800ae38 - USBD_CtlError(pdev, req); - 800adf6: 6839 ldr r1, [r7, #0] - 800adf8: 6878 ldr r0, [r7, #4] - 800adfa: f000 fc1c bl 800b636 - break; - 800adfe: e01b b.n 800ae38 - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - 800ae00: 683b ldr r3, [r7, #0] - 800ae02: 885b ldrh r3, [r3, #2] - 800ae04: 2b00 cmp r3, #0 - 800ae06: d10e bne.n 800ae26 - { - if ((ep_addr != 0x00U) && - 800ae08: 7bbb ldrb r3, [r7, #14] - 800ae0a: 2b00 cmp r3, #0 - 800ae0c: d00b beq.n 800ae26 - 800ae0e: 7bbb ldrb r3, [r7, #14] - 800ae10: 2b80 cmp r3, #128 ; 0x80 - 800ae12: d008 beq.n 800ae26 - (ep_addr != 0x80U) && (req->wLength == 0x00U)) - 800ae14: 683b ldr r3, [r7, #0] - 800ae16: 88db ldrh r3, [r3, #6] - 800ae18: 2b00 cmp r3, #0 - 800ae1a: d104 bne.n 800ae26 - { - USBD_LL_StallEP(pdev, ep_addr); - 800ae1c: 7bbb ldrb r3, [r7, #14] - 800ae1e: 4619 mov r1, r3 - 800ae20: 6878 ldr r0, [r7, #4] - 800ae22: f000 ff35 bl 800bc90 - } - } - USBD_CtlSendStatus(pdev); - 800ae26: 6878 ldr r0, [r7, #4] - 800ae28: f000 fc56 bl 800b6d8 - - break; - 800ae2c: e004 b.n 800ae38 - - default: - USBD_CtlError(pdev, req); - 800ae2e: 6839 ldr r1, [r7, #0] - 800ae30: 6878 ldr r0, [r7, #4] - 800ae32: f000 fc00 bl 800b636 - break; - 800ae36: bf00 nop - } - break; - 800ae38: e0e0 b.n 800affc - - case USB_REQ_CLEAR_FEATURE: - - switch (pdev->dev_state) - 800ae3a: 687b ldr r3, [r7, #4] - 800ae3c: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800ae40: 2b02 cmp r3, #2 - 800ae42: d002 beq.n 800ae4a - 800ae44: 2b03 cmp r3, #3 - 800ae46: d015 beq.n 800ae74 - 800ae48: e026 b.n 800ae98 - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) - 800ae4a: 7bbb ldrb r3, [r7, #14] - 800ae4c: 2b00 cmp r3, #0 - 800ae4e: d00c beq.n 800ae6a - 800ae50: 7bbb ldrb r3, [r7, #14] - 800ae52: 2b80 cmp r3, #128 ; 0x80 - 800ae54: d009 beq.n 800ae6a - { - USBD_LL_StallEP(pdev, ep_addr); - 800ae56: 7bbb ldrb r3, [r7, #14] - 800ae58: 4619 mov r1, r3 - 800ae5a: 6878 ldr r0, [r7, #4] - 800ae5c: f000 ff18 bl 800bc90 - USBD_LL_StallEP(pdev, 0x80U); - 800ae60: 2180 movs r1, #128 ; 0x80 - 800ae62: 6878 ldr r0, [r7, #4] - 800ae64: f000 ff14 bl 800bc90 - } - else - { - USBD_CtlError(pdev, req); - } - break; - 800ae68: e01c b.n 800aea4 - USBD_CtlError(pdev, req); - 800ae6a: 6839 ldr r1, [r7, #0] - 800ae6c: 6878 ldr r0, [r7, #4] - 800ae6e: f000 fbe2 bl 800b636 - break; - 800ae72: e017 b.n 800aea4 - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - 800ae74: 683b ldr r3, [r7, #0] - 800ae76: 885b ldrh r3, [r3, #2] - 800ae78: 2b00 cmp r3, #0 - 800ae7a: d112 bne.n 800aea2 - { - if ((ep_addr & 0x7FU) != 0x00U) - 800ae7c: 7bbb ldrb r3, [r7, #14] - 800ae7e: f003 037f and.w r3, r3, #127 ; 0x7f - 800ae82: 2b00 cmp r3, #0 - 800ae84: d004 beq.n 800ae90 - { - USBD_LL_ClearStallEP(pdev, ep_addr); - 800ae86: 7bbb ldrb r3, [r7, #14] - 800ae88: 4619 mov r1, r3 - 800ae8a: 6878 ldr r0, [r7, #4] - 800ae8c: f000 ff1f bl 800bcce - } - USBD_CtlSendStatus(pdev); - 800ae90: 6878 ldr r0, [r7, #4] - 800ae92: f000 fc21 bl 800b6d8 - } - break; - 800ae96: e004 b.n 800aea2 - - default: - USBD_CtlError(pdev, req); - 800ae98: 6839 ldr r1, [r7, #0] - 800ae9a: 6878 ldr r0, [r7, #4] - 800ae9c: f000 fbcb bl 800b636 - break; - 800aea0: e000 b.n 800aea4 - break; - 800aea2: bf00 nop - } - break; - 800aea4: e0aa b.n 800affc - - case USB_REQ_GET_STATUS: - switch (pdev->dev_state) - 800aea6: 687b ldr r3, [r7, #4] - 800aea8: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800aeac: 2b02 cmp r3, #2 - 800aeae: d002 beq.n 800aeb6 - 800aeb0: 2b03 cmp r3, #3 - 800aeb2: d032 beq.n 800af1a - 800aeb4: e097 b.n 800afe6 - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) - 800aeb6: 7bbb ldrb r3, [r7, #14] - 800aeb8: 2b00 cmp r3, #0 - 800aeba: d007 beq.n 800aecc - 800aebc: 7bbb ldrb r3, [r7, #14] - 800aebe: 2b80 cmp r3, #128 ; 0x80 - 800aec0: d004 beq.n 800aecc - { - USBD_CtlError(pdev, req); - 800aec2: 6839 ldr r1, [r7, #0] - 800aec4: 6878 ldr r0, [r7, #4] - 800aec6: f000 fbb6 bl 800b636 - break; - 800aeca: e091 b.n 800aff0 - } - pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ - 800aecc: f997 300e ldrsb.w r3, [r7, #14] - 800aed0: 2b00 cmp r3, #0 - 800aed2: da0b bge.n 800aeec - 800aed4: 7bbb ldrb r3, [r7, #14] - 800aed6: f003 027f and.w r2, r3, #127 ; 0x7f - 800aeda: 4613 mov r3, r2 - 800aedc: 009b lsls r3, r3, #2 - 800aede: 4413 add r3, r2 - 800aee0: 009b lsls r3, r3, #2 - 800aee2: 3310 adds r3, #16 - 800aee4: 687a ldr r2, [r7, #4] - 800aee6: 4413 add r3, r2 - 800aee8: 3304 adds r3, #4 - 800aeea: e00b b.n 800af04 - &pdev->ep_out[ep_addr & 0x7FU]; - 800aeec: 7bbb ldrb r3, [r7, #14] - 800aeee: f003 027f and.w r2, r3, #127 ; 0x7f - pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ - 800aef2: 4613 mov r3, r2 - 800aef4: 009b lsls r3, r3, #2 - 800aef6: 4413 add r3, r2 - 800aef8: 009b lsls r3, r3, #2 - 800aefa: f503 73a8 add.w r3, r3, #336 ; 0x150 - 800aefe: 687a ldr r2, [r7, #4] - 800af00: 4413 add r3, r2 - 800af02: 3304 adds r3, #4 - 800af04: 60bb str r3, [r7, #8] - - pep->status = 0x0000U; - 800af06: 68bb ldr r3, [r7, #8] - 800af08: 2200 movs r2, #0 - 800af0a: 601a str r2, [r3, #0] - - USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); - 800af0c: 68bb ldr r3, [r7, #8] - 800af0e: 2202 movs r2, #2 - 800af10: 4619 mov r1, r3 - 800af12: 6878 ldr r0, [r7, #4] - 800af14: f000 fba0 bl 800b658 - break; - 800af18: e06a b.n 800aff0 - - case USBD_STATE_CONFIGURED: - if ((ep_addr & 0x80U) == 0x80U) - 800af1a: f997 300e ldrsb.w r3, [r7, #14] - 800af1e: 2b00 cmp r3, #0 - 800af20: da11 bge.n 800af46 - { - if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U) - 800af22: 7bbb ldrb r3, [r7, #14] - 800af24: f003 020f and.w r2, r3, #15 - 800af28: 6879 ldr r1, [r7, #4] - 800af2a: 4613 mov r3, r2 - 800af2c: 009b lsls r3, r3, #2 - 800af2e: 4413 add r3, r2 - 800af30: 009b lsls r3, r3, #2 - 800af32: 440b add r3, r1 - 800af34: 3318 adds r3, #24 - 800af36: 681b ldr r3, [r3, #0] - 800af38: 2b00 cmp r3, #0 - 800af3a: d117 bne.n 800af6c - { - USBD_CtlError(pdev, req); - 800af3c: 6839 ldr r1, [r7, #0] - 800af3e: 6878 ldr r0, [r7, #4] - 800af40: f000 fb79 bl 800b636 - break; - 800af44: e054 b.n 800aff0 - } - } - else - { - if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U) - 800af46: 7bbb ldrb r3, [r7, #14] - 800af48: f003 020f and.w r2, r3, #15 - 800af4c: 6879 ldr r1, [r7, #4] - 800af4e: 4613 mov r3, r2 - 800af50: 009b lsls r3, r3, #2 - 800af52: 4413 add r3, r2 - 800af54: 009b lsls r3, r3, #2 - 800af56: 440b add r3, r1 - 800af58: f503 73ac add.w r3, r3, #344 ; 0x158 - 800af5c: 681b ldr r3, [r3, #0] - 800af5e: 2b00 cmp r3, #0 - 800af60: d104 bne.n 800af6c - { - USBD_CtlError(pdev, req); - 800af62: 6839 ldr r1, [r7, #0] - 800af64: 6878 ldr r0, [r7, #4] - 800af66: f000 fb66 bl 800b636 - break; - 800af6a: e041 b.n 800aff0 - } - } - - pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ - 800af6c: f997 300e ldrsb.w r3, [r7, #14] - 800af70: 2b00 cmp r3, #0 - 800af72: da0b bge.n 800af8c - 800af74: 7bbb ldrb r3, [r7, #14] - 800af76: f003 027f and.w r2, r3, #127 ; 0x7f - 800af7a: 4613 mov r3, r2 - 800af7c: 009b lsls r3, r3, #2 - 800af7e: 4413 add r3, r2 - 800af80: 009b lsls r3, r3, #2 - 800af82: 3310 adds r3, #16 - 800af84: 687a ldr r2, [r7, #4] - 800af86: 4413 add r3, r2 - 800af88: 3304 adds r3, #4 - 800af8a: e00b b.n 800afa4 - &pdev->ep_out[ep_addr & 0x7FU]; - 800af8c: 7bbb ldrb r3, [r7, #14] - 800af8e: f003 027f and.w r2, r3, #127 ; 0x7f - pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ - 800af92: 4613 mov r3, r2 - 800af94: 009b lsls r3, r3, #2 - 800af96: 4413 add r3, r2 - 800af98: 009b lsls r3, r3, #2 - 800af9a: f503 73a8 add.w r3, r3, #336 ; 0x150 - 800af9e: 687a ldr r2, [r7, #4] - 800afa0: 4413 add r3, r2 - 800afa2: 3304 adds r3, #4 - 800afa4: 60bb str r3, [r7, #8] - - if ((ep_addr == 0x00U) || (ep_addr == 0x80U)) - 800afa6: 7bbb ldrb r3, [r7, #14] - 800afa8: 2b00 cmp r3, #0 - 800afaa: d002 beq.n 800afb2 - 800afac: 7bbb ldrb r3, [r7, #14] - 800afae: 2b80 cmp r3, #128 ; 0x80 - 800afb0: d103 bne.n 800afba - { - pep->status = 0x0000U; - 800afb2: 68bb ldr r3, [r7, #8] - 800afb4: 2200 movs r2, #0 - 800afb6: 601a str r2, [r3, #0] - 800afb8: e00e b.n 800afd8 - } - else if (USBD_LL_IsStallEP(pdev, ep_addr)) - 800afba: 7bbb ldrb r3, [r7, #14] - 800afbc: 4619 mov r1, r3 - 800afbe: 6878 ldr r0, [r7, #4] - 800afc0: f000 fea4 bl 800bd0c - 800afc4: 4603 mov r3, r0 - 800afc6: 2b00 cmp r3, #0 - 800afc8: d003 beq.n 800afd2 - { - pep->status = 0x0001U; - 800afca: 68bb ldr r3, [r7, #8] - 800afcc: 2201 movs r2, #1 - 800afce: 601a str r2, [r3, #0] - 800afd0: e002 b.n 800afd8 - } - else - { - pep->status = 0x0000U; - 800afd2: 68bb ldr r3, [r7, #8] - 800afd4: 2200 movs r2, #0 - 800afd6: 601a str r2, [r3, #0] - } - - USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); - 800afd8: 68bb ldr r3, [r7, #8] - 800afda: 2202 movs r2, #2 - 800afdc: 4619 mov r1, r3 - 800afde: 6878 ldr r0, [r7, #4] - 800afe0: f000 fb3a bl 800b658 - break; - 800afe4: e004 b.n 800aff0 - - default: - USBD_CtlError(pdev, req); - 800afe6: 6839 ldr r1, [r7, #0] - 800afe8: 6878 ldr r0, [r7, #4] - 800afea: f000 fb24 bl 800b636 - break; - 800afee: bf00 nop - } - break; - 800aff0: e004 b.n 800affc - - default: - USBD_CtlError(pdev, req); - 800aff2: 6839 ldr r1, [r7, #0] - 800aff4: 6878 ldr r0, [r7, #4] - 800aff6: f000 fb1e bl 800b636 - break; - 800affa: bf00 nop - } - break; - 800affc: e004 b.n 800b008 - - default: - USBD_CtlError(pdev, req); - 800affe: 6839 ldr r1, [r7, #0] - 800b000: 6878 ldr r0, [r7, #4] - 800b002: f000 fb18 bl 800b636 - break; - 800b006: bf00 nop - } - - return ret; - 800b008: 7bfb ldrb r3, [r7, #15] -} - 800b00a: 4618 mov r0, r3 - 800b00c: 3710 adds r7, #16 - 800b00e: 46bd mov sp, r7 - 800b010: bd80 pop {r7, pc} - ... - -0800b014 : -* @param req: usb request -* @retval status -*/ -static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - 800b014: b580 push {r7, lr} - 800b016: b084 sub sp, #16 - 800b018: af00 add r7, sp, #0 - 800b01a: 6078 str r0, [r7, #4] - 800b01c: 6039 str r1, [r7, #0] - uint16_t len = 0U; - 800b01e: 2300 movs r3, #0 - 800b020: 813b strh r3, [r7, #8] - uint8_t *pbuf = NULL; - 800b022: 2300 movs r3, #0 - 800b024: 60fb str r3, [r7, #12] - uint8_t err = 0U; - 800b026: 2300 movs r3, #0 - 800b028: 72fb strb r3, [r7, #11] - - switch (req->wValue >> 8) - 800b02a: 683b ldr r3, [r7, #0] - 800b02c: 885b ldrh r3, [r3, #2] - 800b02e: 0a1b lsrs r3, r3, #8 - 800b030: b29b uxth r3, r3 - 800b032: 3b01 subs r3, #1 - 800b034: 2b06 cmp r3, #6 - 800b036: f200 8128 bhi.w 800b28a - 800b03a: a201 add r2, pc, #4 ; (adr r2, 800b040 ) - 800b03c: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 800b040: 0800b05d .word 0x0800b05d - 800b044: 0800b075 .word 0x0800b075 - 800b048: 0800b0b5 .word 0x0800b0b5 - 800b04c: 0800b28b .word 0x0800b28b - 800b050: 0800b28b .word 0x0800b28b - 800b054: 0800b22b .word 0x0800b22b - 800b058: 0800b257 .word 0x0800b257 - err++; - } - break; -#endif - case USB_DESC_TYPE_DEVICE: - pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); - 800b05c: 687b ldr r3, [r7, #4] - 800b05e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b062: 681b ldr r3, [r3, #0] - 800b064: 687a ldr r2, [r7, #4] - 800b066: 7c12 ldrb r2, [r2, #16] - 800b068: f107 0108 add.w r1, r7, #8 - 800b06c: 4610 mov r0, r2 - 800b06e: 4798 blx r3 - 800b070: 60f8 str r0, [r7, #12] - break; - 800b072: e112 b.n 800b29a - - case USB_DESC_TYPE_CONFIGURATION: - if (pdev->dev_speed == USBD_SPEED_HIGH) - 800b074: 687b ldr r3, [r7, #4] - 800b076: 7c1b ldrb r3, [r3, #16] - 800b078: 2b00 cmp r3, #0 - 800b07a: d10d bne.n 800b098 - { - pbuf = pdev->pClass->GetHSConfigDescriptor(&len); - 800b07c: 687b ldr r3, [r7, #4] - 800b07e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800b082: 6a9b ldr r3, [r3, #40] ; 0x28 - 800b084: f107 0208 add.w r2, r7, #8 - 800b088: 4610 mov r0, r2 - 800b08a: 4798 blx r3 - 800b08c: 60f8 str r0, [r7, #12] - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - 800b08e: 68fb ldr r3, [r7, #12] - 800b090: 3301 adds r3, #1 - 800b092: 2202 movs r2, #2 - 800b094: 701a strb r2, [r3, #0] - else - { - pbuf = pdev->pClass->GetFSConfigDescriptor(&len); - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - } - break; - 800b096: e100 b.n 800b29a - pbuf = pdev->pClass->GetFSConfigDescriptor(&len); - 800b098: 687b ldr r3, [r7, #4] - 800b09a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800b09e: 6adb ldr r3, [r3, #44] ; 0x2c - 800b0a0: f107 0208 add.w r2, r7, #8 - 800b0a4: 4610 mov r0, r2 - 800b0a6: 4798 blx r3 - 800b0a8: 60f8 str r0, [r7, #12] - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - 800b0aa: 68fb ldr r3, [r7, #12] - 800b0ac: 3301 adds r3, #1 - 800b0ae: 2202 movs r2, #2 - 800b0b0: 701a strb r2, [r3, #0] - break; - 800b0b2: e0f2 b.n 800b29a - - case USB_DESC_TYPE_STRING: - switch ((uint8_t)(req->wValue)) - 800b0b4: 683b ldr r3, [r7, #0] - 800b0b6: 885b ldrh r3, [r3, #2] - 800b0b8: b2db uxtb r3, r3 - 800b0ba: 2b05 cmp r3, #5 - 800b0bc: f200 80ac bhi.w 800b218 - 800b0c0: a201 add r2, pc, #4 ; (adr r2, 800b0c8 ) - 800b0c2: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 800b0c6: bf00 nop - 800b0c8: 0800b0e1 .word 0x0800b0e1 - 800b0cc: 0800b115 .word 0x0800b115 - 800b0d0: 0800b149 .word 0x0800b149 - 800b0d4: 0800b17d .word 0x0800b17d - 800b0d8: 0800b1b1 .word 0x0800b1b1 - 800b0dc: 0800b1e5 .word 0x0800b1e5 - { - case USBD_IDX_LANGID_STR: - if (pdev->pDesc->GetLangIDStrDescriptor != NULL) - 800b0e0: 687b ldr r3, [r7, #4] - 800b0e2: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b0e6: 685b ldr r3, [r3, #4] - 800b0e8: 2b00 cmp r3, #0 - 800b0ea: d00b beq.n 800b104 - { - pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); - 800b0ec: 687b ldr r3, [r7, #4] - 800b0ee: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b0f2: 685b ldr r3, [r3, #4] - 800b0f4: 687a ldr r2, [r7, #4] - 800b0f6: 7c12 ldrb r2, [r2, #16] - 800b0f8: f107 0108 add.w r1, r7, #8 - 800b0fc: 4610 mov r0, r2 - 800b0fe: 4798 blx r3 - 800b100: 60f8 str r0, [r7, #12] - else - { - USBD_CtlError(pdev, req); - err++; - } - break; - 800b102: e091 b.n 800b228 - USBD_CtlError(pdev, req); - 800b104: 6839 ldr r1, [r7, #0] - 800b106: 6878 ldr r0, [r7, #4] - 800b108: f000 fa95 bl 800b636 - err++; - 800b10c: 7afb ldrb r3, [r7, #11] - 800b10e: 3301 adds r3, #1 - 800b110: 72fb strb r3, [r7, #11] - break; - 800b112: e089 b.n 800b228 - - case USBD_IDX_MFC_STR: - if (pdev->pDesc->GetManufacturerStrDescriptor != NULL) - 800b114: 687b ldr r3, [r7, #4] - 800b116: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b11a: 689b ldr r3, [r3, #8] - 800b11c: 2b00 cmp r3, #0 - 800b11e: d00b beq.n 800b138 - { - pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); - 800b120: 687b ldr r3, [r7, #4] - 800b122: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b126: 689b ldr r3, [r3, #8] - 800b128: 687a ldr r2, [r7, #4] - 800b12a: 7c12 ldrb r2, [r2, #16] - 800b12c: f107 0108 add.w r1, r7, #8 - 800b130: 4610 mov r0, r2 - 800b132: 4798 blx r3 - 800b134: 60f8 str r0, [r7, #12] - else - { - USBD_CtlError(pdev, req); - err++; - } - break; - 800b136: e077 b.n 800b228 - USBD_CtlError(pdev, req); - 800b138: 6839 ldr r1, [r7, #0] - 800b13a: 6878 ldr r0, [r7, #4] - 800b13c: f000 fa7b bl 800b636 - err++; - 800b140: 7afb ldrb r3, [r7, #11] - 800b142: 3301 adds r3, #1 - 800b144: 72fb strb r3, [r7, #11] - break; - 800b146: e06f b.n 800b228 - - case USBD_IDX_PRODUCT_STR: - if (pdev->pDesc->GetProductStrDescriptor != NULL) - 800b148: 687b ldr r3, [r7, #4] - 800b14a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b14e: 68db ldr r3, [r3, #12] - 800b150: 2b00 cmp r3, #0 - 800b152: d00b beq.n 800b16c - { - pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); - 800b154: 687b ldr r3, [r7, #4] - 800b156: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b15a: 68db ldr r3, [r3, #12] - 800b15c: 687a ldr r2, [r7, #4] - 800b15e: 7c12 ldrb r2, [r2, #16] - 800b160: f107 0108 add.w r1, r7, #8 - 800b164: 4610 mov r0, r2 - 800b166: 4798 blx r3 - 800b168: 60f8 str r0, [r7, #12] - else - { - USBD_CtlError(pdev, req); - err++; - } - break; - 800b16a: e05d b.n 800b228 - USBD_CtlError(pdev, req); - 800b16c: 6839 ldr r1, [r7, #0] - 800b16e: 6878 ldr r0, [r7, #4] - 800b170: f000 fa61 bl 800b636 - err++; - 800b174: 7afb ldrb r3, [r7, #11] - 800b176: 3301 adds r3, #1 - 800b178: 72fb strb r3, [r7, #11] - break; - 800b17a: e055 b.n 800b228 - - case USBD_IDX_SERIAL_STR: - if (pdev->pDesc->GetSerialStrDescriptor != NULL) - 800b17c: 687b ldr r3, [r7, #4] - 800b17e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b182: 691b ldr r3, [r3, #16] - 800b184: 2b00 cmp r3, #0 - 800b186: d00b beq.n 800b1a0 - { - pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); - 800b188: 687b ldr r3, [r7, #4] - 800b18a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b18e: 691b ldr r3, [r3, #16] - 800b190: 687a ldr r2, [r7, #4] - 800b192: 7c12 ldrb r2, [r2, #16] - 800b194: f107 0108 add.w r1, r7, #8 - 800b198: 4610 mov r0, r2 - 800b19a: 4798 blx r3 - 800b19c: 60f8 str r0, [r7, #12] - else - { - USBD_CtlError(pdev, req); - err++; - } - break; - 800b19e: e043 b.n 800b228 - USBD_CtlError(pdev, req); - 800b1a0: 6839 ldr r1, [r7, #0] - 800b1a2: 6878 ldr r0, [r7, #4] - 800b1a4: f000 fa47 bl 800b636 - err++; - 800b1a8: 7afb ldrb r3, [r7, #11] - 800b1aa: 3301 adds r3, #1 - 800b1ac: 72fb strb r3, [r7, #11] - break; - 800b1ae: e03b b.n 800b228 - - case USBD_IDX_CONFIG_STR: - if (pdev->pDesc->GetConfigurationStrDescriptor != NULL) - 800b1b0: 687b ldr r3, [r7, #4] - 800b1b2: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b1b6: 695b ldr r3, [r3, #20] - 800b1b8: 2b00 cmp r3, #0 - 800b1ba: d00b beq.n 800b1d4 - { - pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); - 800b1bc: 687b ldr r3, [r7, #4] - 800b1be: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b1c2: 695b ldr r3, [r3, #20] - 800b1c4: 687a ldr r2, [r7, #4] - 800b1c6: 7c12 ldrb r2, [r2, #16] - 800b1c8: f107 0108 add.w r1, r7, #8 - 800b1cc: 4610 mov r0, r2 - 800b1ce: 4798 blx r3 - 800b1d0: 60f8 str r0, [r7, #12] - else - { - USBD_CtlError(pdev, req); - err++; - } - break; - 800b1d2: e029 b.n 800b228 - USBD_CtlError(pdev, req); - 800b1d4: 6839 ldr r1, [r7, #0] - 800b1d6: 6878 ldr r0, [r7, #4] - 800b1d8: f000 fa2d bl 800b636 - err++; - 800b1dc: 7afb ldrb r3, [r7, #11] - 800b1de: 3301 adds r3, #1 - 800b1e0: 72fb strb r3, [r7, #11] - break; - 800b1e2: e021 b.n 800b228 - - case USBD_IDX_INTERFACE_STR: - if (pdev->pDesc->GetInterfaceStrDescriptor != NULL) - 800b1e4: 687b ldr r3, [r7, #4] - 800b1e6: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b1ea: 699b ldr r3, [r3, #24] - 800b1ec: 2b00 cmp r3, #0 - 800b1ee: d00b beq.n 800b208 - { - pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); - 800b1f0: 687b ldr r3, [r7, #4] - 800b1f2: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0 - 800b1f6: 699b ldr r3, [r3, #24] - 800b1f8: 687a ldr r2, [r7, #4] - 800b1fa: 7c12 ldrb r2, [r2, #16] - 800b1fc: f107 0108 add.w r1, r7, #8 - 800b200: 4610 mov r0, r2 - 800b202: 4798 blx r3 - 800b204: 60f8 str r0, [r7, #12] - else - { - USBD_CtlError(pdev, req); - err++; - } - break; - 800b206: e00f b.n 800b228 - USBD_CtlError(pdev, req); - 800b208: 6839 ldr r1, [r7, #0] - 800b20a: 6878 ldr r0, [r7, #4] - 800b20c: f000 fa13 bl 800b636 - err++; - 800b210: 7afb ldrb r3, [r7, #11] - 800b212: 3301 adds r3, #1 - 800b214: 72fb strb r3, [r7, #11] - break; - 800b216: e007 b.n 800b228 - USBD_CtlError(pdev, req); - err++; - } - break; -#else - USBD_CtlError(pdev, req); - 800b218: 6839 ldr r1, [r7, #0] - 800b21a: 6878 ldr r0, [r7, #4] - 800b21c: f000 fa0b bl 800b636 - err++; - 800b220: 7afb ldrb r3, [r7, #11] - 800b222: 3301 adds r3, #1 - 800b224: 72fb strb r3, [r7, #11] -#endif - } - break; - 800b226: e038 b.n 800b29a - 800b228: e037 b.n 800b29a - - case USB_DESC_TYPE_DEVICE_QUALIFIER: - if (pdev->dev_speed == USBD_SPEED_HIGH) - 800b22a: 687b ldr r3, [r7, #4] - 800b22c: 7c1b ldrb r3, [r3, #16] - 800b22e: 2b00 cmp r3, #0 - 800b230: d109 bne.n 800b246 - { - pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len); - 800b232: 687b ldr r3, [r7, #4] - 800b234: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800b238: 6b5b ldr r3, [r3, #52] ; 0x34 - 800b23a: f107 0208 add.w r2, r7, #8 - 800b23e: 4610 mov r0, r2 - 800b240: 4798 blx r3 - 800b242: 60f8 str r0, [r7, #12] - else - { - USBD_CtlError(pdev, req); - err++; - } - break; - 800b244: e029 b.n 800b29a - USBD_CtlError(pdev, req); - 800b246: 6839 ldr r1, [r7, #0] - 800b248: 6878 ldr r0, [r7, #4] - 800b24a: f000 f9f4 bl 800b636 - err++; - 800b24e: 7afb ldrb r3, [r7, #11] - 800b250: 3301 adds r3, #1 - 800b252: 72fb strb r3, [r7, #11] - break; - 800b254: e021 b.n 800b29a - - case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: - if (pdev->dev_speed == USBD_SPEED_HIGH) - 800b256: 687b ldr r3, [r7, #4] - 800b258: 7c1b ldrb r3, [r3, #16] - 800b25a: 2b00 cmp r3, #0 - 800b25c: d10d bne.n 800b27a - { - pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len); - 800b25e: 687b ldr r3, [r7, #4] - 800b260: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4 - 800b264: 6b1b ldr r3, [r3, #48] ; 0x30 - 800b266: f107 0208 add.w r2, r7, #8 - 800b26a: 4610 mov r0, r2 - 800b26c: 4798 blx r3 - 800b26e: 60f8 str r0, [r7, #12] - pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; - 800b270: 68fb ldr r3, [r7, #12] - 800b272: 3301 adds r3, #1 - 800b274: 2207 movs r2, #7 - 800b276: 701a strb r2, [r3, #0] - else - { - USBD_CtlError(pdev, req); - err++; - } - break; - 800b278: e00f b.n 800b29a - USBD_CtlError(pdev, req); - 800b27a: 6839 ldr r1, [r7, #0] - 800b27c: 6878 ldr r0, [r7, #4] - 800b27e: f000 f9da bl 800b636 - err++; - 800b282: 7afb ldrb r3, [r7, #11] - 800b284: 3301 adds r3, #1 - 800b286: 72fb strb r3, [r7, #11] - break; - 800b288: e007 b.n 800b29a - - default: - USBD_CtlError(pdev, req); - 800b28a: 6839 ldr r1, [r7, #0] - 800b28c: 6878 ldr r0, [r7, #4] - 800b28e: f000 f9d2 bl 800b636 - err++; - 800b292: 7afb ldrb r3, [r7, #11] - 800b294: 3301 adds r3, #1 - 800b296: 72fb strb r3, [r7, #11] - break; - 800b298: bf00 nop - } - - if (err != 0U) - 800b29a: 7afb ldrb r3, [r7, #11] - 800b29c: 2b00 cmp r3, #0 - 800b29e: d11c bne.n 800b2da - { - return; - } - else - { - if ((len != 0U) && (req->wLength != 0U)) - 800b2a0: 893b ldrh r3, [r7, #8] - 800b2a2: 2b00 cmp r3, #0 - 800b2a4: d011 beq.n 800b2ca - 800b2a6: 683b ldr r3, [r7, #0] - 800b2a8: 88db ldrh r3, [r3, #6] - 800b2aa: 2b00 cmp r3, #0 - 800b2ac: d00d beq.n 800b2ca - { - len = MIN(len, req->wLength); - 800b2ae: 683b ldr r3, [r7, #0] - 800b2b0: 88da ldrh r2, [r3, #6] - 800b2b2: 893b ldrh r3, [r7, #8] - 800b2b4: 4293 cmp r3, r2 - 800b2b6: bf28 it cs - 800b2b8: 4613 movcs r3, r2 - 800b2ba: b29b uxth r3, r3 - 800b2bc: 813b strh r3, [r7, #8] - (void)USBD_CtlSendData(pdev, pbuf, len); - 800b2be: 893b ldrh r3, [r7, #8] - 800b2c0: 461a mov r2, r3 - 800b2c2: 68f9 ldr r1, [r7, #12] - 800b2c4: 6878 ldr r0, [r7, #4] - 800b2c6: f000 f9c7 bl 800b658 - } - - if (req->wLength == 0U) - 800b2ca: 683b ldr r3, [r7, #0] - 800b2cc: 88db ldrh r3, [r3, #6] - 800b2ce: 2b00 cmp r3, #0 - 800b2d0: d104 bne.n 800b2dc - { - (void)USBD_CtlSendStatus(pdev); - 800b2d2: 6878 ldr r0, [r7, #4] - 800b2d4: f000 fa00 bl 800b6d8 - 800b2d8: e000 b.n 800b2dc - return; - 800b2da: bf00 nop - } - } -} - 800b2dc: 3710 adds r7, #16 - 800b2de: 46bd mov sp, r7 - 800b2e0: bd80 pop {r7, pc} - 800b2e2: bf00 nop - -0800b2e4 : -* @param req: usb request -* @retval status -*/ -static void USBD_SetAddress(USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - 800b2e4: b580 push {r7, lr} - 800b2e6: b084 sub sp, #16 - 800b2e8: af00 add r7, sp, #0 - 800b2ea: 6078 str r0, [r7, #4] - 800b2ec: 6039 str r1, [r7, #0] - uint8_t dev_addr; - - if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U)) - 800b2ee: 683b ldr r3, [r7, #0] - 800b2f0: 889b ldrh r3, [r3, #4] - 800b2f2: 2b00 cmp r3, #0 - 800b2f4: d130 bne.n 800b358 - 800b2f6: 683b ldr r3, [r7, #0] - 800b2f8: 88db ldrh r3, [r3, #6] - 800b2fa: 2b00 cmp r3, #0 - 800b2fc: d12c bne.n 800b358 - 800b2fe: 683b ldr r3, [r7, #0] - 800b300: 885b ldrh r3, [r3, #2] - 800b302: 2b7f cmp r3, #127 ; 0x7f - 800b304: d828 bhi.n 800b358 - { - dev_addr = (uint8_t)(req->wValue) & 0x7FU; - 800b306: 683b ldr r3, [r7, #0] - 800b308: 885b ldrh r3, [r3, #2] - 800b30a: b2db uxtb r3, r3 - 800b30c: f003 037f and.w r3, r3, #127 ; 0x7f - 800b310: 73fb strb r3, [r7, #15] - - if (pdev->dev_state == USBD_STATE_CONFIGURED) - 800b312: 687b ldr r3, [r7, #4] - 800b314: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800b318: 2b03 cmp r3, #3 - 800b31a: d104 bne.n 800b326 - { - USBD_CtlError(pdev, req); - 800b31c: 6839 ldr r1, [r7, #0] - 800b31e: 6878 ldr r0, [r7, #4] - 800b320: f000 f989 bl 800b636 - if (pdev->dev_state == USBD_STATE_CONFIGURED) - 800b324: e01c b.n 800b360 - } - else - { - pdev->dev_address = dev_addr; - 800b326: 687b ldr r3, [r7, #4] - 800b328: 7bfa ldrb r2, [r7, #15] - 800b32a: f883 229e strb.w r2, [r3, #670] ; 0x29e - USBD_LL_SetUSBAddress(pdev, dev_addr); - 800b32e: 7bfb ldrb r3, [r7, #15] - 800b330: 4619 mov r1, r3 - 800b332: 6878 ldr r0, [r7, #4] - 800b334: f000 fd10 bl 800bd58 - USBD_CtlSendStatus(pdev); - 800b338: 6878 ldr r0, [r7, #4] - 800b33a: f000 f9cd bl 800b6d8 - - if (dev_addr != 0U) - 800b33e: 7bfb ldrb r3, [r7, #15] - 800b340: 2b00 cmp r3, #0 - 800b342: d004 beq.n 800b34e - { - pdev->dev_state = USBD_STATE_ADDRESSED; - 800b344: 687b ldr r3, [r7, #4] - 800b346: 2202 movs r2, #2 - 800b348: f883 229c strb.w r2, [r3, #668] ; 0x29c - if (pdev->dev_state == USBD_STATE_CONFIGURED) - 800b34c: e008 b.n 800b360 - } - else - { - pdev->dev_state = USBD_STATE_DEFAULT; - 800b34e: 687b ldr r3, [r7, #4] - 800b350: 2201 movs r2, #1 - 800b352: f883 229c strb.w r2, [r3, #668] ; 0x29c - if (pdev->dev_state == USBD_STATE_CONFIGURED) - 800b356: e003 b.n 800b360 - } - } - } - else - { - USBD_CtlError(pdev, req); - 800b358: 6839 ldr r1, [r7, #0] - 800b35a: 6878 ldr r0, [r7, #4] - 800b35c: f000 f96b bl 800b636 - } -} - 800b360: bf00 nop - 800b362: 3710 adds r7, #16 - 800b364: 46bd mov sp, r7 - 800b366: bd80 pop {r7, pc} - -0800b368 : -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) -{ - 800b368: b580 push {r7, lr} - 800b36a: b082 sub sp, #8 - 800b36c: af00 add r7, sp, #0 - 800b36e: 6078 str r0, [r7, #4] - 800b370: 6039 str r1, [r7, #0] - static uint8_t cfgidx; - - cfgidx = (uint8_t)(req->wValue); - 800b372: 683b ldr r3, [r7, #0] - 800b374: 885b ldrh r3, [r3, #2] - 800b376: b2da uxtb r2, r3 - 800b378: 4b41 ldr r3, [pc, #260] ; (800b480 ) - 800b37a: 701a strb r2, [r3, #0] - - if (cfgidx > USBD_MAX_NUM_CONFIGURATION) - 800b37c: 4b40 ldr r3, [pc, #256] ; (800b480 ) - 800b37e: 781b ldrb r3, [r3, #0] - 800b380: 2b01 cmp r3, #1 - 800b382: d904 bls.n 800b38e - { - USBD_CtlError(pdev, req); - 800b384: 6839 ldr r1, [r7, #0] - 800b386: 6878 ldr r0, [r7, #4] - 800b388: f000 f955 bl 800b636 - 800b38c: e075 b.n 800b47a - } - else - { - switch (pdev->dev_state) - 800b38e: 687b ldr r3, [r7, #4] - 800b390: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800b394: 2b02 cmp r3, #2 - 800b396: d002 beq.n 800b39e - 800b398: 2b03 cmp r3, #3 - 800b39a: d023 beq.n 800b3e4 - 800b39c: e062 b.n 800b464 - { - case USBD_STATE_ADDRESSED: - if (cfgidx) - 800b39e: 4b38 ldr r3, [pc, #224] ; (800b480 ) - 800b3a0: 781b ldrb r3, [r3, #0] - 800b3a2: 2b00 cmp r3, #0 - 800b3a4: d01a beq.n 800b3dc - { - pdev->dev_config = cfgidx; - 800b3a6: 4b36 ldr r3, [pc, #216] ; (800b480 ) - 800b3a8: 781b ldrb r3, [r3, #0] - 800b3aa: 461a mov r2, r3 - 800b3ac: 687b ldr r3, [r7, #4] - 800b3ae: 605a str r2, [r3, #4] - pdev->dev_state = USBD_STATE_CONFIGURED; - 800b3b0: 687b ldr r3, [r7, #4] - 800b3b2: 2203 movs r2, #3 - 800b3b4: f883 229c strb.w r2, [r3, #668] ; 0x29c - if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) - 800b3b8: 4b31 ldr r3, [pc, #196] ; (800b480 ) - 800b3ba: 781b ldrb r3, [r3, #0] - 800b3bc: 4619 mov r1, r3 - 800b3be: 6878 ldr r0, [r7, #4] - 800b3c0: f7ff f9f0 bl 800a7a4 - 800b3c4: 4603 mov r3, r0 - 800b3c6: 2b02 cmp r3, #2 - 800b3c8: d104 bne.n 800b3d4 - { - USBD_CtlError(pdev, req); - 800b3ca: 6839 ldr r1, [r7, #0] - 800b3cc: 6878 ldr r0, [r7, #4] - 800b3ce: f000 f932 bl 800b636 - return; - 800b3d2: e052 b.n 800b47a - } - USBD_CtlSendStatus(pdev); - 800b3d4: 6878 ldr r0, [r7, #4] - 800b3d6: f000 f97f bl 800b6d8 - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - 800b3da: e04e b.n 800b47a - USBD_CtlSendStatus(pdev); - 800b3dc: 6878 ldr r0, [r7, #4] - 800b3de: f000 f97b bl 800b6d8 - break; - 800b3e2: e04a b.n 800b47a - - case USBD_STATE_CONFIGURED: - if (cfgidx == 0U) - 800b3e4: 4b26 ldr r3, [pc, #152] ; (800b480 ) - 800b3e6: 781b ldrb r3, [r3, #0] - 800b3e8: 2b00 cmp r3, #0 - 800b3ea: d112 bne.n 800b412 - { - pdev->dev_state = USBD_STATE_ADDRESSED; - 800b3ec: 687b ldr r3, [r7, #4] - 800b3ee: 2202 movs r2, #2 - 800b3f0: f883 229c strb.w r2, [r3, #668] ; 0x29c - pdev->dev_config = cfgidx; - 800b3f4: 4b22 ldr r3, [pc, #136] ; (800b480 ) - 800b3f6: 781b ldrb r3, [r3, #0] - 800b3f8: 461a mov r2, r3 - 800b3fa: 687b ldr r3, [r7, #4] - 800b3fc: 605a str r2, [r3, #4] - USBD_ClrClassConfig(pdev, cfgidx); - 800b3fe: 4b20 ldr r3, [pc, #128] ; (800b480 ) - 800b400: 781b ldrb r3, [r3, #0] - 800b402: 4619 mov r1, r3 - 800b404: 6878 ldr r0, [r7, #4] - 800b406: f7ff f9ec bl 800a7e2 - USBD_CtlSendStatus(pdev); - 800b40a: 6878 ldr r0, [r7, #4] - 800b40c: f000 f964 bl 800b6d8 - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - 800b410: e033 b.n 800b47a - else if (cfgidx != pdev->dev_config) - 800b412: 4b1b ldr r3, [pc, #108] ; (800b480 ) - 800b414: 781b ldrb r3, [r3, #0] - 800b416: 461a mov r2, r3 - 800b418: 687b ldr r3, [r7, #4] - 800b41a: 685b ldr r3, [r3, #4] - 800b41c: 429a cmp r2, r3 - 800b41e: d01d beq.n 800b45c - USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); - 800b420: 687b ldr r3, [r7, #4] - 800b422: 685b ldr r3, [r3, #4] - 800b424: b2db uxtb r3, r3 - 800b426: 4619 mov r1, r3 - 800b428: 6878 ldr r0, [r7, #4] - 800b42a: f7ff f9da bl 800a7e2 - pdev->dev_config = cfgidx; - 800b42e: 4b14 ldr r3, [pc, #80] ; (800b480 ) - 800b430: 781b ldrb r3, [r3, #0] - 800b432: 461a mov r2, r3 - 800b434: 687b ldr r3, [r7, #4] - 800b436: 605a str r2, [r3, #4] - if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) - 800b438: 4b11 ldr r3, [pc, #68] ; (800b480 ) - 800b43a: 781b ldrb r3, [r3, #0] - 800b43c: 4619 mov r1, r3 - 800b43e: 6878 ldr r0, [r7, #4] - 800b440: f7ff f9b0 bl 800a7a4 - 800b444: 4603 mov r3, r0 - 800b446: 2b02 cmp r3, #2 - 800b448: d104 bne.n 800b454 - USBD_CtlError(pdev, req); - 800b44a: 6839 ldr r1, [r7, #0] - 800b44c: 6878 ldr r0, [r7, #4] - 800b44e: f000 f8f2 bl 800b636 - return; - 800b452: e012 b.n 800b47a - USBD_CtlSendStatus(pdev); - 800b454: 6878 ldr r0, [r7, #4] - 800b456: f000 f93f bl 800b6d8 - break; - 800b45a: e00e b.n 800b47a - USBD_CtlSendStatus(pdev); - 800b45c: 6878 ldr r0, [r7, #4] - 800b45e: f000 f93b bl 800b6d8 - break; - 800b462: e00a b.n 800b47a - - default: - USBD_CtlError(pdev, req); - 800b464: 6839 ldr r1, [r7, #0] - 800b466: 6878 ldr r0, [r7, #4] - 800b468: f000 f8e5 bl 800b636 - USBD_ClrClassConfig(pdev, cfgidx); - 800b46c: 4b04 ldr r3, [pc, #16] ; (800b480 ) - 800b46e: 781b ldrb r3, [r3, #0] - 800b470: 4619 mov r1, r3 - 800b472: 6878 ldr r0, [r7, #4] - 800b474: f7ff f9b5 bl 800a7e2 - break; - 800b478: bf00 nop - } - } -} - 800b47a: 3708 adds r7, #8 - 800b47c: 46bd mov sp, r7 - 800b47e: bd80 pop {r7, pc} - 800b480: 20000060 .word 0x20000060 - -0800b484 : -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) -{ - 800b484: b580 push {r7, lr} - 800b486: b082 sub sp, #8 - 800b488: af00 add r7, sp, #0 - 800b48a: 6078 str r0, [r7, #4] - 800b48c: 6039 str r1, [r7, #0] - if (req->wLength != 1U) - 800b48e: 683b ldr r3, [r7, #0] - 800b490: 88db ldrh r3, [r3, #6] - 800b492: 2b01 cmp r3, #1 - 800b494: d004 beq.n 800b4a0 - { - USBD_CtlError(pdev, req); - 800b496: 6839 ldr r1, [r7, #0] - 800b498: 6878 ldr r0, [r7, #4] - 800b49a: f000 f8cc bl 800b636 - default: - USBD_CtlError(pdev, req); - break; - } - } -} - 800b49e: e021 b.n 800b4e4 - switch (pdev->dev_state) - 800b4a0: 687b ldr r3, [r7, #4] - 800b4a2: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800b4a6: 2b01 cmp r3, #1 - 800b4a8: db17 blt.n 800b4da - 800b4aa: 2b02 cmp r3, #2 - 800b4ac: dd02 ble.n 800b4b4 - 800b4ae: 2b03 cmp r3, #3 - 800b4b0: d00b beq.n 800b4ca - 800b4b2: e012 b.n 800b4da - pdev->dev_default_config = 0U; - 800b4b4: 687b ldr r3, [r7, #4] - 800b4b6: 2200 movs r2, #0 - 800b4b8: 609a str r2, [r3, #8] - USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U); - 800b4ba: 687b ldr r3, [r7, #4] - 800b4bc: 3308 adds r3, #8 - 800b4be: 2201 movs r2, #1 - 800b4c0: 4619 mov r1, r3 - 800b4c2: 6878 ldr r0, [r7, #4] - 800b4c4: f000 f8c8 bl 800b658 - break; - 800b4c8: e00c b.n 800b4e4 - USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U); - 800b4ca: 687b ldr r3, [r7, #4] - 800b4cc: 3304 adds r3, #4 - 800b4ce: 2201 movs r2, #1 - 800b4d0: 4619 mov r1, r3 - 800b4d2: 6878 ldr r0, [r7, #4] - 800b4d4: f000 f8c0 bl 800b658 - break; - 800b4d8: e004 b.n 800b4e4 - USBD_CtlError(pdev, req); - 800b4da: 6839 ldr r1, [r7, #0] - 800b4dc: 6878 ldr r0, [r7, #4] - 800b4de: f000 f8aa bl 800b636 - break; - 800b4e2: bf00 nop -} - 800b4e4: bf00 nop - 800b4e6: 3708 adds r7, #8 - 800b4e8: 46bd mov sp, r7 - 800b4ea: bd80 pop {r7, pc} - -0800b4ec : -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) -{ - 800b4ec: b580 push {r7, lr} - 800b4ee: b082 sub sp, #8 - 800b4f0: af00 add r7, sp, #0 - 800b4f2: 6078 str r0, [r7, #4] - 800b4f4: 6039 str r1, [r7, #0] - switch (pdev->dev_state) - 800b4f6: 687b ldr r3, [r7, #4] - 800b4f8: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800b4fc: 3b01 subs r3, #1 - 800b4fe: 2b02 cmp r3, #2 - 800b500: d81e bhi.n 800b540 - { - case USBD_STATE_DEFAULT: - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - if (req->wLength != 0x2U) - 800b502: 683b ldr r3, [r7, #0] - 800b504: 88db ldrh r3, [r3, #6] - 800b506: 2b02 cmp r3, #2 - 800b508: d004 beq.n 800b514 - { - USBD_CtlError(pdev, req); - 800b50a: 6839 ldr r1, [r7, #0] - 800b50c: 6878 ldr r0, [r7, #4] - 800b50e: f000 f892 bl 800b636 - break; - 800b512: e01a b.n 800b54a - } - -#if (USBD_SELF_POWERED == 1U) - pdev->dev_config_status = USB_CONFIG_SELF_POWERED; - 800b514: 687b ldr r3, [r7, #4] - 800b516: 2201 movs r2, #1 - 800b518: 60da str r2, [r3, #12] -#else - pdev->dev_config_status = 0U; -#endif - - if (pdev->dev_remote_wakeup) - 800b51a: 687b ldr r3, [r7, #4] - 800b51c: f8d3 32a4 ldr.w r3, [r3, #676] ; 0x2a4 - 800b520: 2b00 cmp r3, #0 - 800b522: d005 beq.n 800b530 - { - pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; - 800b524: 687b ldr r3, [r7, #4] - 800b526: 68db ldr r3, [r3, #12] - 800b528: f043 0202 orr.w r2, r3, #2 - 800b52c: 687b ldr r3, [r7, #4] - 800b52e: 60da str r2, [r3, #12] - } - - USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U); - 800b530: 687b ldr r3, [r7, #4] - 800b532: 330c adds r3, #12 - 800b534: 2202 movs r2, #2 - 800b536: 4619 mov r1, r3 - 800b538: 6878 ldr r0, [r7, #4] - 800b53a: f000 f88d bl 800b658 - break; - 800b53e: e004 b.n 800b54a - - default: - USBD_CtlError(pdev, req); - 800b540: 6839 ldr r1, [r7, #0] - 800b542: 6878 ldr r0, [r7, #4] - 800b544: f000 f877 bl 800b636 - break; - 800b548: bf00 nop - } -} - 800b54a: bf00 nop - 800b54c: 3708 adds r7, #8 - 800b54e: 46bd mov sp, r7 - 800b550: bd80 pop {r7, pc} - -0800b552 : -* @param req: usb request -* @retval status -*/ -static void USBD_SetFeature(USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - 800b552: b580 push {r7, lr} - 800b554: b082 sub sp, #8 - 800b556: af00 add r7, sp, #0 - 800b558: 6078 str r0, [r7, #4] - 800b55a: 6039 str r1, [r7, #0] - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - 800b55c: 683b ldr r3, [r7, #0] - 800b55e: 885b ldrh r3, [r3, #2] - 800b560: 2b01 cmp r3, #1 - 800b562: d106 bne.n 800b572 - { - pdev->dev_remote_wakeup = 1U; - 800b564: 687b ldr r3, [r7, #4] - 800b566: 2201 movs r2, #1 - 800b568: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4 - USBD_CtlSendStatus(pdev); - 800b56c: 6878 ldr r0, [r7, #4] - 800b56e: f000 f8b3 bl 800b6d8 - } -} - 800b572: bf00 nop - 800b574: 3708 adds r7, #8 - 800b576: 46bd mov sp, r7 - 800b578: bd80 pop {r7, pc} - -0800b57a : -* @param req: usb request -* @retval status -*/ -static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - 800b57a: b580 push {r7, lr} - 800b57c: b082 sub sp, #8 - 800b57e: af00 add r7, sp, #0 - 800b580: 6078 str r0, [r7, #4] - 800b582: 6039 str r1, [r7, #0] - switch (pdev->dev_state) - 800b584: 687b ldr r3, [r7, #4] - 800b586: f893 329c ldrb.w r3, [r3, #668] ; 0x29c - 800b58a: 3b01 subs r3, #1 - 800b58c: 2b02 cmp r3, #2 - 800b58e: d80b bhi.n 800b5a8 - { - case USBD_STATE_DEFAULT: - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - 800b590: 683b ldr r3, [r7, #0] - 800b592: 885b ldrh r3, [r3, #2] - 800b594: 2b01 cmp r3, #1 - 800b596: d10c bne.n 800b5b2 - { - pdev->dev_remote_wakeup = 0U; - 800b598: 687b ldr r3, [r7, #4] - 800b59a: 2200 movs r2, #0 - 800b59c: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4 - USBD_CtlSendStatus(pdev); - 800b5a0: 6878 ldr r0, [r7, #4] - 800b5a2: f000 f899 bl 800b6d8 - } - break; - 800b5a6: e004 b.n 800b5b2 - - default: - USBD_CtlError(pdev, req); - 800b5a8: 6839 ldr r1, [r7, #0] - 800b5aa: 6878 ldr r0, [r7, #4] - 800b5ac: f000 f843 bl 800b636 - break; - 800b5b0: e000 b.n 800b5b4 - break; - 800b5b2: bf00 nop - } -} - 800b5b4: bf00 nop - 800b5b6: 3708 adds r7, #8 - 800b5b8: 46bd mov sp, r7 - 800b5ba: bd80 pop {r7, pc} - -0800b5bc : -* @param req: usb request -* @retval None -*/ - -void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) -{ - 800b5bc: b480 push {r7} - 800b5be: b083 sub sp, #12 - 800b5c0: af00 add r7, sp, #0 - 800b5c2: 6078 str r0, [r7, #4] - 800b5c4: 6039 str r1, [r7, #0] - req->bmRequest = *(uint8_t *)(pdata); - 800b5c6: 683b ldr r3, [r7, #0] - 800b5c8: 781a ldrb r2, [r3, #0] - 800b5ca: 687b ldr r3, [r7, #4] - 800b5cc: 701a strb r2, [r3, #0] - req->bRequest = *(uint8_t *)(pdata + 1U); - 800b5ce: 683b ldr r3, [r7, #0] - 800b5d0: 785a ldrb r2, [r3, #1] - 800b5d2: 687b ldr r3, [r7, #4] - 800b5d4: 705a strb r2, [r3, #1] - req->wValue = SWAPBYTE(pdata + 2U); - 800b5d6: 683b ldr r3, [r7, #0] - 800b5d8: 3302 adds r3, #2 - 800b5da: 781b ldrb r3, [r3, #0] - 800b5dc: b29a uxth r2, r3 - 800b5de: 683b ldr r3, [r7, #0] - 800b5e0: 3303 adds r3, #3 - 800b5e2: 781b ldrb r3, [r3, #0] - 800b5e4: b29b uxth r3, r3 - 800b5e6: 021b lsls r3, r3, #8 - 800b5e8: b29b uxth r3, r3 - 800b5ea: 4413 add r3, r2 - 800b5ec: b29a uxth r2, r3 - 800b5ee: 687b ldr r3, [r7, #4] - 800b5f0: 805a strh r2, [r3, #2] - req->wIndex = SWAPBYTE(pdata + 4U); - 800b5f2: 683b ldr r3, [r7, #0] - 800b5f4: 3304 adds r3, #4 - 800b5f6: 781b ldrb r3, [r3, #0] - 800b5f8: b29a uxth r2, r3 - 800b5fa: 683b ldr r3, [r7, #0] - 800b5fc: 3305 adds r3, #5 - 800b5fe: 781b ldrb r3, [r3, #0] - 800b600: b29b uxth r3, r3 - 800b602: 021b lsls r3, r3, #8 - 800b604: b29b uxth r3, r3 - 800b606: 4413 add r3, r2 - 800b608: b29a uxth r2, r3 - 800b60a: 687b ldr r3, [r7, #4] - 800b60c: 809a strh r2, [r3, #4] - req->wLength = SWAPBYTE(pdata + 6U); - 800b60e: 683b ldr r3, [r7, #0] - 800b610: 3306 adds r3, #6 - 800b612: 781b ldrb r3, [r3, #0] - 800b614: b29a uxth r2, r3 - 800b616: 683b ldr r3, [r7, #0] - 800b618: 3307 adds r3, #7 - 800b61a: 781b ldrb r3, [r3, #0] - 800b61c: b29b uxth r3, r3 - 800b61e: 021b lsls r3, r3, #8 - 800b620: b29b uxth r3, r3 - 800b622: 4413 add r3, r2 - 800b624: b29a uxth r2, r3 - 800b626: 687b ldr r3, [r7, #4] - 800b628: 80da strh r2, [r3, #6] - -} - 800b62a: bf00 nop - 800b62c: 370c adds r7, #12 - 800b62e: 46bd mov sp, r7 - 800b630: f85d 7b04 ldr.w r7, [sp], #4 - 800b634: 4770 bx lr - -0800b636 : -* @retval None -*/ - -void USBD_CtlError(USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - 800b636: b580 push {r7, lr} - 800b638: b082 sub sp, #8 - 800b63a: af00 add r7, sp, #0 - 800b63c: 6078 str r0, [r7, #4] - 800b63e: 6039 str r1, [r7, #0] - USBD_LL_StallEP(pdev, 0x80U); - 800b640: 2180 movs r1, #128 ; 0x80 - 800b642: 6878 ldr r0, [r7, #4] - 800b644: f000 fb24 bl 800bc90 - USBD_LL_StallEP(pdev, 0U); - 800b648: 2100 movs r1, #0 - 800b64a: 6878 ldr r0, [r7, #4] - 800b64c: f000 fb20 bl 800bc90 -} - 800b650: bf00 nop - 800b652: 3708 adds r7, #8 - 800b654: 46bd mov sp, r7 - 800b656: bd80 pop {r7, pc} - -0800b658 : -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, - uint8_t *pbuf, uint16_t len) -{ - 800b658: b580 push {r7, lr} - 800b65a: b084 sub sp, #16 - 800b65c: af00 add r7, sp, #0 - 800b65e: 60f8 str r0, [r7, #12] - 800b660: 60b9 str r1, [r7, #8] - 800b662: 4613 mov r3, r2 - 800b664: 80fb strh r3, [r7, #6] - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_DATA_IN; - 800b666: 68fb ldr r3, [r7, #12] - 800b668: 2202 movs r2, #2 - 800b66a: f8c3 2294 str.w r2, [r3, #660] ; 0x294 - pdev->ep_in[0].total_length = len; - 800b66e: 88fa ldrh r2, [r7, #6] - 800b670: 68fb ldr r3, [r7, #12] - 800b672: 61da str r2, [r3, #28] - pdev->ep_in[0].rem_length = len; - 800b674: 88fa ldrh r2, [r7, #6] - 800b676: 68fb ldr r3, [r7, #12] - 800b678: 621a str r2, [r3, #32] - - /* Start the transfer */ - USBD_LL_Transmit(pdev, 0x00U, pbuf, len); - 800b67a: 88fb ldrh r3, [r7, #6] - 800b67c: 68ba ldr r2, [r7, #8] - 800b67e: 2100 movs r1, #0 - 800b680: 68f8 ldr r0, [r7, #12] - 800b682: f000 fb88 bl 800bd96 - - return USBD_OK; - 800b686: 2300 movs r3, #0 -} - 800b688: 4618 mov r0, r3 - 800b68a: 3710 adds r7, #16 - 800b68c: 46bd mov sp, r7 - 800b68e: bd80 pop {r7, pc} - -0800b690 : -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, - uint8_t *pbuf, uint16_t len) -{ - 800b690: b580 push {r7, lr} - 800b692: b084 sub sp, #16 - 800b694: af00 add r7, sp, #0 - 800b696: 60f8 str r0, [r7, #12] - 800b698: 60b9 str r1, [r7, #8] - 800b69a: 4613 mov r3, r2 - 800b69c: 80fb strh r3, [r7, #6] - /* Start the next transfer */ - USBD_LL_Transmit(pdev, 0x00U, pbuf, len); - 800b69e: 88fb ldrh r3, [r7, #6] - 800b6a0: 68ba ldr r2, [r7, #8] - 800b6a2: 2100 movs r1, #0 - 800b6a4: 68f8 ldr r0, [r7, #12] - 800b6a6: f000 fb76 bl 800bd96 - - return USBD_OK; - 800b6aa: 2300 movs r3, #0 -} - 800b6ac: 4618 mov r0, r3 - 800b6ae: 3710 adds r7, #16 - 800b6b0: 46bd mov sp, r7 - 800b6b2: bd80 pop {r7, pc} - -0800b6b4 : -* @param len: length of data to be received -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, - uint8_t *pbuf, uint16_t len) -{ - 800b6b4: b580 push {r7, lr} - 800b6b6: b084 sub sp, #16 - 800b6b8: af00 add r7, sp, #0 - 800b6ba: 60f8 str r0, [r7, #12] - 800b6bc: 60b9 str r1, [r7, #8] - 800b6be: 4613 mov r3, r2 - 800b6c0: 80fb strh r3, [r7, #6] - USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); - 800b6c2: 88fb ldrh r3, [r7, #6] - 800b6c4: 68ba ldr r2, [r7, #8] - 800b6c6: 2100 movs r1, #0 - 800b6c8: 68f8 ldr r0, [r7, #12] - 800b6ca: f000 fb87 bl 800bddc - - return USBD_OK; - 800b6ce: 2300 movs r3, #0 -} - 800b6d0: 4618 mov r0, r3 - 800b6d2: 3710 adds r7, #16 - 800b6d4: 46bd mov sp, r7 - 800b6d6: bd80 pop {r7, pc} - -0800b6d8 : -* send zero lzngth packet on the ctl pipe -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev) -{ - 800b6d8: b580 push {r7, lr} - 800b6da: b082 sub sp, #8 - 800b6dc: af00 add r7, sp, #0 - 800b6de: 6078 str r0, [r7, #4] - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_IN; - 800b6e0: 687b ldr r3, [r7, #4] - 800b6e2: 2204 movs r2, #4 - 800b6e4: f8c3 2294 str.w r2, [r3, #660] ; 0x294 - - /* Start the transfer */ - USBD_LL_Transmit(pdev, 0x00U, NULL, 0U); - 800b6e8: 2300 movs r3, #0 - 800b6ea: 2200 movs r2, #0 - 800b6ec: 2100 movs r1, #0 - 800b6ee: 6878 ldr r0, [r7, #4] - 800b6f0: f000 fb51 bl 800bd96 - - return USBD_OK; - 800b6f4: 2300 movs r3, #0 -} - 800b6f6: 4618 mov r0, r3 - 800b6f8: 3708 adds r7, #8 - 800b6fa: 46bd mov sp, r7 - 800b6fc: bd80 pop {r7, pc} - -0800b6fe : -* receive zero lzngth packet on the ctl pipe -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev) -{ - 800b6fe: b580 push {r7, lr} - 800b700: b082 sub sp, #8 - 800b702: af00 add r7, sp, #0 - 800b704: 6078 str r0, [r7, #4] - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_OUT; - 800b706: 687b ldr r3, [r7, #4] - 800b708: 2205 movs r2, #5 - 800b70a: f8c3 2294 str.w r2, [r3, #660] ; 0x294 - - /* Start the transfer */ - USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); - 800b70e: 2300 movs r3, #0 - 800b710: 2200 movs r2, #0 - 800b712: 2100 movs r1, #0 - 800b714: 6878 ldr r0, [r7, #4] - 800b716: f000 fb61 bl 800bddc - - return USBD_OK; - 800b71a: 2300 movs r3, #0 -} - 800b71c: 4618 mov r0, r3 - 800b71e: 3708 adds r7, #8 - 800b720: 46bd mov sp, r7 - 800b722: bd80 pop {r7, pc} - -0800b724 : - listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); -} -/*-----------------------------------------------------------*/ - -void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) -{ - 800b724: b480 push {r7} - 800b726: b085 sub sp, #20 - 800b728: af00 add r7, sp, #0 - 800b72a: 6078 str r0, [r7, #4] - 800b72c: 6039 str r1, [r7, #0] -ListItem_t * const pxIndex = pxList->pxIndex; - 800b72e: 687b ldr r3, [r7, #4] - 800b730: 685b ldr r3, [r3, #4] - 800b732: 60fb str r3, [r7, #12] - listTEST_LIST_ITEM_INTEGRITY( pxNewListItem ); - - /* Insert a new list item into pxList, but rather than sort the list, - makes the new list item the last item to be removed by a call to - listGET_OWNER_OF_NEXT_ENTRY(). */ - pxNewListItem->pxNext = pxIndex; - 800b734: 683b ldr r3, [r7, #0] - 800b736: 68fa ldr r2, [r7, #12] - 800b738: 605a str r2, [r3, #4] - pxNewListItem->pxPrevious = pxIndex->pxPrevious; - 800b73a: 68fb ldr r3, [r7, #12] - 800b73c: 689a ldr r2, [r3, #8] - 800b73e: 683b ldr r3, [r7, #0] - 800b740: 609a str r2, [r3, #8] - - /* Only used during decision coverage testing. */ - mtCOVERAGE_TEST_DELAY(); - - pxIndex->pxPrevious->pxNext = pxNewListItem; - 800b742: 68fb ldr r3, [r7, #12] - 800b744: 689b ldr r3, [r3, #8] - 800b746: 683a ldr r2, [r7, #0] - 800b748: 605a str r2, [r3, #4] - pxIndex->pxPrevious = pxNewListItem; - 800b74a: 68fb ldr r3, [r7, #12] - 800b74c: 683a ldr r2, [r7, #0] - 800b74e: 609a str r2, [r3, #8] - - /* Remember which list the item is in. */ - pxNewListItem->pvContainer = ( void * ) pxList; - 800b750: 683b ldr r3, [r7, #0] - 800b752: 687a ldr r2, [r7, #4] - 800b754: 611a str r2, [r3, #16] - - ( pxList->uxNumberOfItems )++; - 800b756: 687b ldr r3, [r7, #4] - 800b758: 681b ldr r3, [r3, #0] - 800b75a: 1c5a adds r2, r3, #1 - 800b75c: 687b ldr r3, [r7, #4] - 800b75e: 601a str r2, [r3, #0] -} - 800b760: bf00 nop - 800b762: 3714 adds r7, #20 - 800b764: 46bd mov sp, r7 - 800b766: f85d 7b04 ldr.w r7, [sp], #4 - 800b76a: 4770 bx lr - -0800b76c : - ( pxList->uxNumberOfItems )++; -} -/*-----------------------------------------------------------*/ - -UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) -{ - 800b76c: b480 push {r7} - 800b76e: b085 sub sp, #20 - 800b770: af00 add r7, sp, #0 - 800b772: 6078 str r0, [r7, #4] -/* The list item knows which list it is in. Obtain the list from the list -item. */ -List_t * const pxList = ( List_t * ) pxItemToRemove->pvContainer; - 800b774: 687b ldr r3, [r7, #4] - 800b776: 691b ldr r3, [r3, #16] - 800b778: 60fb str r3, [r7, #12] - - pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; - 800b77a: 687b ldr r3, [r7, #4] - 800b77c: 685b ldr r3, [r3, #4] - 800b77e: 687a ldr r2, [r7, #4] - 800b780: 6892 ldr r2, [r2, #8] - 800b782: 609a str r2, [r3, #8] - pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; - 800b784: 687b ldr r3, [r7, #4] - 800b786: 689b ldr r3, [r3, #8] - 800b788: 687a ldr r2, [r7, #4] - 800b78a: 6852 ldr r2, [r2, #4] - 800b78c: 605a str r2, [r3, #4] - - /* Only used during decision coverage testing. */ - mtCOVERAGE_TEST_DELAY(); - - /* Make sure the index is left pointing to a valid item. */ - if( pxList->pxIndex == pxItemToRemove ) - 800b78e: 68fb ldr r3, [r7, #12] - 800b790: 685b ldr r3, [r3, #4] - 800b792: 687a ldr r2, [r7, #4] - 800b794: 429a cmp r2, r3 - 800b796: d103 bne.n 800b7a0 - { - pxList->pxIndex = pxItemToRemove->pxPrevious; - 800b798: 687b ldr r3, [r7, #4] - 800b79a: 689a ldr r2, [r3, #8] - 800b79c: 68fb ldr r3, [r7, #12] - 800b79e: 605a str r2, [r3, #4] - else - { - mtCOVERAGE_TEST_MARKER(); - } - - pxItemToRemove->pvContainer = NULL; - 800b7a0: 687b ldr r3, [r7, #4] - 800b7a2: 2200 movs r2, #0 - 800b7a4: 611a str r2, [r3, #16] - ( pxList->uxNumberOfItems )--; - 800b7a6: 68fb ldr r3, [r7, #12] - 800b7a8: 681b ldr r3, [r3, #0] - 800b7aa: 1e5a subs r2, r3, #1 - 800b7ac: 68fb ldr r3, [r7, #12] - 800b7ae: 601a str r2, [r3, #0] - - return pxList->uxNumberOfItems; - 800b7b0: 68fb ldr r3, [r7, #12] - 800b7b2: 681b ldr r3, [r3, #0] -} - 800b7b4: 4618 mov r0, r3 - 800b7b6: 3714 adds r7, #20 - 800b7b8: 46bd mov sp, r7 - 800b7ba: f85d 7b04 ldr.w r7, [sp], #4 - 800b7be: 4770 bx lr - -0800b7c0 : - -#endif /* INCLUDE_xTaskAbortDelay */ -/*----------------------------------------------------------*/ - -BaseType_t xTaskIncrementTick( void ) -{ - 800b7c0: b580 push {r7, lr} - 800b7c2: b086 sub sp, #24 - 800b7c4: af00 add r7, sp, #0 -TCB_t * pxTCB; -TickType_t xItemValue; -BaseType_t xSwitchRequired = pdFALSE; - 800b7c6: 2300 movs r3, #0 - 800b7c8: 617b str r3, [r7, #20] - - /* Called by the portable layer each time a tick interrupt occurs. - Increments the tick then checks to see if the new tick value will cause any - tasks to be unblocked. */ - traceTASK_INCREMENT_TICK( xTickCount ); - if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) - 800b7ca: 4b51 ldr r3, [pc, #324] ; (800b910 ) - 800b7cc: 681b ldr r3, [r3, #0] - 800b7ce: 2b00 cmp r3, #0 - 800b7d0: f040 808d bne.w 800b8ee - { - /* Minor optimisation. The tick count cannot change in this - block. */ - const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; - 800b7d4: 4b4f ldr r3, [pc, #316] ; (800b914 ) - 800b7d6: 681b ldr r3, [r3, #0] - 800b7d8: 3301 adds r3, #1 - 800b7da: 613b str r3, [r7, #16] - - /* Increment the RTOS tick, switching the delayed and overflowed - delayed lists if it wraps to 0. */ - xTickCount = xConstTickCount; - 800b7dc: 4a4d ldr r2, [pc, #308] ; (800b914 ) - 800b7de: 693b ldr r3, [r7, #16] - 800b7e0: 6013 str r3, [r2, #0] - - if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */ - 800b7e2: 693b ldr r3, [r7, #16] - 800b7e4: 2b00 cmp r3, #0 - 800b7e6: d11f bne.n 800b828 - { - taskSWITCH_DELAYED_LISTS(); - 800b7e8: 4b4b ldr r3, [pc, #300] ; (800b918 ) - 800b7ea: 681b ldr r3, [r3, #0] - 800b7ec: 681b ldr r3, [r3, #0] - 800b7ee: 2b00 cmp r3, #0 - 800b7f0: d009 beq.n 800b806 - -portFORCE_INLINE static void vPortRaiseBASEPRI( void ) -{ -uint32_t ulNewBASEPRI; - - __asm volatile - 800b7f2: f04f 0350 mov.w r3, #80 ; 0x50 - 800b7f6: f383 8811 msr BASEPRI, r3 - 800b7fa: f3bf 8f6f isb sy - 800b7fe: f3bf 8f4f dsb sy - 800b802: 603b str r3, [r7, #0] - 800b804: e7fe b.n 800b804 - 800b806: 4b44 ldr r3, [pc, #272] ; (800b918 ) - 800b808: 681b ldr r3, [r3, #0] - 800b80a: 60fb str r3, [r7, #12] - 800b80c: 4b43 ldr r3, [pc, #268] ; (800b91c ) - 800b80e: 681b ldr r3, [r3, #0] - 800b810: 4a41 ldr r2, [pc, #260] ; (800b918 ) - 800b812: 6013 str r3, [r2, #0] - 800b814: 4a41 ldr r2, [pc, #260] ; (800b91c ) - 800b816: 68fb ldr r3, [r7, #12] - 800b818: 6013 str r3, [r2, #0] - 800b81a: 4b41 ldr r3, [pc, #260] ; (800b920 ) - 800b81c: 681b ldr r3, [r3, #0] - 800b81e: 3301 adds r3, #1 - 800b820: 4a3f ldr r2, [pc, #252] ; (800b920 ) - 800b822: 6013 str r3, [r2, #0] - 800b824: f000 f8e6 bl 800b9f4 - - /* See if this tick has made a timeout expire. Tasks are stored in - the queue in the order of their wake time - meaning once one task - has been found whose block time has not expired there is no need to - look any further down the list. */ - if( xConstTickCount >= xNextTaskUnblockTime ) - 800b828: 4b3e ldr r3, [pc, #248] ; (800b924 ) - 800b82a: 681b ldr r3, [r3, #0] - 800b82c: 693a ldr r2, [r7, #16] - 800b82e: 429a cmp r2, r3 - 800b830: d34e bcc.n 800b8d0 - { - for( ;; ) - { - if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) - 800b832: 4b39 ldr r3, [pc, #228] ; (800b918 ) - 800b834: 681b ldr r3, [r3, #0] - 800b836: 681b ldr r3, [r3, #0] - 800b838: 2b00 cmp r3, #0 - 800b83a: d101 bne.n 800b840 - 800b83c: 2301 movs r3, #1 - 800b83e: e000 b.n 800b842 - 800b840: 2300 movs r3, #0 - 800b842: 2b00 cmp r3, #0 - 800b844: d004 beq.n 800b850 - /* The delayed list is empty. Set xNextTaskUnblockTime - to the maximum possible value so it is extremely - unlikely that the - if( xTickCount >= xNextTaskUnblockTime ) test will pass - next time through. */ - xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ - 800b846: 4b37 ldr r3, [pc, #220] ; (800b924 ) - 800b848: f04f 32ff mov.w r2, #4294967295 - 800b84c: 601a str r2, [r3, #0] - break; - 800b84e: e03f b.n 800b8d0 - { - /* The delayed list is not empty, get the value of the - item at the head of the delayed list. This is the time - at which the task at the head of the delayed list must - be removed from the Blocked state. */ - pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); - 800b850: 4b31 ldr r3, [pc, #196] ; (800b918 ) - 800b852: 681b ldr r3, [r3, #0] - 800b854: 68db ldr r3, [r3, #12] - 800b856: 68db ldr r3, [r3, #12] - 800b858: 60bb str r3, [r7, #8] - xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) ); - 800b85a: 68bb ldr r3, [r7, #8] - 800b85c: 685b ldr r3, [r3, #4] - 800b85e: 607b str r3, [r7, #4] - - if( xConstTickCount < xItemValue ) - 800b860: 693a ldr r2, [r7, #16] - 800b862: 687b ldr r3, [r7, #4] - 800b864: 429a cmp r2, r3 - 800b866: d203 bcs.n 800b870 - /* It is not time to unblock this item yet, but the - item value is the time at which the task at the head - of the blocked list must be removed from the Blocked - state - so record the item value in - xNextTaskUnblockTime. */ - xNextTaskUnblockTime = xItemValue; - 800b868: 4a2e ldr r2, [pc, #184] ; (800b924 ) - 800b86a: 687b ldr r3, [r7, #4] - 800b86c: 6013 str r3, [r2, #0] - break; - 800b86e: e02f b.n 800b8d0 - { - mtCOVERAGE_TEST_MARKER(); - } - - /* It is time to remove the item from the Blocked state. */ - ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); - 800b870: 68bb ldr r3, [r7, #8] - 800b872: 3304 adds r3, #4 - 800b874: 4618 mov r0, r3 - 800b876: f7ff ff79 bl 800b76c - - /* Is the task waiting on an event also? If so remove - it from the event list. */ - if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL ) - 800b87a: 68bb ldr r3, [r7, #8] - 800b87c: 6a9b ldr r3, [r3, #40] ; 0x28 - 800b87e: 2b00 cmp r3, #0 - 800b880: d004 beq.n 800b88c - { - ( void ) uxListRemove( &( pxTCB->xEventListItem ) ); - 800b882: 68bb ldr r3, [r7, #8] - 800b884: 3318 adds r3, #24 - 800b886: 4618 mov r0, r3 - 800b888: f7ff ff70 bl 800b76c - mtCOVERAGE_TEST_MARKER(); - } - - /* Place the unblocked task into the appropriate ready - list. */ - prvAddTaskToReadyList( pxTCB ); - 800b88c: 68bb ldr r3, [r7, #8] - 800b88e: 6ada ldr r2, [r3, #44] ; 0x2c - 800b890: 4b25 ldr r3, [pc, #148] ; (800b928 ) - 800b892: 681b ldr r3, [r3, #0] - 800b894: 429a cmp r2, r3 - 800b896: d903 bls.n 800b8a0 - 800b898: 68bb ldr r3, [r7, #8] - 800b89a: 6adb ldr r3, [r3, #44] ; 0x2c - 800b89c: 4a22 ldr r2, [pc, #136] ; (800b928 ) - 800b89e: 6013 str r3, [r2, #0] - 800b8a0: 68bb ldr r3, [r7, #8] - 800b8a2: 6ada ldr r2, [r3, #44] ; 0x2c - 800b8a4: 4613 mov r3, r2 - 800b8a6: 009b lsls r3, r3, #2 - 800b8a8: 4413 add r3, r2 - 800b8aa: 009b lsls r3, r3, #2 - 800b8ac: 4a1f ldr r2, [pc, #124] ; (800b92c ) - 800b8ae: 441a add r2, r3 - 800b8b0: 68bb ldr r3, [r7, #8] - 800b8b2: 3304 adds r3, #4 - 800b8b4: 4619 mov r1, r3 - 800b8b6: 4610 mov r0, r2 - 800b8b8: f7ff ff34 bl 800b724 - { - /* Preemption is on, but a context switch should - only be performed if the unblocked task has a - priority that is equal to or higher than the - currently executing task. */ - if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - 800b8bc: 68bb ldr r3, [r7, #8] - 800b8be: 6ada ldr r2, [r3, #44] ; 0x2c - 800b8c0: 4b1b ldr r3, [pc, #108] ; (800b930 ) - 800b8c2: 681b ldr r3, [r3, #0] - 800b8c4: 6adb ldr r3, [r3, #44] ; 0x2c - 800b8c6: 429a cmp r2, r3 - 800b8c8: d3b3 bcc.n 800b832 - { - xSwitchRequired = pdTRUE; - 800b8ca: 2301 movs r3, #1 - 800b8cc: 617b str r3, [r7, #20] - if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) - 800b8ce: e7b0 b.n 800b832 - /* Tasks of equal priority to the currently running task will share - processing time (time slice) if preemption is on, and the application - writer has not explicitly turned time slicing off. */ - #if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) - { - if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 ) - 800b8d0: 4b17 ldr r3, [pc, #92] ; (800b930 ) - 800b8d2: 681b ldr r3, [r3, #0] - 800b8d4: 6ada ldr r2, [r3, #44] ; 0x2c - 800b8d6: 4915 ldr r1, [pc, #84] ; (800b92c ) - 800b8d8: 4613 mov r3, r2 - 800b8da: 009b lsls r3, r3, #2 - 800b8dc: 4413 add r3, r2 - 800b8de: 009b lsls r3, r3, #2 - 800b8e0: 440b add r3, r1 - 800b8e2: 681b ldr r3, [r3, #0] - 800b8e4: 2b01 cmp r3, #1 - 800b8e6: d907 bls.n 800b8f8 - { - xSwitchRequired = pdTRUE; - 800b8e8: 2301 movs r3, #1 - 800b8ea: 617b str r3, [r7, #20] - 800b8ec: e004 b.n 800b8f8 - } - #endif /* configUSE_TICK_HOOK */ - } - else - { - ++uxPendedTicks; - 800b8ee: 4b11 ldr r3, [pc, #68] ; (800b934 ) - 800b8f0: 681b ldr r3, [r3, #0] - 800b8f2: 3301 adds r3, #1 - 800b8f4: 4a0f ldr r2, [pc, #60] ; (800b934 ) - 800b8f6: 6013 str r3, [r2, #0] - #endif - } - - #if ( configUSE_PREEMPTION == 1 ) - { - if( xYieldPending != pdFALSE ) - 800b8f8: 4b0f ldr r3, [pc, #60] ; (800b938 ) - 800b8fa: 681b ldr r3, [r3, #0] - 800b8fc: 2b00 cmp r3, #0 - 800b8fe: d001 beq.n 800b904 - { - xSwitchRequired = pdTRUE; - 800b900: 2301 movs r3, #1 - 800b902: 617b str r3, [r7, #20] - mtCOVERAGE_TEST_MARKER(); - } - } - #endif /* configUSE_PREEMPTION */ - - return xSwitchRequired; - 800b904: 697b ldr r3, [r7, #20] -} - 800b906: 4618 mov r0, r3 - 800b908: 3718 adds r7, #24 - 800b90a: 46bd mov sp, r7 - 800b90c: bd80 pop {r7, pc} - 800b90e: bf00 nop - 800b910: 200004e8 .word 0x200004e8 - 800b914: 200004d0 .word 0x200004d0 - 800b918: 200004c8 .word 0x200004c8 - 800b91c: 200004cc .word 0x200004cc - 800b920: 200004e0 .word 0x200004e0 - 800b924: 200004e4 .word 0x200004e4 - 800b928: 200004d4 .word 0x200004d4 - 800b92c: 20000068 .word 0x20000068 - 800b930: 20000064 .word 0x20000064 - 800b934: 200004d8 .word 0x200004d8 - 800b938: 200004dc .word 0x200004dc - -0800b93c : - -#endif /* configUSE_APPLICATION_TASK_TAG */ -/*-----------------------------------------------------------*/ - -void vTaskSwitchContext( void ) -{ - 800b93c: b480 push {r7} - 800b93e: b085 sub sp, #20 - 800b940: af00 add r7, sp, #0 - if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE ) - 800b942: 4b27 ldr r3, [pc, #156] ; (800b9e0 ) - 800b944: 681b ldr r3, [r3, #0] - 800b946: 2b00 cmp r3, #0 - 800b948: d003 beq.n 800b952 - { - /* The scheduler is currently suspended - do not allow a context - switch. */ - xYieldPending = pdTRUE; - 800b94a: 4b26 ldr r3, [pc, #152] ; (800b9e4 ) - 800b94c: 2201 movs r2, #1 - 800b94e: 601a str r2, [r3, #0] - structure specific to this task. */ - _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); - } - #endif /* configUSE_NEWLIB_REENTRANT */ - } -} - 800b950: e040 b.n 800b9d4 - xYieldPending = pdFALSE; - 800b952: 4b24 ldr r3, [pc, #144] ; (800b9e4 ) - 800b954: 2200 movs r2, #0 - 800b956: 601a str r2, [r3, #0] - taskSELECT_HIGHEST_PRIORITY_TASK(); - 800b958: 4b23 ldr r3, [pc, #140] ; (800b9e8 ) - 800b95a: 681b ldr r3, [r3, #0] - 800b95c: 60fb str r3, [r7, #12] - 800b95e: e00f b.n 800b980 - 800b960: 68fb ldr r3, [r7, #12] - 800b962: 2b00 cmp r3, #0 - 800b964: d109 bne.n 800b97a - 800b966: f04f 0350 mov.w r3, #80 ; 0x50 - 800b96a: f383 8811 msr BASEPRI, r3 - 800b96e: f3bf 8f6f isb sy - 800b972: f3bf 8f4f dsb sy - 800b976: 607b str r3, [r7, #4] - 800b978: e7fe b.n 800b978 - 800b97a: 68fb ldr r3, [r7, #12] - 800b97c: 3b01 subs r3, #1 - 800b97e: 60fb str r3, [r7, #12] - 800b980: 491a ldr r1, [pc, #104] ; (800b9ec ) - 800b982: 68fa ldr r2, [r7, #12] - 800b984: 4613 mov r3, r2 - 800b986: 009b lsls r3, r3, #2 - 800b988: 4413 add r3, r2 - 800b98a: 009b lsls r3, r3, #2 - 800b98c: 440b add r3, r1 - 800b98e: 681b ldr r3, [r3, #0] - 800b990: 2b00 cmp r3, #0 - 800b992: d0e5 beq.n 800b960 - 800b994: 68fa ldr r2, [r7, #12] - 800b996: 4613 mov r3, r2 - 800b998: 009b lsls r3, r3, #2 - 800b99a: 4413 add r3, r2 - 800b99c: 009b lsls r3, r3, #2 - 800b99e: 4a13 ldr r2, [pc, #76] ; (800b9ec ) - 800b9a0: 4413 add r3, r2 - 800b9a2: 60bb str r3, [r7, #8] - 800b9a4: 68bb ldr r3, [r7, #8] - 800b9a6: 685b ldr r3, [r3, #4] - 800b9a8: 685a ldr r2, [r3, #4] - 800b9aa: 68bb ldr r3, [r7, #8] - 800b9ac: 605a str r2, [r3, #4] - 800b9ae: 68bb ldr r3, [r7, #8] - 800b9b0: 685a ldr r2, [r3, #4] - 800b9b2: 68bb ldr r3, [r7, #8] - 800b9b4: 3308 adds r3, #8 - 800b9b6: 429a cmp r2, r3 - 800b9b8: d104 bne.n 800b9c4 - 800b9ba: 68bb ldr r3, [r7, #8] - 800b9bc: 685b ldr r3, [r3, #4] - 800b9be: 685a ldr r2, [r3, #4] - 800b9c0: 68bb ldr r3, [r7, #8] - 800b9c2: 605a str r2, [r3, #4] - 800b9c4: 68bb ldr r3, [r7, #8] - 800b9c6: 685b ldr r3, [r3, #4] - 800b9c8: 68db ldr r3, [r3, #12] - 800b9ca: 4a09 ldr r2, [pc, #36] ; (800b9f0 ) - 800b9cc: 6013 str r3, [r2, #0] - 800b9ce: 4a06 ldr r2, [pc, #24] ; (800b9e8 ) - 800b9d0: 68fb ldr r3, [r7, #12] - 800b9d2: 6013 str r3, [r2, #0] -} - 800b9d4: bf00 nop - 800b9d6: 3714 adds r7, #20 - 800b9d8: 46bd mov sp, r7 - 800b9da: f85d 7b04 ldr.w r7, [sp], #4 - 800b9de: 4770 bx lr - 800b9e0: 200004e8 .word 0x200004e8 - 800b9e4: 200004dc .word 0x200004dc - 800b9e8: 200004d4 .word 0x200004d4 - 800b9ec: 20000068 .word 0x20000068 - 800b9f0: 20000064 .word 0x20000064 - -0800b9f4 : - -#endif /* INCLUDE_vTaskDelete */ -/*-----------------------------------------------------------*/ - -static void prvResetNextTaskUnblockTime( void ) -{ - 800b9f4: b480 push {r7} - 800b9f6: b083 sub sp, #12 - 800b9f8: af00 add r7, sp, #0 -TCB_t *pxTCB; - - if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) - 800b9fa: 4b0f ldr r3, [pc, #60] ; (800ba38 ) - 800b9fc: 681b ldr r3, [r3, #0] - 800b9fe: 681b ldr r3, [r3, #0] - 800ba00: 2b00 cmp r3, #0 - 800ba02: d101 bne.n 800ba08 - 800ba04: 2301 movs r3, #1 - 800ba06: e000 b.n 800ba0a - 800ba08: 2300 movs r3, #0 - 800ba0a: 2b00 cmp r3, #0 - 800ba0c: d004 beq.n 800ba18 - { - /* The new current delayed list is empty. Set xNextTaskUnblockTime to - the maximum possible value so it is extremely unlikely that the - if( xTickCount >= xNextTaskUnblockTime ) test will pass until - there is an item in the delayed list. */ - xNextTaskUnblockTime = portMAX_DELAY; - 800ba0e: 4b0b ldr r3, [pc, #44] ; (800ba3c ) - 800ba10: f04f 32ff mov.w r2, #4294967295 - 800ba14: 601a str r2, [r3, #0] - which the task at the head of the delayed list should be removed - from the Blocked state. */ - ( pxTCB ) = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); - xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) ); - } -} - 800ba16: e008 b.n 800ba2a - ( pxTCB ) = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); - 800ba18: 4b07 ldr r3, [pc, #28] ; (800ba38 ) - 800ba1a: 681b ldr r3, [r3, #0] - 800ba1c: 68db ldr r3, [r3, #12] - 800ba1e: 68db ldr r3, [r3, #12] - 800ba20: 607b str r3, [r7, #4] - xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) ); - 800ba22: 687b ldr r3, [r7, #4] - 800ba24: 685b ldr r3, [r3, #4] - 800ba26: 4a05 ldr r2, [pc, #20] ; (800ba3c ) - 800ba28: 6013 str r3, [r2, #0] -} - 800ba2a: bf00 nop - 800ba2c: 370c adds r7, #12 - 800ba2e: 46bd mov sp, r7 - 800ba30: f85d 7b04 ldr.w r7, [sp], #4 - 800ba34: 4770 bx lr - 800ba36: bf00 nop - 800ba38: 200004c8 .word 0x200004c8 - 800ba3c: 200004e4 .word 0x200004e4 - -0800ba40 : -} -/*-----------------------------------------------------------*/ - -void vPortSVCHandler( void ) -{ - __asm volatile ( - 800ba40: 4b07 ldr r3, [pc, #28] ; (800ba60 ) - 800ba42: 6819 ldr r1, [r3, #0] - 800ba44: 6808 ldr r0, [r1, #0] - 800ba46: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 800ba4a: f380 8809 msr PSP, r0 - 800ba4e: f3bf 8f6f isb sy - 800ba52: f04f 0000 mov.w r0, #0 - 800ba56: f380 8811 msr BASEPRI, r0 - 800ba5a: 4770 bx lr - 800ba5c: f3af 8000 nop.w - -0800ba60 : - 800ba60: 20000064 .word 0x20000064 - " bx r14 \n" - " \n" - " .align 4 \n" - "pxCurrentTCBConst2: .word pxCurrentTCB \n" - ); -} - 800ba64: bf00 nop - 800ba66: bf00 nop - ... - -0800ba70 : - -void xPortPendSVHandler( void ) -{ - /* This is a naked function. */ - - __asm volatile - 800ba70: f3ef 8009 mrs r0, PSP - 800ba74: f3bf 8f6f isb sy - 800ba78: 4b15 ldr r3, [pc, #84] ; (800bad0 ) - 800ba7a: 681a ldr r2, [r3, #0] - 800ba7c: f01e 0f10 tst.w lr, #16 - 800ba80: bf08 it eq - 800ba82: ed20 8a10 vstmdbeq r0!, {s16-s31} - 800ba86: e920 4ff0 stmdb r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 800ba8a: 6010 str r0, [r2, #0] - 800ba8c: e92d 0009 stmdb sp!, {r0, r3} - 800ba90: f04f 0050 mov.w r0, #80 ; 0x50 - 800ba94: f380 8811 msr BASEPRI, r0 - 800ba98: f3bf 8f4f dsb sy - 800ba9c: f3bf 8f6f isb sy - 800baa0: f7ff ff4c bl 800b93c - 800baa4: f04f 0000 mov.w r0, #0 - 800baa8: f380 8811 msr BASEPRI, r0 - 800baac: bc09 pop {r0, r3} - 800baae: 6819 ldr r1, [r3, #0] - 800bab0: 6808 ldr r0, [r1, #0] - 800bab2: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 800bab6: f01e 0f10 tst.w lr, #16 - 800baba: bf08 it eq - 800babc: ecb0 8a10 vldmiaeq r0!, {s16-s31} - 800bac0: f380 8809 msr PSP, r0 - 800bac4: f3bf 8f6f isb sy - 800bac8: 4770 bx lr - 800baca: bf00 nop - 800bacc: f3af 8000 nop.w - -0800bad0 : - 800bad0: 20000064 .word 0x20000064 - " \n" - " .align 4 \n" - "pxCurrentTCBConst: .word pxCurrentTCB \n" - ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) - ); -} - 800bad4: bf00 nop - 800bad6: bf00 nop - -0800bad8 : -/*-----------------------------------------------------------*/ - -void xPortSysTickHandler( void ) -{ - 800bad8: b580 push {r7, lr} - 800bada: b082 sub sp, #8 - 800badc: af00 add r7, sp, #0 - 800bade: f04f 0350 mov.w r3, #80 ; 0x50 - 800bae2: f383 8811 msr BASEPRI, r3 - 800bae6: f3bf 8f6f isb sy - 800baea: f3bf 8f4f dsb sy - 800baee: 607b str r3, [r7, #4] - save and then restore the interrupt mask value as its value is already - known. */ - portDISABLE_INTERRUPTS(); - { - /* Increment the RTOS tick. */ - if( xTaskIncrementTick() != pdFALSE ) - 800baf0: f7ff fe66 bl 800b7c0 - 800baf4: 4603 mov r3, r0 - 800baf6: 2b00 cmp r3, #0 - 800baf8: d003 beq.n 800bb02 - { - /* A context switch is required. Context switching is performed in - the PendSV interrupt. Pend the PendSV interrupt. */ - portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; - 800bafa: 4b06 ldr r3, [pc, #24] ; (800bb14 ) - 800bafc: f04f 5280 mov.w r2, #268435456 ; 0x10000000 - 800bb00: 601a str r2, [r3, #0] - 800bb02: 2300 movs r3, #0 - 800bb04: 603b str r3, [r7, #0] -} -/*-----------------------------------------------------------*/ - -portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue ) -{ - __asm volatile - 800bb06: 683b ldr r3, [r7, #0] - 800bb08: f383 8811 msr BASEPRI, r3 - } - } - portENABLE_INTERRUPTS(); -} - 800bb0c: bf00 nop - 800bb0e: 3708 adds r7, #8 - 800bb10: 46bd mov sp, r7 - 800bb12: bd80 pop {r7, pc} - 800bb14: e000ed04 .word 0xe000ed04 - -0800bb18 : -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) -#else -void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -{ - 800bb18: b580 push {r7, lr} - 800bb1a: b082 sub sp, #8 - 800bb1c: af00 add r7, sp, #0 - 800bb1e: 6078 str r0, [r7, #4] - USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); - 800bb20: 687b ldr r3, [r7, #4] - 800bb22: f8d3 2268 ldr.w r2, [r3, #616] ; 0x268 - 800bb26: 687b ldr r3, [r7, #4] - 800bb28: f503 730c add.w r3, r3, #560 ; 0x230 - 800bb2c: 4619 mov r1, r3 - 800bb2e: 4610 mov r0, r2 - 800bb30: f7fe fe6a bl 800a808 -} - 800bb34: bf00 nop - 800bb36: 3708 adds r7, #8 - 800bb38: 46bd mov sp, r7 - 800bb3a: bd80 pop {r7, pc} - -0800bb3c : -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -#else -void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -{ - 800bb3c: b580 push {r7, lr} - 800bb3e: b082 sub sp, #8 - 800bb40: af00 add r7, sp, #0 - 800bb42: 6078 str r0, [r7, #4] - 800bb44: 460b mov r3, r1 - 800bb46: 70fb strb r3, [r7, #3] - USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); - 800bb48: 687b ldr r3, [r7, #4] - 800bb4a: f8d3 0268 ldr.w r0, [r3, #616] ; 0x268 - 800bb4e: 78fb ldrb r3, [r7, #3] - 800bb50: 687a ldr r2, [r7, #4] - 800bb52: 015b lsls r3, r3, #5 - 800bb54: 4413 add r3, r2 - 800bb56: f503 739e add.w r3, r3, #316 ; 0x13c - 800bb5a: 681a ldr r2, [r3, #0] - 800bb5c: 78fb ldrb r3, [r7, #3] - 800bb5e: 4619 mov r1, r3 - 800bb60: f7fe fe9d bl 800a89e -} - 800bb64: bf00 nop - 800bb66: 3708 adds r7, #8 - 800bb68: 46bd mov sp, r7 - 800bb6a: bd80 pop {r7, pc} - -0800bb6c : -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -#else -void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -{ - 800bb6c: b580 push {r7, lr} - 800bb6e: b082 sub sp, #8 - 800bb70: af00 add r7, sp, #0 - 800bb72: 6078 str r0, [r7, #4] - 800bb74: 460b mov r3, r1 - 800bb76: 70fb strb r3, [r7, #3] - USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); - 800bb78: 687b ldr r3, [r7, #4] - 800bb7a: f8d3 0268 ldr.w r0, [r3, #616] ; 0x268 - 800bb7e: 78fb ldrb r3, [r7, #3] - 800bb80: 687a ldr r2, [r7, #4] - 800bb82: 015b lsls r3, r3, #5 - 800bb84: 4413 add r3, r2 - 800bb86: 333c adds r3, #60 ; 0x3c - 800bb88: 681a ldr r2, [r3, #0] - 800bb8a: 78fb ldrb r3, [r7, #3] - 800bb8c: 4619 mov r1, r3 - 800bb8e: f7fe fef7 bl 800a980 -} - 800bb92: bf00 nop - 800bb94: 3708 adds r7, #8 - 800bb96: 46bd mov sp, r7 - 800bb98: bd80 pop {r7, pc} - -0800bb9a : -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -#else -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -{ - 800bb9a: b580 push {r7, lr} - 800bb9c: b082 sub sp, #8 - 800bb9e: af00 add r7, sp, #0 - 800bba0: 6078 str r0, [r7, #4] - USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); - 800bba2: 687b ldr r3, [r7, #4] - 800bba4: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268 - 800bba8: 4618 mov r0, r3 - 800bbaa: f7ff f80a bl 800abc2 -} - 800bbae: bf00 nop - 800bbb0: 3708 adds r7, #8 - 800bbb2: 46bd mov sp, r7 - 800bbb4: bd80 pop {r7, pc} - -0800bbb6 : -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd) -#else -void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -{ - 800bbb6: b580 push {r7, lr} - 800bbb8: b084 sub sp, #16 - 800bbba: af00 add r7, sp, #0 - 800bbbc: 6078 str r0, [r7, #4] - USBD_SpeedTypeDef speed = USBD_SPEED_FULL; - 800bbbe: 2301 movs r3, #1 - 800bbc0: 73fb strb r3, [r7, #15] - - if ( hpcd->Init.speed != PCD_SPEED_FULL) - 800bbc2: 687b ldr r3, [r7, #4] - 800bbc4: 689b ldr r3, [r3, #8] - 800bbc6: 2b02 cmp r3, #2 - 800bbc8: d001 beq.n 800bbce - { - Error_Handler(); - 800bbca: f7f6 fb83 bl 80022d4 - } - /* Set Speed. */ - USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); - 800bbce: 687b ldr r3, [r7, #4] - 800bbd0: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268 - 800bbd4: 7bfa ldrb r2, [r7, #15] - 800bbd6: 4611 mov r1, r2 - 800bbd8: 4618 mov r0, r3 - 800bbda: f7fe ffb7 bl 800ab4c - - /* Reset Device. */ - USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); - 800bbde: 687b ldr r3, [r7, #4] - 800bbe0: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268 - 800bbe4: 4618 mov r0, r3 - 800bbe6: f7fe ff70 bl 800aaca -} - 800bbea: bf00 nop - 800bbec: 3710 adds r7, #16 - 800bbee: 46bd mov sp, r7 - 800bbf0: bd80 pop {r7, pc} - ... - -0800bbf4 : -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) -#else -void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -{ - 800bbf4: b580 push {r7, lr} - 800bbf6: b082 sub sp, #8 - 800bbf8: af00 add r7, sp, #0 - 800bbfa: 6078 str r0, [r7, #4] - /* Inform USB library that core enters in suspend Mode. */ - USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); - 800bbfc: 687b ldr r3, [r7, #4] - 800bbfe: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268 - 800bc02: 4618 mov r0, r3 - 800bc04: f7fe ffb2 bl 800ab6c - /* Enter in STOP mode. */ - /* USER CODE BEGIN 2 */ - if (hpcd->Init.low_power_enable) - 800bc08: 687b ldr r3, [r7, #4] - 800bc0a: 699b ldr r3, [r3, #24] - 800bc0c: 2b00 cmp r3, #0 - 800bc0e: d005 beq.n 800bc1c - { - /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ - SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - 800bc10: 4b04 ldr r3, [pc, #16] ; (800bc24 ) - 800bc12: 691b ldr r3, [r3, #16] - 800bc14: 4a03 ldr r2, [pc, #12] ; (800bc24 ) - 800bc16: f043 0306 orr.w r3, r3, #6 - 800bc1a: 6113 str r3, [r2, #16] - } - /* USER CODE END 2 */ -} - 800bc1c: bf00 nop - 800bc1e: 3708 adds r7, #8 - 800bc20: 46bd mov sp, r7 - 800bc22: bd80 pop {r7, pc} - 800bc24: e000ed00 .word 0xe000ed00 - -0800bc28 : -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) -#else -void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -{ - 800bc28: b580 push {r7, lr} - 800bc2a: b082 sub sp, #8 - 800bc2c: af00 add r7, sp, #0 - 800bc2e: 6078 str r0, [r7, #4] - /* USER CODE BEGIN 3 */ - - /* USER CODE END 3 */ - USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); - 800bc30: 687b ldr r3, [r7, #4] - 800bc32: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268 - 800bc36: 4618 mov r0, r3 - 800bc38: f7fe ffad bl 800ab96 -} - 800bc3c: bf00 nop - 800bc3e: 3708 adds r7, #8 - 800bc40: 46bd mov sp, r7 - 800bc42: bd80 pop {r7, pc} - -0800bc44 : - * @param ep_type: Endpoint type - * @param ep_mps: Endpoint max packet size - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) -{ - 800bc44: b580 push {r7, lr} - 800bc46: b084 sub sp, #16 - 800bc48: af00 add r7, sp, #0 - 800bc4a: 6078 str r0, [r7, #4] - 800bc4c: 4608 mov r0, r1 - 800bc4e: 4611 mov r1, r2 - 800bc50: 461a mov r2, r3 - 800bc52: 4603 mov r3, r0 - 800bc54: 70fb strb r3, [r7, #3] - 800bc56: 460b mov r3, r1 - 800bc58: 70bb strb r3, [r7, #2] - 800bc5a: 4613 mov r3, r2 - 800bc5c: 803b strh r3, [r7, #0] - HAL_StatusTypeDef hal_status = HAL_OK; - 800bc5e: 2300 movs r3, #0 - 800bc60: 73fb strb r3, [r7, #15] - USBD_StatusTypeDef usb_status = USBD_OK; - 800bc62: 2300 movs r3, #0 - 800bc64: 73bb strb r3, [r7, #14] - - hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); - 800bc66: 687b ldr r3, [r7, #4] - 800bc68: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0 - 800bc6c: 78bb ldrb r3, [r7, #2] - 800bc6e: 883a ldrh r2, [r7, #0] - 800bc70: 78f9 ldrb r1, [r7, #3] - 800bc72: f7f9 fe61 bl 8005938 - 800bc76: 4603 mov r3, r0 - 800bc78: 73fb strb r3, [r7, #15] - - usb_status = USBD_Get_USB_Status(hal_status); - 800bc7a: 7bfb ldrb r3, [r7, #15] - 800bc7c: 4618 mov r0, r3 - 800bc7e: f000 f8d1 bl 800be24 - 800bc82: 4603 mov r3, r0 - 800bc84: 73bb strb r3, [r7, #14] - - return usb_status; - 800bc86: 7bbb ldrb r3, [r7, #14] -} - 800bc88: 4618 mov r0, r3 - 800bc8a: 3710 adds r7, #16 - 800bc8c: 46bd mov sp, r7 - 800bc8e: bd80 pop {r7, pc} - -0800bc90 : - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - 800bc90: b580 push {r7, lr} - 800bc92: b084 sub sp, #16 - 800bc94: af00 add r7, sp, #0 - 800bc96: 6078 str r0, [r7, #4] - 800bc98: 460b mov r3, r1 - 800bc9a: 70fb strb r3, [r7, #3] - HAL_StatusTypeDef hal_status = HAL_OK; - 800bc9c: 2300 movs r3, #0 - 800bc9e: 73fb strb r3, [r7, #15] - USBD_StatusTypeDef usb_status = USBD_OK; - 800bca0: 2300 movs r3, #0 - 800bca2: 73bb strb r3, [r7, #14] - - hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); - 800bca4: 687b ldr r3, [r7, #4] - 800bca6: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0 - 800bcaa: 78fa ldrb r2, [r7, #3] - 800bcac: 4611 mov r1, r2 - 800bcae: 4618 mov r0, r3 - 800bcb0: f7f9 ff15 bl 8005ade - 800bcb4: 4603 mov r3, r0 - 800bcb6: 73fb strb r3, [r7, #15] - - usb_status = USBD_Get_USB_Status(hal_status); - 800bcb8: 7bfb ldrb r3, [r7, #15] - 800bcba: 4618 mov r0, r3 - 800bcbc: f000 f8b2 bl 800be24 - 800bcc0: 4603 mov r3, r0 - 800bcc2: 73bb strb r3, [r7, #14] - - return usb_status; - 800bcc4: 7bbb ldrb r3, [r7, #14] -} - 800bcc6: 4618 mov r0, r3 - 800bcc8: 3710 adds r7, #16 - 800bcca: 46bd mov sp, r7 - 800bccc: bd80 pop {r7, pc} - -0800bcce : - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - 800bcce: b580 push {r7, lr} - 800bcd0: b084 sub sp, #16 - 800bcd2: af00 add r7, sp, #0 - 800bcd4: 6078 str r0, [r7, #4] - 800bcd6: 460b mov r3, r1 - 800bcd8: 70fb strb r3, [r7, #3] - HAL_StatusTypeDef hal_status = HAL_OK; - 800bcda: 2300 movs r3, #0 - 800bcdc: 73fb strb r3, [r7, #15] - USBD_StatusTypeDef usb_status = USBD_OK; - 800bcde: 2300 movs r3, #0 - 800bce0: 73bb strb r3, [r7, #14] - - hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); - 800bce2: 687b ldr r3, [r7, #4] - 800bce4: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0 - 800bce8: 78fa ldrb r2, [r7, #3] - 800bcea: 4611 mov r1, r2 - 800bcec: 4618 mov r0, r3 - 800bcee: f7f9 ff50 bl 8005b92 - 800bcf2: 4603 mov r3, r0 - 800bcf4: 73fb strb r3, [r7, #15] - - usb_status = USBD_Get_USB_Status(hal_status); - 800bcf6: 7bfb ldrb r3, [r7, #15] - 800bcf8: 4618 mov r0, r3 - 800bcfa: f000 f893 bl 800be24 - 800bcfe: 4603 mov r3, r0 - 800bd00: 73bb strb r3, [r7, #14] - - return usb_status; - 800bd02: 7bbb ldrb r3, [r7, #14] -} - 800bd04: 4618 mov r0, r3 - 800bd06: 3710 adds r7, #16 - 800bd08: 46bd mov sp, r7 - 800bd0a: bd80 pop {r7, pc} - -0800bd0c : - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval Stall (1: Yes, 0: No) - */ -uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - 800bd0c: b480 push {r7} - 800bd0e: b085 sub sp, #20 - 800bd10: af00 add r7, sp, #0 - 800bd12: 6078 str r0, [r7, #4] - 800bd14: 460b mov r3, r1 - 800bd16: 70fb strb r3, [r7, #3] - PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; - 800bd18: 687b ldr r3, [r7, #4] - 800bd1a: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0 - 800bd1e: 60fb str r3, [r7, #12] - - if((ep_addr & 0x80) == 0x80) - 800bd20: f997 3003 ldrsb.w r3, [r7, #3] - 800bd24: 2b00 cmp r3, #0 - 800bd26: da08 bge.n 800bd3a - { - return hpcd->IN_ep[ep_addr & 0x7F].is_stall; - 800bd28: 78fb ldrb r3, [r7, #3] - 800bd2a: f003 037f and.w r3, r3, #127 ; 0x7f - 800bd2e: 68fa ldr r2, [r7, #12] - 800bd30: 015b lsls r3, r3, #5 - 800bd32: 4413 add r3, r2 - 800bd34: 332a adds r3, #42 ; 0x2a - 800bd36: 781b ldrb r3, [r3, #0] - 800bd38: e008 b.n 800bd4c - } - else - { - return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; - 800bd3a: 78fb ldrb r3, [r7, #3] - 800bd3c: f003 037f and.w r3, r3, #127 ; 0x7f - 800bd40: 68fa ldr r2, [r7, #12] - 800bd42: 015b lsls r3, r3, #5 - 800bd44: 4413 add r3, r2 - 800bd46: f503 7395 add.w r3, r3, #298 ; 0x12a - 800bd4a: 781b ldrb r3, [r3, #0] - } -} - 800bd4c: 4618 mov r0, r3 - 800bd4e: 3714 adds r7, #20 - 800bd50: 46bd mov sp, r7 - 800bd52: f85d 7b04 ldr.w r7, [sp], #4 - 800bd56: 4770 bx lr - -0800bd58 : - * @param pdev: Device handle - * @param dev_addr: Device address - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) -{ - 800bd58: b580 push {r7, lr} - 800bd5a: b084 sub sp, #16 - 800bd5c: af00 add r7, sp, #0 - 800bd5e: 6078 str r0, [r7, #4] - 800bd60: 460b mov r3, r1 - 800bd62: 70fb strb r3, [r7, #3] - HAL_StatusTypeDef hal_status = HAL_OK; - 800bd64: 2300 movs r3, #0 - 800bd66: 73fb strb r3, [r7, #15] - USBD_StatusTypeDef usb_status = USBD_OK; - 800bd68: 2300 movs r3, #0 - 800bd6a: 73bb strb r3, [r7, #14] - - hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); - 800bd6c: 687b ldr r3, [r7, #4] - 800bd6e: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0 - 800bd72: 78fa ldrb r2, [r7, #3] - 800bd74: 4611 mov r1, r2 - 800bd76: 4618 mov r0, r3 - 800bd78: f7f9 fdb9 bl 80058ee - 800bd7c: 4603 mov r3, r0 - 800bd7e: 73fb strb r3, [r7, #15] - - usb_status = USBD_Get_USB_Status(hal_status); - 800bd80: 7bfb ldrb r3, [r7, #15] - 800bd82: 4618 mov r0, r3 - 800bd84: f000 f84e bl 800be24 - 800bd88: 4603 mov r3, r0 - 800bd8a: 73bb strb r3, [r7, #14] - - return usb_status; - 800bd8c: 7bbb ldrb r3, [r7, #14] -} - 800bd8e: 4618 mov r0, r3 - 800bd90: 3710 adds r7, #16 - 800bd92: 46bd mov sp, r7 - 800bd94: bd80 pop {r7, pc} - -0800bd96 : - * @param pbuf: Pointer to data to be sent - * @param size: Data size - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) -{ - 800bd96: b580 push {r7, lr} - 800bd98: b086 sub sp, #24 - 800bd9a: af00 add r7, sp, #0 - 800bd9c: 60f8 str r0, [r7, #12] - 800bd9e: 607a str r2, [r7, #4] - 800bda0: 461a mov r2, r3 - 800bda2: 460b mov r3, r1 - 800bda4: 72fb strb r3, [r7, #11] - 800bda6: 4613 mov r3, r2 - 800bda8: 813b strh r3, [r7, #8] - HAL_StatusTypeDef hal_status = HAL_OK; - 800bdaa: 2300 movs r3, #0 - 800bdac: 75fb strb r3, [r7, #23] - USBD_StatusTypeDef usb_status = USBD_OK; - 800bdae: 2300 movs r3, #0 - 800bdb0: 75bb strb r3, [r7, #22] - - hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); - 800bdb2: 68fb ldr r3, [r7, #12] - 800bdb4: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0 - 800bdb8: 893b ldrh r3, [r7, #8] - 800bdba: 7af9 ldrb r1, [r7, #11] - 800bdbc: 687a ldr r2, [r7, #4] - 800bdbe: f7f9 fe55 bl 8005a6c - 800bdc2: 4603 mov r3, r0 - 800bdc4: 75fb strb r3, [r7, #23] - - usb_status = USBD_Get_USB_Status(hal_status); - 800bdc6: 7dfb ldrb r3, [r7, #23] - 800bdc8: 4618 mov r0, r3 - 800bdca: f000 f82b bl 800be24 - 800bdce: 4603 mov r3, r0 - 800bdd0: 75bb strb r3, [r7, #22] - - return usb_status; - 800bdd2: 7dbb ldrb r3, [r7, #22] -} - 800bdd4: 4618 mov r0, r3 - 800bdd6: 3718 adds r7, #24 - 800bdd8: 46bd mov sp, r7 - 800bdda: bd80 pop {r7, pc} - -0800bddc : - * @param pbuf: Pointer to data to be received - * @param size: Data size - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) -{ - 800bddc: b580 push {r7, lr} - 800bdde: b086 sub sp, #24 - 800bde0: af00 add r7, sp, #0 - 800bde2: 60f8 str r0, [r7, #12] - 800bde4: 607a str r2, [r7, #4] - 800bde6: 461a mov r2, r3 - 800bde8: 460b mov r3, r1 - 800bdea: 72fb strb r3, [r7, #11] - 800bdec: 4613 mov r3, r2 - 800bdee: 813b strh r3, [r7, #8] - HAL_StatusTypeDef hal_status = HAL_OK; - 800bdf0: 2300 movs r3, #0 - 800bdf2: 75fb strb r3, [r7, #23] - USBD_StatusTypeDef usb_status = USBD_OK; - 800bdf4: 2300 movs r3, #0 - 800bdf6: 75bb strb r3, [r7, #22] - - hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); - 800bdf8: 68fb ldr r3, [r7, #12] - 800bdfa: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0 - 800bdfe: 893b ldrh r3, [r7, #8] - 800be00: 7af9 ldrb r1, [r7, #11] - 800be02: 687a ldr r2, [r7, #4] - 800be04: f7f9 fdf8 bl 80059f8 - 800be08: 4603 mov r3, r0 - 800be0a: 75fb strb r3, [r7, #23] - - usb_status = USBD_Get_USB_Status(hal_status); - 800be0c: 7dfb ldrb r3, [r7, #23] - 800be0e: 4618 mov r0, r3 - 800be10: f000 f808 bl 800be24 - 800be14: 4603 mov r3, r0 - 800be16: 75bb strb r3, [r7, #22] - - return usb_status; - 800be18: 7dbb ldrb r3, [r7, #22] -} - 800be1a: 4618 mov r0, r3 - 800be1c: 3718 adds r7, #24 - 800be1e: 46bd mov sp, r7 - 800be20: bd80 pop {r7, pc} - ... - -0800be24 : - * @brief Retuns the USB status depending on the HAL status: - * @param hal_status: HAL status - * @retval USB status - */ -USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) -{ - 800be24: b480 push {r7} - 800be26: b085 sub sp, #20 - 800be28: af00 add r7, sp, #0 - 800be2a: 4603 mov r3, r0 - 800be2c: 71fb strb r3, [r7, #7] - USBD_StatusTypeDef usb_status = USBD_OK; - 800be2e: 2300 movs r3, #0 - 800be30: 73fb strb r3, [r7, #15] - - switch (hal_status) - 800be32: 79fb ldrb r3, [r7, #7] - 800be34: 2b03 cmp r3, #3 - 800be36: d817 bhi.n 800be68 - 800be38: a201 add r2, pc, #4 ; (adr r2, 800be40 ) - 800be3a: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 800be3e: bf00 nop - 800be40: 0800be51 .word 0x0800be51 - 800be44: 0800be57 .word 0x0800be57 - 800be48: 0800be5d .word 0x0800be5d - 800be4c: 0800be63 .word 0x0800be63 - { - case HAL_OK : - usb_status = USBD_OK; - 800be50: 2300 movs r3, #0 - 800be52: 73fb strb r3, [r7, #15] - break; - 800be54: e00b b.n 800be6e - case HAL_ERROR : - usb_status = USBD_FAIL; - 800be56: 2302 movs r3, #2 - 800be58: 73fb strb r3, [r7, #15] - break; - 800be5a: e008 b.n 800be6e - case HAL_BUSY : - usb_status = USBD_BUSY; - 800be5c: 2301 movs r3, #1 - 800be5e: 73fb strb r3, [r7, #15] - break; - 800be60: e005 b.n 800be6e - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - 800be62: 2302 movs r3, #2 - 800be64: 73fb strb r3, [r7, #15] - break; - 800be66: e002 b.n 800be6e - default : - usb_status = USBD_FAIL; - 800be68: 2302 movs r3, #2 - 800be6a: 73fb strb r3, [r7, #15] - break; - 800be6c: bf00 nop - } - return usb_status; - 800be6e: 7bfb ldrb r3, [r7, #15] -} - 800be70: 4618 mov r0, r3 - 800be72: 3714 adds r7, #20 - 800be74: 46bd mov sp, r7 - 800be76: f85d 7b04 ldr.w r7, [sp], #4 - 800be7a: 4770 bx lr - -0800be7c <__libc_init_array>: - 800be7c: b570 push {r4, r5, r6, lr} - 800be7e: 4e0d ldr r6, [pc, #52] ; (800beb4 <__libc_init_array+0x38>) - 800be80: 4c0d ldr r4, [pc, #52] ; (800beb8 <__libc_init_array+0x3c>) - 800be82: 1ba4 subs r4, r4, r6 - 800be84: 10a4 asrs r4, r4, #2 - 800be86: 2500 movs r5, #0 - 800be88: 42a5 cmp r5, r4 - 800be8a: d109 bne.n 800bea0 <__libc_init_array+0x24> - 800be8c: 4e0b ldr r6, [pc, #44] ; (800bebc <__libc_init_array+0x40>) - 800be8e: 4c0c ldr r4, [pc, #48] ; (800bec0 <__libc_init_array+0x44>) - 800be90: f000 f820 bl 800bed4 <_init> - 800be94: 1ba4 subs r4, r4, r6 - 800be96: 10a4 asrs r4, r4, #2 - 800be98: 2500 movs r5, #0 - 800be9a: 42a5 cmp r5, r4 - 800be9c: d105 bne.n 800beaa <__libc_init_array+0x2e> - 800be9e: bd70 pop {r4, r5, r6, pc} - 800bea0: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 800bea4: 4798 blx r3 - 800bea6: 3501 adds r5, #1 - 800bea8: e7ee b.n 800be88 <__libc_init_array+0xc> - 800beaa: f856 3025 ldr.w r3, [r6, r5, lsl #2] - 800beae: 4798 blx r3 - 800beb0: 3501 adds r5, #1 - 800beb2: e7f2 b.n 800be9a <__libc_init_array+0x1e> - 800beb4: 0800bf68 .word 0x0800bf68 - 800beb8: 0800bf68 .word 0x0800bf68 - 800bebc: 0800bf68 .word 0x0800bf68 - 800bec0: 0800bf6c .word 0x0800bf6c - -0800bec4 : - 800bec4: 4402 add r2, r0 - 800bec6: 4603 mov r3, r0 - 800bec8: 4293 cmp r3, r2 - 800beca: d100 bne.n 800bece - 800becc: 4770 bx lr - 800bece: f803 1b01 strb.w r1, [r3], #1 - 800bed2: e7f9 b.n 800bec8 - -0800bed4 <_init>: - 800bed4: b5f8 push {r3, r4, r5, r6, r7, lr} - 800bed6: bf00 nop - 800bed8: bcf8 pop {r3, r4, r5, r6, r7} - 800beda: bc08 pop {r3} - 800bedc: 469e mov lr, r3 - 800bede: 4770 bx lr - -0800bee0 <_fini>: - 800bee0: b5f8 push {r3, r4, r5, r6, r7, lr} - 800bee2: bf00 nop - 800bee4: bcf8 pop {r3, r4, r5, r6, r7} - 800bee6: bc08 pop {r3} - 800bee8: 469e mov lr, r3 - 800beea: 4770 bx lr diff --git a/Debug/MESC_Firmware.map b/Debug/MESC_Firmware.map deleted file mode 100644 index 993ee744..00000000 --- a/Debug/MESC_Firmware.map +++ /dev/null @@ -1,9442 +0,0 @@ -Archive member included to satisfy reference by file (symbol) - -c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o) - Core/Src/syscalls.o (__errno) -c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) - c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (exit) -c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o) - c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) (_global_impure_ptr) -c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) - c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (__libc_init_array) -c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o) - Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o (memcpy) -c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o) - c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (memset) -c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_addsubdf3.o) - Core/Src/MESCBLDC.o (__aeabi_dadd) -c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_muldivdf3.o) - Core/Src/MESCBLDC.o (__aeabi_dmul) -c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_truncdfsf2.o) - Core/Src/MESCBLDC.o (__aeabi_d2f) - -Allocating common symbols -Common symbol size file - -measurement_buffers - 0x50 Core/Src/MESCBLDC.o -hUsbDeviceFS 0x2c4 USB_DEVICE/App/usb_device.o -defaultTaskHandle 0x4 Core/Src/main.o -hopamp2 0x34 Core/Src/main.o -MotorState 0x1 Core/Src/MESCBLDC.o -htim4 0x40 Core/Src/main.o -hdma_usart3_rx 0x44 Core/Src/main.o -huart3 0x80 Core/Src/main.o -hadc2 0x50 Core/Src/main.o -hdma_i2c1_tx 0x44 Core/Src/main.o -hi2c1 0x4c Core/Src/main.o -uwTick 0x4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o -xQueueRegistry 0x40 Middlewares/Third_Party/FreeRTOS/Source/queue.o -hdma_adc3 0x44 Core/Src/main.o -hdma_usart3_tx 0x44 Core/Src/main.o -pFlash 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o -hopamp3 0x34 Core/Src/main.o -UserRxBufferFS 0x3e8 USB_DEVICE/App/usbd_cdc_if.o -hcomp1 0x30 Core/Src/main.o -htim3 0x40 Core/Src/main.o -MotorSensorMode 0x1 Core/Src/MESCBLDC.o -hopamp1 0x34 Core/Src/main.o -hcomp4 0x30 Core/Src/main.o -hadc1 0x50 Core/Src/main.o -BLDCVars 0x1c Core/Src/MESCBLDC.o -hadc3 0x50 Core/Src/main.o -UserTxBufferFS 0x3e8 USB_DEVICE/App/usbd_cdc_if.o -hcomp7 0x30 Core/Src/main.o -MotorControlType 0x1 Core/Src/MESCBLDC.o -hdma_adc1 0x44 Core/Src/main.o -ComsTaskHandle 0x4 Core/Src/main.o -BatCheckTaskHandle 0x4 Core/Src/main.o -htim1 0x40 Core/Src/main.o -SlowLoopTaskHandle 0x4 Core/Src/main.o -hdma_i2c1_rx 0x44 Core/Src/main.o -BLDCState 0x1 Core/Src/MESCBLDC.o -hcomp2 0x30 Core/Src/main.o -motor 0x10 Core/Src/MESCBLDC.o -g_hw_setup 0x20 Core/Src/MESCBLDC.o -hdma_adc2 0x44 Core/Src/main.o -hpcd_USB_FS 0x26c USB_DEVICE/Target/usbd_conf.o -USBD_StrDesc 0x200 USB_DEVICE/App/usbd_desc.o -htim7 0x40 Core/Src/stm32f3xx_hal_timebase_tim.o -g_sin_lut 0x100 Core/Src/freertos.o -MotorDirection 0x1 Core/Src/MESCBLDC.o -tmpccmrx 0x4 Core/Src/MESCfoc.o - -Discarded input sections - - .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o - .data 0x0000000000000000 0x4 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - .text 0x0000000000000000 0x74 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o - .ARM.extab 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o - .ARM.exidx 0x0000000000000000 0x8 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o - .ARM.attributes - 0x0000000000000000 0x20 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCBLDC.o - .text 0x0000000000000000 0x0 Core/Src/MESCBLDC.o - .data 0x0000000000000000 0x0 Core/Src/MESCBLDC.o - .bss 0x0000000000000000 0x0 Core/Src/MESCBLDC.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESCfoc.o - .text 0x0000000000000000 0x0 Core/Src/MESCfoc.o - .data 0x0000000000000000 0x0 Core/Src/MESCfoc.o - .bss 0x0000000000000000 0x0 Core/Src/MESCfoc.o - .text.fastLoop - 0x0000000000000000 0xf8 Core/Src/MESCfoc.o - .text.V_I_Check - 0x0000000000000000 0x74 Core/Src/MESCfoc.o - .text.GenerateBreak - 0x0000000000000000 0x14 Core/Src/MESCfoc.o - .text.measureResistance - 0x0000000000000000 0x164 Core/Src/MESCfoc.o - .text.measureInductance - 0x0000000000000000 0xe Core/Src/MESCfoc.o - .bss.PWMcycles.8835 - 0x0000000000000000 0x2 Core/Src/MESCfoc.o - .data.testPWM1.8836 - 0x0000000000000000 0x2 Core/Src/MESCfoc.o - .bss.currAcc1.8834 - 0x0000000000000000 0x4 Core/Src/MESCfoc.o - .data.testPWM2.8837 - 0x0000000000000000 0x2 Core/Src/MESCfoc.o - .bss.currAcc2.8833 - 0x0000000000000000 0x4 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x16f Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x2e Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x28 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x22 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x8e Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x51 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0xef Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x6a Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x1df Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x1c Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x22 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0xdf Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x102d Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x11f Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x12a33 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x43 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x174 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x53 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x962 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x5fe Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x12f Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x1fb Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x1dc Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x1bc Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x30 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x3c Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x236 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x9b1 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x77 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x73 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x58d Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x12 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0xc5 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x21d Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x22c Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x58 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0xa5 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x17d Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x65 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x249 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x81 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0xd3 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x9e9 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x89 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x589 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x3e Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x275 Core/Src/MESCfoc.o - .debug_macro 0x0000000000000000 0x1c Core/Src/MESCfoc.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESChw_setup.o - .text 0x0000000000000000 0x0 Core/Src/MESChw_setup.o - .data 0x0000000000000000 0x0 Core/Src/MESChw_setup.o - .bss 0x0000000000000000 0x0 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x16f Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x2e Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x28 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x22 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x8e Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x51 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0xef Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x6a Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x1df Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x1c Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x22 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0xdf Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x102d Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x11f Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x12a33 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x43 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x174 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x53 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x962 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x5fe Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x12f Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x1fb Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x1dc Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x1bc Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x30 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x3c Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x236 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x9b1 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x77 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x73 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x58d Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x12 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0xc5 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x21d Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x22c Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x58 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0xa5 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x17d Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x65 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x249 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x81 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0xd3 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x9e9 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x89 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x589 Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x3e Core/Src/MESChw_setup.o - .debug_macro 0x0000000000000000 0x275 Core/Src/MESChw_setup.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/MESCmotor_state.o - .text 0x0000000000000000 0x0 Core/Src/MESCmotor_state.o - .data 0x0000000000000000 0x0 Core/Src/MESCmotor_state.o - .bss 0x0000000000000000 0x0 Core/Src/MESCmotor_state.o - .text.MESC_Init - 0x0000000000000000 0x38 Core/Src/MESCmotor_state.o - .debug_info 0x0000000000000000 0x299 Core/Src/MESCmotor_state.o - .debug_abbrev 0x0000000000000000 0xbd Core/Src/MESCmotor_state.o - .debug_aranges - 0x0000000000000000 0x20 Core/Src/MESCmotor_state.o - .debug_ranges 0x0000000000000000 0x10 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x23d Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x16f Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x2e Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x28 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x22 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x8e Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x51 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0xef Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x6a Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x1df Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x1c Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x22 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0xdf Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x102d Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x11f Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x12a33 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x43 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x174 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x53 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x962 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x5fe Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x12f Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x1fb Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x1dc Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x1bc Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x30 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x3c Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x236 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x9b1 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x77 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x73 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x58d Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x12 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0xc5 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x21d Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x22c Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x58 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0xa5 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x17d Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x65 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x249 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x81 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0xd3 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x9e9 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x89 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x589 Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x3e Core/Src/MESCmotor_state.o - .debug_macro 0x0000000000000000 0x275 Core/Src/MESCmotor_state.o - .debug_line 0x0000000000000000 0x795 Core/Src/MESCmotor_state.o - .debug_str 0x0000000000000000 0xa7117 Core/Src/MESCmotor_state.o - .comment 0x0000000000000000 0x7c Core/Src/MESCmotor_state.o - .debug_frame 0x0000000000000000 0x30 Core/Src/MESCmotor_state.o - .ARM.attributes - 0x0000000000000000 0x39 Core/Src/MESCmotor_state.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/freertos.o - .text 0x0000000000000000 0x0 Core/Src/freertos.o - .data 0x0000000000000000 0x0 Core/Src/freertos.o - .bss 0x0000000000000000 0x0 Core/Src/freertos.o - .debug_info 0x0000000000000000 0x4fb Core/Src/freertos.o - .debug_abbrev 0x0000000000000000 0xbf Core/Src/freertos.o - .debug_aranges - 0x0000000000000000 0x18 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x2d0 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x174 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x22 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x8e Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x51 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0xef Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x6a Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x1df Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x122 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x15a Core/Src/freertos.o - .debug_macro 0x0000000000000000 0xc2 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x10 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x1f Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x47f Core/Src/freertos.o - .debug_macro 0x0000000000000000 0xb5 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x8c Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x16f Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x2e Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x28 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x1c Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x22 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0xdf Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x102d Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x11f Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x12a33 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x43 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x53 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x962 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x5fe Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x12f Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x1fb Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x1dc Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x1bc Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x30 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x3c Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x236 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x9b1 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x77 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x73 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x58d Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x12 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0xc5 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x21d Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x22c Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x58 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0xa5 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x17d Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x65 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x249 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x81 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0xd3 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x9e9 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x89 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x589 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x3e Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x275 Core/Src/freertos.o - .debug_macro 0x0000000000000000 0x1c Core/Src/freertos.o - .debug_line 0x0000000000000000 0x8c5 Core/Src/freertos.o - .debug_str 0x0000000000000000 0xaac2e Core/Src/freertos.o - .comment 0x0000000000000000 0x7c Core/Src/freertos.o - .ARM.attributes - 0x0000000000000000 0x39 Core/Src/freertos.o - COMMON 0x0000000000000000 0x100 Core/Src/freertos.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/main.o - .text 0x0000000000000000 0x0 Core/Src/main.o - .data 0x0000000000000000 0x0 Core/Src/main.o - .bss 0x0000000000000000 0x0 Core/Src/main.o - .rodata.defaultTask_attributes - 0x0000000000000000 0x24 Core/Src/main.o - .rodata.SlowLoopTask_attributes - 0x0000000000000000 0x24 Core/Src/main.o - .rodata.ComsTask_attributes - 0x0000000000000000 0x24 Core/Src/main.o - .rodata.BatCheckTask_attributes - 0x0000000000000000 0x24 Core/Src/main.o - .bss.adcBuff2 0x0000000000000000 0xc Core/Src/main.o - .bss.adcBuff3 0x0000000000000000 0xc Core/Src/main.o - .bss.RegBuff 0x0000000000000000 0x4 Core/Src/main.o - .text.HAL_ADC_ConvcpltCallback - 0x0000000000000000 0x14 Core/Src/main.o - .text.StartDefaultTask - 0x0000000000000000 0x14 Core/Src/main.o - .text.SlowLoopEntry - 0x0000000000000000 0x10 Core/Src/main.o - .text.ComsTaskEntry - 0x0000000000000000 0x10 Core/Src/main.o - .text.BatCheck - 0x0000000000000000 0x10 Core/Src/main.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/main.o - .debug_macro 0x0000000000000000 0x16f Core/Src/main.o - .debug_macro 0x0000000000000000 0x2e Core/Src/main.o - .debug_macro 0x0000000000000000 0x28 Core/Src/main.o - .debug_macro 0x0000000000000000 0x22 Core/Src/main.o - .debug_macro 0x0000000000000000 0x8e Core/Src/main.o - .debug_macro 0x0000000000000000 0x51 Core/Src/main.o - .debug_macro 0x0000000000000000 0xef Core/Src/main.o - .debug_macro 0x0000000000000000 0x6a Core/Src/main.o - .debug_macro 0x0000000000000000 0x1df Core/Src/main.o - .debug_macro 0x0000000000000000 0x1c Core/Src/main.o - .debug_macro 0x0000000000000000 0x22 Core/Src/main.o - .debug_macro 0x0000000000000000 0xdf Core/Src/main.o - .debug_macro 0x0000000000000000 0x102d Core/Src/main.o - .debug_macro 0x0000000000000000 0x11f Core/Src/main.o - .debug_macro 0x0000000000000000 0x12a33 Core/Src/main.o - .debug_macro 0x0000000000000000 0x43 Core/Src/main.o - .debug_macro 0x0000000000000000 0x174 Core/Src/main.o - .debug_macro 0x0000000000000000 0x53 Core/Src/main.o - .debug_macro 0x0000000000000000 0x962 Core/Src/main.o - .debug_macro 0x0000000000000000 0x5fe Core/Src/main.o - .debug_macro 0x0000000000000000 0x12f Core/Src/main.o - .debug_macro 0x0000000000000000 0x1fb Core/Src/main.o - .debug_macro 0x0000000000000000 0x1dc Core/Src/main.o - .debug_macro 0x0000000000000000 0x1bc Core/Src/main.o - .debug_macro 0x0000000000000000 0x30 Core/Src/main.o - .debug_macro 0x0000000000000000 0x3c Core/Src/main.o - .debug_macro 0x0000000000000000 0x236 Core/Src/main.o - .debug_macro 0x0000000000000000 0x9b1 Core/Src/main.o - .debug_macro 0x0000000000000000 0x77 Core/Src/main.o - .debug_macro 0x0000000000000000 0x73 Core/Src/main.o - .debug_macro 0x0000000000000000 0x58d Core/Src/main.o - .debug_macro 0x0000000000000000 0x12 Core/Src/main.o - .debug_macro 0x0000000000000000 0xc5 Core/Src/main.o - .debug_macro 0x0000000000000000 0x21d Core/Src/main.o - .debug_macro 0x0000000000000000 0x22c Core/Src/main.o - .debug_macro 0x0000000000000000 0x58 Core/Src/main.o - .debug_macro 0x0000000000000000 0xa5 Core/Src/main.o - .debug_macro 0x0000000000000000 0x17d Core/Src/main.o - .debug_macro 0x0000000000000000 0x65 Core/Src/main.o - .debug_macro 0x0000000000000000 0x249 Core/Src/main.o - .debug_macro 0x0000000000000000 0x81 Core/Src/main.o - .debug_macro 0x0000000000000000 0xd3 Core/Src/main.o - .debug_macro 0x0000000000000000 0x9e9 Core/Src/main.o - .debug_macro 0x0000000000000000 0x89 Core/Src/main.o - .debug_macro 0x0000000000000000 0x589 Core/Src/main.o - .debug_macro 0x0000000000000000 0x3e Core/Src/main.o - .debug_macro 0x0000000000000000 0x275 Core/Src/main.o - .debug_macro 0x0000000000000000 0x1c Core/Src/main.o - .debug_macro 0x0000000000000000 0x15a Core/Src/main.o - .debug_macro 0x0000000000000000 0xc2 Core/Src/main.o - .debug_macro 0x0000000000000000 0x10 Core/Src/main.o - .debug_macro 0x0000000000000000 0x1f Core/Src/main.o - .debug_macro 0x0000000000000000 0x47f Core/Src/main.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_msp.o - .text 0x0000000000000000 0x0 Core/Src/stm32f3xx_hal_msp.o - .data 0x0000000000000000 0x0 Core/Src/stm32f3xx_hal_msp.o - .bss 0x0000000000000000 0x0 Core/Src/stm32f3xx_hal_msp.o - .text.HAL_ADC_MspDeInit - 0x0000000000000000 0xbc Core/Src/stm32f3xx_hal_msp.o - .text.HAL_COMP_MspDeInit - 0x0000000000000000 0x78 Core/Src/stm32f3xx_hal_msp.o - .text.HAL_I2C_MspDeInit - 0x0000000000000000 0x5c Core/Src/stm32f3xx_hal_msp.o - .text.HAL_OPAMP_MspDeInit - 0x0000000000000000 0x60 Core/Src/stm32f3xx_hal_msp.o - .text.HAL_TIM_PWM_MspDeInit - 0x0000000000000000 0x34 Core/Src/stm32f3xx_hal_msp.o - .text.HAL_TIM_Base_MspDeInit - 0x0000000000000000 0x68 Core/Src/stm32f3xx_hal_msp.o - .text.HAL_UART_MspDeInit - 0x0000000000000000 0x50 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x16f Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x2e Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x28 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x22 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x8e Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x51 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0xef Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x6a Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x1df Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x1c Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x22 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0xdf Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x102d Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x11f Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x12a33 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x43 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x174 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x53 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x962 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x5fe Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x12f Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x1fb Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x1dc Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x1bc Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x30 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x3c Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x236 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x9b1 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x77 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x73 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x58d Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x12 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0xc5 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x21d Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x22c Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x58 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0xa5 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x17d Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x65 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x249 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x81 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0xd3 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x9e9 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x89 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x589 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x3e Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x275 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x0000000000000000 0x1c Core/Src/stm32f3xx_hal_msp.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_hal_timebase_tim.o - .text 0x0000000000000000 0x0 Core/Src/stm32f3xx_hal_timebase_tim.o - .data 0x0000000000000000 0x0 Core/Src/stm32f3xx_hal_timebase_tim.o - .bss 0x0000000000000000 0x0 Core/Src/stm32f3xx_hal_timebase_tim.o - .text.HAL_SuspendTick - 0x0000000000000000 0x24 Core/Src/stm32f3xx_hal_timebase_tim.o - .text.HAL_ResumeTick - 0x0000000000000000 0x24 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x16f Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x2e Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x28 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x22 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x8e Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x51 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0xef Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x6a Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x1df Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x1c Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x22 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0xdf Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x102d Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x11f Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x12a33 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x43 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x174 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x53 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x962 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x5fe Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x12f Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x1fb Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x1dc Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x1bc Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x30 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x3c Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x236 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x9b1 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x77 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x73 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x58d Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x12 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0xc5 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x21d Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x22c Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x58 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0xa5 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x17d Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x65 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x249 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x81 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0xd3 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x9e9 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x89 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x589 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x3e Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x0000000000000000 0x275 Core/Src/stm32f3xx_hal_timebase_tim.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/stm32f3xx_it.o - .text 0x0000000000000000 0x0 Core/Src/stm32f3xx_it.o - .data 0x0000000000000000 0x0 Core/Src/stm32f3xx_it.o - .bss 0x0000000000000000 0x0 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x16f Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x2e Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x28 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x22 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x8e Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x51 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0xef Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x6a Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x1df Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x1c Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x22 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0xdf Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x102d Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x11f Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x12a33 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x43 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x174 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x53 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x962 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x5fe Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x12f Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x1fb Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x1dc Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x1bc Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x30 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x3c Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x236 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x9b1 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x77 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x73 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x58d Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x12 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0xc5 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x21d Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x22c Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x58 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0xa5 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x17d Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x65 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x249 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x81 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0xd3 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x9e9 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x89 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x589 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x3e Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x275 Core/Src/stm32f3xx_it.o - .debug_macro 0x0000000000000000 0x1c Core/Src/stm32f3xx_it.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/syscalls.o - .text 0x0000000000000000 0x0 Core/Src/syscalls.o - .data 0x0000000000000000 0x0 Core/Src/syscalls.o - .bss 0x0000000000000000 0x0 Core/Src/syscalls.o - .bss.__env 0x0000000000000000 0x4 Core/Src/syscalls.o - .data.environ 0x0000000000000000 0x4 Core/Src/syscalls.o - .text.initialise_monitor_handles - 0x0000000000000000 0xe Core/Src/syscalls.o - .text._getpid 0x0000000000000000 0x10 Core/Src/syscalls.o - .text._kill 0x0000000000000000 0x20 Core/Src/syscalls.o - .text._exit 0x0000000000000000 0x14 Core/Src/syscalls.o - .text._read 0x0000000000000000 0x3a Core/Src/syscalls.o - .text._write 0x0000000000000000 0x38 Core/Src/syscalls.o - .text._close 0x0000000000000000 0x18 Core/Src/syscalls.o - .text._fstat 0x0000000000000000 0x20 Core/Src/syscalls.o - .text._isatty 0x0000000000000000 0x16 Core/Src/syscalls.o - .text._lseek 0x0000000000000000 0x1a Core/Src/syscalls.o - .text._open 0x0000000000000000 0x1c Core/Src/syscalls.o - .text._wait 0x0000000000000000 0x1e Core/Src/syscalls.o - .text._unlink 0x0000000000000000 0x1e Core/Src/syscalls.o - .text._times 0x0000000000000000 0x18 Core/Src/syscalls.o - .text._stat 0x0000000000000000 0x20 Core/Src/syscalls.o - .text._link 0x0000000000000000 0x20 Core/Src/syscalls.o - .text._fork 0x0000000000000000 0x16 Core/Src/syscalls.o - .text._execve 0x0000000000000000 0x22 Core/Src/syscalls.o - .debug_info 0x0000000000000000 0xebd Core/Src/syscalls.o - .debug_abbrev 0x0000000000000000 0x261 Core/Src/syscalls.o - .debug_aranges - 0x0000000000000000 0xa8 Core/Src/syscalls.o - .debug_ranges 0x0000000000000000 0x98 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x243 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x22 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x40 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x18 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x94 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x3c Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x34 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x57 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x174 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x330 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x52 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x1f Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x43 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x20 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x1a3 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x10 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x35 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x10 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x10 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x10 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x6a Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x1c Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x52 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x40 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x10 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x40 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0xd7 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x1c Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x3d Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x35 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x122 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x16 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x16 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x29 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x10 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x241 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x1c Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x10 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x10 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x16 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x145 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x189 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x16 Core/Src/syscalls.o - .debug_macro 0x0000000000000000 0x88 Core/Src/syscalls.o - .debug_line 0x0000000000000000 0x73e Core/Src/syscalls.o - .debug_str 0x0000000000000000 0x8889 Core/Src/syscalls.o - .comment 0x0000000000000000 0x7c Core/Src/syscalls.o - .debug_frame 0x0000000000000000 0x2ac Core/Src/syscalls.o - .ARM.attributes - 0x0000000000000000 0x39 Core/Src/syscalls.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/sysmem.o - .text 0x0000000000000000 0x0 Core/Src/sysmem.o - .data 0x0000000000000000 0x0 Core/Src/sysmem.o - .bss 0x0000000000000000 0x0 Core/Src/sysmem.o - .bss.heap_end.6424 - 0x0000000000000000 0x4 Core/Src/sysmem.o - .text._sbrk 0x0000000000000000 0x58 Core/Src/sysmem.o - .debug_info 0x0000000000000000 0x91c Core/Src/sysmem.o - .debug_abbrev 0x0000000000000000 0x1bb Core/Src/sysmem.o - .debug_aranges - 0x0000000000000000 0x20 Core/Src/sysmem.o - .debug_ranges 0x0000000000000000 0x10 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x1ae Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x10 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x22 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x40 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x18 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x94 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x3c Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x34 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x174 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x57 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x52 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x1f Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x43 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x20 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x1a3 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x23b Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x16 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x35 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x330 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x10 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x10 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x6a Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x1c Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x52 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x40 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x10 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x40 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0xd7 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x1c Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x3d Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x16 Core/Src/sysmem.o - .debug_macro 0x0000000000000000 0x145 Core/Src/sysmem.o - .debug_line 0x0000000000000000 0x55e Core/Src/sysmem.o - .debug_str 0x0000000000000000 0x7ae2 Core/Src/sysmem.o - .comment 0x0000000000000000 0x7c Core/Src/sysmem.o - .debug_frame 0x0000000000000000 0x34 Core/Src/sysmem.o - .ARM.attributes - 0x0000000000000000 0x39 Core/Src/sysmem.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .group 0x0000000000000000 0xc Core/Src/system_stm32f3xx.o - .text 0x0000000000000000 0x0 Core/Src/system_stm32f3xx.o - .data 0x0000000000000000 0x0 Core/Src/system_stm32f3xx.o - .bss 0x0000000000000000 0x0 Core/Src/system_stm32f3xx.o - .text.SystemCoreClockUpdate - 0x0000000000000000 0xd4 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0xa5a Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x2e Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x28 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x22 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x8e Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x51 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0xef Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x6a Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x1df Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x1c Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x22 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0xdf Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x102d Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x11f Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x12a33 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x43 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x16f Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x174 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x53 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x962 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x5fe Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x12f Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x1fb Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x1dc Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x1bc Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x30 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x3c Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x236 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x9b1 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x77 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x73 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x58d Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x12 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0xc5 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x21d Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x22c Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x58 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0xa5 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x17d Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x65 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x249 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x81 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0xd3 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x9e9 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x89 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x589 Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x3e Core/Src/system_stm32f3xx.o - .debug_macro 0x0000000000000000 0x275 Core/Src/system_stm32f3xx.o - .text 0x0000000000000000 0x14 Core/Startup/startup_stm32f303cbtx.o - .data 0x0000000000000000 0x0 Core/Startup/startup_stm32f303cbtx.o - .bss 0x0000000000000000 0x0 Core/Startup/startup_stm32f303cbtx.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_DeInit - 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_MspInit - 0x0000000000000000 0xe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_MspDeInit - 0x0000000000000000 0xe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_InitTick - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_GetTickPrio - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_SetTickFreq - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_GetTickFreq - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_SuspendTick - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_ResumeTick - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_GetHalVersion - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_GetREVID - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_GetDEVID - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_GetUIDw0 - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_GetUIDw1 - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_GetUIDw2 - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_DBGMCU_EnableDBGSleepMode - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_DBGMCU_DisableDBGSleepMode - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_DBGMCU_EnableDBGStopMode - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_DBGMCU_DisableDBGStopMode - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_DBGMCU_EnableDBGStandbyMode - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .text.HAL_DBGMCU_DisableDBGStandbyMode - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_Init - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_DeInit - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_Start - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_Stop - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_PollForConversion - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_PollForEvent - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_Start_IT - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_Stop_IT - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_Start_DMA - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_Stop_DMA - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_GetValue - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_IRQHandler - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_ConfigChannel - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_AnalogWDGConfig - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_GetState - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .text.HAL_ADC_GetError - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADC_DeInit - 0x0000000000000000 0x2fc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADC_Start - 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADC_Stop - 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADC_PollForConversion - 0x0000000000000000 0x1f4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADC_PollForEvent - 0x0000000000000000 0x11a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADC_Start_IT - 0x0000000000000000 0x280 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADC_Stop_IT - 0x0000000000000000 0x7a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADC_Stop_DMA - 0x0000000000000000 0xb8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADC_GetValue - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_Calibration_GetValue - 0x0000000000000000 0x34 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_Calibration_SetValue - 0x0000000000000000 0xc4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_InjectedStart - 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_InjectedStop - 0x0000000000000000 0xb2 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_InjectedPollForConversion - 0x0000000000000000 0x164 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_InjectedStart_IT - 0x0000000000000000 0x218 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_InjectedStop_IT - 0x0000000000000000 0xc2 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_MultiModeStart_DMA - 0x0000000000000000 0x1a0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_MultiModeStop_DMA - 0x0000000000000000 0x184 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_MultiModeGetValue - 0x0000000000000000 0x40 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_InjectedGetValue - 0x0000000000000000 0x5c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_RegularStop - 0x0000000000000000 0x8c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_RegularStop_IT - 0x0000000000000000 0x9c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_RegularStop_DMA - 0x0000000000000000 0xda Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_RegularMultiModeStop_DMA - 0x0000000000000000 0x1ac Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.HAL_ADCEx_InjectedConfigChannel - 0x0000000000000000 0x710 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.ADC_ConversionStop - 0x0000000000000000 0x15c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_DeInit - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_Start - 0x0000000000000000 0x1e0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_Stop - 0x0000000000000000 0x190 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_Start_IT - 0x0000000000000000 0x1e8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_Stop_IT - 0x0000000000000000 0x14c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_IRQHandler - 0x0000000000000000 0xe0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_TriggerCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_Lock - 0x0000000000000000 0x76 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_GetOutputLevel - 0x0000000000000000 0x32 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_GetState - 0x0000000000000000 0x26 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .text.HAL_COMP_GetError - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_DisableIRQ - 0x0000000000000000 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_GetPendingIRQ - 0x0000000000000000 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_SetPendingIRQ - 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_ClearPendingIRQ - 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_GetActive - 0x0000000000000000 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_GetPriority - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.NVIC_DecodePriority - 0x0000000000000000 0x6e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_SystemReset - 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.SysTick_Config - 0x0000000000000000 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_NVIC_DisableIRQ - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_NVIC_SystemReset - 0x0000000000000000 0x8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_SYSTICK_Config - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_MPU_Disable - 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_MPU_Enable - 0x0000000000000000 0x34 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_MPU_ConfigRegion - 0x0000000000000000 0x88 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_NVIC_GetPriorityGrouping - 0x0000000000000000 0xe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_NVIC_GetPriority - 0x0000000000000000 0x2c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_NVIC_SetPendingIRQ - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_NVIC_GetPendingIRQ - 0x0000000000000000 0x1e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_NVIC_ClearPendingIRQ - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_NVIC_GetActive - 0x0000000000000000 0x1e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_SYSTICK_CLKSourceConfig - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_SYSTICK_IRQHandler - 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_SYSTICK_Callback - 0x0000000000000000 0xe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_DMA_DeInit - 0x0000000000000000 0x90 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_DMA_Start - 0x0000000000000000 0x84 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_DMA_Abort - 0x0000000000000000 0x72 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_DMA_Abort_IT - 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_DMA_PollForTransfer - 0x0000000000000000 0x136 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_DMA_RegisterCallback - 0x0000000000000000 0x94 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_DMA_UnRegisterCallback - 0x0000000000000000 0xac Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_DMA_GetState - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_DMA_GetError - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text.HAL_EXTI_SetConfigLine - 0x0000000000000000 0x1a0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text.HAL_EXTI_GetConfigLine - 0x0000000000000000 0x154 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text.HAL_EXTI_ClearConfigLine - 0x0000000000000000 0x110 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text.HAL_EXTI_RegisterCallback - 0x0000000000000000 0x34 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text.HAL_EXTI_GetHandle - 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text.HAL_EXTI_IRQHandler - 0x0000000000000000 0x64 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text.HAL_EXTI_GetPending - 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text.HAL_EXTI_ClearPending - 0x0000000000000000 0x48 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .text.HAL_EXTI_GenerateSWI - 0x0000000000000000 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_info 0x0000000000000000 0x713 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_abbrev 0x0000000000000000 0x1a0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_aranges - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_ranges 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x245 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_line 0x0000000000000000 0x8b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_str 0x0000000000000000 0xa7165 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .comment 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .debug_frame 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .ARM.attributes - 0x0000000000000000 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_Program - 0x0000000000000000 0xe0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_Program_IT - 0x0000000000000000 0x90 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_IRQHandler - 0x0000000000000000 0x1c8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_EndOfOperationCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_OperationErrorCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_Unlock - 0x0000000000000000 0x4c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_Lock - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_OB_Unlock - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_OB_Lock - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_OB_Launch - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.HAL_FLASH_GetError - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.FLASH_Program_HalfWord - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.FLASH_WaitForLastOperation - 0x0000000000000000 0x80 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .text.FLASH_SetErrorCode - 0x0000000000000000 0x64 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_info 0x0000000000000000 0x5a6 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_abbrev 0x0000000000000000 0x22e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_aranges - 0x0000000000000000 0x88 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_ranges 0x0000000000000000 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_line 0x0000000000000000 0x94b Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_str 0x0000000000000000 0xa7217 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .comment 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .debug_frame 0x0000000000000000 0x214 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .ARM.attributes - 0x0000000000000000 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - COMMON 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.HAL_FLASHEx_Erase - 0x0000000000000000 0xd4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.HAL_FLASHEx_Erase_IT - 0x0000000000000000 0x80 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.HAL_FLASHEx_OBErase - 0x0000000000000000 0x84 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.HAL_FLASHEx_OBProgram - 0x0000000000000000 0xf8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.HAL_FLASHEx_OBGetConfig - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.HAL_FLASHEx_OBGetUserData - 0x0000000000000000 0x70 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_MassErase - 0x0000000000000000 0x34 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_OB_EnableWRP - 0x0000000000000000 0x144 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_OB_DisableWRP - 0x0000000000000000 0x140 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_OB_RDP_LevelConfig - 0x0000000000000000 0xa0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_OB_UserConfig - 0x0000000000000000 0x70 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_OB_ProgramData - 0x0000000000000000 0x68 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_OB_GetWRP - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_OB_GetRDP - 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_OB_GetUser - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .text.FLASH_PageErase - 0x0000000000000000 0x40 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_info 0x0000000000000000 0x89c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_abbrev 0x0000000000000000 0x27f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_aranges - 0x0000000000000000 0x98 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_ranges 0x0000000000000000 0x88 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x24b Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_line 0x0000000000000000 0x9f2 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_str 0x0000000000000000 0xa7414 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .comment 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .debug_frame 0x0000000000000000 0x258 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .ARM.attributes - 0x0000000000000000 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .text.HAL_GPIO_DeInit - 0x0000000000000000 0x1b4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .text.HAL_GPIO_ReadPin - 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .text.HAL_GPIO_WritePin - 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .text.HAL_GPIO_TogglePin - 0x0000000000000000 0x34 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .text.HAL_GPIO_LockPin - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .text.HAL_GPIO_EXTI_IRQHandler - 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .text.HAL_GPIO_EXTI_Callback - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_DeInit - 0x0000000000000000 0x5e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Transmit - 0x0000000000000000 0x1e8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Receive - 0x0000000000000000 0x1ec Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Transmit - 0x0000000000000000 0x212 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Receive - 0x0000000000000000 0x1fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Transmit_IT - 0x0000000000000000 0xe0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Receive_IT - 0x0000000000000000 0xe0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Transmit_IT - 0x0000000000000000 0xa0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Receive_IT - 0x0000000000000000 0xa0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Transmit_DMA - 0x0000000000000000 0x1e0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Receive_DMA - 0x0000000000000000 0x1e0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Transmit_DMA - 0x0000000000000000 0x16c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Receive_DMA - 0x0000000000000000 0x16c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Mem_Write - 0x0000000000000000 0x228 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Mem_Read - 0x0000000000000000 0x234 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Mem_Write_IT - 0x0000000000000000 0x128 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Mem_Read_IT - 0x0000000000000000 0x12c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Mem_Write_DMA - 0x0000000000000000 0x1ec Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Mem_Read_DMA - 0x0000000000000000 0x1f0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_IsDeviceReady - 0x0000000000000000 0x20e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Seq_Transmit_IT - 0x0000000000000000 0x108 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Seq_Transmit_DMA - 0x0000000000000000 0x208 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Seq_Receive_IT - 0x0000000000000000 0x108 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Seq_Receive_DMA - 0x0000000000000000 0x208 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Seq_Transmit_IT - 0x0000000000000000 0x144 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Seq_Transmit_DMA - 0x0000000000000000 0x26c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Seq_Receive_IT - 0x0000000000000000 0x144 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Slave_Seq_Receive_DMA - 0x0000000000000000 0x26c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_EnableListen_IT - 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_DisableListen_IT - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_Master_Abort_IT - 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_EV_IRQHandler - 0x0000000000000000 0x34 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_ER_IRQHandler - 0x0000000000000000 0xc2 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_MasterTxCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_MasterRxCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_SlaveTxCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_SlaveRxCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_AddrCallback - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_ListenCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_MemTxCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_MemRxCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_ErrorCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_AbortCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_GetState - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_GetMode - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.HAL_I2C_GetError - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_Master_ISR_IT - 0x0000000000000000 0x252 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_Slave_ISR_IT - 0x0000000000000000 0x206 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_Master_ISR_DMA - 0x0000000000000000 0x1e6 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_Slave_ISR_DMA - 0x0000000000000000 0x190 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_RequestMemoryWrite - 0x0000000000000000 0xa8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_RequestMemoryRead - 0x0000000000000000 0xa8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_ITAddrCplt - 0x0000000000000000 0x104 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_ITMasterSeqCplt - 0x0000000000000000 0x7a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_ITSlaveSeqCplt - 0x0000000000000000 0x7a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_ITMasterCplt - 0x0000000000000000 0x138 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_ITSlaveCplt - 0x0000000000000000 0x1ac Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_ITListenCplt - 0x0000000000000000 0xa8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_ITError - 0x0000000000000000 0x180 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_Flush_TXDR - 0x0000000000000000 0x48 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_DMAMasterTransmitCplt - 0x0000000000000000 0x96 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_DMASlaveTransmitCplt - 0x0000000000000000 0x40 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_DMAMasterReceiveCplt - 0x0000000000000000 0x96 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_DMASlaveReceiveCplt - 0x0000000000000000 0x46 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_DMAError - 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_DMAAbort - 0x0000000000000000 0x48 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_WaitOnFlagUntilTimeout - 0x0000000000000000 0x80 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_WaitOnTXISFlagUntilTimeout - 0x0000000000000000 0x80 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_WaitOnSTOPFlagUntilTimeout - 0x0000000000000000 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_WaitOnRXNEFlagUntilTimeout - 0x0000000000000000 0xd8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_IsAcknowledgeFailed - 0x0000000000000000 0xcc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_TransferConfig - 0x0000000000000000 0x5c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_Enable_IRQ - 0x0000000000000000 0xdc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_Disable_IRQ - 0x0000000000000000 0xca Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .text.I2C_ConvertOtherXferOptions - 0x0000000000000000 0x36 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .text.HAL_I2CEx_EnableWakeUp - 0x0000000000000000 0x84 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .text.HAL_I2CEx_DisableWakeUp - 0x0000000000000000 0x84 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .text.HAL_I2CEx_EnableFastModePlus - 0x0000000000000000 0x40 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .text.HAL_I2CEx_DisableFastModePlus - 0x0000000000000000 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .text.HAL_OPAMP_DeInit - 0x0000000000000000 0x62 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .text.HAL_OPAMP_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .text.HAL_OPAMP_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .text.HAL_OPAMP_Stop - 0x0000000000000000 0x74 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .text.HAL_OPAMP_SelfCalibrate - 0x0000000000000000 0x24c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .text.HAL_OPAMP_Lock - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .text.HAL_OPAMP_GetState - 0x0000000000000000 0x26 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .text.HAL_OPAMP_GetTrimOffset - 0x0000000000000000 0xf0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .text.HAL_OPAMPEx_SelfCalibrateAll - 0x0000000000000000 0x7ec Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_info 0x0000000000000000 0x424 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_abbrev 0x0000000000000000 0x127 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_aranges - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_ranges 0x0000000000000000 0x10 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_line 0x0000000000000000 0x851 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_str 0x0000000000000000 0xa71a6 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .comment 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .debug_frame 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .ARM.attributes - 0x0000000000000000 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_Init - 0x0000000000000000 0x168 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_DeInit - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_Start - 0x0000000000000000 0x4c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_Stop - 0x0000000000000000 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_DataOutStageCallback - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_DataInStageCallback - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_SetupStageCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_SOFCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_ResetCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_SuspendCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_ResumeCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_ISOOUTIncompleteCallback - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_ISOINIncompleteCallback - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_ConnectCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_DisconnectCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_DevConnect - 0x0000000000000000 0x42 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_DevDisconnect - 0x0000000000000000 0x42 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_EP_Close - 0x0000000000000000 0x84 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_EP_GetRxCount - 0x0000000000000000 0x2a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_EP_Flush - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_ActivateRemoteWakeup - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_DeActivateRemoteWakeup - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_PCD_GetState - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .text.HAL_PCDEx_PMAConfig - 0x0000000000000000 0x7a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .text.HAL_PCDEx_SetConnectionState - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .text.HAL_PCDEx_LPM_Callback - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .text.HAL_PCDEx_BCD_Callback - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_info 0x0000000000000000 0x763 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_abbrev 0x0000000000000000 0x188 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_aranges - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_ranges 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_line 0x0000000000000000 0x7d7 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_str 0x0000000000000000 0xa73c8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .comment 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .debug_frame 0x0000000000000000 0xb0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .ARM.attributes - 0x0000000000000000 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_DeInit - 0x0000000000000000 0x2c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_EnableBkUpAccess - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_DisableBkUpAccess - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_EnableWakeUpPin - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_DisableWakeUpPin - 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_EnterSLEEPMode - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_EnterSTOPMode - 0x0000000000000000 0x68 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_EnterSTANDBYMode - 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_EnableSleepOnExit - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_DisableSleepOnExit - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_EnableSEVOnPend - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .text.HAL_PWR_DisableSEVOnPend - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_info 0x0000000000000000 0x555 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_abbrev 0x0000000000000000 0x15f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_aranges - 0x0000000000000000 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_ranges 0x0000000000000000 0x68 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_line 0x0000000000000000 0x874 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_str 0x0000000000000000 0xa70ef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .comment 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .debug_frame 0x0000000000000000 0x1b0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .ARM.attributes - 0x0000000000000000 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .text.HAL_PWR_ConfigPVD - 0x0000000000000000 0xc0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .text.HAL_PWR_EnablePVD - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .text.HAL_PWR_DisablePVD - 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .text.HAL_PWR_PVD_IRQHandler - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .text.HAL_PWR_PVDCallback - 0x0000000000000000 0xe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_info 0x0000000000000000 0x322 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_abbrev 0x0000000000000000 0x155 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_aranges - 0x0000000000000000 0x40 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_ranges 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x251 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_line 0x0000000000000000 0x7ef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_str 0x0000000000000000 0xa7041 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .comment 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .debug_frame 0x0000000000000000 0xb4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .ARM.attributes - 0x0000000000000000 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .text.HAL_RCC_DeInit - 0x0000000000000000 0x148 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .text.HAL_RCC_MCOConfig - 0x0000000000000000 0x64 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .text.HAL_RCC_EnableCSS - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .text.HAL_RCC_DisableCSS - 0x0000000000000000 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .text.HAL_RCC_GetOscConfig - 0x0000000000000000 0x11c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .text.HAL_RCC_NMI_IRQHandler - 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .text.HAL_RCC_CSSCallback - 0x0000000000000000 0xe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .text.HAL_RCCEx_GetPeriphCLKConfig - 0x0000000000000000 0x12c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .rodata 0x0000000000000000 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .text.HAL_RCCEx_GetPeriphCLKFreq - 0x0000000000000000 0x538 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .text.RCC_GetPLLCLKFreq - 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Base_DeInit - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Base_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Base_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Base_Start - 0x0000000000000000 0x54 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Base_Stop - 0x0000000000000000 0x56 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Base_Stop_IT - 0x0000000000000000 0x56 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Base_Start_DMA - 0x0000000000000000 0xcc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Base_Stop_DMA - 0x0000000000000000 0x64 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_Init - 0x0000000000000000 0x56 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_DeInit - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_Start - 0x0000000000000000 0xb0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_Stop - 0x0000000000000000 0xd4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_Start_IT - 0x0000000000000000 0x13c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_Stop_IT - 0x0000000000000000 0x160 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_Start_DMA - 0x0000000000000000 0x258 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_Stop_DMA - 0x0000000000000000 0x190 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_DeInit - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_Stop - 0x0000000000000000 0xdc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_Start_IT - 0x0000000000000000 0x13c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_Stop_IT - 0x0000000000000000 0x160 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_Start_DMA - 0x0000000000000000 0x258 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_Stop_DMA - 0x0000000000000000 0x190 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_DeInit - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_Start - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_Stop - 0x0000000000000000 0x52 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_Stop_IT - 0x0000000000000000 0xe0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_Start_DMA - 0x0000000000000000 0x1f8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_Stop_DMA - 0x0000000000000000 0x110 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_Init - 0x0000000000000000 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_DeInit - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_Start - 0x0000000000000000 0x90 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_Stop - 0x0000000000000000 0xe0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_Start_IT - 0x0000000000000000 0xb0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_Stop_IT - 0x0000000000000000 0x100 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_Init - 0x0000000000000000 0x124 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_DeInit - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_Start - 0x0000000000000000 0x6e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_Stop - 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_Start_IT - 0x0000000000000000 0xae Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_Stop_IT - 0x0000000000000000 0xd4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_Start_DMA - 0x0000000000000000 0x1f4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_Stop_DMA - 0x0000000000000000 0xfc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_ConfigChannel - 0x0000000000000000 0xfc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_ConfigChannel - 0x0000000000000000 0x188 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_DMABurst_WriteStart - 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_DMABurst_MultiWriteStart - 0x0000000000000000 0x268 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_DMABurst_WriteStop - 0x0000000000000000 0xd6 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_DMABurst_ReadStart - 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_DMABurst_MultiReadStart - 0x0000000000000000 0x268 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_DMABurst_ReadStop - 0x0000000000000000 0xd6 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_GenerateEvent - 0x0000000000000000 0x4e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_ConfigOCrefClear - 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_ConfigClockSource - 0x0000000000000000 0x172 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_SlaveConfigSynchro_IT - 0x0000000000000000 0x84 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PeriodElapsedCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PeriodElapsedHalfCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_CaptureCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_CaptureHalfCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_TriggerHalfCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_ErrorCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Base_GetState - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OC_GetState - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_PWM_GetState - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_IC_GetState - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_OnePulse_GetState - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.HAL_TIM_Encoder_GetState - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_DMAError - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_DMADelayPulseCplt - 0x0000000000000000 0x70 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_DMADelayPulseHalfCplt - 0x0000000000000000 0x70 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_DMACaptureCplt - 0x0000000000000000 0x70 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_DMACaptureHalfCplt - 0x0000000000000000 0x70 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_DMAPeriodElapsedCplt - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_DMAPeriodElapsedHalfCplt - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_DMATriggerCplt - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_DMATriggerHalfCplt - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_ITRx_SetConfig - 0x0000000000000000 0x36 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Init - 0x0000000000000000 0x12e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_DeInit - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Start - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Stop - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Start_IT - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Stop_IT - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Start_DMA - 0x0000000000000000 0xdc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Stop_DMA - 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Start - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Stop - 0x0000000000000000 0x82 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Start_IT - 0x0000000000000000 0xb8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Stop_IT - 0x0000000000000000 0xec Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Start_DMA - 0x0000000000000000 0x18c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Stop_DMA - 0x0000000000000000 0xee Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Stop - 0x0000000000000000 0x82 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Start_IT - 0x0000000000000000 0xb8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Stop_IT - 0x0000000000000000 0xec Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Start_DMA - 0x0000000000000000 0x18c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Stop_DMA - 0x0000000000000000 0xee Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OnePulseN_Start - 0x0000000000000000 0x32 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OnePulseN_Stop - 0x0000000000000000 0x82 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OnePulseN_Start_IT - 0x0000000000000000 0x52 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_OnePulseN_Stop_IT - 0x0000000000000000 0xa2 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_ConfigCommutEvent - 0x0000000000000000 0xc0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_ConfigCommutEvent_IT - 0x0000000000000000 0xc0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_ConfigCommutEvent_DMA - 0x0000000000000000 0xe4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_RemapConfig - 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_GroupChannel5 - 0x0000000000000000 0x66 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_CommutHalfCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_GetState - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.TIMEx_DMACommutationCplt - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.TIMEx_DMACommutationHalfCplt - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_HalfDuplex_Init - 0x0000000000000000 0xac Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_LIN_Init - 0x0000000000000000 0xdc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_MultiProcessor_Init - 0x0000000000000000 0xd4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_DeInit - 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_MspInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_MspDeInit - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_Receive - 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_Transmit_IT - 0x0000000000000000 0xb8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_Receive_IT - 0x0000000000000000 0x11c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_Transmit_DMA - 0x0000000000000000 0xf8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_Receive_DMA - 0x0000000000000000 0x108 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_DMAPause - 0x0000000000000000 0xa8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_DMAResume - 0x0000000000000000 0x8c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_DMAStop - 0x0000000000000000 0xd6 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_Abort - 0x0000000000000000 0x11c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_AbortTransmit - 0x0000000000000000 0x88 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_AbortReceive - 0x0000000000000000 0xb0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_Abort_IT - 0x0000000000000000 0x16c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_AbortTransmit_IT - 0x0000000000000000 0xac Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_AbortReceive_IT - 0x0000000000000000 0xdc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_IRQHandler - 0x0000000000000000 0x28c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_TxCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_TxHalfCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_RxCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_RxHalfCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_ErrorCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_AbortCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_AbortTransmitCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_AbortReceiveCpltCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_ReceiverTimeout_Config - 0x0000000000000000 0x2a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_EnableReceiverTimeout - 0x0000000000000000 0x5c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_DisableReceiverTimeout - 0x0000000000000000 0x5c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_MultiProcessor_EnableMuteMode - 0x0000000000000000 0x4a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_MultiProcessor_DisableMuteMode - 0x0000000000000000 0x4a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_MultiProcessor_EnterMuteMode - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_HalfDuplex_EnableTransmitter - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_HalfDuplex_EnableReceiver - 0x0000000000000000 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_LIN_SendBreak - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_GetState - 0x0000000000000000 0x26 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.HAL_UART_GetError - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_EndTxTransfer - 0x0000000000000000 0x2a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_EndRxTransfer - 0x0000000000000000 0x40 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMATransmitCplt - 0x0000000000000000 0x4e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMATxHalfCplt - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMAReceiveCplt - 0x0000000000000000 0x62 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMARxHalfCplt - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMAError - 0x0000000000000000 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMAAbortOnError - 0x0000000000000000 0x2c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMATxAbortCallback - 0x0000000000000000 0x62 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMARxAbortCallback - 0x0000000000000000 0x72 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMATxOnlyAbortCallback - 0x0000000000000000 0x2a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_DMARxOnlyAbortCallback - 0x0000000000000000 0x42 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_TxISR_8BIT - 0x0000000000000000 0x74 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_TxISR_16BIT - 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_EndTransmit_IT - 0x0000000000000000 0x32 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_RxISR_8BIT - 0x0000000000000000 0xa6 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .text.UART_RxISR_16BIT - 0x0000000000000000 0xa6 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .text.HAL_RS485Ex_Init - 0x0000000000000000 0xce Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .text.HAL_UARTEx_WakeupCallback - 0x0000000000000000 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .text.HAL_MultiProcessorEx_AddressLength_Set - 0x0000000000000000 0x5e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .text.HAL_UARTEx_StopModeWakeUpSourceConfig - 0x0000000000000000 0xb2 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .text.HAL_UARTEx_EnableStopMode - 0x0000000000000000 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .text.HAL_UARTEx_DisableStopMode - 0x0000000000000000 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .text.UARTEx_Wakeup_AddressConfig - 0x0000000000000000 0x46 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_info 0x0000000000000000 0x89e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_abbrev 0x0000000000000000 0x1e2 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_aranges - 0x0000000000000000 0x50 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_ranges 0x0000000000000000 0x40 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_line 0x0000000000000000 0x884 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_str 0x0000000000000000 0xa7450 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .comment 0x0000000000000000 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .debug_frame 0x0000000000000000 0x120 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .ARM.attributes - 0x0000000000000000 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .data 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .bss 0x0000000000000000 0x0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_CoreInit - 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_EnableGlobalInt - 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_DisableGlobalInt - 0x0000000000000000 0x3a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_SetCurrentMode - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_DevInit - 0x0000000000000000 0x48 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_SetDevSpeed - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_FlushTxFifo - 0x0000000000000000 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_FlushRxFifo - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_DeactivateEndpoint - 0x0000000000000000 0x32c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_WritePacket - 0x0000000000000000 0x24 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_ReadPacket - 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_StopDevice - 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_DevConnect - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_DevDisconnect - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_ReadDevAllOutEpInterrupt - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_ReadDevAllInEpInterrupt - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_ReadDevOutEPInterrupt - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_ReadDevInEPInterrupt - 0x0000000000000000 0x1a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_ClearInterrupts - 0x0000000000000000 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_ActivateRemoteWakeup - 0x0000000000000000 0x2a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .text.USB_DeActivateRemoteWakeup - 0x0000000000000000 0x2a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0xa5a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x16f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x2e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x51 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0xef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x6a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x1df Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x22 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0xdf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x102d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x11f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x12a33 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x43 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x174 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x53 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x962 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x5fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x12f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x1fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x1dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x1bc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x30 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x236 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x9b1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x77 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x73 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x58d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x12 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0xc5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x21d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x22c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0xa5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x17d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x249 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x81 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0xd3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x9e9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x89 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x589 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x3e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x0000000000000000 0x275 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .data 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .bss 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .data.USBD_CDC_DeviceQualifierDesc - 0x0000000000000000 0xa Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .data.USBD_CDC - 0x0000000000000000 0x38 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .data.USBD_CDC_CfgHSDesc - 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .data.USBD_CDC_CfgFSDesc - 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .data.USBD_CDC_OtherSpeedCfgDesc - 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_Init - 0x0000000000000000 0xf4 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_DeInit - 0x0000000000000000 0x6e Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_Setup - 0x0000000000000000 0x140 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_DataIn - 0x0000000000000000 0xa0 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_DataOut - 0x0000000000000000 0x56 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_EP0_RxReady - 0x0000000000000000 0x50 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_GetFSCfgDesc - 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_GetHSCfgDesc - 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_GetOtherSpeedCfgDesc - 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_GetDeviceQualifierDescriptor - 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_RegisterInterface - 0x0000000000000000 0x2e Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_SetTxBuffer - 0x0000000000000000 0x34 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_SetRxBuffer - 0x0000000000000000 0x28 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_TransmitPacket - 0x0000000000000000 0x5e Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .text.USBD_CDC_ReceivePacket - 0x0000000000000000 0x54 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_info 0x0000000000000000 0x1b06 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_abbrev 0x0000000000000000 0x2c7 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_aranges - 0x0000000000000000 0x90 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_ranges 0x0000000000000000 0x80 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x475 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x22 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x18 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x94 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x3c Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x34 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x57 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x97 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x330 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0xfd Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x52 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1f Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x6a Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x52 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0xd7 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x3d Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x145 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x35 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x29 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x16f Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x2e Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x28 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0xef Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1df Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x22 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0xd9 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x102d Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x11f Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x12a33 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x4d Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x962 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x5fe Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x12f Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1fb Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1dc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1bc Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x30 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x3c Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x236 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x9b1 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x77 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x73 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x58d Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x12 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0xc5 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x21d Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x22c Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x58 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0xa5 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x17d Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x65 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x249 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x81 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0xd3 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x9e9 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x89 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x589 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x3e Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x275 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x59 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x1c8 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_macro 0x0000000000000000 0x8f Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_line 0x0000000000000000 0xc95 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_str 0x0000000000000000 0xacb84 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .comment 0x0000000000000000 0x7c Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .debug_frame 0x0000000000000000 0x248 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .ARM.attributes - 0x0000000000000000 0x39 Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .data 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .bss 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text.USBD_Init - 0x0000000000000000 0x56 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text.USBD_DeInit - 0x0000000000000000 0x3a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text.USBD_RegisterClass - 0x0000000000000000 0x34 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text.USBD_Start - 0x0000000000000000 0x18 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text.USBD_Stop - 0x0000000000000000 0x2c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text.USBD_LL_IsoINIncomplete - 0x0000000000000000 0x1a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text.USBD_LL_IsoOUTIncomplete - 0x0000000000000000 0x1a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text.USBD_LL_DevConnected - 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .text.USBD_LL_DevDisconnected - 0x0000000000000000 0x2e Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x22 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x18 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x94 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x3c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x34 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x57 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x97 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x330 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0xfd Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x52 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x6a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x52 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0xd7 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x3d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x145 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x35 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x29 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x16f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x2e Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x28 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0xef Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1df Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x22 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0xd9 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x102d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x11f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x12a33 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x4d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x962 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x5fe Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x12f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1fb Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1dc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1bc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x30 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x3c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x236 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x9b1 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x77 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x73 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x58d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x12 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0xc5 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x21d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x22c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x58 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0xa5 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x17d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x65 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x249 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x81 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0xd3 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x9e9 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x89 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x589 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x3e Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x275 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x0000000000000000 0x59 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .data 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .bss 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text.USBD_GetString - 0x0000000000000000 0x84 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text.USBD_GetLen - 0x0000000000000000 0x30 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x22 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x18 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x94 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x3c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x34 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x57 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x97 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x330 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0xfd Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x52 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x6a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x52 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0xd7 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x3d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x145 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x35 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x29 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x16f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x2e Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x28 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0xef Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1df Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x22 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0xd9 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x102d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x11f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x12a33 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x4d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x962 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x5fe Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x12f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1fb Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1dc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1bc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x30 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x3c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x236 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x9b1 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x77 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x73 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x58d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x12 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0xc5 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x21d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x22c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x58 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0xa5 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x17d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x65 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x249 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x81 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0xd3 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x9e9 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x89 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x589 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x3e Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x275 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x59 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x0000000000000000 0x1c8 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .text 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .data 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .bss 0x0000000000000000 0x0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .text.USBD_CtlPrepareRx - 0x0000000000000000 0x3c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .text.USBD_GetRxCount - 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x22 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x18 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x94 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x3c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x34 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x57 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x97 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x330 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0xfd Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x52 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x6a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x52 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x10 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0xd7 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x3d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x145 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x35 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x29 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x20 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x16f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x2e Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x28 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0xef Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1df Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x22 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0xd9 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x102d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x11f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x12a33 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x43 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x4d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x962 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x5fe Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x12f Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1fb Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1dc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1bc Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x30 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x3c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x236 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x9b1 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x77 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x73 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x58d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x12 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0xc5 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x21d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x22c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x58 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0xa5 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x17d Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x65 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x249 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x81 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0xd3 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x9e9 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x89 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x589 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x3e Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x275 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x59 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x0000000000000000 0x1c8 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .bss.KernelState - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelInitialize - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .rodata 0x0000000000000000 0x11 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelGetInfo - 0x0000000000000000 0x50 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelGetState - 0x0000000000000000 0x44 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelStart - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelLock - 0x0000000000000000 0x70 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelUnlock - 0x0000000000000000 0x88 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelRestoreLock - 0x0000000000000000 0x98 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelGetTickCount - 0x0000000000000000 0x50 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelGetTickFreq - 0x0000000000000000 0x12 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelGetSysTimerCount - 0x0000000000000000 0x50 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osKernelGetSysTimerFreq - 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadNew - 0x0000000000000000 0x154 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadGetName - 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadGetId - 0x0000000000000000 0x4c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadGetState - 0x0000000000000000 0x9c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadGetStackSpace - 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadGetStackSize - 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadSetPriority - 0x0000000000000000 0x78 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadGetPriority - 0x0000000000000000 0x60 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadYield - 0x0000000000000000 0x64 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadSuspend - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadResume - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadExit - 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadTerminate - 0x0000000000000000 0x80 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadGetCount - 0x0000000000000000 0x4c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadEnumerate - 0x0000000000000000 0xcc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadFlagsSet - 0x0000000000000000 0xc4 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadFlagsClear - 0x0000000000000000 0xa0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadFlagsGet - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osThreadFlagsWait - 0x0000000000000000 0x128 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osDelay 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osDelayUntil - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.TimerCallback - 0x0000000000000000 0x2a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osTimerNew - 0x0000000000000000 0x108 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osTimerGetName - 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osTimerStart - 0x0000000000000000 0x80 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osTimerStop - 0x0000000000000000 0x94 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osTimerIsRunning - 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osTimerDelete - 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osEventFlagsNew - 0x0000000000000000 0xa4 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osEventFlagsSet - 0x0000000000000000 0xb0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osEventFlagsClear - 0x0000000000000000 0x88 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osEventFlagsGet - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osEventFlagsWait - 0x0000000000000000 0xec Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osEventFlagsDelete - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMutexNew - 0x0000000000000000 0x134 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMutexAcquire - 0x0000000000000000 0xbc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMutexRelease - 0x0000000000000000 0xa0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMutexGetOwner - 0x0000000000000000 0x60 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMutexDelete - 0x0000000000000000 0x70 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osSemaphoreNew - 0x0000000000000000 0x13c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osSemaphoreAcquire - 0x0000000000000000 0xcc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osSemaphoreRelease - 0x0000000000000000 0xb0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osSemaphoreGetCount - 0x0000000000000000 0x64 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osSemaphoreDelete - 0x0000000000000000 0x6c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMessageQueueNew - 0x0000000000000000 0x10c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMessageQueuePut - 0x0000000000000000 0xe8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMessageQueueGet - 0x0000000000000000 0xe4 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMessageQueueGetCapacity - 0x0000000000000000 0x2c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMessageQueueGetMsgSize - 0x0000000000000000 0x2c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMessageQueueGetCount - 0x0000000000000000 0x64 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMessageQueueGetSpace - 0x0000000000000000 0x90 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMessageQueueReset - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.osMessageQueueDelete - 0x0000000000000000 0x6c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .bss.Idle_TCB 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .bss.Idle_Stack - 0x0000000000000000 0x200 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .bss.Timer_TCB - 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .bss.Timer_Stack - 0x0000000000000000 0x400 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.vApplicationGetIdleTaskMemory - 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .text.vApplicationGetTimerTaskMemory - 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_info 0x0000000000000000 0x403a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_abbrev 0x0000000000000000 0x3a0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_aranges - 0x0000000000000000 0x228 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_ranges 0x0000000000000000 0x218 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x23a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x94 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x3c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x174 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x57 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x52 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x43 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x330 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x35 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x74 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0xd3 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x91 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x8d Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_macro 0x0000000000000000 0x9a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_line 0x0000000000000000 0x1e27 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_str 0x0000000000000000 0xdf82 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .comment 0x0000000000000000 0x7c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .debug_frame 0x0000000000000000 0x980 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .ARM.attributes - 0x0000000000000000 0x39 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_info 0x0000000000000000 0x97 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_abbrev 0x0000000000000000 0x47 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_aranges - 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0xe3 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x174 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x8e Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x51 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_macro 0x0000000000000000 0x43 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_line 0x0000000000000000 0x4be Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .debug_str 0x0000000000000000 0x7e11 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .comment 0x0000000000000000 0x7c Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .ARM.attributes - 0x0000000000000000 0x39 Middlewares/Third_Party/FreeRTOS/Source/croutine.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.xEventGroupCreateStatic - 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.xEventGroupCreate - 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.xEventGroupSync - 0x0000000000000000 0x158 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.xEventGroupWaitBits - 0x0000000000000000 0x194 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.xEventGroupClearBits - 0x0000000000000000 0x6c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.xEventGroupClearBitsFromISR - 0x0000000000000000 0x28 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.xEventGroupGetBitsFromISR - 0x0000000000000000 0x46 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.xEventGroupSetBits - 0x0000000000000000 0x112 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.vEventGroupDelete - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.vEventGroupSetBitsCallback - 0x0000000000000000 0x1a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.vEventGroupClearBitsCallback - 0x0000000000000000 0x1a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.prvTestWaitCondition - 0x0000000000000000 0x44 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.xEventGroupSetBitsFromISR - 0x0000000000000000 0x28 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.uxEventGroupGetNumber - 0x0000000000000000 0x2c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .text.vEventGroupSetNumber - 0x0000000000000000 0x1c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_info 0x0000000000000000 0x1363 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_abbrev 0x0000000000000000 0x2f4 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_aranges - 0x0000000000000000 0x90 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_ranges 0x0000000000000000 0x80 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x1d5 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x94 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x3c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x10e Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x8d Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x57 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x52 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x43 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x330 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x29 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_macro 0x0000000000000000 0x91 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_line 0x0000000000000000 0x922 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_str 0x0000000000000000 0xb6a6 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .comment 0x0000000000000000 0x7c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .debug_frame 0x0000000000000000 0x23c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .ARM.attributes - 0x0000000000000000 0x39 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/list.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/list.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/list.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/list.o - .text.vListInitialise - 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/list.o - .text.vListInitialiseItem - 0x0000000000000000 0x1a Middlewares/Third_Party/FreeRTOS/Source/list.o - .text.vListInsert - 0x0000000000000000 0x72 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x94 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x3c Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x10e Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x8d Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x57 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x52 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x43 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x330 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x29 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/list.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueGenericReset - 0x0000000000000000 0xd0 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueGenericCreateStatic - 0x0000000000000000 0xe4 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueGenericCreate - 0x0000000000000000 0x7a Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.prvInitialiseNewQueue - 0x0000000000000000 0x46 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.prvInitialiseMutex - 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueCreateMutex - 0x0000000000000000 0x30 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueCreateMutexStatic - 0x0000000000000000 0x36 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueGetMutexHolder - 0x0000000000000000 0x2e Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueGetMutexHolderFromISR - 0x0000000000000000 0x44 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueGiveMutexRecursive - 0x0000000000000000 0x66 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueTakeMutexRecursive - 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueCreateCountingSemaphoreStatic - 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueCreateCountingSemaphore - 0x0000000000000000 0x62 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueGenericSend - 0x0000000000000000 0x1f4 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueGenericSendFromISR - 0x0000000000000000 0x128 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueGiveFromISR - 0x0000000000000000 0x112 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueReceive - 0x0000000000000000 0x1b8 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueSemaphoreTake - 0x0000000000000000 0x210 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueuePeek - 0x0000000000000000 0x1bc Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueReceiveFromISR - 0x0000000000000000 0xfa Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueuePeekFromISR - 0x0000000000000000 0xca Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.uxQueueMessagesWaiting - 0x0000000000000000 0x3a Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.uxQueueSpacesAvailable - 0x0000000000000000 0x44 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.uxQueueMessagesWaitingFromISR - 0x0000000000000000 0x36 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.vQueueDelete - 0x0000000000000000 0x44 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.uxQueueGetQueueNumber - 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.vQueueSetQueueNumber - 0x0000000000000000 0x1c Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.ucQueueGetQueueType - 0x0000000000000000 0x1a Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.prvGetDisinheritPriorityAfterTimeout - 0x0000000000000000 0x30 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.prvCopyDataToQueue - 0x0000000000000000 0xd4 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.prvCopyDataFromQueue - 0x0000000000000000 0x4c Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.prvUnlockQueue - 0x0000000000000000 0xa4 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.prvIsQueueEmpty - 0x0000000000000000 0x2c Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueIsQueueEmptyFromISR - 0x0000000000000000 0x42 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.prvIsQueueFull - 0x0000000000000000 0x30 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.xQueueIsQueueFullFromISR - 0x0000000000000000 0x46 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.vQueueAddToRegistry - 0x0000000000000000 0x50 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.pcQueueGetName - 0x0000000000000000 0x4c Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.vQueueUnregisterQueue - 0x0000000000000000 0x54 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .text.vQueueWaitForMessageRestricted - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_info 0x0000000000000000 0x22e8 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_abbrev 0x0000000000000000 0x354 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_aranges - 0x0000000000000000 0x158 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_ranges 0x0000000000000000 0x148 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x205 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x94 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x3c Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x10e Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x8d Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x57 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x52 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x43 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x330 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x29 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x35 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_macro 0x0000000000000000 0x8d Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_line 0x0000000000000000 0x10f7 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_str 0x0000000000000000 0xbc09 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .comment 0x0000000000000000 0x7c Middlewares/Third_Party/FreeRTOS/Source/queue.o - .debug_frame 0x0000000000000000 0x5ec Middlewares/Third_Party/FreeRTOS/Source/queue.o - .ARM.attributes - 0x0000000000000000 0x39 Middlewares/Third_Party/FreeRTOS/Source/queue.o - COMMON 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/queue.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferGenericCreate - 0x0000000000000000 0x82 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferGenericCreateStatic - 0x0000000000000000 0xe2 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.vStreamBufferDelete - 0x0000000000000000 0x4c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferReset - 0x0000000000000000 0x82 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferSetTriggerLevel - 0x0000000000000000 0x5a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferSpacesAvailable - 0x0000000000000000 0x64 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferBytesAvailable - 0x0000000000000000 0x38 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferSend - 0x0000000000000000 0x148 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferSendFromISR - 0x0000000000000000 0xdc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.prvWriteMessageToBuffer - 0x0000000000000000 0x7a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferReceive - 0x0000000000000000 0x126 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferReceiveFromISR - 0x0000000000000000 0xd8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.prvReadMessageFromBuffer - 0x0000000000000000 0x60 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferIsEmpty - 0x0000000000000000 0x4e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferIsFull - 0x0000000000000000 0x5e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferSendCompletedFromISR - 0x0000000000000000 0x82 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.xStreamBufferReceiveCompletedFromISR - 0x0000000000000000 0x82 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.prvWriteBytesToBuffer - 0x0000000000000000 0xde Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.prvReadBytesFromBuffer - 0x0000000000000000 0xee Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.prvBytesInBuffer - 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.prvInitialiseNewStreamBuffer - 0x0000000000000000 0x70 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.uxStreamBufferGetStreamBufferNumber - 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.vStreamBufferSetStreamBufferNumber - 0x0000000000000000 0x1c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .text.ucStreamBufferGetStreamBufferType - 0x0000000000000000 0x1e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_info 0x0000000000000000 0x1aa3 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_abbrev 0x0000000000000000 0x345 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_aranges - 0x0000000000000000 0xd8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_ranges 0x0000000000000000 0xc8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x1d3 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x8e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x51 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x46 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x3c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x174 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x52 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x43 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x330 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x35 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_macro 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_line 0x0000000000000000 0xbe2 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_str 0x0000000000000000 0xb6c8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .comment 0x0000000000000000 0x7c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .debug_frame 0x0000000000000000 0x3a0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .ARM.attributes - 0x0000000000000000 0x39 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xDelayedTaskList1 - 0x0000000000000000 0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xDelayedTaskList2 - 0x0000000000000000 0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xPendingReadyList - 0x0000000000000000 0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xTasksWaitingTermination - 0x0000000000000000 0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.uxDeletedTasksWaitingCleanUp - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xSuspendedTaskList - 0x0000000000000000 0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.uxCurrentNumberOfTasks - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xSchedulerRunning - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.uxTaskNumber - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xIdleTaskHandle - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskCreateStatic - 0x0000000000000000 0xb2 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskCreate - 0x0000000000000000 0x8a Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvInitialiseNewTask - 0x0000000000000000 0x10c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvAddNewTaskToReadyList - 0x0000000000000000 0xe0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskDelete - 0x0000000000000000 0xe4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskDelayUntil - 0x0000000000000000 0xf4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskDelay - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.eTaskGetState - 0x0000000000000000 0xb0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.uxTaskPriorityGet - 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.uxTaskPriorityGetFromISR - 0x0000000000000000 0x58 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskPrioritySet - 0x0000000000000000 0x144 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskSuspend - 0x0000000000000000 0xe8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvTaskIsTaskSuspended - 0x0000000000000000 0x74 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskResume - 0x0000000000000000 0xbc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskResumeFromISR - 0x0000000000000000 0xe0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .rodata 0x0000000000000000 0x5 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskStartScheduler - 0x0000000000000000 0xc8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskEndScheduler - 0x0000000000000000 0x30 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskSuspendAll - 0x0000000000000000 0x1c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskResumeAll - 0x0000000000000000 0x138 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskGetTickCount - 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskGetTickCountFromISR - 0x0000000000000000 0x24 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.uxTaskGetNumberOfTasks - 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.pcTaskGetName - 0x0000000000000000 0x48 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.uxTaskGetSystemState - 0x0000000000000000 0x11c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskPlaceOnEventList - 0x0000000000000000 0x48 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskPlaceOnUnorderedEventList - 0x0000000000000000 0x74 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskPlaceOnEventListRestricted - 0x0000000000000000 0x54 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskRemoveFromEventList - 0x0000000000000000 0xc4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskRemoveFromUnorderedEventList - 0x0000000000000000 0xc0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskSetTimeOutState - 0x0000000000000000 0x4c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskInternalSetTimeOutState - 0x0000000000000000 0x2c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskCheckForTimeOut - 0x0000000000000000 0xc0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskMissedYield - 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.uxTaskGetTaskNumber - 0x0000000000000000 0x2c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskSetTaskNumber - 0x0000000000000000 0x26 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvIdleTask - 0x0000000000000000 0x30 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvInitialiseTaskLists - 0x0000000000000000 0x80 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvCheckTasksWaitingTermination - 0x0000000000000000 0x58 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskGetInfo - 0x0000000000000000 0xcc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvListTasksWithinSingleList - 0x0000000000000000 0xa4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvTaskCheckFreeStackSpace - 0x0000000000000000 0x38 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.uxTaskGetStackHighWaterMark - 0x0000000000000000 0x38 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvDeleteTCB - 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskGetCurrentTaskHandle - 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskGetSchedulerState - 0x0000000000000000 0x3c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskPriorityInherit - 0x0000000000000000 0xdc Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskPriorityDisinherit - 0x0000000000000000 0xd8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskPriorityDisinheritAfterTimeout - 0x0000000000000000 0x108 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.uxTaskResetEventItemValue - 0x0000000000000000 0x30 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.pvTaskIncrementMutexHeldCount - 0x0000000000000000 0x28 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.ulTaskNotifyTake - 0x0000000000000000 0x90 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskNotifyWait - 0x0000000000000000 0xb4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskGenericNotify - 0x0000000000000000 0x144 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskGenericNotifyFromISR - 0x0000000000000000 0x190 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.vTaskNotifyGiveFromISR - 0x0000000000000000 0x120 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.xTaskNotifyStateClear - 0x0000000000000000 0x4c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.prvAddCurrentTaskToDelayedList - 0x0000000000000000 0xa8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x94 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x3c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x10e Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x8d Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x57 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x52 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x43 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x330 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x29 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x35 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x0000000000000000 0x91 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss.xActiveTimerList1 - 0x0000000000000000 0x14 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss.xActiveTimerList2 - 0x0000000000000000 0x14 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss.pxCurrentTimerList - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss.pxOverflowTimerList - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss.xTimerQueue - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss.xTimerTaskHandle - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .rodata 0x0000000000000000 0xd Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerCreateTimerTask - 0x0000000000000000 0x90 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerCreate - 0x0000000000000000 0x42 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerCreateStatic - 0x0000000000000000 0x76 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvInitialiseNewTimer - 0x0000000000000000 0x62 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerGenericCommand - 0x0000000000000000 0x98 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerGetTimerDaemonTaskHandle - 0x0000000000000000 0x38 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerGetPeriod - 0x0000000000000000 0x36 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerGetExpiryTime - 0x0000000000000000 0x3a Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.pcTimerGetName - 0x0000000000000000 0x36 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvProcessExpiredTimer - 0x0000000000000000 0x80 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvTimerTask - 0x0000000000000000 0x24 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvProcessTimerOrBlockTask - 0x0000000000000000 0x9c Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvGetNextExpireTime - 0x0000000000000000 0x48 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvSampleTimeNow - 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvInsertTimerInActiveList - 0x0000000000000000 0x84 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvProcessReceivedCommands - 0x0000000000000000 0x160 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvSwitchTimerLists - 0x0000000000000000 0xc0 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.prvCheckForValidListAndQueue - 0x0000000000000000 0x80 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerIsTimerActive - 0x0000000000000000 0x48 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.pvTimerGetTimerID - 0x0000000000000000 0x3e Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.vTimerSetTimerID - 0x0000000000000000 0x3e Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerPendFunctionCallFromISR - 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.xTimerPendFunctionCall - 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.uxTimerGetTimerNumber - 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .text.vTimerSetTimerNumber - 0x0000000000000000 0x1c Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss.xLastTime.6727 - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss.ucStaticTimerQueueStorage.6778 - 0x0000000000000000 0xa0 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .bss.xStaticTimerQueue.6777 - 0x0000000000000000 0x50 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_info 0x0000000000000000 0x1a21 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_abbrev 0x0000000000000000 0x2d7 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_aranges - 0x0000000000000000 0xe0 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_ranges 0x0000000000000000 0xd0 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x1bd Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x94 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x3c Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x10e Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x8d Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x57 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x52 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x43 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x330 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x29 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x8d Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_macro 0x0000000000000000 0x91 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_line 0x0000000000000000 0xa23 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_str 0x0000000000000000 0xc12b Middlewares/Third_Party/FreeRTOS/Source/timers.o - .comment 0x0000000000000000 0x7c Middlewares/Third_Party/FreeRTOS/Source/timers.o - .debug_frame 0x0000000000000000 0x3b4 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .ARM.attributes - 0x0000000000000000 0x39 Middlewares/Third_Party/FreeRTOS/Source/timers.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .data.uxCriticalNesting - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .bss.ucMaxSysCallPriority - 0x0000000000000000 0x1 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .bss.ulMaxPRIGROUPValue - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .rodata.pcInterruptPriorityRegisters - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.pxPortInitialiseStack - 0x0000000000000000 0x68 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.prvTaskExitError - 0x0000000000000000 0x54 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.prvPortStartFirstTask - 0x0000000000000000 0x28 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.xPortStartScheduler - 0x0000000000000000 0x13c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.vPortEndScheduler - 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.vPortEnterCritical - 0x0000000000000000 0x5c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.vPortExitCritical - 0x0000000000000000 0x50 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.vPortSetupTimerInterrupt - 0x0000000000000000 0x48 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.vPortEnableVFP - 0x0000000000000000 0x14 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .text.vPortValidateInterruptPriority - 0x0000000000000000 0x7c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x174 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x8e Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x51 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .text 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .data 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .bss 0x0000000000000000 0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .bss.ucHeap 0x0000000000000000 0xc00 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .rodata.xHeapStructSize - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .bss.xStart 0x0000000000000000 0x8 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .bss.pxEnd 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .bss.xFreeBytesRemaining - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .bss.xMinimumEverFreeBytesRemaining - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .bss.xBlockAllocatedBit - 0x0000000000000000 0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .text.pvPortMalloc - 0x0000000000000000 0x184 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .text.vPortFree - 0x0000000000000000 0xb0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .text.xPortGetFreeHeapSize - 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .text.xPortGetMinimumEverFreeHeapSize - 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .text.vPortInitialiseBlocks - 0x0000000000000000 0xe Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .text.prvHeapInit - 0x0000000000000000 0xc4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .text.prvInsertBlockIntoFreeList - 0x0000000000000000 0xb4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_info 0x0000000000000000 0xbea Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_abbrev 0x0000000000000000 0x29e Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_aranges - 0x0000000000000000 0x50 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_ranges 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x1a1 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0xa5a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x18 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x22 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x40 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x94 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x3c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x34 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x10e Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x8d Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x57 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x52 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x43 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x20 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x1a3 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x330 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x16 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x29 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0xef Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x6a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x1df Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x122 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x15a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0xc2 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x10 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x1f Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x47f Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0xb5 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_macro 0x0000000000000000 0x8c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_line 0x0000000000000000 0x752 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_str 0x0000000000000000 0xab06 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .comment 0x0000000000000000 0x7c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .debug_frame 0x0000000000000000 0x108 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .ARM.attributes - 0x0000000000000000 0x39 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usb_device.o - .text 0x0000000000000000 0x0 USB_DEVICE/App/usb_device.o - .data 0x0000000000000000 0x0 USB_DEVICE/App/usb_device.o - .bss 0x0000000000000000 0x0 USB_DEVICE/App/usb_device.o - .text.MX_USB_DEVICE_Init - 0x0000000000000000 0x60 USB_DEVICE/App/usb_device.o - .debug_info 0x0000000000000000 0x11f0 USB_DEVICE/App/usb_device.o - .debug_abbrev 0x0000000000000000 0x1be USB_DEVICE/App/usb_device.o - .debug_aranges - 0x0000000000000000 0x20 USB_DEVICE/App/usb_device.o - .debug_ranges 0x0000000000000000 0x10 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x49c USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0xa5a USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x2e USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x28 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x22 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x8e USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x51 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0xef USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x6a USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1df USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x22 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0xdf USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x102d USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x11f USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x12a33 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x43 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x16f USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x174 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x53 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x962 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x5fe USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x12f USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1fb USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1dc USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1bc USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x30 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x3c USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x236 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x9b1 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x77 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x73 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x58d USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x12 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0xc5 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x21d USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x22c USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x58 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0xa5 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x17d USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x65 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x249 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x81 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0xd3 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x9e9 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x89 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x589 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x3e USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x275 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x46 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x18 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x3c USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x34 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x35 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x32a USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x52 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1f USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x43 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x20 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1a3 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x52 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0xd7 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x3d USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x145 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x29 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x20 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x59 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x1c8 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x22 USB_DEVICE/App/usb_device.o - .debug_macro 0x0000000000000000 0x8f USB_DEVICE/App/usb_device.o - .debug_line 0x0000000000000000 0xb1b USB_DEVICE/App/usb_device.o - .debug_str 0x0000000000000000 0xac6e1 USB_DEVICE/App/usb_device.o - .comment 0x0000000000000000 0x7c USB_DEVICE/App/usb_device.o - .debug_frame 0x0000000000000000 0x2c USB_DEVICE/App/usb_device.o - .ARM.attributes - 0x0000000000000000 0x39 USB_DEVICE/App/usb_device.o - COMMON 0x0000000000000000 0x2c4 USB_DEVICE/App/usb_device.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_cdc_if.o - .text 0x0000000000000000 0x0 USB_DEVICE/App/usbd_cdc_if.o - .data 0x0000000000000000 0x0 USB_DEVICE/App/usbd_cdc_if.o - .bss 0x0000000000000000 0x0 USB_DEVICE/App/usbd_cdc_if.o - .data.USBD_Interface_fops_FS - 0x0000000000000000 0x10 USB_DEVICE/App/usbd_cdc_if.o - .text.CDC_Init_FS - 0x0000000000000000 0x28 USB_DEVICE/App/usbd_cdc_if.o - .text.CDC_DeInit_FS - 0x0000000000000000 0x10 USB_DEVICE/App/usbd_cdc_if.o - .text.CDC_Control_FS - 0x0000000000000000 0xbc USB_DEVICE/App/usbd_cdc_if.o - .text.CDC_Receive_FS - 0x0000000000000000 0x28 USB_DEVICE/App/usbd_cdc_if.o - .text.CDC_Transmit_FS - 0x0000000000000000 0x4c USB_DEVICE/App/usbd_cdc_if.o - .debug_info 0x0000000000000000 0x13ab USB_DEVICE/App/usbd_cdc_if.o - .debug_abbrev 0x0000000000000000 0x285 USB_DEVICE/App/usbd_cdc_if.o - .debug_aranges - 0x0000000000000000 0x40 USB_DEVICE/App/usbd_cdc_if.o - .debug_ranges 0x0000000000000000 0x30 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x487 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0xa5a USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x22 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x18 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x94 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x3c USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x34 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x57 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x97 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x330 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0xfd USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x52 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1f USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x43 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x20 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1a3 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x6a USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x52 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0xd7 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x3d USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x145 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x35 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x29 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x20 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x16f USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x2e USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x28 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0xef USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1df USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x22 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0xd9 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x102d USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x11f USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x12a33 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x43 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x4d USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x962 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x5fe USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x12f USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1fb USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1dc USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1bc USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x30 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x3c USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x236 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x9b1 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x77 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x73 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x58d USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x12 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0xc5 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x21d USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x22c USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x58 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0xa5 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x17d USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x65 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x249 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x81 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0xd3 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x9e9 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x89 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x589 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x3e USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x275 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x59 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x1c8 USB_DEVICE/App/usbd_cdc_if.o - .debug_macro 0x0000000000000000 0x8f USB_DEVICE/App/usbd_cdc_if.o - .debug_line 0x0000000000000000 0xb4e USB_DEVICE/App/usbd_cdc_if.o - .debug_str 0x0000000000000000 0xac745 USB_DEVICE/App/usbd_cdc_if.o - .comment 0x0000000000000000 0x7c USB_DEVICE/App/usbd_cdc_if.o - .debug_frame 0x0000000000000000 0xbc USB_DEVICE/App/usbd_cdc_if.o - .ARM.attributes - 0x0000000000000000 0x39 USB_DEVICE/App/usbd_cdc_if.o - COMMON 0x0000000000000000 0x7d0 USB_DEVICE/App/usbd_cdc_if.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/App/usbd_desc.o - .text 0x0000000000000000 0x0 USB_DEVICE/App/usbd_desc.o - .data 0x0000000000000000 0x0 USB_DEVICE/App/usbd_desc.o - .bss 0x0000000000000000 0x0 USB_DEVICE/App/usbd_desc.o - .data.FS_Desc 0x0000000000000000 0x1c USB_DEVICE/App/usbd_desc.o - .data.USBD_FS_DeviceDesc - 0x0000000000000000 0x12 USB_DEVICE/App/usbd_desc.o - .data.USBD_LangIDDesc - 0x0000000000000000 0x4 USB_DEVICE/App/usbd_desc.o - .data.USBD_StringSerial - 0x0000000000000000 0x1a USB_DEVICE/App/usbd_desc.o - .text.USBD_FS_DeviceDescriptor - 0x0000000000000000 0x24 USB_DEVICE/App/usbd_desc.o - .text.USBD_FS_LangIDStrDescriptor - 0x0000000000000000 0x24 USB_DEVICE/App/usbd_desc.o - .rodata 0x0000000000000000 0x46 USB_DEVICE/App/usbd_desc.o - .text.USBD_FS_ProductStrDescriptor - 0x0000000000000000 0x3c USB_DEVICE/App/usbd_desc.o - .text.USBD_FS_ManufacturerStrDescriptor - 0x0000000000000000 0x28 USB_DEVICE/App/usbd_desc.o - .text.USBD_FS_SerialStrDescriptor - 0x0000000000000000 0x24 USB_DEVICE/App/usbd_desc.o - .text.USBD_FS_ConfigStrDescriptor - 0x0000000000000000 0x3c USB_DEVICE/App/usbd_desc.o - .text.USBD_FS_InterfaceStrDescriptor - 0x0000000000000000 0x3c USB_DEVICE/App/usbd_desc.o - .text.Get_SerialNum - 0x0000000000000000 0x58 USB_DEVICE/App/usbd_desc.o - .text.IntToUnicode - 0x0000000000000000 0x7c USB_DEVICE/App/usbd_desc.o - .debug_info 0x0000000000000000 0x108c USB_DEVICE/App/usbd_desc.o - .debug_abbrev 0x0000000000000000 0x2a1 USB_DEVICE/App/usbd_desc.o - .debug_aranges - 0x0000000000000000 0x60 USB_DEVICE/App/usbd_desc.o - .debug_ranges 0x0000000000000000 0x50 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x499 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0xa5a USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x22 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x18 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x94 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x3c USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x34 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x57 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x97 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x330 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0xfd USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x52 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1f USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x43 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x20 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1a3 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x6a USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x52 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0xd7 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x3d USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x145 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x35 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x29 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x20 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x16f USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x2e USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x28 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0xef USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1df USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x22 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0xd9 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x102d USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x11f USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x12a33 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x43 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x4d USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x962 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x5fe USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x12f USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1fb USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1dc USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1bc USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x30 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x3c USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x236 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x9b1 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x77 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x73 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x58d USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x12 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0xc5 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x21d USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x22c USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x58 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0xa5 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x17d USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x65 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x249 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x81 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0xd3 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x9e9 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x89 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x589 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x3e USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x275 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x59 USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1ce USB_DEVICE/App/usbd_desc.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/App/usbd_desc.o - .debug_line 0x0000000000000000 0xb6d USB_DEVICE/App/usbd_desc.o - .debug_str 0x0000000000000000 0xac311 USB_DEVICE/App/usbd_desc.o - .comment 0x0000000000000000 0x7c USB_DEVICE/App/usbd_desc.o - .debug_frame 0x0000000000000000 0x160 USB_DEVICE/App/usbd_desc.o - .ARM.attributes - 0x0000000000000000 0x39 USB_DEVICE/App/usbd_desc.o - COMMON 0x0000000000000000 0x200 USB_DEVICE/App/usbd_desc.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .group 0x0000000000000000 0xc USB_DEVICE/Target/usbd_conf.o - .text 0x0000000000000000 0x0 USB_DEVICE/Target/usbd_conf.o - .data 0x0000000000000000 0x0 USB_DEVICE/Target/usbd_conf.o - .bss 0x0000000000000000 0x0 USB_DEVICE/Target/usbd_conf.o - .text.HAL_PCD_MspInit - 0x0000000000000000 0x98 USB_DEVICE/Target/usbd_conf.o - .text.HAL_PCD_MspDeInit - 0x0000000000000000 0x40 USB_DEVICE/Target/usbd_conf.o - .text.HAL_PCD_ISOOUTIncompleteCallback - 0x0000000000000000 0x24 USB_DEVICE/Target/usbd_conf.o - .text.HAL_PCD_ISOINIncompleteCallback - 0x0000000000000000 0x24 USB_DEVICE/Target/usbd_conf.o - .text.HAL_PCD_ConnectCallback - 0x0000000000000000 0x1c USB_DEVICE/Target/usbd_conf.o - .text.HAL_PCD_DisconnectCallback - 0x0000000000000000 0x1c USB_DEVICE/Target/usbd_conf.o - .text.USBD_LL_Init - 0x0000000000000000 0xb4 USB_DEVICE/Target/usbd_conf.o - .text.USBD_LL_DeInit - 0x0000000000000000 0x36 USB_DEVICE/Target/usbd_conf.o - .text.USBD_LL_Start - 0x0000000000000000 0x36 USB_DEVICE/Target/usbd_conf.o - .text.USBD_LL_Stop - 0x0000000000000000 0x36 USB_DEVICE/Target/usbd_conf.o - .text.USBD_LL_CloseEP - 0x0000000000000000 0x3e USB_DEVICE/Target/usbd_conf.o - .text.USBD_LL_FlushEP - 0x0000000000000000 0x3e USB_DEVICE/Target/usbd_conf.o - .text.USBD_LL_GetRxDataSize - 0x0000000000000000 0x26 USB_DEVICE/Target/usbd_conf.o - .text.USBD_LL_Delay - 0x0000000000000000 0x16 USB_DEVICE/Target/usbd_conf.o - .text.USBD_static_malloc - 0x0000000000000000 0x1c USB_DEVICE/Target/usbd_conf.o - .text.USBD_static_free - 0x0000000000000000 0x14 USB_DEVICE/Target/usbd_conf.o - .text.HAL_PCDEx_SetConnectionState - 0x0000000000000000 0x18 USB_DEVICE/Target/usbd_conf.o - .bss.mem.10857 - 0x0000000000000000 0x220 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0xa5a USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x2e USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x28 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x22 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x8e USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x51 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0xef USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x6a USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1df USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x22 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0xdf USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x102d USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x11f USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x12a33 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x43 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x16f USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x174 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x53 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x962 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x5fe USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x12f USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1fb USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1dc USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1bc USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x30 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x3c USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x236 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x9b1 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x77 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x73 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x58d USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x12 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0xc5 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x21d USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x22c USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x58 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0xa5 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x17d USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x65 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x249 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x81 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0xd3 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x9e9 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x89 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x589 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x3e USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x275 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x46 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x18 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x3c USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x34 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x35 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x32a USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x52 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1f USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x43 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x20 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1a3 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x52 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x10 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x40 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0xd7 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x3d USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x145 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x29 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x16 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x20 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1c USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x59 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x1c8 USB_DEVICE/Target/usbd_conf.o - .debug_macro 0x0000000000000000 0x8f USB_DEVICE/Target/usbd_conf.o - .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o) - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o) - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o) - .text.__errno 0x0000000000000000 0xc c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o) - .debug_frame 0x0000000000000000 0x20 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o) - .ARM.attributes - 0x0000000000000000 0x34 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-errno.o) - .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) - .text.exit 0x0000000000000000 0x28 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) - .debug_frame 0x0000000000000000 0x28 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) - .ARM.attributes - 0x0000000000000000 0x34 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) - .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o) - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o) - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o) - .data._impure_ptr - 0x0000000000000000 0x4 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o) - .data.impure_data - 0x0000000000000000 0x60 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o) - .rodata._global_impure_ptr - 0x0000000000000000 0x4 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o) - .ARM.attributes - 0x0000000000000000 0x34 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o) - .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) - .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o) - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o) - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o) - .text.memcpy 0x0000000000000000 0x16 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o) - .debug_frame 0x0000000000000000 0x28 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o) - .ARM.attributes - 0x0000000000000000 0x34 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o) - .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o) - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o) - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o) - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_addsubdf3.o) - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_addsubdf3.o) - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_muldivdf3.o) - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_muldivdf3.o) - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_truncdfsf2.o) - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_truncdfsf2.o) - .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o - .eh_frame 0x0000000000000000 0x4 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o - .ARM.attributes - 0x0000000000000000 0x34 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o - .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o - .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o - .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o - -Memory Configuration - -Name Origin Length Attributes -CCMRAM 0x0000000010000000 0x0000000000002000 xrw -RAM 0x0000000020000000 0x0000000000008000 xrw -FLASH 0x0000000008000000 0x0000000000020000 xr -*default* 0x0000000000000000 0xffffffffffffffff - -Linker script and memory map - -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o -LOAD Core/Src/MESCBLDC.o -LOAD Core/Src/MESCfoc.o -LOAD Core/Src/MESChw_setup.o -LOAD Core/Src/MESCmotor_state.o -LOAD Core/Src/freertos.o -LOAD Core/Src/main.o -LOAD Core/Src/stm32f3xx_hal_msp.o -LOAD Core/Src/stm32f3xx_hal_timebase_tim.o -LOAD Core/Src/stm32f3xx_it.o -LOAD Core/Src/syscalls.o -LOAD Core/Src/sysmem.o -LOAD Core/Src/system_stm32f3xx.o -LOAD Core/Startup/startup_stm32f303cbtx.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o -LOAD Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o -LOAD Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o -LOAD Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o -LOAD Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o -LOAD Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/croutine.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/event_groups.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/list.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/queue.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/tasks.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/timers.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o -LOAD Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o -LOAD USB_DEVICE/App/usb_device.o -LOAD USB_DEVICE/App/usbd_cdc_if.o -LOAD USB_DEVICE/App/usbd_desc.o -LOAD USB_DEVICE/Target/usbd_conf.o -START GROUP -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libm.a -END GROUP -START GROUP -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a -END GROUP -START GROUP -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a -END GROUP -START GROUP -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a -END GROUP -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o -LOAD c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o - 0x0000000020008000 _estack = (ORIGIN (RAM) + LENGTH (RAM)) - 0x0000000000000200 _Min_Heap_Size = 0x200 - 0x0000000000000400 _Min_Stack_Size = 0x400 - -.isr_vector 0x0000000008000000 0x188 - 0x0000000008000000 . = ALIGN (0x4) - *(.isr_vector) - .isr_vector 0x0000000008000000 0x188 Core/Startup/startup_stm32f303cbtx.o - 0x0000000008000000 g_pfnVectors - 0x0000000008000188 . = ALIGN (0x4) - -.text 0x0000000008000190 0xbd5c - 0x0000000008000190 . = ALIGN (0x4) - *(.text) - .text 0x0000000008000190 0x40 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - .text 0x00000000080001d0 0x378 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_addsubdf3.o) - 0x00000000080001d0 __aeabi_drsub - 0x00000000080001d8 __aeabi_dsub - 0x00000000080001d8 __subdf3 - 0x00000000080001dc __aeabi_dadd - 0x00000000080001dc __adddf3 - 0x0000000008000454 __floatunsidf - 0x0000000008000454 __aeabi_ui2d - 0x0000000008000474 __floatsidf - 0x0000000008000474 __aeabi_i2d - 0x0000000008000498 __aeabi_f2d - 0x0000000008000498 __extendsfdf2 - 0x00000000080004dc __floatundidf - 0x00000000080004dc __aeabi_ul2d - 0x00000000080004ec __floatdidf - 0x00000000080004ec __aeabi_l2d - .text 0x0000000008000548 0x424 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_muldivdf3.o) - 0x0000000008000548 __aeabi_dmul - 0x0000000008000548 __muldf3 - 0x000000000800079c __divdf3 - 0x000000000800079c __aeabi_ddiv - .text 0x000000000800096c 0xa0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_truncdfsf2.o) - 0x000000000800096c __truncdfsf2 - 0x000000000800096c __aeabi_d2f - *(.text*) - .text.BLDCInit - 0x0000000008000a0c 0x70 Core/Src/MESCBLDC.o - 0x0000000008000a0c BLDCInit - .text.BLDCCommuteHall - 0x0000000008000a7c 0x114 Core/Src/MESCBLDC.o - 0x0000000008000a7c BLDCCommuteHall - .text.BLDCCurrentController - 0x0000000008000b90 0x134 Core/Src/MESCBLDC.o - 0x0000000008000b90 BLDCCurrentController - .text.writeBLDC - 0x0000000008000cc4 0x11c Core/Src/MESCBLDC.o - 0x0000000008000cc4 writeBLDC - .text.ADCConversion - 0x0000000008000de0 0x18c Core/Src/MESCfoc.o - 0x0000000008000de0 ADCConversion - .text.GetHallState - 0x0000000008000f6c 0x68 Core/Src/MESCfoc.o - 0x0000000008000f6c GetHallState - .text.phU_Break - 0x0000000008000fd4 0x74 Core/Src/MESCfoc.o - 0x0000000008000fd4 phU_Break - .text.phU_Enable - 0x0000000008001048 0x74 Core/Src/MESCfoc.o - 0x0000000008001048 phU_Enable - .text.phV_Break - 0x00000000080010bc 0x74 Core/Src/MESCfoc.o - 0x00000000080010bc phV_Break - .text.phV_Enable - 0x0000000008001130 0x74 Core/Src/MESCfoc.o - 0x0000000008001130 phV_Enable - .text.phW_Break - 0x00000000080011a4 0x74 Core/Src/MESCfoc.o - 0x00000000080011a4 phW_Break - .text.phW_Enable - 0x0000000008001218 0x74 Core/Src/MESCfoc.o - 0x0000000008001218 phW_Enable - .text.motor_init - 0x000000000800128c 0x38 Core/Src/MESChw_setup.o - 0x000000000800128c motor_init - *fill* 0x00000000080012c4 0x4 - .text.hw_init 0x00000000080012c8 0xd4 Core/Src/MESChw_setup.o - 0x00000000080012c8 hw_init - .text.HAL_TIM_IC_CaptureCallback - 0x000000000800139c 0x12c Core/Src/main.o - 0x000000000800139c HAL_TIM_IC_CaptureCallback - .text.main 0x00000000080014c8 0x1d0 Core/Src/main.o - 0x00000000080014c8 main - .text.SystemClock_Config - 0x0000000008001698 0xd4 Core/Src/main.o - 0x0000000008001698 SystemClock_Config - .text.MX_ADC1_Init - 0x000000000800176c 0x164 Core/Src/main.o - .text.MX_ADC2_Init - 0x00000000080018d0 0xfc Core/Src/main.o - .text.MX_ADC3_Init - 0x00000000080019cc 0xe4 Core/Src/main.o - .text.MX_COMP1_Init - 0x0000000008001ab0 0x60 Core/Src/main.o - .text.MX_COMP2_Init - 0x0000000008001b10 0x60 Core/Src/main.o - .text.MX_COMP4_Init - 0x0000000008001b70 0x60 Core/Src/main.o - .text.MX_COMP7_Init - 0x0000000008001bd0 0x60 Core/Src/main.o - .text.MX_I2C1_Init - 0x0000000008001c30 0x7c Core/Src/main.o - .text.MX_OPAMP1_Init - 0x0000000008001cac 0x4c Core/Src/main.o - .text.MX_OPAMP2_Init - 0x0000000008001cf8 0x4c Core/Src/main.o - .text.MX_OPAMP3_Init - 0x0000000008001d44 0x4c Core/Src/main.o - .text.MX_TIM1_Init - 0x0000000008001d90 0x174 Core/Src/main.o - .text.MX_TIM3_Init - 0x0000000008001f04 0x10c Core/Src/main.o - .text.MX_TIM4_Init - 0x0000000008002010 0x12c Core/Src/main.o - .text.MX_USART3_UART_Init - 0x000000000800213c 0x60 Core/Src/main.o - .text.MX_DMA_Init - 0x000000000800219c 0xb4 Core/Src/main.o - .text.MX_GPIO_Init - 0x0000000008002250 0x60 Core/Src/main.o - .text.HAL_TIM_PeriodElapsedCallback - 0x00000000080022b0 0x24 Core/Src/main.o - 0x00000000080022b0 HAL_TIM_PeriodElapsedCallback - .text.Error_Handler - 0x00000000080022d4 0xe Core/Src/main.o - 0x00000000080022d4 Error_Handler - *fill* 0x00000000080022e2 0x2 - .text.HAL_MspInit - 0x00000000080022e4 0x50 Core/Src/stm32f3xx_hal_msp.o - 0x00000000080022e4 HAL_MspInit - .text.HAL_ADC_MspInit - 0x0000000008002334 0x250 Core/Src/stm32f3xx_hal_msp.o - 0x0000000008002334 HAL_ADC_MspInit - .text.HAL_COMP_MspInit - 0x0000000008002584 0x12c Core/Src/stm32f3xx_hal_msp.o - 0x0000000008002584 HAL_COMP_MspInit - .text.HAL_I2C_MspInit - 0x00000000080026b0 0x170 Core/Src/stm32f3xx_hal_msp.o - 0x00000000080026b0 HAL_I2C_MspInit - .text.HAL_OPAMP_MspInit - 0x0000000008002820 0xec Core/Src/stm32f3xx_hal_msp.o - 0x0000000008002820 HAL_OPAMP_MspInit - .text.HAL_TIM_PWM_MspInit - 0x000000000800290c 0x40 Core/Src/stm32f3xx_hal_msp.o - 0x000000000800290c HAL_TIM_PWM_MspInit - .text.HAL_TIM_Base_MspInit - 0x000000000800294c 0xf8 Core/Src/stm32f3xx_hal_msp.o - 0x000000000800294c HAL_TIM_Base_MspInit - .text.HAL_TIM_MspPostInit - 0x0000000008002a44 0xd0 Core/Src/stm32f3xx_hal_msp.o - 0x0000000008002a44 HAL_TIM_MspPostInit - .text.HAL_UART_MspInit - 0x0000000008002b14 0x154 Core/Src/stm32f3xx_hal_msp.o - 0x0000000008002b14 HAL_UART_MspInit - .text.HAL_InitTick - 0x0000000008002c68 0xb0 Core/Src/stm32f3xx_hal_timebase_tim.o - 0x0000000008002c68 HAL_InitTick - .text.NMI_Handler - 0x0000000008002d18 0xe Core/Src/stm32f3xx_it.o - 0x0000000008002d18 NMI_Handler - .text.HardFault_Handler - 0x0000000008002d26 0x6 Core/Src/stm32f3xx_it.o - 0x0000000008002d26 HardFault_Handler - .text.MemManage_Handler - 0x0000000008002d2c 0x6 Core/Src/stm32f3xx_it.o - 0x0000000008002d2c MemManage_Handler - .text.BusFault_Handler - 0x0000000008002d32 0x6 Core/Src/stm32f3xx_it.o - 0x0000000008002d32 BusFault_Handler - .text.UsageFault_Handler - 0x0000000008002d38 0x6 Core/Src/stm32f3xx_it.o - 0x0000000008002d38 UsageFault_Handler - .text.DebugMon_Handler - 0x0000000008002d3e 0xe Core/Src/stm32f3xx_it.o - 0x0000000008002d3e DebugMon_Handler - .text.DMA1_Channel1_IRQHandler - 0x0000000008002d4c 0x5c Core/Src/stm32f3xx_it.o - 0x0000000008002d4c DMA1_Channel1_IRQHandler - .text.DMA1_Channel2_IRQHandler - 0x0000000008002da8 0x14 Core/Src/stm32f3xx_it.o - 0x0000000008002da8 DMA1_Channel2_IRQHandler - .text.DMA1_Channel3_IRQHandler - 0x0000000008002dbc 0x14 Core/Src/stm32f3xx_it.o - 0x0000000008002dbc DMA1_Channel3_IRQHandler - .text.DMA1_Channel6_IRQHandler - 0x0000000008002dd0 0x14 Core/Src/stm32f3xx_it.o - 0x0000000008002dd0 DMA1_Channel6_IRQHandler - .text.DMA1_Channel7_IRQHandler - 0x0000000008002de4 0x14 Core/Src/stm32f3xx_it.o - 0x0000000008002de4 DMA1_Channel7_IRQHandler - .text.ADC1_2_IRQHandler - 0x0000000008002df8 0x1c Core/Src/stm32f3xx_it.o - 0x0000000008002df8 ADC1_2_IRQHandler - .text.USB_LP_CAN_RX0_IRQHandler - 0x0000000008002e14 0x14 Core/Src/stm32f3xx_it.o - 0x0000000008002e14 USB_LP_CAN_RX0_IRQHandler - .text.TIM3_IRQHandler - 0x0000000008002e28 0x14 Core/Src/stm32f3xx_it.o - 0x0000000008002e28 TIM3_IRQHandler - .text.TIM7_IRQHandler - 0x0000000008002e3c 0x14 Core/Src/stm32f3xx_it.o - 0x0000000008002e3c TIM7_IRQHandler - .text.DMA2_Channel1_IRQHandler - 0x0000000008002e50 0x14 Core/Src/stm32f3xx_it.o - 0x0000000008002e50 DMA2_Channel1_IRQHandler - .text.DMA2_Channel5_IRQHandler - 0x0000000008002e64 0x14 Core/Src/stm32f3xx_it.o - 0x0000000008002e64 DMA2_Channel5_IRQHandler - .text.SystemInit - 0x0000000008002e78 0x2c Core/Src/system_stm32f3xx.o - 0x0000000008002e78 SystemInit - .text.Reset_Handler - 0x0000000008002ea4 0x50 Core/Startup/startup_stm32f303cbtx.o - 0x0000000008002ea4 Reset_Handler - .text.Default_Handler - 0x0000000008002ef4 0x2 Core/Startup/startup_stm32f303cbtx.o - 0x0000000008002ef4 RTC_Alarm_IRQHandler - 0x0000000008002ef4 TIM8_TRG_COM_IRQHandler - 0x0000000008002ef4 TIM8_CC_IRQHandler - 0x0000000008002ef4 TIM1_CC_IRQHandler - 0x0000000008002ef4 USB_HP_IRQHandler - 0x0000000008002ef4 PVD_IRQHandler - 0x0000000008002ef4 TAMP_STAMP_IRQHandler - 0x0000000008002ef4 EXTI3_IRQHandler - 0x0000000008002ef4 USB_HP_CAN_TX_IRQHandler - 0x0000000008002ef4 EXTI0_IRQHandler - 0x0000000008002ef4 I2C2_EV_IRQHandler - 0x0000000008002ef4 FPU_IRQHandler - 0x0000000008002ef4 TIM1_UP_TIM16_IRQHandler - 0x0000000008002ef4 SPI1_IRQHandler - 0x0000000008002ef4 CAN_SCE_IRQHandler - 0x0000000008002ef4 TIM6_DAC_IRQHandler - 0x0000000008002ef4 TIM8_UP_IRQHandler - 0x0000000008002ef4 DMA2_Channel2_IRQHandler - 0x0000000008002ef4 DMA1_Channel4_IRQHandler - 0x0000000008002ef4 USART3_IRQHandler - 0x0000000008002ef4 UART5_IRQHandler - 0x0000000008002ef4 ADC3_IRQHandler - 0x0000000008002ef4 TIM4_IRQHandler - 0x0000000008002ef4 CAN_RX1_IRQHandler - 0x0000000008002ef4 I2C1_EV_IRQHandler - 0x0000000008002ef4 UART4_IRQHandler - 0x0000000008002ef4 DMA2_Channel4_IRQHandler - 0x0000000008002ef4 RCC_IRQHandler - 0x0000000008002ef4 Default_Handler - 0x0000000008002ef4 USBWakeUp_RMP_IRQHandler - 0x0000000008002ef4 EXTI15_10_IRQHandler - 0x0000000008002ef4 EXTI9_5_IRQHandler - 0x0000000008002ef4 RTC_WKUP_IRQHandler - 0x0000000008002ef4 SPI2_IRQHandler - 0x0000000008002ef4 DMA1_Channel5_IRQHandler - 0x0000000008002ef4 USB_LP_IRQHandler - 0x0000000008002ef4 EXTI4_IRQHandler - 0x0000000008002ef4 TIM1_TRG_COM_TIM17_IRQHandler - 0x0000000008002ef4 ADC4_IRQHandler - 0x0000000008002ef4 WWDG_IRQHandler - 0x0000000008002ef4 TIM2_IRQHandler - 0x0000000008002ef4 COMP7_IRQHandler - 0x0000000008002ef4 COMP1_2_3_IRQHandler - 0x0000000008002ef4 EXTI1_IRQHandler - 0x0000000008002ef4 USART2_IRQHandler - 0x0000000008002ef4 COMP4_5_6_IRQHandler - 0x0000000008002ef4 I2C2_ER_IRQHandler - 0x0000000008002ef4 TIM8_BRK_IRQHandler - 0x0000000008002ef4 FLASH_IRQHandler - 0x0000000008002ef4 USART1_IRQHandler - 0x0000000008002ef4 SPI3_IRQHandler - 0x0000000008002ef4 I2C1_ER_IRQHandler - 0x0000000008002ef4 USBWakeUp_IRQHandler - 0x0000000008002ef4 DMA2_Channel3_IRQHandler - 0x0000000008002ef4 EXTI2_TSC_IRQHandler - 0x0000000008002ef4 TIM1_BRK_TIM15_IRQHandler - *fill* 0x0000000008002ef6 0x2 - .text.HAL_Init - 0x0000000008002ef8 0x2c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x0000000008002ef8 HAL_Init - .text.HAL_IncTick - 0x0000000008002f24 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x0000000008002f24 HAL_IncTick - .text.HAL_GetTick - 0x0000000008002f4c 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x0000000008002f4c HAL_GetTick - .text.HAL_Delay - 0x0000000008002f64 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x0000000008002f64 HAL_Delay - .text.HAL_ADC_ConvCpltCallback - 0x0000000008002fa8 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - 0x0000000008002fa8 HAL_ADC_ConvCpltCallback - .text.HAL_ADC_ConvHalfCpltCallback - 0x0000000008002fbc 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - 0x0000000008002fbc HAL_ADC_ConvHalfCpltCallback - .text.HAL_ADC_LevelOutOfWindowCallback - 0x0000000008002fd0 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - 0x0000000008002fd0 HAL_ADC_LevelOutOfWindowCallback - .text.HAL_ADC_ErrorCallback - 0x0000000008002fe4 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - 0x0000000008002fe4 HAL_ADC_ErrorCallback - .text.HAL_ADC_Init - 0x0000000008002ff8 0x3c0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x0000000008002ff8 HAL_ADC_Init - .text.HAL_ADC_Start_DMA - 0x00000000080033b8 0x238 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x00000000080033b8 HAL_ADC_Start_DMA - .text.HAL_ADC_IRQHandler - 0x00000000080035f0 0x618 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x00000000080035f0 HAL_ADC_IRQHandler - .text.HAL_ADCEx_Calibration_Start - 0x0000000008003c08 0xd4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x0000000008003c08 HAL_ADCEx_Calibration_Start - .text.HAL_ADCEx_InjectedConvCpltCallback - 0x0000000008003cdc 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x0000000008003cdc HAL_ADCEx_InjectedConvCpltCallback - .text.HAL_ADCEx_InjectedQueueOverflowCallback - 0x0000000008003cf0 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x0000000008003cf0 HAL_ADCEx_InjectedQueueOverflowCallback - .text.HAL_ADCEx_LevelOutOfWindow2Callback - 0x0000000008003d04 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x0000000008003d04 HAL_ADCEx_LevelOutOfWindow2Callback - .text.HAL_ADCEx_LevelOutOfWindow3Callback - 0x0000000008003d18 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x0000000008003d18 HAL_ADCEx_LevelOutOfWindow3Callback - .text.HAL_ADC_ConfigChannel - 0x0000000008003d2c 0x5d8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x0000000008003d2c HAL_ADC_ConfigChannel - .text.HAL_ADC_AnalogWDGConfig - 0x0000000008004304 0x2a0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x0000000008004304 HAL_ADC_AnalogWDGConfig - .text.HAL_ADCEx_MultiModeConfigChannel - 0x00000000080045a4 0x1e4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0x00000000080045a4 HAL_ADCEx_MultiModeConfigChannel - .text.ADC_DMAConvCplt - 0x0000000008004788 0x7a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.ADC_DMAHalfConvCplt - 0x0000000008004802 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.ADC_DMAError - 0x000000000800481e 0x34 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - *fill* 0x0000000008004852 0x2 - .text.ADC_Enable - 0x0000000008004854 0xbc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .text.ADC_Disable - 0x0000000008004910 0xbe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - *fill* 0x00000000080049ce 0x2 - .text.HAL_COMP_Init - 0x00000000080049d0 0x100 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - 0x00000000080049d0 HAL_COMP_Init - .text.__NVIC_SetPriorityGrouping - 0x0000000008004ad0 0x48 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_GetPriorityGrouping - 0x0000000008004b18 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_EnableIRQ - 0x0000000008004b34 0x3c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.__NVIC_SetPriority - 0x0000000008004b70 0x54 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.NVIC_EncodePriority - 0x0000000008004bc4 0x66 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .text.HAL_NVIC_SetPriorityGrouping - 0x0000000008004c2a 0x16 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - 0x0000000008004c2a HAL_NVIC_SetPriorityGrouping - .text.HAL_NVIC_SetPriority - 0x0000000008004c40 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - 0x0000000008004c40 HAL_NVIC_SetPriority - .text.HAL_NVIC_EnableIRQ - 0x0000000008004c78 0x1c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - 0x0000000008004c78 HAL_NVIC_EnableIRQ - .text.HAL_DMA_Init - 0x0000000008004c94 0x8e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - 0x0000000008004c94 HAL_DMA_Init - .text.HAL_DMA_Start_IT - 0x0000000008004d22 0xbe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - 0x0000000008004d22 HAL_DMA_Start_IT - .text.HAL_DMA_IRQHandler - 0x0000000008004de0 0x146 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - 0x0000000008004de0 HAL_DMA_IRQHandler - .text.DMA_SetConfig - 0x0000000008004f26 0x5c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - *fill* 0x0000000008004f82 0x2 - .text.DMA_CalcBaseAndBitshift - 0x0000000008004f84 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .text.HAL_GPIO_Init - 0x0000000008004ffc 0x2f4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - 0x0000000008004ffc HAL_GPIO_Init - .text.HAL_I2C_Init - 0x00000000080052f0 0x11e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - 0x00000000080052f0 HAL_I2C_Init - .text.HAL_I2CEx_ConfigAnalogFilter - 0x000000000800540e 0x96 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - 0x000000000800540e HAL_I2CEx_ConfigAnalogFilter - .text.HAL_I2CEx_ConfigDigitalFilter - 0x00000000080054a4 0x98 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - 0x00000000080054a4 HAL_I2CEx_ConfigDigitalFilter - .text.HAL_OPAMP_Init - 0x000000000800553c 0x14c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - 0x000000000800553c HAL_OPAMP_Init - .text.HAL_OPAMP_Start - 0x0000000008005688 0x62 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - 0x0000000008005688 HAL_OPAMP_Start - .text.HAL_PCD_IRQHandler - 0x00000000080056ea 0x204 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - 0x00000000080056ea HAL_PCD_IRQHandler - .text.HAL_PCD_SetAddress - 0x00000000080058ee 0x4a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - 0x00000000080058ee HAL_PCD_SetAddress - .text.HAL_PCD_EP_Open - 0x0000000008005938 0xc0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - 0x0000000008005938 HAL_PCD_EP_Open - .text.HAL_PCD_EP_Receive - 0x00000000080059f8 0x74 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - 0x00000000080059f8 HAL_PCD_EP_Receive - .text.HAL_PCD_EP_Transmit - 0x0000000008005a6c 0x72 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - 0x0000000008005a6c HAL_PCD_EP_Transmit - .text.HAL_PCD_EP_SetStall - 0x0000000008005ade 0xb4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - 0x0000000008005ade HAL_PCD_EP_SetStall - .text.HAL_PCD_EP_ClrStall - 0x0000000008005b92 0x9c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - 0x0000000008005b92 HAL_PCD_EP_ClrStall - *fill* 0x0000000008005c2e 0x2 - .text.PCD_EP_ISR_Handler - 0x0000000008005c30 0x53c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .text.HAL_RCC_OscConfig - 0x000000000800616c 0xe10 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x000000000800616c HAL_RCC_OscConfig - .text.HAL_RCC_ClockConfig - 0x0000000008006f7c 0x2f8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x0000000008006f7c HAL_RCC_ClockConfig - .text.HAL_RCC_GetSysClockFreq - 0x0000000008007274 0xd4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x0000000008007274 HAL_RCC_GetSysClockFreq - .text.HAL_RCC_GetHCLKFreq - 0x0000000008007348 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x0000000008007348 HAL_RCC_GetHCLKFreq - .text.HAL_RCC_GetPCLK1Freq - 0x0000000008007360 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x0000000008007360 HAL_RCC_GetPCLK1Freq - .text.HAL_RCC_GetPCLK2Freq - 0x00000000080073a4 0x44 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x00000000080073a4 HAL_RCC_GetPCLK2Freq - .text.HAL_RCC_GetClockConfig - 0x00000000080073e8 0x64 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x00000000080073e8 HAL_RCC_GetClockConfig - .text.HAL_RCCEx_PeriphCLKConfig - 0x000000000800744c 0x360 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - 0x000000000800744c HAL_RCCEx_PeriphCLKConfig - .text.HAL_TIM_Base_Init - 0x00000000080077ac 0x56 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x00000000080077ac HAL_TIM_Base_Init - *fill* 0x0000000008007802 0x2 - .text.HAL_TIM_Base_Start_IT - 0x0000000008007804 0x54 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008007804 HAL_TIM_Base_Start_IT - .text.HAL_TIM_PWM_Init - 0x0000000008007858 0x56 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008007858 HAL_TIM_PWM_Init - *fill* 0x00000000080078ae 0x2 - .text.HAL_TIM_PWM_Start - 0x00000000080078b0 0xb0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x00000000080078b0 HAL_TIM_PWM_Start - .text.HAL_TIM_IC_Init - 0x0000000008007960 0x56 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008007960 HAL_TIM_IC_Init - .text.HAL_TIM_IC_MspInit - 0x00000000080079b6 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x00000000080079b6 HAL_TIM_IC_MspInit - *fill* 0x00000000080079ca 0x2 - .text.HAL_TIM_IC_Start_IT - 0x00000000080079cc 0xdc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x00000000080079cc HAL_TIM_IC_Start_IT - .text.HAL_TIM_IRQHandler - 0x0000000008007aa8 0x23e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008007aa8 HAL_TIM_IRQHandler - .text.HAL_TIM_IC_ConfigChannel - 0x0000000008007ce6 0x138 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008007ce6 HAL_TIM_IC_ConfigChannel - *fill* 0x0000000008007e1e 0x2 - .text.HAL_TIM_PWM_ConfigChannel - 0x0000000008007e20 0x230 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008007e20 HAL_TIM_PWM_ConfigChannel - .text.HAL_TIM_ConfigTI1Input - 0x0000000008008050 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008008050 HAL_TIM_ConfigTI1Input - .text.HAL_TIM_SlaveConfigSynchro - 0x0000000008008088 0x84 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008008088 HAL_TIM_SlaveConfigSynchro - .text.HAL_TIM_ReadCapturedValue - 0x000000000800810c 0x88 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x000000000800810c HAL_TIM_ReadCapturedValue - .text.HAL_TIM_OC_DelayElapsedCallback - 0x0000000008008194 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008008194 HAL_TIM_OC_DelayElapsedCallback - .text.HAL_TIM_PWM_PulseFinishedCallback - 0x00000000080081a8 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x00000000080081a8 HAL_TIM_PWM_PulseFinishedCallback - .text.HAL_TIM_TriggerCallback - 0x00000000080081bc 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x00000000080081bc HAL_TIM_TriggerCallback - .text.TIM_Base_SetConfig - 0x00000000080081d0 0x120 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x00000000080081d0 TIM_Base_SetConfig - .text.TIM_OC1_SetConfig - 0x00000000080082f0 0x120 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_OC2_SetConfig - 0x0000000008008410 0x114 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008008410 TIM_OC2_SetConfig - .text.TIM_OC3_SetConfig - 0x0000000008008524 0x110 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_OC4_SetConfig - 0x0000000008008634 0xd4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_OC5_SetConfig - 0x0000000008008708 0xc8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_OC6_SetConfig - 0x00000000080087d0 0xcc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_SlaveTimer_SetConfig - 0x000000000800889c 0x110 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_TI1_SetConfig - 0x00000000080089ac 0xd0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x00000000080089ac TIM_TI1_SetConfig - .text.TIM_TI1_ConfigInputStage - 0x0000000008008a7c 0x5e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_TI2_SetConfig - 0x0000000008008ada 0x7a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_TI2_ConfigInputStage - 0x0000000008008b54 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_TI3_SetConfig - 0x0000000008008bb4 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_TI4_SetConfig - 0x0000000008008c2c 0x7a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .text.TIM_ETR_SetConfig - 0x0000000008008ca6 0x40 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008008ca6 TIM_ETR_SetConfig - .text.TIM_CCxChannelCmd - 0x0000000008008ce6 0x4a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0x0000000008008ce6 TIM_CCxChannelCmd - .text.HAL_TIMEx_PWMN_Start - 0x0000000008008d30 0x60 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - 0x0000000008008d30 HAL_TIMEx_PWMN_Start - .text.HAL_TIMEx_MasterConfigSynchronization - 0x0000000008008d90 0x100 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - 0x0000000008008d90 HAL_TIMEx_MasterConfigSynchronization - .text.HAL_TIMEx_ConfigBreakDeadTime - 0x0000000008008e90 0xfc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - 0x0000000008008e90 HAL_TIMEx_ConfigBreakDeadTime - .text.HAL_TIMEx_CommutCallback - 0x0000000008008f8c 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - 0x0000000008008f8c HAL_TIMEx_CommutCallback - .text.HAL_TIMEx_BreakCallback - 0x0000000008008fa0 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - 0x0000000008008fa0 HAL_TIMEx_BreakCallback - .text.HAL_TIMEx_Break2Callback - 0x0000000008008fb4 0x14 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - 0x0000000008008fb4 HAL_TIMEx_Break2Callback - .text.TIM_CCxNChannelCmd - 0x0000000008008fc8 0x4a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .text.HAL_UART_Init - 0x0000000008009012 0x9c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - 0x0000000008009012 HAL_UART_Init - .text.HAL_UART_Transmit - 0x00000000080090ae 0x126 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - 0x00000000080090ae HAL_UART_Transmit - .text.UART_SetConfig - 0x00000000080091d4 0x434 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - 0x00000000080091d4 UART_SetConfig - .text.UART_AdvFeatureConfig - 0x0000000008009608 0x144 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - 0x0000000008009608 UART_AdvFeatureConfig - .text.UART_CheckIdleState - 0x000000000800974c 0x8a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - 0x000000000800974c UART_CheckIdleState - .text.UART_WaitOnFlagUntilTimeout - 0x00000000080097d6 0xf6 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - 0x00000000080097d6 UART_WaitOnFlagUntilTimeout - .text.USB_ActivateEndpoint - 0x00000000080098cc 0x5e8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0x00000000080098cc USB_ActivateEndpoint - .text.USB_EPStartXfer - 0x0000000008009eb4 0x5a4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0x0000000008009eb4 USB_EPStartXfer - .text.USB_EPSetStall - 0x000000000800a458 0x84 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0x000000000800a458 USB_EPSetStall - .text.USB_EPClearStall - 0x000000000800a4dc 0x128 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0x000000000800a4dc USB_EPClearStall - .text.USB_SetDevAddress - 0x000000000800a604 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0x000000000800a604 USB_SetDevAddress - .text.USB_ReadInterrupts - 0x000000000800a62c 0x20 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0x000000000800a62c USB_ReadInterrupts - .text.USB_EP0_OutStart - 0x000000000800a64c 0x18 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0x000000000800a64c USB_EP0_OutStart - .text.USB_WritePMA - 0x000000000800a664 0x8a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0x000000000800a664 USB_WritePMA - .text.USB_ReadPMA - 0x000000000800a6ee 0xa0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0x000000000800a6ee USB_ReadPMA - .text.USBD_RunTestMode - 0x000000000800a78e 0x16 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800a78e USBD_RunTestMode - .text.USBD_SetClassConfig - 0x000000000800a7a4 0x3e Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800a7a4 USBD_SetClassConfig - .text.USBD_ClrClassConfig - 0x000000000800a7e2 0x26 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800a7e2 USBD_ClrClassConfig - .text.USBD_LL_SetupStage - 0x000000000800a808 0x96 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800a808 USBD_LL_SetupStage - .text.USBD_LL_DataOutStage - 0x000000000800a89e 0xe2 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800a89e USBD_LL_DataOutStage - .text.USBD_LL_DataInStage - 0x000000000800a980 0x14a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800a980 USBD_LL_DataInStage - .text.USBD_LL_Reset - 0x000000000800aaca 0x82 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800aaca USBD_LL_Reset - .text.USBD_LL_SetSpeed - 0x000000000800ab4c 0x20 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800ab4c USBD_LL_SetSpeed - .text.USBD_LL_Suspend - 0x000000000800ab6c 0x2a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800ab6c USBD_LL_Suspend - .text.USBD_LL_Resume - 0x000000000800ab96 0x2c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800ab96 USBD_LL_Resume - .text.USBD_LL_SOF - 0x000000000800abc2 0x34 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0x000000000800abc2 USBD_LL_SOF - *fill* 0x000000000800abf6 0x2 - .text.USBD_StdDevReq - 0x000000000800abf8 0xd4 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - 0x000000000800abf8 USBD_StdDevReq - .text.USBD_StdItfReq - 0x000000000800accc 0x8c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - 0x000000000800accc USBD_StdItfReq - .text.USBD_StdEPReq - 0x000000000800ad58 0x2ba Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - 0x000000000800ad58 USBD_StdEPReq - *fill* 0x000000000800b012 0x2 - .text.USBD_GetDescriptor - 0x000000000800b014 0x2d0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text.USBD_SetAddress - 0x000000000800b2e4 0x84 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text.USBD_SetConfig - 0x000000000800b368 0x11c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text.USBD_GetConfig - 0x000000000800b484 0x68 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text.USBD_GetStatus - 0x000000000800b4ec 0x66 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text.USBD_SetFeature - 0x000000000800b552 0x28 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text.USBD_ClrFeature - 0x000000000800b57a 0x42 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .text.USBD_ParseSetupRequest - 0x000000000800b5bc 0x7a Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - 0x000000000800b5bc USBD_ParseSetupRequest - .text.USBD_CtlError - 0x000000000800b636 0x22 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - 0x000000000800b636 USBD_CtlError - .text.USBD_CtlSendData - 0x000000000800b658 0x38 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - 0x000000000800b658 USBD_CtlSendData - .text.USBD_CtlContinueSendData - 0x000000000800b690 0x24 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - 0x000000000800b690 USBD_CtlContinueSendData - .text.USBD_CtlContinueRx - 0x000000000800b6b4 0x24 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - 0x000000000800b6b4 USBD_CtlContinueRx - .text.USBD_CtlSendStatus - 0x000000000800b6d8 0x26 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - 0x000000000800b6d8 USBD_CtlSendStatus - .text.USBD_CtlReceiveStatus - 0x000000000800b6fe 0x26 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - 0x000000000800b6fe USBD_CtlReceiveStatus - .text.vListInsertEnd - 0x000000000800b724 0x48 Middlewares/Third_Party/FreeRTOS/Source/list.o - 0x000000000800b724 vListInsertEnd - .text.uxListRemove - 0x000000000800b76c 0x54 Middlewares/Third_Party/FreeRTOS/Source/list.o - 0x000000000800b76c uxListRemove - .text.xTaskIncrementTick - 0x000000000800b7c0 0x17c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - 0x000000000800b7c0 xTaskIncrementTick - .text.vTaskSwitchContext - 0x000000000800b93c 0xb8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - 0x000000000800b93c vTaskSwitchContext - .text.prvResetNextTaskUnblockTime - 0x000000000800b9f4 0x4c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .text.SVC_Handler - 0x000000000800ba40 0x28 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - 0x000000000800ba40 SVC_Handler - *fill* 0x000000000800ba68 0x8 - .text.PendSV_Handler - 0x000000000800ba70 0x68 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - 0x000000000800ba70 PendSV_Handler - .text.SysTick_Handler - 0x000000000800bad8 0x40 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - 0x000000000800bad8 SysTick_Handler - .text.HAL_PCD_SetupStageCallback - 0x000000000800bb18 0x24 USB_DEVICE/Target/usbd_conf.o - 0x000000000800bb18 HAL_PCD_SetupStageCallback - .text.HAL_PCD_DataOutStageCallback - 0x000000000800bb3c 0x30 USB_DEVICE/Target/usbd_conf.o - 0x000000000800bb3c HAL_PCD_DataOutStageCallback - .text.HAL_PCD_DataInStageCallback - 0x000000000800bb6c 0x2e USB_DEVICE/Target/usbd_conf.o - 0x000000000800bb6c HAL_PCD_DataInStageCallback - .text.HAL_PCD_SOFCallback - 0x000000000800bb9a 0x1c USB_DEVICE/Target/usbd_conf.o - 0x000000000800bb9a HAL_PCD_SOFCallback - .text.HAL_PCD_ResetCallback - 0x000000000800bbb6 0x3c USB_DEVICE/Target/usbd_conf.o - 0x000000000800bbb6 HAL_PCD_ResetCallback - *fill* 0x000000000800bbf2 0x2 - .text.HAL_PCD_SuspendCallback - 0x000000000800bbf4 0x34 USB_DEVICE/Target/usbd_conf.o - 0x000000000800bbf4 HAL_PCD_SuspendCallback - .text.HAL_PCD_ResumeCallback - 0x000000000800bc28 0x1c USB_DEVICE/Target/usbd_conf.o - 0x000000000800bc28 HAL_PCD_ResumeCallback - .text.USBD_LL_OpenEP - 0x000000000800bc44 0x4c USB_DEVICE/Target/usbd_conf.o - 0x000000000800bc44 USBD_LL_OpenEP - .text.USBD_LL_StallEP - 0x000000000800bc90 0x3e USB_DEVICE/Target/usbd_conf.o - 0x000000000800bc90 USBD_LL_StallEP - .text.USBD_LL_ClearStallEP - 0x000000000800bcce 0x3e USB_DEVICE/Target/usbd_conf.o - 0x000000000800bcce USBD_LL_ClearStallEP - .text.USBD_LL_IsStallEP - 0x000000000800bd0c 0x4c USB_DEVICE/Target/usbd_conf.o - 0x000000000800bd0c USBD_LL_IsStallEP - .text.USBD_LL_SetUSBAddress - 0x000000000800bd58 0x3e USB_DEVICE/Target/usbd_conf.o - 0x000000000800bd58 USBD_LL_SetUSBAddress - .text.USBD_LL_Transmit - 0x000000000800bd96 0x46 USB_DEVICE/Target/usbd_conf.o - 0x000000000800bd96 USBD_LL_Transmit - .text.USBD_LL_PrepareReceive - 0x000000000800bddc 0x46 USB_DEVICE/Target/usbd_conf.o - 0x000000000800bddc USBD_LL_PrepareReceive - *fill* 0x000000000800be22 0x2 - .text.USBD_Get_USB_Status - 0x000000000800be24 0x58 USB_DEVICE/Target/usbd_conf.o - .text.__libc_init_array - 0x000000000800be7c 0x48 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) - 0x000000000800be7c __libc_init_array - .text.memset 0x000000000800bec4 0x10 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o) - 0x000000000800bec4 memset - *(.glue_7) - .glue_7 0x000000000800bed4 0x0 linker stubs - *(.glue_7t) - .glue_7t 0x000000000800bed4 0x0 linker stubs - *(.eh_frame) - .eh_frame 0x000000000800bed4 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - *(.init) - .init 0x000000000800bed4 0x4 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o - 0x000000000800bed4 _init - .init 0x000000000800bed8 0x8 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o - *(.fini) - .fini 0x000000000800bee0 0x4 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o - 0x000000000800bee0 _fini - .fini 0x000000000800bee4 0x8 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o - 0x000000000800beec . = ALIGN (0x4) - 0x000000000800beec _etext = . - -.vfp11_veneer 0x000000000800beec 0x0 - .vfp11_veneer 0x000000000800beec 0x0 linker stubs - -.v4_bx 0x000000000800beec 0x0 - .v4_bx 0x000000000800beec 0x0 linker stubs - -.iplt 0x000000000800beec 0x0 - .iplt 0x000000000800beec 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - -.rodata 0x000000000800beec 0x7c - 0x000000000800beec . = ALIGN (0x4) - *(.rodata) - .rodata 0x000000000800beec 0x44 Core/Src/main.o - *(.rodata*) - .rodata.AHBPrescTable - 0x000000000800bf30 0x10 Core/Src/system_stm32f3xx.o - 0x000000000800bf30 AHBPrescTable - .rodata.APBPrescTable - 0x000000000800bf40 0x8 Core/Src/system_stm32f3xx.o - 0x000000000800bf40 APBPrescTable - .rodata.aPLLMULFactorTable - 0x000000000800bf48 0x10 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x000000000800bf48 aPLLMULFactorTable - .rodata.aPredivFactorTable - 0x000000000800bf58 0x10 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x000000000800bf58 aPredivFactorTable - 0x000000000800bf68 . = ALIGN (0x4) - -.rel.dyn 0x000000000800bf68 0x0 - .rel.iplt 0x000000000800bf68 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - -.ARM.extab 0x000000000800bf68 0x0 - 0x000000000800bf68 . = ALIGN (0x4) - *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x000000000800bf68 . = ALIGN (0x4) - -.ARM 0x000000000800bf68 0x0 - 0x000000000800bf68 . = ALIGN (0x4) - 0x000000000800bf68 __exidx_start = . - *(.ARM.exidx*) - 0x000000000800bf68 __exidx_end = . - 0x000000000800bf68 . = ALIGN (0x4) - -.preinit_array 0x000000000800bf68 0x0 - 0x000000000800bf68 . = ALIGN (0x4) - 0x000000000800bf68 PROVIDE (__preinit_array_start = .) - *(.preinit_array*) - 0x000000000800bf68 PROVIDE (__preinit_array_end = .) - 0x000000000800bf68 . = ALIGN (0x4) - -.init_array 0x000000000800bf68 0x4 - 0x000000000800bf68 . = ALIGN (0x4) - 0x000000000800bf68 PROVIDE (__init_array_start = .) - *(SORT_BY_NAME(.init_array.*)) - *(.init_array*) - .init_array 0x000000000800bf68 0x4 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - 0x000000000800bf6c PROVIDE (__init_array_end = .) - 0x000000000800bf6c . = ALIGN (0x4) - -.fini_array 0x000000000800bf6c 0x4 - 0x000000000800bf6c . = ALIGN (0x4) - [!provide] PROVIDE (__fini_array_start = .) - *(SORT_BY_NAME(.fini_array.*)) - *(.fini_array*) - .fini_array 0x000000000800bf6c 0x4 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - [!provide] PROVIDE (__fini_array_end = .) - 0x000000000800bf70 . = ALIGN (0x4) - 0x000000000800bf70 _sidata = LOADADDR (.data) - -.data 0x0000000020000000 0x14 load address 0x000000000800bf70 - 0x0000000020000000 . = ALIGN (0x4) - 0x0000000020000000 _sdata = . - *(.data) - *(.data*) - .data.LastHallState.8801 - 0x0000000020000000 0x4 Core/Src/MESCBLDC.o - .data.initing 0x0000000020000004 0x4 Core/Src/main.o - 0x0000000020000004 initing - .data.SystemCoreClock - 0x0000000020000008 0x4 Core/Src/system_stm32f3xx.o - 0x0000000020000008 SystemCoreClock - .data.uwTickPrio - 0x000000002000000c 0x4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x000000002000000c uwTickPrio - .data.uwTickFreq - 0x0000000020000010 0x1 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x0000000020000010 uwTickFreq - 0x0000000020000014 . = ALIGN (0x4) - *fill* 0x0000000020000011 0x3 - 0x0000000020000014 _edata = . - -.igot.plt 0x0000000020000014 0x0 load address 0x000000000800bf84 - .igot.plt 0x0000000020000014 0x0 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - 0x0000000020000014 . = ALIGN (0x4) - -.bss 0x0000000020000014 0xdf8 load address 0x000000000800bf84 - 0x0000000020000014 _sbss = . - 0x0000000020000014 __bss_start__ = _sbss - *(.bss) - .bss 0x0000000020000014 0x1c c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - *(.bss*) - .bss.CurrentError.8804 - 0x0000000020000030 0x4 Core/Src/MESCBLDC.o - .bss.CurrentIntegralError.8805 - 0x0000000020000034 0x4 Core/Src/MESCBLDC.o - .bss.Duty.8806 - 0x0000000020000038 0x4 Core/Src/MESCBLDC.o - .bss.initcycles.8816 - 0x000000002000003c 0x4 Core/Src/MESCfoc.o - .bss.a 0x0000000020000040 0x2 Core/Src/main.o - 0x0000000020000040 a - *fill* 0x0000000020000042 0x2 - .bss.adcBuff1 0x0000000020000044 0xc Core/Src/main.o - 0x0000000020000044 adcBuff1 - .bss.ICVals 0x0000000020000050 0x8 Core/Src/main.o - 0x0000000020000050 ICVals - .bss.quickHall - 0x0000000020000058 0x4 Core/Src/main.o - 0x0000000020000058 quickHall - .bss.HAL_RCC_ADC12_CLK_ENABLED - 0x000000002000005c 0x4 Core/Src/stm32f3xx_hal_msp.o - .bss.cfgidx.10787 - 0x0000000020000060 0x1 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - *fill* 0x0000000020000061 0x3 - .bss.pxCurrentTCB - 0x0000000020000064 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - 0x0000000020000064 pxCurrentTCB - .bss.pxReadyTasksLists - 0x0000000020000068 0x460 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.pxDelayedTaskList - 0x00000000200004c8 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.pxOverflowDelayedTaskList - 0x00000000200004cc 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xTickCount - 0x00000000200004d0 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.uxTopReadyPriority - 0x00000000200004d4 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.uxPendedTicks - 0x00000000200004d8 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xYieldPending - 0x00000000200004dc 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xNumOfOverflows - 0x00000000200004e0 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.xNextTaskUnblockTime - 0x00000000200004e4 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .bss.uxSchedulerSuspended - 0x00000000200004e8 0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - *(COMMON) - COMMON 0x00000000200004ec 0xa5 Core/Src/MESCBLDC.o - 0x00000000200004ec measurement_buffers - 0x000000002000053c MotorState - 0x000000002000053d MotorSensorMode - 0x0000000020000540 BLDCVars - 0x000000002000055c MotorControlType - 0x000000002000055d BLDCState - 0x0000000020000560 motor - 0x0000000020000570 g_hw_setup - 0x0000000020000590 MotorDirection - *fill* 0x0000000020000591 0x3 - COMMON 0x0000000020000594 0x4 Core/Src/MESCfoc.o - 0x0000000020000594 tmpccmrx - COMMON 0x0000000020000598 0x5c4 Core/Src/main.o - 0x0000000020000598 defaultTaskHandle - 0x000000002000059c hopamp2 - 0x00000000200005d0 htim4 - 0x0000000020000610 hdma_usart3_rx - 0x0000000020000654 huart3 - 0x00000000200006d4 hadc2 - 0x0000000020000724 hdma_i2c1_tx - 0x0000000020000768 hi2c1 - 0x00000000200007b4 hdma_adc3 - 0x00000000200007f8 hdma_usart3_tx - 0x000000002000083c hopamp3 - 0x0000000020000870 hcomp1 - 0x00000000200008a0 htim3 - 0x00000000200008e0 hopamp1 - 0x0000000020000914 hcomp4 - 0x0000000020000944 hadc1 - 0x0000000020000994 hadc3 - 0x00000000200009e4 hcomp7 - 0x0000000020000a14 hdma_adc1 - 0x0000000020000a58 ComsTaskHandle - 0x0000000020000a5c BatCheckTaskHandle - 0x0000000020000a60 htim1 - 0x0000000020000aa0 SlowLoopTaskHandle - 0x0000000020000aa4 hdma_i2c1_rx - 0x0000000020000ae8 hcomp2 - 0x0000000020000b18 hdma_adc2 - COMMON 0x0000000020000b5c 0x40 Core/Src/stm32f3xx_hal_timebase_tim.o - 0x0000000020000b5c htim7 - COMMON 0x0000000020000b9c 0x4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x0000000020000b9c uwTick - COMMON 0x0000000020000ba0 0x26c USB_DEVICE/Target/usbd_conf.o - 0x0000000020000ba0 hpcd_USB_FS - 0x0000000020000e0c . = ALIGN (0x4) - 0x0000000020000e0c _ebss = . - 0x0000000020000e0c __bss_end__ = _ebss - -._user_heap_stack - 0x0000000020000e0c 0x604 load address 0x000000000800bf84 - 0x0000000020000e10 . = ALIGN (0x8) - *fill* 0x0000000020000e0c 0x4 - 0x0000000020000e10 PROVIDE (end = .) - [!provide] PROVIDE (_end = .) - 0x0000000020001010 . = (. + _Min_Heap_Size) - *fill* 0x0000000020000e10 0x200 - 0x0000000020001410 . = (. + _Min_Stack_Size) - *fill* 0x0000000020001010 0x400 - 0x0000000020001410 . = ALIGN (0x8) - -/DISCARD/ - libc.a(*) - libm.a(*) - libgcc.a(*) - -.ARM.attributes - 0x0000000000000000 0x30 - *(.ARM.attributes) - .ARM.attributes - 0x0000000000000000 0x22 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o - .ARM.attributes - 0x0000000000000022 0x34 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o - .ARM.attributes - 0x0000000000000056 0x39 Core/Src/MESCBLDC.o - .ARM.attributes - 0x000000000000008f 0x39 Core/Src/MESCfoc.o - .ARM.attributes - 0x00000000000000c8 0x39 Core/Src/MESChw_setup.o - .ARM.attributes - 0x0000000000000101 0x39 Core/Src/main.o - .ARM.attributes - 0x000000000000013a 0x39 Core/Src/stm32f3xx_hal_msp.o - .ARM.attributes - 0x0000000000000173 0x39 Core/Src/stm32f3xx_hal_timebase_tim.o - .ARM.attributes - 0x00000000000001ac 0x39 Core/Src/stm32f3xx_it.o - .ARM.attributes - 0x00000000000001e5 0x39 Core/Src/system_stm32f3xx.o - .ARM.attributes - 0x000000000000021e 0x21 Core/Startup/startup_stm32f303cbtx.o - .ARM.attributes - 0x000000000000023f 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .ARM.attributes - 0x0000000000000278 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .ARM.attributes - 0x00000000000002b1 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .ARM.attributes - 0x00000000000002ea 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .ARM.attributes - 0x0000000000000323 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .ARM.attributes - 0x000000000000035c 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .ARM.attributes - 0x0000000000000395 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .ARM.attributes - 0x00000000000003ce 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .ARM.attributes - 0x0000000000000407 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .ARM.attributes - 0x0000000000000440 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .ARM.attributes - 0x0000000000000479 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .ARM.attributes - 0x00000000000004b2 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .ARM.attributes - 0x00000000000004eb 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .ARM.attributes - 0x0000000000000524 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .ARM.attributes - 0x000000000000055d 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .ARM.attributes - 0x0000000000000596 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .ARM.attributes - 0x00000000000005cf 0x39 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .ARM.attributes - 0x0000000000000608 0x39 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .ARM.attributes - 0x0000000000000641 0x39 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .ARM.attributes - 0x000000000000067a 0x39 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .ARM.attributes - 0x00000000000006b3 0x39 Middlewares/Third_Party/FreeRTOS/Source/list.o - .ARM.attributes - 0x00000000000006ec 0x39 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .ARM.attributes - 0x0000000000000725 0x39 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .ARM.attributes - 0x000000000000075e 0x39 USB_DEVICE/Target/usbd_conf.o - .ARM.attributes - 0x0000000000000797 0x34 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) - .ARM.attributes - 0x00000000000007cb 0x34 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o) - .ARM.attributes - 0x00000000000007ff 0x22 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_addsubdf3.o) - .ARM.attributes - 0x0000000000000821 0x22 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_muldivdf3.o) - .ARM.attributes - 0x0000000000000843 0x22 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_truncdfsf2.o) - .ARM.attributes - 0x0000000000000865 0x22 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o -OUTPUT(MESC_Firmware.elf elf32-littlearm) - -.debug_info 0x0000000000000000 0x22bb7 - .debug_info 0x0000000000000000 0xa31 Core/Src/MESCBLDC.o - .debug_info 0x0000000000000a31 0xbf6 Core/Src/MESCfoc.o - .debug_info 0x0000000000001627 0x2a4 Core/Src/MESChw_setup.o - .debug_info 0x00000000000018cb 0x2e56 Core/Src/main.o - .debug_info 0x0000000000004721 0x1ed5 Core/Src/stm32f3xx_hal_msp.o - .debug_info 0x00000000000065f6 0x9e1 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_info 0x0000000000006fd7 0x12f5 Core/Src/stm32f3xx_it.o - .debug_info 0x00000000000082cc 0x45c Core/Src/system_stm32f3xx.o - .debug_info 0x0000000000008728 0x22 Core/Startup/startup_stm32f303cbtx.o - .debug_info 0x000000000000874a 0x7e2 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_info 0x0000000000008f2c 0xbce Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_info 0x0000000000009afa 0x1571 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_info 0x000000000000b06b 0x7bf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_info 0x000000000000b82a 0xd99 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_info 0x000000000000c5c3 0x7cb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_info 0x000000000000cd8e 0x6fc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_info 0x000000000000d48a 0x1f65 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_info 0x000000000000f3ef 0x8de Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_info 0x000000000000fccd 0x680 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_info 0x000000000001034d 0xe26 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_info 0x0000000000011173 0x180f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_info 0x0000000000012982 0x6b7 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_info 0x0000000000013039 0x2648 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_info 0x0000000000015681 0x11d7 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_info 0x0000000000016858 0x1592 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_info 0x0000000000017dea 0x14fb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_info 0x00000000000192e5 0x1547 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_info 0x000000000001a82c 0x14b7 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_info 0x000000000001bce3 0x12a8 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_info 0x000000000001cf8b 0xac5 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_info 0x000000000001da50 0x294f Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_info 0x000000000002039f 0x533 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_info 0x00000000000208d2 0x22e5 USB_DEVICE/Target/usbd_conf.o - -.debug_abbrev 0x0000000000000000 0x424a - .debug_abbrev 0x0000000000000000 0x178 Core/Src/MESCBLDC.o - .debug_abbrev 0x0000000000000178 0x1f5 Core/Src/MESCfoc.o - .debug_abbrev 0x000000000000036d 0xef Core/Src/MESChw_setup.o - .debug_abbrev 0x000000000000045c 0x2d4 Core/Src/main.o - .debug_abbrev 0x0000000000000730 0x214 Core/Src/stm32f3xx_hal_msp.o - .debug_abbrev 0x0000000000000944 0x19d Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_abbrev 0x0000000000000ae1 0x1c8 Core/Src/stm32f3xx_it.o - .debug_abbrev 0x0000000000000ca9 0x12b Core/Src/system_stm32f3xx.o - .debug_abbrev 0x0000000000000dd4 0x12 Core/Startup/startup_stm32f303cbtx.o - .debug_abbrev 0x0000000000000de6 0x1c7 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_abbrev 0x0000000000000fad 0x187 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_abbrev 0x0000000000001134 0x225 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_abbrev 0x0000000000001359 0x1c3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_abbrev 0x000000000000151c 0x2fa Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_abbrev 0x0000000000001816 0x1fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_abbrev 0x0000000000001a14 0x1c0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_abbrev 0x0000000000001bd4 0x22a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_abbrev 0x0000000000001dfe 0x1b9 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_abbrev 0x0000000000001fb7 0x1ad Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_abbrev 0x0000000000002164 0x27d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_abbrev 0x00000000000023e1 0x28c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_abbrev 0x000000000000266d 0x219 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_abbrev 0x0000000000002886 0x230 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_abbrev 0x0000000000002ab6 0x21e Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_abbrev 0x0000000000002cd4 0x205 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_abbrev 0x0000000000002ed9 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_abbrev 0x0000000000003112 0x281 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_abbrev 0x0000000000003393 0x2b1 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_abbrev 0x0000000000003644 0x1f1 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_abbrev 0x0000000000003835 0x1cf Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_abbrev 0x0000000000003a04 0x350 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_abbrev 0x0000000000003d54 0x210 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_abbrev 0x0000000000003f64 0x2e6 USB_DEVICE/Target/usbd_conf.o - -.debug_aranges 0x0000000000000000 0x1bd0 - .debug_aranges - 0x0000000000000000 0x38 Core/Src/MESCBLDC.o - .debug_aranges - 0x0000000000000038 0x80 Core/Src/MESCfoc.o - .debug_aranges - 0x00000000000000b8 0x28 Core/Src/MESChw_setup.o - .debug_aranges - 0x00000000000000e0 0xf0 Core/Src/main.o - .debug_aranges - 0x00000000000001d0 0x98 Core/Src/stm32f3xx_hal_msp.o - .debug_aranges - 0x0000000000000268 0x30 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_aranges - 0x0000000000000298 0xa0 Core/Src/stm32f3xx_it.o - .debug_aranges - 0x0000000000000338 0x28 Core/Src/system_stm32f3xx.o - .debug_aranges - 0x0000000000000360 0x28 Core/Startup/startup_stm32f303cbtx.o - .debug_aranges - 0x0000000000000388 0xe0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_aranges - 0x0000000000000468 0xc8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_aranges - 0x0000000000000530 0x168 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_aranges - 0x0000000000000698 0x88 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_aranges - 0x0000000000000720 0x118 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_aranges - 0x0000000000000838 0x88 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_aranges - 0x00000000000008c0 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_aranges - 0x0000000000000918 0x288 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_aranges - 0x0000000000000ba0 0x48 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_aranges - 0x0000000000000be8 0x68 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_aranges - 0x0000000000000c50 0x120 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_aranges - 0x0000000000000d70 0x88 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_aranges - 0x0000000000000df8 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_aranges - 0x0000000000000e30 0x3c8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_aranges - 0x00000000000011f8 0x160 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_aranges - 0x0000000000001358 0x210 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_aranges - 0x0000000000001568 0x108 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_aranges - 0x0000000000001670 0xb8 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_aranges - 0x0000000000001728 0x88 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_aranges - 0x00000000000017b0 0x50 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_aranges - 0x0000000000001800 0x40 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_aranges - 0x0000000000001840 0x1f8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_aranges - 0x0000000000001a38 0x80 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_aranges - 0x0000000000001ab8 0x118 USB_DEVICE/Target/usbd_conf.o - -.debug_ranges 0x0000000000000000 0x19e8 - .debug_ranges 0x0000000000000000 0x28 Core/Src/MESCBLDC.o - .debug_ranges 0x0000000000000028 0x90 Core/Src/MESCfoc.o - .debug_ranges 0x00000000000000b8 0x18 Core/Src/MESChw_setup.o - .debug_ranges 0x00000000000000d0 0xe0 Core/Src/main.o - .debug_ranges 0x00000000000001b0 0x88 Core/Src/stm32f3xx_hal_msp.o - .debug_ranges 0x0000000000000238 0x20 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_ranges 0x0000000000000258 0x90 Core/Src/stm32f3xx_it.o - .debug_ranges 0x00000000000002e8 0x18 Core/Src/system_stm32f3xx.o - .debug_ranges 0x0000000000000300 0x20 Core/Startup/startup_stm32f303cbtx.o - .debug_ranges 0x0000000000000320 0xd0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_ranges 0x00000000000003f0 0xb8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_ranges 0x00000000000004a8 0x158 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_ranges 0x0000000000000600 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_ranges 0x0000000000000678 0x108 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_ranges 0x0000000000000780 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_ranges 0x00000000000007f8 0x48 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_ranges 0x0000000000000840 0x278 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_ranges 0x0000000000000ab8 0x38 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_ranges 0x0000000000000af0 0x58 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_ranges 0x0000000000000b48 0x110 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_ranges 0x0000000000000c58 0x78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_ranges 0x0000000000000cd0 0x28 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_ranges 0x0000000000000cf8 0x3b8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_ranges 0x00000000000010b0 0x150 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_ranges 0x0000000000001200 0x200 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_ranges 0x0000000000001400 0xf8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_ranges 0x00000000000014f8 0xa8 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_ranges 0x00000000000015a0 0x78 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_ranges 0x0000000000001618 0x40 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_ranges 0x0000000000001658 0x30 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_ranges 0x0000000000001688 0x1e8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_ranges 0x0000000000001870 0x70 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_ranges 0x00000000000018e0 0x108 USB_DEVICE/Target/usbd_conf.o - -.debug_macro 0x0000000000000000 0x1fba6 - .debug_macro 0x0000000000000000 0x254 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000000254 0xa5a Core/Src/MESCBLDC.o - .debug_macro 0x0000000000000cae 0x16f Core/Src/MESCBLDC.o - .debug_macro 0x0000000000000e1d 0x2e Core/Src/MESCBLDC.o - .debug_macro 0x0000000000000e4b 0x28 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000000e73 0x22 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000000e95 0x8e Core/Src/MESCBLDC.o - .debug_macro 0x0000000000000f23 0x51 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000000f74 0xef Core/Src/MESCBLDC.o - .debug_macro 0x0000000000001063 0x6a Core/Src/MESCBLDC.o - .debug_macro 0x00000000000010cd 0x1df Core/Src/MESCBLDC.o - .debug_macro 0x00000000000012ac 0x1c Core/Src/MESCBLDC.o - .debug_macro 0x00000000000012c8 0x22 Core/Src/MESCBLDC.o - .debug_macro 0x00000000000012ea 0xdf Core/Src/MESCBLDC.o - .debug_macro 0x00000000000013c9 0x102d Core/Src/MESCBLDC.o - .debug_macro 0x00000000000023f6 0x11f Core/Src/MESCBLDC.o - .debug_macro 0x0000000000002515 0x12a33 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000014f48 0x43 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000014f8b 0x174 Core/Src/MESCBLDC.o - .debug_macro 0x00000000000150ff 0x53 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000015152 0x962 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000015ab4 0x5fe Core/Src/MESCBLDC.o - .debug_macro 0x00000000000160b2 0x12f Core/Src/MESCBLDC.o - .debug_macro 0x00000000000161e1 0x1fb Core/Src/MESCBLDC.o - .debug_macro 0x00000000000163dc 0x1dc Core/Src/MESCBLDC.o - .debug_macro 0x00000000000165b8 0x1bc Core/Src/MESCBLDC.o - .debug_macro 0x0000000000016774 0x30 Core/Src/MESCBLDC.o - .debug_macro 0x00000000000167a4 0x3c Core/Src/MESCBLDC.o - .debug_macro 0x00000000000167e0 0x236 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000016a16 0x9b1 Core/Src/MESCBLDC.o - .debug_macro 0x00000000000173c7 0x77 Core/Src/MESCBLDC.o - .debug_macro 0x000000000001743e 0x73 Core/Src/MESCBLDC.o - .debug_macro 0x00000000000174b1 0x58d Core/Src/MESCBLDC.o - .debug_macro 0x0000000000017a3e 0x12 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000017a50 0xc5 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000017b15 0x21d Core/Src/MESCBLDC.o - .debug_macro 0x0000000000017d32 0x22c Core/Src/MESCBLDC.o - .debug_macro 0x0000000000017f5e 0x58 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000017fb6 0xa5 Core/Src/MESCBLDC.o - .debug_macro 0x000000000001805b 0x17d Core/Src/MESCBLDC.o - .debug_macro 0x00000000000181d8 0x65 Core/Src/MESCBLDC.o - .debug_macro 0x000000000001823d 0x249 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000018486 0x81 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000018507 0xd3 Core/Src/MESCBLDC.o - .debug_macro 0x00000000000185da 0x9e9 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000018fc3 0x89 Core/Src/MESCBLDC.o - .debug_macro 0x000000000001904c 0x589 Core/Src/MESCBLDC.o - .debug_macro 0x00000000000195d5 0x3e Core/Src/MESCBLDC.o - .debug_macro 0x0000000000019613 0x275 Core/Src/MESCBLDC.o - .debug_macro 0x0000000000019888 0x1c Core/Src/MESCBLDC.o - .debug_macro 0x00000000000198a4 0x254 Core/Src/MESCfoc.o - .debug_macro 0x0000000000019af8 0x23d Core/Src/MESChw_setup.o - .debug_macro 0x0000000000019d35 0x4bd Core/Src/main.o - .debug_macro 0x000000000001a1f2 0x5b Core/Src/main.o - .debug_macro 0x000000000001a24d 0x74 Core/Src/main.o - .debug_macro 0x000000000001a2c1 0x122 Core/Src/main.o - .debug_macro 0x000000000001a3e3 0xdd Core/Src/main.o - .debug_macro 0x000000000001a4c0 0x46 Core/Src/main.o - .debug_macro 0x000000000001a506 0x18 Core/Src/main.o - .debug_macro 0x000000000001a51e 0x3c Core/Src/main.o - .debug_macro 0x000000000001a55a 0x34 Core/Src/main.o - .debug_macro 0x000000000001a58e 0x16 Core/Src/main.o - .debug_macro 0x000000000001a5a4 0x35 Core/Src/main.o - .debug_macro 0x000000000001a5d9 0x32a Core/Src/main.o - .debug_macro 0x000000000001a903 0x10 Core/Src/main.o - .debug_macro 0x000000000001a913 0x52 Core/Src/main.o - .debug_macro 0x000000000001a965 0x1f Core/Src/main.o - .debug_macro 0x000000000001a984 0x43 Core/Src/main.o - .debug_macro 0x000000000001a9c7 0x20 Core/Src/main.o - .debug_macro 0x000000000001a9e7 0x1a3 Core/Src/main.o - .debug_macro 0x000000000001ab8a 0x10 Core/Src/main.o - .debug_macro 0x000000000001ab9a 0x1c Core/Src/main.o - .debug_macro 0x000000000001abb6 0x52 Core/Src/main.o - .debug_macro 0x000000000001ac08 0x40 Core/Src/main.o - .debug_macro 0x000000000001ac48 0x10 Core/Src/main.o - .debug_macro 0x000000000001ac58 0x40 Core/Src/main.o - .debug_macro 0x000000000001ac98 0xd7 Core/Src/main.o - .debug_macro 0x000000000001ad6f 0x1c Core/Src/main.o - .debug_macro 0x000000000001ad8b 0x3d Core/Src/main.o - .debug_macro 0x000000000001adc8 0x16 Core/Src/main.o - .debug_macro 0x000000000001adde 0x145 Core/Src/main.o - .debug_macro 0x000000000001af23 0x16 Core/Src/main.o - .debug_macro 0x000000000001af39 0x16 Core/Src/main.o - .debug_macro 0x000000000001af4f 0x29 Core/Src/main.o - .debug_macro 0x000000000001af78 0x16 Core/Src/main.o - .debug_macro 0x000000000001af8e 0x20 Core/Src/main.o - .debug_macro 0x000000000001afae 0x59 Core/Src/main.o - .debug_macro 0x000000000001b007 0x1c8 Core/Src/main.o - .debug_macro 0x000000000001b1cf 0x268 Core/Src/stm32f3xx_hal_msp.o - .debug_macro 0x000000000001b437 0x239 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_macro 0x000000000001b670 0x272 Core/Src/stm32f3xx_it.o - .debug_macro 0x000000000001b8e2 0x23f Core/Src/system_stm32f3xx.o - .debug_macro 0x000000000001bb21 0x25d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_macro 0x000000000001bd7e 0x23a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_macro 0x000000000001bfb8 0x263 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_macro 0x000000000001c21b 0x248 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_macro 0x000000000001c463 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_macro 0x000000000001c69c 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_macro 0x000000000001c8d5 0x271 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_macro 0x000000000001cb46 0x2fe Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_macro 0x000000000001ce44 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_macro 0x000000000001d07d 0x241 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_macro 0x000000000001d2be 0x245 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_macro 0x000000000001d503 0x25d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_macro 0x000000000001d760 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_macro 0x000000000001d999 0x23a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_macro 0x000000000001dbd3 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_macro 0x000000000001de0c 0x256 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_macro 0x000000000001e062 0x239 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_macro 0x000000000001e29b 0x45c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x000000000001e6f7 0x1ce Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_macro 0x000000000001e8c5 0x466 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_macro 0x000000000001ed2b 0x462 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_macro 0x000000000001f18d 0x17a Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_macro 0x000000000001f307 0x27a Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x000000000001f581 0x10 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_macro 0x000000000001f591 0x196 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_macro 0x000000000001f727 0x47f USB_DEVICE/Target/usbd_conf.o - -.debug_line 0x0000000000000000 0x191f3 - .debug_line 0x0000000000000000 0x856 Core/Src/MESCBLDC.o - .debug_line 0x0000000000000856 0x92f Core/Src/MESCfoc.o - .debug_line 0x0000000000001185 0x7aa Core/Src/MESChw_setup.o - .debug_line 0x000000000000192f 0xfb9 Core/Src/main.o - .debug_line 0x00000000000028e8 0xa52 Core/Src/stm32f3xx_hal_msp.o - .debug_line 0x000000000000333a 0x7bf Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_line 0x0000000000003af9 0x91b Core/Src/stm32f3xx_it.o - .debug_line 0x0000000000004414 0x7a9 Core/Src/system_stm32f3xx.o - .debug_line 0x0000000000004bbd 0x85 Core/Startup/startup_stm32f303cbtx.o - .debug_line 0x0000000000004c42 0x966 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_line 0x00000000000055a8 0x915 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_line 0x0000000000005ebd 0x1a64 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_line 0x0000000000007921 0xbd0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_line 0x00000000000084f1 0xa9b Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_line 0x0000000000008f8c 0x9a5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_line 0x0000000000009931 0x91b Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_line 0x000000000000a24c 0x1b00 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_line 0x000000000000bd4c 0x8cf Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_line 0x000000000000c61b 0x8dc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_line 0x000000000000cef7 0xc3a Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_line 0x000000000000db31 0xede Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_line 0x000000000000ea0f 0xa57 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_line 0x000000000000f466 0x1c32 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_line 0x0000000000011098 0xe2c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_line 0x0000000000011ec4 0x12a4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_line 0x0000000000013168 0xc78 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_line 0x0000000000013de0 0xcd0 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_line 0x0000000000014ab0 0xd59 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_line 0x0000000000015809 0xb39 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_line 0x0000000000016342 0x66c Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_line 0x00000000000169ae 0x1443 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_line 0x0000000000017df1 0x6a3 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_line 0x0000000000018494 0xd5f USB_DEVICE/Target/usbd_conf.o - -.debug_str 0x0000000000000000 0xb9e5a - .debug_str 0x0000000000000000 0xa7113 Core/Src/MESCBLDC.o - 0xa7794 (size before relaxing) - .debug_str 0x00000000000a7113 0x13e Core/Src/MESCfoc.o - 0xa7842 (size before relaxing) - .debug_str 0x00000000000a7251 0x2e Core/Src/MESChw_setup.o - 0xa6f89 (size before relaxing) - .debug_str 0x00000000000a727f 0x9acf Core/Src/main.o - 0xb1541 (size before relaxing) - .debug_str 0x00000000000b0d4e 0x1bd Core/Src/stm32f3xx_hal_msp.o - 0xa8784 (size before relaxing) - .debug_str 0x00000000000b0f0b 0x98 Core/Src/stm32f3xx_hal_timebase_tim.o - 0xa7850 (size before relaxing) - .debug_str 0x00000000000b0fa3 0x3d5 Core/Src/stm32f3xx_it.o - 0xa7e18 (size before relaxing) - .debug_str 0x00000000000b1378 0xc7 Core/Src/system_stm32f3xx.o - 0xa6fce (size before relaxing) - .debug_str 0x00000000000b143f 0x36 Core/Startup/startup_stm32f303cbtx.o - 0x64 (size before relaxing) - .debug_str 0x00000000000b1475 0x384 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0xa7756 (size before relaxing) - .debug_str 0x00000000000b17f9 0x1cd Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - 0xa75e5 (size before relaxing) - .debug_str 0x00000000000b19c6 0x6ba Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - 0xa7c12 (size before relaxing) - .debug_str 0x00000000000b2080 0x19b Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - 0xa72ab (size before relaxing) - .debug_str 0x00000000000b221b 0x39f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - 0xa7864 (size before relaxing) - .debug_str 0x00000000000b25ba 0x252 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - 0xa7334 (size before relaxing) - .debug_str 0x00000000000b280c 0x20d Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - 0xa7220 (size before relaxing) - .debug_str 0x00000000000b2a19 0xddb Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - 0xa81bb (size before relaxing) - .debug_str 0x00000000000b37f4 0xf3 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - 0xa74f1 (size before relaxing) - .debug_str 0x00000000000b38e7 0x161 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - 0xa72ac (size before relaxing) - .debug_str 0x00000000000b3a48 0x39f Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - 0xa75dc (size before relaxing) - .debug_str 0x00000000000b3de7 0x2ef Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0xa7428 (size before relaxing) - .debug_str 0x00000000000b40d6 0xd8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - 0xa71ec (size before relaxing) - .debug_str 0x00000000000b41ae 0xcd2 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - 0xa81bb (size before relaxing) - .debug_str 0x00000000000b4e80 0x4d5 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - 0xa79c2 (size before relaxing) - .debug_str 0x00000000000b5355 0x7f0 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - 0xa7b88 (size before relaxing) - .debug_str 0x00000000000b5b45 0x308 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - 0xa7432 (size before relaxing) - .debug_str 0x00000000000b5e4d 0x556 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - 0xac498 (size before relaxing) - .debug_str 0x00000000000b63a3 0x134 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - 0xac41e (size before relaxing) - .debug_str 0x00000000000b64d7 0xc9 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - 0xac3a6 (size before relaxing) - .debug_str 0x00000000000b65a0 0x8f6 Middlewares/Third_Party/FreeRTOS/Source/list.o - 0xa3e3 (size before relaxing) - .debug_str 0x00000000000b6e96 0x237e Middlewares/Third_Party/FreeRTOS/Source/tasks.o - 0xc81f (size before relaxing) - .debug_str 0x00000000000b9214 0x803 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - 0x80dc (size before relaxing) - .debug_str 0x00000000000b9a17 0x443 USB_DEVICE/Target/usbd_conf.o - 0xad188 (size before relaxing) - -.comment 0x0000000000000000 0x7b - .comment 0x0000000000000000 0x7b Core/Src/MESCBLDC.o - 0x7c (size before relaxing) - .comment 0x000000000000007b 0x7c Core/Src/MESCfoc.o - .comment 0x000000000000007b 0x7c Core/Src/MESChw_setup.o - .comment 0x000000000000007b 0x7c Core/Src/main.o - .comment 0x000000000000007b 0x7c Core/Src/stm32f3xx_hal_msp.o - .comment 0x000000000000007b 0x7c Core/Src/stm32f3xx_hal_timebase_tim.o - .comment 0x000000000000007b 0x7c Core/Src/stm32f3xx_it.o - .comment 0x000000000000007b 0x7c Core/Src/system_stm32f3xx.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .comment 0x000000000000007b 0x7c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .comment 0x000000000000007b 0x7c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .comment 0x000000000000007b 0x7c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .comment 0x000000000000007b 0x7c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .comment 0x000000000000007b 0x7c Middlewares/Third_Party/FreeRTOS/Source/list.o - .comment 0x000000000000007b 0x7c Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .comment 0x000000000000007b 0x7c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .comment 0x000000000000007b 0x7c USB_DEVICE/Target/usbd_conf.o - -.debug_frame 0x0000000000000000 0x75a8 - .debug_frame 0x0000000000000000 0x8c Core/Src/MESCBLDC.o - .debug_frame 0x000000000000008c 0x1ac Core/Src/MESCfoc.o - .debug_frame 0x0000000000000238 0x50 Core/Src/MESChw_setup.o - .debug_frame 0x0000000000000288 0x384 Core/Src/main.o - .debug_frame 0x000000000000060c 0x25c Core/Src/stm32f3xx_hal_msp.o - .debug_frame 0x0000000000000868 0x74 Core/Src/stm32f3xx_hal_timebase_tim.o - .debug_frame 0x00000000000008dc 0x1e4 Core/Src/stm32f3xx_it.o - .debug_frame 0x0000000000000ac0 0x58 Core/Src/system_stm32f3xx.o - .debug_frame 0x0000000000000b18 0x334 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_frame 0x0000000000000e4c 0x380 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o - .debug_frame 0x00000000000011cc 0x644 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o - .debug_frame 0x0000000000001810 0x230 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o - .debug_frame 0x0000000000001a40 0x498 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_frame 0x0000000000001ed8 0x224 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o - .debug_frame 0x00000000000020fc 0x14c Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_frame 0x0000000000002248 0xbbc Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o - .debug_frame 0x0000000000002e04 0x100 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o - .debug_frame 0x0000000000002f04 0x198 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o - .debug_frame 0x000000000000309c 0x500 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o - .debug_frame 0x000000000000359c 0x214 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - .debug_frame 0x00000000000037b0 0xb4 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o - .debug_frame 0x0000000000003864 0x1190 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o - .debug_frame 0x00000000000049f4 0x610 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o - .debug_frame 0x0000000000005004 0x970 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o - .debug_frame 0x0000000000005974 0x4d8 Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o - .debug_frame 0x0000000000005e4c 0x300 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o - .debug_frame 0x000000000000614c 0x218 Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o - .debug_frame 0x0000000000006364 0x10c Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - .debug_frame 0x0000000000006470 0xd8 Middlewares/Third_Party/FreeRTOS/Source/list.o - .debug_frame 0x0000000000006548 0x8a8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o - .debug_frame 0x0000000000006df0 0x1a8 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - .debug_frame 0x0000000000006f98 0x4a4 USB_DEVICE/Target/usbd_conf.o - .debug_frame 0x000000000000743c 0x2c c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o) - .debug_frame 0x0000000000007468 0x20 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o) - .debug_frame 0x0000000000007488 0xac c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_addsubdf3.o) - .debug_frame 0x0000000000007534 0x50 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_muldivdf3.o) - .debug_frame 0x0000000000007584 0x24 c:/st/stm32cubeide_1.1.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_arm_truncdfsf2.o) diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/subdir.mk b/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/subdir.mk deleted file mode 100644 index efe68413..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/subdir.mk +++ /dev/null @@ -1,19 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c - -OBJS += \ -./Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o - -C_DEPS += \ -./Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.d - - -# Each subdirectory must supply rules for building sources it contributes -Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o: ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.d b/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.d deleted file mode 100644 index 076b0bfc..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.d +++ /dev/null @@ -1,154 +0,0 @@ -Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o: \ - ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c \ - ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../USB_DEVICE/Target/usbd_conf.h ../Core/Inc/main.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h - -../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../USB_DEVICE/Target/usbd_conf.h: - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o b/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o deleted file mode 100644 index c26b84d1..00000000 Binary files a/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o and /dev/null differ diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.su b/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.su deleted file mode 100644 index 1d53116a..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.su +++ /dev/null @@ -1,15 +0,0 @@ -usbd_cdc.c:471:17:USBD_CDC_Init 24 static -usbd_cdc.c:549:17:USBD_CDC_DeInit 24 static -usbd_cdc.c:583:17:USBD_CDC_Setup 32 static -usbd_cdc.c:677:17:USBD_CDC_DataIn 24 static -usbd_cdc.c:711:17:USBD_CDC_DataOut 24 static -usbd_cdc.c:738:17:USBD_CDC_EP0_RxReady 24 static -usbd_cdc.c:760:18:USBD_CDC_GetFSCfgDesc 16 static -usbd_cdc.c:773:18:USBD_CDC_GetHSCfgDesc 16 static -usbd_cdc.c:786:18:USBD_CDC_GetOtherSpeedCfgDesc 16 static -usbd_cdc.c:798:11:USBD_CDC_GetDeviceQualifierDescriptor 16 static -usbd_cdc.c:810:10:USBD_CDC_RegisterInterface 24 static -usbd_cdc.c:830:10:USBD_CDC_SetTxBuffer 32 static -usbd_cdc.c:849:10:USBD_CDC_SetRxBuffer 24 static -usbd_cdc.c:865:10:USBD_CDC_TransmitPacket 24 static -usbd_cdc.c:903:10:USBD_CDC_ReceivePacket 24 static diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/subdir.mk b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/subdir.mk deleted file mode 100644 index 5704955d..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/subdir.mk +++ /dev/null @@ -1,29 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c \ -../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c \ -../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c - -OBJS += \ -./Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o \ -./Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o \ -./Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o - -C_DEPS += \ -./Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.d \ -./Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.d \ -./Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.d - - -# Each subdirectory must supply rules for building sources it contributes -Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o: ../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o: ../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o: ../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.d b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.d deleted file mode 100644 index d70a1276..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.d +++ /dev/null @@ -1,148 +0,0 @@ -Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o: \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../USB_DEVICE/Target/usbd_conf.h ../Core/Inc/main.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../USB_DEVICE/Target/usbd_conf.h: - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o deleted file mode 100644 index fdd507a7..00000000 Binary files a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o and /dev/null differ diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.su b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.su deleted file mode 100644 index 9c794116..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.su +++ /dev/null @@ -1,20 +0,0 @@ -usbd_core.c:89:20:USBD_Init 24 static -usbd_core.c:128:20:USBD_DeInit 16 static -usbd_core.c:152:21:USBD_RegisterClass 24 static -usbd_core.c:178:21:USBD_Start 16 static -usbd_core.c:192:21:USBD_Stop 16 static -usbd_core.c:209:21:USBD_RunTestMode 16 static -usbd_core.c:225:20:USBD_SetClassConfig 24 static -usbd_core.c:248:20:USBD_ClrClassConfig 16 static -usbd_core.c:263:20:USBD_LL_SetupStage 16 static -usbd_core.c:300:20:USBD_LL_DataOutStage 32 static -usbd_core.c:361:20:USBD_LL_DataInStage 32 static -usbd_core.c:442:20:USBD_LL_Reset 16 static -usbd_core.c:476:20:USBD_LL_SetSpeed 16 static -usbd_core.c:491:20:USBD_LL_Suspend 16 static -usbd_core.c:506:20:USBD_LL_Resume 16 static -usbd_core.c:523:20:USBD_LL_SOF 16 static -usbd_core.c:542:20:USBD_LL_IsoINIncomplete 16 static -usbd_core.c:558:20:USBD_LL_IsoOUTIncomplete 16 static -usbd_core.c:574:20:USBD_LL_DevConnected 16 static -usbd_core.c:588:20:USBD_LL_DevDisconnected 16 static diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.d b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.d deleted file mode 100644 index 43d334b6..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.d +++ /dev/null @@ -1,151 +0,0 @@ -Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o: \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../USB_DEVICE/Target/usbd_conf.h ../Core/Inc/main.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../USB_DEVICE/Target/usbd_conf.h: - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o deleted file mode 100644 index c7ac54d5..00000000 Binary files a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o and /dev/null differ diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.su b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.su deleted file mode 100644 index d38865ff..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.su +++ /dev/null @@ -1,14 +0,0 @@ -usbd_ctlreq.c:114:21:USBD_StdDevReq 24 static -usbd_ctlreq.c:178:21:USBD_StdItfReq 24 static -usbd_ctlreq.c:230:21:USBD_StdEPReq 24 static -usbd_ctlreq.c:405:13:USBD_GetDescriptor 24 static -usbd_ctlreq.c:595:13:USBD_SetAddress 24 static -usbd_ctlreq.c:637:13:USBD_SetConfig 16 static -usbd_ctlreq.c:712:13:USBD_GetConfig 16 static -usbd_ctlreq.c:746:13:USBD_GetStatus 16 static -usbd_ctlreq.c:787:13:USBD_SetFeature 16 static -usbd_ctlreq.c:805:13:USBD_ClrFeature 16 static -usbd_ctlreq.c:834:6:USBD_ParseSetupRequest 16 static -usbd_ctlreq.c:852:6:USBD_CtlError 16 static -usbd_ctlreq.c:868:6:USBD_GetString 32 static -usbd_ctlreq.c:892:16:USBD_GetLen 24 static diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.d b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.d deleted file mode 100644 index 3e995f60..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.d +++ /dev/null @@ -1,148 +0,0 @@ -Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o: \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../USB_DEVICE/Target/usbd_conf.h ../Core/Inc/main.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../USB_DEVICE/Target/usbd_conf.h: - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o deleted file mode 100644 index ec892a27..00000000 Binary files a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o and /dev/null differ diff --git a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.su b/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.su deleted file mode 100644 index c95025ce..00000000 --- a/Debug/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.su +++ /dev/null @@ -1,7 +0,0 @@ -usbd_ioreq.c:87:20:USBD_CtlSendData 24 static -usbd_ioreq.c:109:20:USBD_CtlContinueSendData 24 static -usbd_ioreq.c:126:20:USBD_CtlPrepareRx 24 static -usbd_ioreq.c:148:20:USBD_CtlContinueRx 24 static -usbd_ioreq.c:162:20:USBD_CtlSendStatus 16 static -usbd_ioreq.c:179:20:USBD_CtlReceiveStatus 16 static -usbd_ioreq.c:197:10:USBD_GetRxCount 16 static diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.d deleted file mode 100644 index 76cb8932..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.d +++ /dev/null @@ -1,53 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h - -../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o deleted file mode 100644 index 4da96f95..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.su deleted file mode 100644 index 0e1dd3c3..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.su +++ /dev/null @@ -1,66 +0,0 @@ -cmsis_os2.c:135:12:osKernelInitialize 24 static,ignoring_inline_asm -cmsis_os2.c:156:12:osKernelGetInfo 24 static -cmsis_os2.c:173:17:osKernelGetState 16 static -cmsis_os2.c:198:12:osKernelStart 24 static,ignoring_inline_asm -cmsis_os2.c:217:9:osKernelLock 24 static,ignoring_inline_asm -cmsis_os2.c:244:9:osKernelUnlock 24 static,ignoring_inline_asm -cmsis_os2.c:276:9:osKernelRestoreLock 32 static,ignoring_inline_asm -cmsis_os2.c:312:10:osKernelGetTickCount 24 static,ignoring_inline_asm -cmsis_os2.c:324:10:osKernelGetTickFreq 4 static -cmsis_os2.c:328:10:osKernelGetSysTimerCount 24 static,ignoring_inline_asm -cmsis_os2.c:342:10:osKernelGetSysTimerFreq 4 static -cmsis_os2.c:348:14:osThreadNew 80 static,ignoring_inline_asm -cmsis_os2.c:414:13:osThreadGetName 40 static,ignoring_inline_asm -cmsis_os2.c:427:14:osThreadGetId 24 static,ignoring_inline_asm -cmsis_os2.c:439:17:osThreadGetState 40 static,ignoring_inline_asm -cmsis_os2.c:461:10:osThreadGetStackSpace 40 static,ignoring_inline_asm -cmsis_os2.c:474:10:osThreadGetStackSize 16 static -cmsis_os2.c:484:12:osThreadSetPriority 40 static,ignoring_inline_asm -cmsis_os2.c:502:14:osThreadGetPriority 40 static,ignoring_inline_asm -cmsis_os2.c:515:12:osThreadYield 24 static,ignoring_inline_asm -cmsis_os2.c:528:12:osThreadSuspend 40 static,ignoring_inline_asm -cmsis_os2.c:546:12:osThreadResume 40 static,ignoring_inline_asm -cmsis_os2.c:564:18:osThreadExit 8 static -cmsis_os2.c:571:12:osThreadTerminate 40 static,ignoring_inline_asm -cmsis_os2.c:600:10:osThreadGetCount 24 static,ignoring_inline_asm -cmsis_os2.c:612:10:osThreadEnumerate 40 static,ignoring_inline_asm -cmsis_os2.c:640:10:osThreadFlagsSet 48 static,ignoring_inline_asm -cmsis_os2.c:668:10:osThreadFlagsClear 40 static,ignoring_inline_asm -cmsis_os2.c:698:10:osThreadFlagsGet 32 static,ignoring_inline_asm -cmsis_os2.c:716:10:osThreadFlagsWait 64 static,ignoring_inline_asm -cmsis_os2.c:791:12:osDelay 32 static,ignoring_inline_asm -cmsis_os2.c:808:12:osDelayUntil 40 static,ignoring_inline_asm -cmsis_os2.c:827:13:TimerCallback 24 static -cmsis_os2.c:837:13:osTimerNew 64 static,ignoring_inline_asm -cmsis_os2.c:895:13:osTimerGetName 40 static,ignoring_inline_asm -cmsis_os2.c:908:12:osTimerStart 48 static,ignoring_inline_asm -cmsis_os2.c:929:12:osTimerStop 48 static,ignoring_inline_asm -cmsis_os2.c:955:10:osTimerIsRunning 40 static,ignoring_inline_asm -cmsis_os2.c:968:12:osTimerDelete 48 static,ignoring_inline_asm -cmsis_os2.c:999:18:osEventFlagsNew 40 static,ignoring_inline_asm -cmsis_os2.c:1035:10:osEventFlagsSet 40 static,ignoring_inline_asm -cmsis_os2.c:1060:10:osEventFlagsClear 40 static,ignoring_inline_asm -cmsis_os2.c:1081:10:osEventFlagsGet 40 static,ignoring_inline_asm -cmsis_os2.c:1098:10:osEventFlagsWait 64 static,ignoring_inline_asm -cmsis_os2.c:1148:12:osEventFlagsDelete 40 static,ignoring_inline_asm -cmsis_os2.c:1172:13:osMutexNew 48 static,ignoring_inline_asm -cmsis_os2.c:1251:12:osMutexAcquire 40 static,ignoring_inline_asm -cmsis_os2.c:1292:12:osMutexRelease 40 static,ignoring_inline_asm -cmsis_os2.c:1325:14:osMutexGetOwner 40 static,ignoring_inline_asm -cmsis_os2.c:1340:12:osMutexDelete 40 static,ignoring_inline_asm -cmsis_os2.c:1369:17:osSemaphoreNew 56 static,ignoring_inline_asm -cmsis_os2.c:1436:12:osSemaphoreAcquire 40 static,ignoring_inline_asm -cmsis_os2.c:1473:12:osSemaphoreRelease 40 static,ignoring_inline_asm -cmsis_os2.c:1501:10:osSemaphoreGetCount 40 static,ignoring_inline_asm -cmsis_os2.c:1517:12:osSemaphoreDelete 40 static,ignoring_inline_asm -cmsis_os2.c:1545:20:osMessageQueueNew 56 static,ignoring_inline_asm -cmsis_os2.c:1598:12:osMessageQueuePut 48 static,ignoring_inline_asm -cmsis_os2.c:1639:12:osMessageQueueGet 48 static,ignoring_inline_asm -cmsis_os2.c:1680:10:osMessageQueueGetCapacity 24 static -cmsis_os2.c:1694:10:osMessageQueueGetMsgSize 24 static -cmsis_os2.c:1708:10:osMessageQueueGetCount 40 static,ignoring_inline_asm -cmsis_os2.c:1725:10:osMessageQueueGetSpace 56 static,ignoring_inline_asm -cmsis_os2.c:1748:12:osMessageQueueReset 40 static,ignoring_inline_asm -cmsis_os2.c:1766:12:osMessageQueueDelete 40 static,ignoring_inline_asm -cmsis_os2.c:1857:6:vApplicationGetIdleTaskMemory 24 static -cmsis_os2.c:1867:6:vApplicationGetTimerTaskMemory 24 static diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/subdir.mk b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/subdir.mk deleted file mode 100644 index 7546f5bd..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/subdir.mk +++ /dev/null @@ -1,19 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c - -OBJS += \ -./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o - -C_DEPS += \ -./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.d - - -# Each subdirectory must supply rules for building sources it contributes -Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.d deleted file mode 100644 index 42b8170e..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.d +++ /dev/null @@ -1,32 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/croutine.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/croutine.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o deleted file mode 100644 index 44cdf813..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.su deleted file mode 100644 index e69de29b..00000000 diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.d deleted file mode 100644 index d5caa677..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.d +++ /dev/null @@ -1,41 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/event_groups.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o deleted file mode 100644 index 44eccd76..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.su deleted file mode 100644 index 0ab73d4c..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.su +++ /dev/null @@ -1,15 +0,0 @@ -event_groups.c:93:21:xEventGroupCreateStatic 32 static,ignoring_inline_asm -event_groups.c:142:21:xEventGroupCreate 16 static -event_groups.c:176:13:xEventGroupSync 56 static,ignoring_inline_asm -event_groups.c:296:13:xEventGroupWaitBits 72 static,ignoring_inline_asm -event_groups.c:446:13:xEventGroupClearBits 32 static,ignoring_inline_asm -event_groups.c:475:13:xEventGroupClearBitsFromISR 24 static -event_groups.c:488:13:xEventGroupGetBitsFromISR 40 static,ignoring_inline_asm -event_groups.c:504:13:xEventGroupSetBits 64 static,ignoring_inline_asm -event_groups.c:598:6:vEventGroupDelete 32 static,ignoring_inline_asm -event_groups.c:642:6:vEventGroupSetBitsCallback 16 static -event_groups.c:650:6:vEventGroupClearBitsCallback 16 static -event_groups.c:656:19:prvTestWaitCondition 32 static -event_groups.c:693:13:xEventGroupSetBitsFromISR 32 static -event_groups.c:708:14:uxEventGroupGetNumber 24 static -event_groups.c:730:7:vEventGroupSetNumber 16 static diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.d deleted file mode 100644 index 947b914e..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.d +++ /dev/null @@ -1,26 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/list.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/list.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o deleted file mode 100644 index 9270ecf4..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.su deleted file mode 100644 index e840c828..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.su +++ /dev/null @@ -1,5 +0,0 @@ -list.c:37:6:vListInitialise 16 static -list.c:62:6:vListInitialiseItem 16 static -list.c:74:6:vListInsertEnd 24 static -list.c:103:6:vListInsert 24 static -list.c:170:13:uxListRemove 24 static diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d deleted file mode 100644 index bf645dbc..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d +++ /dev/null @@ -1,29 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o deleted file mode 100644 index c72c3eba..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.su deleted file mode 100644 index 10f269aa..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.su +++ /dev/null @@ -1,13 +0,0 @@ -port.c:187:14:pxPortInitialiseStack 24 static -port.c:217:13:prvTaskExitError 24 static,ignoring_inline_asm -port.c:242:6:SVC_Handler 0 static,ignoring_inline_asm -port.c:261:13:prvPortStartFirstTask 0 static,ignoring_inline_asm -port.c:287:12:xPortStartScheduler 32 static,ignoring_inline_asm -port.c:395:6:vPortEndScheduler 16 static,ignoring_inline_asm -port.c:403:6:vPortEnterCritical 16 static,ignoring_inline_asm -port.c:420:6:vPortExitCritical 16 static,ignoring_inline_asm -port.c:431:6:PendSV_Handler 0 static,ignoring_inline_asm -port.c:488:6:SysTick_Handler 16 static,ignoring_inline_asm -port.c:679:30:vPortSetupTimerInterrupt 4 static -port.c:701:13:vPortEnableVFP 0 static,ignoring_inline_asm -port.c:717:7:vPortValidateInterruptPriority 24 static,ignoring_inline_asm diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/subdir.mk b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/subdir.mk deleted file mode 100644 index 7804c614..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/subdir.mk +++ /dev/null @@ -1,19 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c - -OBJS += \ -./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o - -C_DEPS += \ -./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d - - -# Each subdirectory must supply rules for building sources it contributes -Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d deleted file mode 100644 index 7c7fccbb..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d +++ /dev/null @@ -1,29 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o deleted file mode 100644 index b105b85a..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.su deleted file mode 100644 index 5f8251a6..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.su +++ /dev/null @@ -1,7 +0,0 @@ -heap_4.c:113:7:pvPortMalloc 48 static,ignoring_inline_asm -heap_4.c:263:6:vPortFree 32 static,ignoring_inline_asm -heap_4.c:311:8:xPortGetFreeHeapSize 4 static -heap_4.c:317:8:xPortGetMinimumEverFreeHeapSize 4 static -heap_4.c:323:6:vPortInitialiseBlocks 4 static -heap_4.c:329:13:prvHeapInit 24 static -heap_4.c:377:13:prvInsertBlockIntoFreeList 24 static diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk deleted file mode 100644 index 994c3eed..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk +++ /dev/null @@ -1,19 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c - -OBJS += \ -./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o - -C_DEPS += \ -./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d - - -# Each subdirectory must supply rules for building sources it contributes -Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.d deleted file mode 100644 index 8ee76e3e..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.d +++ /dev/null @@ -1,32 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/queue.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/queue.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o deleted file mode 100644 index 38050c64..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.su deleted file mode 100644 index 2a83e614..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.su +++ /dev/null @@ -1,40 +0,0 @@ -queue.c:247:12:xQueueGenericReset 24 static,ignoring_inline_asm -queue.c:302:16:xQueueGenericCreateStatic 64 static,ignoring_inline_asm -queue.c:358:16:xQueueGenericCreate 48 static,ignoring_inline_asm -queue.c:408:13:prvInitialiseNewQueue 24 static -queue.c:452:14:prvInitialiseMutex 16 static -queue.c:482:16:xQueueCreateMutex 32 static -queue.c:498:16:xQueueCreateMutexStatic 40 static -queue.c:518:8:xQueueGetMutexHolder 24 static -queue.c:548:8:xQueueGetMutexHolderFromISR 24 static,ignoring_inline_asm -queue.c:574:13:xQueueGiveMutexRecursive 40 static,ignoring_inline_asm -queue.c:629:13:xQueueTakeMutexRecursive 40 static,ignoring_inline_asm -queue.c:671:16:xQueueCreateCountingSemaphoreStatic 48 static,ignoring_inline_asm -queue.c:699:16:xQueueCreateCountingSemaphore 32 static,ignoring_inline_asm -queue.c:725:12:xQueueGenericSend 64 static,ignoring_inline_asm -queue.c:923:12:xQueueGenericSendFromISR 64 static,ignoring_inline_asm -queue.c:1074:12:xQueueGiveFromISR 64 static,ignoring_inline_asm -queue.c:1239:12:xQueueReceive 56 static,ignoring_inline_asm -queue.c:1380:12:xQueueSemaphoreTake 64 static,ignoring_inline_asm -queue.c:1599:12:xQueuePeek 64 static,ignoring_inline_asm -queue.c:1749:12:xQueueReceiveFromISR 64 static,ignoring_inline_asm -queue.c:1840:12:xQueuePeekFromISR 56 static,ignoring_inline_asm -queue.c:1894:13:uxQueueMessagesWaiting 24 static,ignoring_inline_asm -queue.c:1910:13:uxQueueSpacesAvailable 32 static,ignoring_inline_asm -queue.c:1928:13:uxQueueMessagesWaitingFromISR 24 static,ignoring_inline_asm -queue.c:1940:6:vQueueDelete 24 static,ignoring_inline_asm -queue.c:1984:14:uxQueueGetQueueNumber 16 static -queue.c:1994:7:vQueueSetQueueNumber 16 static -queue.c:2004:10:ucQueueGetQueueType 16 static -queue.c:2014:21:prvGetDisinheritPriorityAfterTimeout 24 static -queue.c:2039:19:prvCopyDataToQueue 32 static -queue.c:2118:13:prvCopyDataFromQueue 16 static -queue.c:2136:13:prvUnlockQueue 24 static -queue.c:2256:19:prvIsQueueEmpty 24 static -queue.c:2277:12:xQueueIsQueueEmptyFromISR 24 static,ignoring_inline_asm -queue.c:2295:19:prvIsQueueFull 24 static -queue.c:2316:12:xQueueIsQueueFullFromISR 24 static,ignoring_inline_asm -queue.c:2611:7:vQueueAddToRegistry 24 static -queue.c:2640:14:pcQueueGetName 24 static -queue.c:2668:7:vQueueUnregisterQueue 24 static -queue.c:2700:7:vQueueWaitForMessageRestricted 32 static diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d deleted file mode 100644 index 9e4b9777..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d +++ /dev/null @@ -1,32 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o deleted file mode 100644 index f9078eb9..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.su deleted file mode 100644 index 29bbf8eb..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.su +++ /dev/null @@ -1,24 +0,0 @@ -stream_buffer.c:219:23:xStreamBufferGenericCreate 48 static,ignoring_inline_asm -stream_buffer.c:271:23:xStreamBufferGenericCreateStatic 64 static,ignoring_inline_asm -stream_buffer.c:335:6:vStreamBufferDelete 24 static,ignoring_inline_asm -stream_buffer.c:368:12:xStreamBufferReset 48 static,ignoring_inline_asm -stream_buffer.c:422:12:xStreamBufferSetTriggerLevel 32 static,ignoring_inline_asm -stream_buffer.c:451:8:xStreamBufferSpacesAvailable 32 static,ignoring_inline_asm -stream_buffer.c:475:8:xStreamBufferBytesAvailable 32 static,ignoring_inline_asm -stream_buffer.c:487:8:xStreamBufferSend 72 static,ignoring_inline_asm -stream_buffer.c:588:8:xStreamBufferSendFromISR 72 static,ignoring_inline_asm -stream_buffer.c:639:15:prvWriteMessageToBuffer 32 static -stream_buffer.c:691:8:xStreamBufferReceive 64 static,ignoring_inline_asm -stream_buffer.c:795:8:xStreamBufferReceiveFromISR 72 static,ignoring_inline_asm -stream_buffer.c:852:15:prvReadMessageFromBuffer 40 static -stream_buffer.c:902:12:xStreamBufferIsEmpty 32 static,ignoring_inline_asm -stream_buffer.c:925:12:xStreamBufferIsFull 32 static,ignoring_inline_asm -stream_buffer.c:960:12:xStreamBufferSendCompletedFromISR 56 static,ignoring_inline_asm -stream_buffer.c:990:12:xStreamBufferReceiveCompletedFromISR 56 static,ignoring_inline_asm -stream_buffer.c:1020:15:prvWriteBytesToBuffer 48 static,ignoring_inline_asm -stream_buffer.c:1066:15:prvReadBytesFromBuffer 48 static,ignoring_inline_asm -stream_buffer.c:1121:15:prvBytesInBuffer 24 static -stream_buffer.c:1141:13:prvInitialiseNewStreamBuffer 32 static,ignoring_inline_asm -stream_buffer.c:1173:14:uxStreamBufferGetStreamBufferNumber 16 static -stream_buffer.c:1183:7:vStreamBufferSetStreamBufferNumber 16 static -stream_buffer.c:1193:10:ucStreamBufferGetStreamBufferType 16 static diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk b/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk deleted file mode 100644 index 07c8fbd5..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk +++ /dev/null @@ -1,49 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Middlewares/Third_Party/FreeRTOS/Source/croutine.c \ -../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c \ -../Middlewares/Third_Party/FreeRTOS/Source/list.c \ -../Middlewares/Third_Party/FreeRTOS/Source/queue.c \ -../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c \ -../Middlewares/Third_Party/FreeRTOS/Source/tasks.c \ -../Middlewares/Third_Party/FreeRTOS/Source/timers.c - -OBJS += \ -./Middlewares/Third_Party/FreeRTOS/Source/croutine.o \ -./Middlewares/Third_Party/FreeRTOS/Source/event_groups.o \ -./Middlewares/Third_Party/FreeRTOS/Source/list.o \ -./Middlewares/Third_Party/FreeRTOS/Source/queue.o \ -./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o \ -./Middlewares/Third_Party/FreeRTOS/Source/tasks.o \ -./Middlewares/Third_Party/FreeRTOS/Source/timers.o - -C_DEPS += \ -./Middlewares/Third_Party/FreeRTOS/Source/croutine.d \ -./Middlewares/Third_Party/FreeRTOS/Source/event_groups.d \ -./Middlewares/Third_Party/FreeRTOS/Source/list.d \ -./Middlewares/Third_Party/FreeRTOS/Source/queue.d \ -./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d \ -./Middlewares/Third_Party/FreeRTOS/Source/tasks.d \ -./Middlewares/Third_Party/FreeRTOS/Source/timers.d - - -# Each subdirectory must supply rules for building sources it contributes -Middlewares/Third_Party/FreeRTOS/Source/croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/croutine.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/croutine.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Middlewares/Third_Party/FreeRTOS/Source/event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/event_groups.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Middlewares/Third_Party/FreeRTOS/Source/list.o: ../Middlewares/Third_Party/FreeRTOS/Source/list.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/list.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Middlewares/Third_Party/FreeRTOS/Source/queue.o: ../Middlewares/Third_Party/FreeRTOS/Source/queue.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/queue.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o: ../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Middlewares/Third_Party/FreeRTOS/Source/tasks.o: ../Middlewares/Third_Party/FreeRTOS/Source/tasks.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/tasks.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -Middlewares/Third_Party/FreeRTOS/Source/timers.o: ../Middlewares/Third_Party/FreeRTOS/Source/timers.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/timers.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.d deleted file mode 100644 index 9e37e6da..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.d +++ /dev/null @@ -1,38 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/tasks.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/tasks.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o deleted file mode 100644 index e32a7855..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su deleted file mode 100644 index 2eaced64..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su +++ /dev/null @@ -1,60 +0,0 @@ -tasks.c:575:15:xTaskCreateStatic 64 static,ignoring_inline_asm -tasks.c:726:13:xTaskCreate 56 static -tasks.c:817:13:prvInitialiseNewTask 40 static,ignoring_inline_asm -tasks.c:1021:13:prvAddNewTaskToReadyList 16 static,ignoring_inline_asm -tasks.c:1106:7:vTaskDelete 24 static,ignoring_inline_asm -tasks.c:1198:7:vTaskDelayUntil 48 static,ignoring_inline_asm -tasks.c:1282:7:vTaskDelay 24 static,ignoring_inline_asm -tasks.c:1327:13:eTaskGetState 32 static,ignoring_inline_asm -tasks.c:1398:14:uxTaskPriorityGet 24 static -tasks.c:1420:14:uxTaskPriorityGetFromISR 40 static,ignoring_inline_asm -tasks.c:1460:7:vTaskPrioritySet 40 static,ignoring_inline_asm -tasks.c:1624:7:vTaskSuspend 24 static,ignoring_inline_asm -tasks.c:1725:20:prvTaskIsTaskSuspended 32 static,ignoring_inline_asm -tasks.c:1771:7:vTaskResume 24 static,ignoring_inline_asm -tasks.c:1825:13:xTaskResumeFromISR 48 static,ignoring_inline_asm -tasks.c:1895:6:vTaskStartScheduler 48 static,ignoring_inline_asm -tasks.c:2015:6:vTaskEndScheduler 16 static,ignoring_inline_asm -tasks.c:2026:6:vTaskSuspendAll 4 static -tasks.c:2099:12:xTaskResumeAll 24 static,ignoring_inline_asm -tasks.c:2209:12:xTaskGetTickCount 16 static -tasks.c:2224:12:xTaskGetTickCountFromISR 16 static -tasks.c:2255:13:uxTaskGetNumberOfTasks 4 static -tasks.c:2263:7:pcTaskGetName 24 static,ignoring_inline_asm -tasks.c:2403:14:uxTaskGetSystemState 32 static -tasks.c:2583:12:xTaskIncrementTick 32 static,ignoring_inline_asm -tasks.c:2845:6:vTaskSwitchContext 24 static,ignoring_inline_asm -tasks.c:2904:6:vTaskPlaceOnEventList 24 static,ignoring_inline_asm -tasks.c:2921:6:vTaskPlaceOnUnorderedEventList 32 static,ignoring_inline_asm -tasks.c:2947:7:vTaskPlaceOnEventListRestricted 32 static,ignoring_inline_asm -tasks.c:2978:12:xTaskRemoveFromEventList 32 static,ignoring_inline_asm -tasks.c:3046:6:vTaskRemoveFromUnorderedEventList 32 static,ignoring_inline_asm -tasks.c:3080:6:vTaskSetTimeOutState 24 static,ignoring_inline_asm -tasks.c:3092:6:vTaskInternalSetTimeOutState 16 static -tasks.c:3100:12:xTaskCheckForTimeOut 40 static,ignoring_inline_asm -tasks.c:3163:6:vTaskMissedYield 4 static -tasks.c:3171:14:uxTaskGetTaskNumber 24 static -tasks.c:3194:7:vTaskSetTaskNumber 24 static -tasks.c:3218:8:prvIdleTask 16 static,ignoring_inline_asm -tasks.c:3430:13:prvInitialiseTaskLists 16 static -tasks.c:3462:13:prvCheckTasksWaitingTermination 16 static -tasks.c:3493:7:vTaskGetInfo 32 static -tasks.c:3589:21:prvListTasksWithinSingleList 48 static -tasks.c:3622:18:prvTaskCheckFreeStackSpace 24 static -tasks.c:3642:14:uxTaskGetStackHighWaterMark 32 static -tasks.c:3670:14:prvDeleteTCB 24 static,ignoring_inline_asm -tasks.c:3724:13:prvResetNextTaskUnblockTime 16 static -tasks.c:3750:15:xTaskGetCurrentTaskHandle 16 static -tasks.c:3767:13:xTaskGetSchedulerState 16 static -tasks.c:3795:13:xTaskPriorityInherit 24 static -tasks.c:3882:13:xTaskPriorityDisinherit 32 static,ignoring_inline_asm -tasks.c:3962:7:vTaskPriorityDisinheritAfterTimeout 40 static,ignoring_inline_asm -tasks.c:4376:12:uxTaskResetEventItemValue 16 static -tasks.c:4392:8:pvTaskIncrementMutexHeldCount 4 static -tasks.c:4409:11:ulTaskNotifyTake 24 static,ignoring_inline_asm -tasks.c:4477:13:xTaskNotifyWait 32 static,ignoring_inline_asm -tasks.c:4557:13:xTaskGenericNotify 48 static,ignoring_inline_asm -tasks.c:4663:13:xTaskGenericNotifyFromISR 64 static,ignoring_inline_asm -tasks.c:4787:7:vTaskNotifyGiveFromISR 48 static,ignoring_inline_asm -tasks.c:4876:13:xTaskNotifyStateClear 24 static -tasks.c:4906:13:prvAddCurrentTaskToDelayedList 24 static diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.d b/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.d deleted file mode 100644 index 61ad60d4..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.d +++ /dev/null @@ -1,38 +0,0 @@ -Middlewares/Third_Party/FreeRTOS/Source/timers.o: \ - ../Middlewares/Third_Party/FreeRTOS/Source/timers.c \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \ - ../Core/Inc/FreeRTOSConfig.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \ - ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h - -../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h: - -../Core/Inc/FreeRTOSConfig.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h: - -../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/list.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h: - -../Middlewares/Third_Party/FreeRTOS/Source/include/task.h: diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o deleted file mode 100644 index 1fb559ed..00000000 Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o and /dev/null differ diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.su deleted file mode 100644 index 0bb648aa..00000000 --- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.su +++ /dev/null @@ -1,25 +0,0 @@ -timers.c:223:12:xTimerCreateTimerTask 48 static,ignoring_inline_asm -timers.c:278:16:xTimerCreate 40 static -timers.c:310:16:xTimerCreateStatic 48 static,ignoring_inline_asm -timers.c:352:13:prvInitialiseNewTimer 32 static,ignoring_inline_asm -timers.c:381:12:xTimerGenericCommand 48 static,ignoring_inline_asm -timers.c:424:14:xTimerGetTimerDaemonTaskHandle 16 static,ignoring_inline_asm -timers.c:433:12:xTimerGetPeriod 24 static,ignoring_inline_asm -timers.c:442:12:xTimerGetExpiryTime 32 static,ignoring_inline_asm -timers.c:453:14:pcTimerGetName 24 static,ignoring_inline_asm -timers.c:462:13:prvProcessExpiredTimer 40 static,ignoring_inline_asm -timers.c:502:13:prvTimerTask 24 static -timers.c:538:13:prvProcessTimerOrBlockTask 24 static,ignoring_inline_asm -timers.c:598:19:prvGetNextExpireTime 24 static -timers.c:624:19:prvSampleTimeNow 24 static -timers.c:647:19:prvInsertTimerInActiveList 32 static -timers.c:688:13:prvProcessReceivedCommands 64 static,ignoring_inline_asm -timers.c:835:13:prvSwitchTimerLists 40 static,ignoring_inline_asm -timers.c:894:13:prvCheckForValidListAndQueue 16 static -timers.c:945:12:xTimerIsTimerActive 32 static,ignoring_inline_asm -timers.c:966:7:pvTimerGetTimerID 32 static,ignoring_inline_asm -timers.c:983:6:vTimerSetTimerID 24 static,ignoring_inline_asm -timers.c:999:13:xTimerPendFunctionCallFromISR 48 static -timers.c:1023:13:xTimerPendFunctionCall 48 static,ignoring_inline_asm -timers.c:1052:14:uxTimerGetTimerNumber 16 static -timers.c:1062:7:vTimerSetTimerNumber 16 static diff --git a/Debug/USB_DEVICE/App/subdir.mk b/Debug/USB_DEVICE/App/subdir.mk deleted file mode 100644 index c17525cd..00000000 --- a/Debug/USB_DEVICE/App/subdir.mk +++ /dev/null @@ -1,29 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../USB_DEVICE/App/usb_device.c \ -../USB_DEVICE/App/usbd_cdc_if.c \ -../USB_DEVICE/App/usbd_desc.c - -OBJS += \ -./USB_DEVICE/App/usb_device.o \ -./USB_DEVICE/App/usbd_cdc_if.o \ -./USB_DEVICE/App/usbd_desc.o - -C_DEPS += \ -./USB_DEVICE/App/usb_device.d \ -./USB_DEVICE/App/usbd_cdc_if.d \ -./USB_DEVICE/App/usbd_desc.d - - -# Each subdirectory must supply rules for building sources it contributes -USB_DEVICE/App/usb_device.o: ../USB_DEVICE/App/usb_device.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"USB_DEVICE/App/usb_device.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -USB_DEVICE/App/usbd_cdc_if.o: ../USB_DEVICE/App/usbd_cdc_if.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"USB_DEVICE/App/usbd_cdc_if.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" -USB_DEVICE/App/usbd_desc.o: ../USB_DEVICE/App/usbd_desc.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"USB_DEVICE/App/usbd_desc.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/USB_DEVICE/App/usb_device.d b/Debug/USB_DEVICE/App/usb_device.d deleted file mode 100644 index be97b568..00000000 --- a/Debug/USB_DEVICE/App/usb_device.d +++ /dev/null @@ -1,165 +0,0 @@ -USB_DEVICE/App/usb_device.o: ../USB_DEVICE/App/usb_device.c \ - ../USB_DEVICE/App/usb_device.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../USB_DEVICE/Target/usbd_conf.h ../Core/Inc/main.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ - ../USB_DEVICE/App/usbd_desc.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../USB_DEVICE/App/usbd_cdc_if.h - -../USB_DEVICE/App/usb_device.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../USB_DEVICE/Target/usbd_conf.h: - -../Core/Inc/main.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: - -../USB_DEVICE/App/usbd_desc.h: - -../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../USB_DEVICE/App/usbd_cdc_if.h: diff --git a/Debug/USB_DEVICE/App/usb_device.o b/Debug/USB_DEVICE/App/usb_device.o deleted file mode 100644 index 460afc58..00000000 Binary files a/Debug/USB_DEVICE/App/usb_device.o and /dev/null differ diff --git a/Debug/USB_DEVICE/App/usb_device.su b/Debug/USB_DEVICE/App/usb_device.su deleted file mode 100644 index 817cd0da..00000000 --- a/Debug/USB_DEVICE/App/usb_device.su +++ /dev/null @@ -1 +0,0 @@ -usb_device.c:65:6:MX_USB_DEVICE_Init 8 static diff --git a/Debug/USB_DEVICE/App/usbd_cdc_if.d b/Debug/USB_DEVICE/App/usbd_cdc_if.d deleted file mode 100644 index a26ea72e..00000000 --- a/Debug/USB_DEVICE/App/usbd_cdc_if.d +++ /dev/null @@ -1,153 +0,0 @@ -USB_DEVICE/App/usbd_cdc_if.o: ../USB_DEVICE/App/usbd_cdc_if.c \ - ../USB_DEVICE/App/usbd_cdc_if.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../USB_DEVICE/Target/usbd_conf.h ../Core/Inc/main.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h - -../USB_DEVICE/App/usbd_cdc_if.h: - -../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../USB_DEVICE/Target/usbd_conf.h: - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/Debug/USB_DEVICE/App/usbd_cdc_if.o b/Debug/USB_DEVICE/App/usbd_cdc_if.o deleted file mode 100644 index a6d3c0e5..00000000 Binary files a/Debug/USB_DEVICE/App/usbd_cdc_if.o and /dev/null differ diff --git a/Debug/USB_DEVICE/App/usbd_cdc_if.su b/Debug/USB_DEVICE/App/usbd_cdc_if.su deleted file mode 100644 index 37b8b429..00000000 --- a/Debug/USB_DEVICE/App/usbd_cdc_if.su +++ /dev/null @@ -1,5 +0,0 @@ -usbd_cdc_if.c:155:15:CDC_Init_FS 8 static -usbd_cdc_if.c:169:15:CDC_DeInit_FS 4 static -usbd_cdc_if.c:183:15:CDC_Control_FS 16 static -usbd_cdc_if.c:264:15:CDC_Receive_FS 16 static -usbd_cdc_if.c:284:9:CDC_Transmit_FS 24 static diff --git a/Debug/USB_DEVICE/App/usbd_desc.d b/Debug/USB_DEVICE/App/usbd_desc.d deleted file mode 100644 index c71db238..00000000 --- a/Debug/USB_DEVICE/App/usbd_desc.d +++ /dev/null @@ -1,153 +0,0 @@ -USB_DEVICE/App/usbd_desc.o: ../USB_DEVICE/App/usbd_desc.c \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../USB_DEVICE/Target/usbd_conf.h ../Core/Inc/main.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ - ../USB_DEVICE/App/usbd_desc.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../USB_DEVICE/Target/usbd_conf.h: - -../Core/Inc/main.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: - -../USB_DEVICE/App/usbd_desc.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: diff --git a/Debug/USB_DEVICE/App/usbd_desc.o b/Debug/USB_DEVICE/App/usbd_desc.o deleted file mode 100644 index b2539a6a..00000000 Binary files a/Debug/USB_DEVICE/App/usbd_desc.o and /dev/null differ diff --git a/Debug/USB_DEVICE/App/usbd_desc.su b/Debug/USB_DEVICE/App/usbd_desc.su deleted file mode 100644 index 046c2b6d..00000000 --- a/Debug/USB_DEVICE/App/usbd_desc.su +++ /dev/null @@ -1,9 +0,0 @@ -usbd_desc.c:223:11:USBD_FS_DeviceDescriptor 16 static -usbd_desc.c:236:11:USBD_FS_LangIDStrDescriptor 16 static -usbd_desc.c:249:11:USBD_FS_ProductStrDescriptor 16 static -usbd_desc.c:268:11:USBD_FS_ManufacturerStrDescriptor 16 static -usbd_desc.c:281:11:USBD_FS_SerialStrDescriptor 16 static -usbd_desc.c:301:11:USBD_FS_ConfigStrDescriptor 16 static -usbd_desc.c:320:11:USBD_FS_InterfaceStrDescriptor 16 static -usbd_desc.c:338:13:Get_SerialNum 24 static -usbd_desc.c:362:13:IntToUnicode 32 static diff --git a/Debug/USB_DEVICE/Target/subdir.mk b/Debug/USB_DEVICE/Target/subdir.mk deleted file mode 100644 index 90ab7b2d..00000000 --- a/Debug/USB_DEVICE/Target/subdir.mk +++ /dev/null @@ -1,19 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../USB_DEVICE/Target/usbd_conf.c - -OBJS += \ -./USB_DEVICE/Target/usbd_conf.o - -C_DEPS += \ -./USB_DEVICE/Target/usbd_conf.d - - -# Each subdirectory must supply rules for building sources it contributes -USB_DEVICE/Target/usbd_conf.o: ../USB_DEVICE/Target/usbd_conf.c - arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F303xC -DDEBUG -c -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../USB_DEVICE/Target -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Include -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc -I../USB_DEVICE/App -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"USB_DEVICE/Target/usbd_conf.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" - diff --git a/Debug/USB_DEVICE/Target/usbd_conf.d b/Debug/USB_DEVICE/Target/usbd_conf.d deleted file mode 100644 index ad21fcab..00000000 --- a/Debug/USB_DEVICE/Target/usbd_conf.d +++ /dev/null @@ -1,156 +0,0 @@ -USB_DEVICE/Target/usbd_conf.o: ../USB_DEVICE/Target/usbd_conf.c \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h \ - ../Drivers/CMSIS/Include/core_cm4.h \ - ../Drivers/CMSIS/Include/cmsis_version.h \ - ../Drivers/CMSIS/Include/cmsis_compiler.h \ - ../Drivers/CMSIS/Include/cmsis_gcc.h \ - ../Drivers/CMSIS/Include/mpu_armv7.h \ - ../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ - ../Core/Inc/stm32f3xx_hal_conf.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ - ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../USB_DEVICE/Target/usbd_conf.h ../Core/Inc/main.h \ - ../Core/Inc/MESCmotor_state.h ../Core/Inc/MESChw_setup.h \ - ../Core/Inc/MESCsin_lut.h ../Core/Inc/MESCfoc.h ../Core/Inc/MESCBLDC.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h \ - ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h: - -../Drivers/CMSIS/Include/core_cm4.h: - -../Drivers/CMSIS/Include/cmsis_version.h: - -../Drivers/CMSIS/Include/cmsis_compiler.h: - -../Drivers/CMSIS/Include/cmsis_gcc.h: - -../Drivers/CMSIS/Include/mpu_armv7.h: - -../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: - -../Core/Inc/stm32f3xx_hal_conf.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_comp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_opamp_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usb.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: - -../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../USB_DEVICE/Target/usbd_conf.h: - -../Core/Inc/main.h: - -../Core/Inc/MESCmotor_state.h: - -../Core/Inc/MESChw_setup.h: - -../Core/Inc/MESCsin_lut.h: - -../Core/Inc/MESCfoc.h: - -../Core/Inc/MESCBLDC.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: - -../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h: - -../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: diff --git a/Debug/USB_DEVICE/Target/usbd_conf.o b/Debug/USB_DEVICE/Target/usbd_conf.o deleted file mode 100644 index d82bacff..00000000 Binary files a/Debug/USB_DEVICE/Target/usbd_conf.o and /dev/null differ diff --git a/Debug/USB_DEVICE/Target/usbd_conf.su b/Debug/USB_DEVICE/Target/usbd_conf.su deleted file mode 100644 index b1a83210..00000000 --- a/Debug/USB_DEVICE/Target/usbd_conf.su +++ /dev/null @@ -1,32 +0,0 @@ -usbd_conf.c:70:6:HAL_PCD_MspInit 48 static -usbd_conf.c:103:6:HAL_PCD_MspDeInit 16 static -usbd_conf.c:136:6:HAL_PCD_SetupStageCallback 16 static -usbd_conf.c:151:6:HAL_PCD_DataOutStageCallback 16 static -usbd_conf.c:166:6:HAL_PCD_DataInStageCallback 16 static -usbd_conf.c:180:6:HAL_PCD_SOFCallback 16 static -usbd_conf.c:194:6:HAL_PCD_ResetCallback 24 static -usbd_conf.c:219:6:HAL_PCD_SuspendCallback 16 static -usbd_conf.c:243:6:HAL_PCD_ResumeCallback 16 static -usbd_conf.c:261:6:HAL_PCD_ISOOUTIncompleteCallback 16 static -usbd_conf.c:276:6:HAL_PCD_ISOINIncompleteCallback 16 static -usbd_conf.c:290:6:HAL_PCD_ConnectCallback 16 static -usbd_conf.c:304:6:HAL_PCD_DisconnectCallback 16 static -usbd_conf.c:319:20:USBD_LL_Init 16 static -usbd_conf.c:369:20:USBD_LL_DeInit 24 static -usbd_conf.c:386:20:USBD_LL_Start 24 static -usbd_conf.c:403:20:USBD_LL_Stop 24 static -usbd_conf.c:423:20:USBD_LL_OpenEP 24 static -usbd_conf.c:441:20:USBD_LL_CloseEP 24 static -usbd_conf.c:459:20:USBD_LL_FlushEP 24 static -usbd_conf.c:477:20:USBD_LL_StallEP 24 static -usbd_conf.c:495:20:USBD_LL_ClearStallEP 24 static -usbd_conf.c:513:9:USBD_LL_IsStallEP 24 static -usbd_conf.c:533:20:USBD_LL_SetUSBAddress 24 static -usbd_conf.c:553:20:USBD_LL_Transmit 32 static -usbd_conf.c:573:20:USBD_LL_PrepareReceive 32 static -usbd_conf.c:591:10:USBD_LL_GetRxDataSize 16 static -usbd_conf.c:601:6:USBD_LL_Delay 16 static -usbd_conf.c:611:7:USBD_static_malloc 16 static -usbd_conf.c:622:6:USBD_static_free 16 static -usbd_conf.c:636:6:HAL_PCDEx_SetConnectionState 16 static -usbd_conf.c:658:20:USBD_Get_USB_Status 24 static diff --git a/Debug/makefile b/Debug/makefile deleted file mode 100644 index 0806f32e..00000000 --- a/Debug/makefile +++ /dev/null @@ -1,87 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - --include ../makefile.init - -RM := rm -rf - -# All of the sources participating in the build are defined here --include sources.mk --include USB_DEVICE/Target/subdir.mk --include USB_DEVICE/App/subdir.mk --include Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk --include Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/subdir.mk --include Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/subdir.mk --include Middlewares/Third_Party/FreeRTOS/Source/subdir.mk --include Middlewares/ST/STM32_USB_Device_Library/Core/Src/subdir.mk --include Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/subdir.mk --include Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk --include Core/Startup/subdir.mk --include Core/Src/subdir.mk --include subdir.mk --include objects.mk - -ifneq ($(MAKECMDGOALS),clean) -ifneq ($(strip $(S_DEPS)),) --include $(S_DEPS) -endif -ifneq ($(strip $(S_UPPER_DEPS)),) --include $(S_UPPER_DEPS) -endif -ifneq ($(strip $(C_DEPS)),) --include $(C_DEPS) -endif -endif - --include ../makefile.defs - -# Add inputs and outputs from these tool invocations to the build variables -EXECUTABLES += \ -MESC_Firmware.elf \ - -SIZE_OUTPUT += \ -default.size.stdout \ - -OBJDUMP_LIST += \ -MESC_Firmware.list \ - -OBJCOPY_BIN += \ -MESC_Firmware.bin \ - - -# All Target -all: MESC_Firmware.elf secondary-outputs - -# Tool invocations -MESC_Firmware.elf: $(OBJS) $(USER_OBJS) C:\Users\Lenovo\Documents\MESC_Firmware\STM32F303CBTX_FLASH.ld - arm-none-eabi-gcc -o "MESC_Firmware.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"C:\Users\Lenovo\Documents\MESC_Firmware\STM32F303CBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="MESC_Firmware.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group - @echo 'Finished building target: $@' - @echo ' ' - -default.size.stdout: $(EXECUTABLES) - arm-none-eabi-size $(EXECUTABLES) - @echo 'Finished building: $@' - @echo ' ' - -MESC_Firmware.list: $(EXECUTABLES) - arm-none-eabi-objdump -h -S $(EXECUTABLES) > "MESC_Firmware.list" - @echo 'Finished building: $@' - @echo ' ' - -MESC_Firmware.bin: $(EXECUTABLES) - arm-none-eabi-objcopy -O binary $(EXECUTABLES) "MESC_Firmware.bin" - @echo 'Finished building: $@' - @echo ' ' - -# Other Targets -clean: - -$(RM) * - -@echo ' ' - -secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) $(OBJCOPY_BIN) - -.PHONY: all clean dependents -.SECONDARY: - --include ../makefile.targets diff --git a/Debug/objects.list b/Debug/objects.list deleted file mode 100644 index 23df9d46..00000000 --- a/Debug/objects.list +++ /dev/null @@ -1,56 +0,0 @@ -"Core/Src/MESCBLDC.o" -"Core/Src/MESCfoc.o" -"Core/Src/MESChw_setup.o" -"Core/Src/MESCmotor_state.o" -"Core/Src/freertos.o" -"Core/Src/main.o" -"Core/Src/stm32f3xx_hal_msp.o" -"Core/Src/stm32f3xx_hal_timebase_tim.o" -"Core/Src/stm32f3xx_it.o" -"Core/Src/syscalls.o" -"Core/Src/sysmem.o" -"Core/Src/system_stm32f3xx.o" -"Core/Startup/startup_stm32f303cbtx.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_adc_ex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_comp.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_opamp_ex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pcd_ex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.o" -"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usb.o" -"Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.o" -"Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.o" -"Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.o" -"Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.o" -"Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.o" -"Middlewares/Third_Party/FreeRTOS/Source/croutine.o" -"Middlewares/Third_Party/FreeRTOS/Source/event_groups.o" -"Middlewares/Third_Party/FreeRTOS/Source/list.o" -"Middlewares/Third_Party/FreeRTOS/Source/queue.o" -"Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o" -"Middlewares/Third_Party/FreeRTOS/Source/tasks.o" -"Middlewares/Third_Party/FreeRTOS/Source/timers.o" -"Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o" -"Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o" -"USB_DEVICE/App/usb_device.o" -"USB_DEVICE/App/usbd_cdc_if.o" -"USB_DEVICE/App/usbd_desc.o" -"USB_DEVICE/Target/usbd_conf.o" diff --git a/Debug/objects.mk b/Debug/objects.mk deleted file mode 100644 index 742c2da0..00000000 --- a/Debug/objects.mk +++ /dev/null @@ -1,8 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -USER_OBJS := - -LIBS := - diff --git a/Debug/sources.mk b/Debug/sources.mk deleted file mode 100644 index 37948ec0..00000000 --- a/Debug/sources.mk +++ /dev/null @@ -1,33 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -ELF_SRCS := -OBJ_SRCS := -S_SRCS := -C_SRCS := -S_UPPER_SRCS := -O_SRCS := -SIZE_OUTPUT := -OBJDUMP_LIST := -EXECUTABLES := -OBJS := -S_DEPS := -S_UPPER_DEPS := -C_DEPS := -OBJCOPY_BIN := - -# Every subdirectory with source files must be described here -SUBDIRS := \ -Core/Src \ -Core/Startup \ -Drivers/STM32F3xx_HAL_Driver/Src \ -Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src \ -Middlewares/ST/STM32_USB_Device_Library/Core/Src \ -Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 \ -Middlewares/Third_Party/FreeRTOS/Source \ -Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F \ -Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang \ -USB_DEVICE/App \ -USB_DEVICE/Target \ - diff --git a/README.md b/README.md index 68df4adc..de121c7e 100644 --- a/README.md +++ b/README.md @@ -5,6 +5,81 @@ Custom FOC, BLDC, speed control firmware for use with the MESC_FOC_ESC hardware This project is new as of 28/06/2020, and is the work of David Molony, experienced mechanical engineer, moderately experienced electrical engineer, and software newbie. If/when this firmware becomes useable enough to be useful to the world, this foreword will be edited to acknowledge. For now, the hardware is useable using STMicro's Motor Control Workbench and CUBEMX/CUBEIDE/Truestudio installations, for which one day I shall place a binary in the hardware folder... +## Code style +This section formalises naming rules for variables, constants, function names, etc. It also All contributors are required to adhere to the code style rules. Certain functionality of IDE can be enabled to help with automating the checks. + +### Code structure +Eclipse IDE can be setup to achieve this code structure automatically. Open dialog +Window --> Preferences. In the preferences window make following changes. +1. C/C++ --> Code Style --> Formatter. Select K&R[built-in] profile. +2. C/C++ --> Editor --> Save Actions. Tick Format source code and Format edited lines. Tick Ensure newline at the end of the file. + +Once it is all setup the code format will be enforced for all edited lines upon save. If you want to reformat the code press Ctrl-Shift-F. +Below is the example of K&R formatted code. + + /* + * A sample source file for the code formatter preview + */ + #include + class Point { + public: + Point(double x, double y) : + x(x), y(y) { + } + double distance(const Point &other) const; + + double x; + double y; + }; + + double Point::distance(const Point &other) const { + double dx = x - other.x; + double dy = y - other.y; + return sqrt(dx * dx + dy * dy); + } + +### Code analysis. +It is highly advisable to enable code style and structure monitoring provided by the IDE. In Preferences window to go C/C++ --> Code analysis. Enable all. +Some rules might seem to be overly restrictive and those can be disabled. For example, Coding style --> Line comments will complain about "//" single line style comments. Given extensive use of those by David it's probably not worth enforcing that rule. + +### Precompiler defined values +These are constant values given a name through pre-compiler directive. These values should be in UPPER_CASE. + + #define PI_VALUE 3.14 + +### Variables +Variables should be in lower_snake_case. + + float my_variable; + +Class member variables should have a prefix according to their type. Example: + + class CMyClass{ + private: + float m_member_variable; + uint32_t * mp_pointer_variable; + static int s_static_variable; + } + +### Function names +Functions and class methods should be in lowerCamelCase format. + + void theFunction(int arg1); + + void adcConvertion(); + +### Constant values +Constants just like #define precompiler define falues should be in UPPER_CASE. + + const int MY_CONSTANT = 2; + +## Useful Eclipse IDE extensions +### Darkest Dark +To modify visual impact of coding work and reduce eye strain it is advisable to use darker colour schemes. We find that Darkest Dark Eclipse extension works very well and has good colour choices. In order to install it go to Help --> Eclipse Marketplace... In the search bar type "Darkest Dark". It should be first in the search results. Install it. After restart of IDE it'll present a set of choices. Leave default ones. They can later be modified in the Preferences window by going to DevStyle --> Color Themes. + +###CPPStyle +This section on CPPStyle extension and associated prerequisites to be filled in once decision is made on coding style. + ## Licence This project will initially (and perhaps perpetually) contain a lot of firmware licenced under the STM Cube licence, BSD 3 clause https://opensource.org/licenses/BSD-3-Clause . The rest of the custom code is intended to be contained primarily in the MESC files, and will have a licence assigned at a later date, probably also BSD 3 Clause. diff --git a/Tracealyzer/config/trcConfig.h b/Tracealyzer/config/trcConfig.h new file mode 100644 index 00000000..2d36df03 --- /dev/null +++ b/Tracealyzer/config/trcConfig.h @@ -0,0 +1,414 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcConfig.h + * + * Main configuration parameters for the trace recorder library. + * More settings can be found in trcStreamingConfig.h and trcSnapshotConfig.h. + * + * Read more at http://percepio.com/2016/10/05/rtos-tracing/ + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef TRC_CONFIG_H +#define TRC_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "trcPortDefines.h" + +/****************************************************************************** + * Include of processor header file + * + * Here you may need to include the header file for your processor. This is + * required at least for the ARM Cortex-M port, that uses the ARM CMSIS API. + * Try that in case of build problems. Otherwise, remove the #error line below. + *****************************************************************************/ +//#error "Trace Recorder: Please include your processor's header file here and +// remove this line." +#include "stm32f3xx.h" + +/******************************************************************************* + * Configuration Macro: TRC_CFG_HARDWARE_PORT + * + * Specify what hardware port to use (i.e., the "timestamping driver"). + * + * All ARM Cortex-M MCUs are supported by "TRC_HARDWARE_PORT_ARM_Cortex_M". + * This port uses the DWT cycle counter for Cortex-M3/M4/M7 devices, which is + * available on most such devices. In case your device don't have DWT support, + * you will get an error message opening the trace. In that case, you may + * force the recorder to use SysTick timestamping instead, using this define: + * + * #define TRC_CFG_ARM_CM_USE_SYSTICK + * + * For ARM Cortex-M0/M0+ devices, SysTick mode is used automatically. + * + * See trcHardwarePort.h for available ports and information on how to + * define your own port, if not already present. + ******************************************************************************/ +#define TRC_CFG_HARDWARE_PORT TRC_HARDWARE_PORT_ARM_Cortex_M + +/******************************************************************************* + * Configuration Macro: TRC_CFG_RECORDER_MODE + * + * Specify what recording mode to use. Snapshot means that the data is saved in + * an internal RAM buffer, for later upload. Streaming means that the data is + * transferred continuously to the host PC. + * + * For more information, see http://percepio.com/2016/10/05/rtos-tracing/ + * and the Tracealyzer User Manual. + * + * Values: + * TRC_RECORDER_MODE_SNAPSHOT + * TRC_RECORDER_MODE_STREAMING + ******************************************************************************/ +// todo: change to streaming mode as soon as streaming port is setup. +#define TRC_CFG_RECORDER_MODE TRC_RECORDER_MODE_SNAPSHOT + +/****************************************************************************** + * TRC_CFG_FREERTOS_VERSION + * + * Specify what version of FreeRTOS that is used (don't change unless using the + * trace recorder library with an older version of FreeRTOS). + * + * TRC_FREERTOS_VERSION_7_3_X If using FreeRTOS v7.3.X + * TRC_FREERTOS_VERSION_7_4_X If using FreeRTOS v7.4.X + * TRC_FREERTOS_VERSION_7_5_X If using FreeRTOS v7.5.X + * TRC_FREERTOS_VERSION_7_6_X If using FreeRTOS v7.6.X + * TRC_FREERTOS_VERSION_8_X_X If using FreeRTOS v8.X.X + * TRC_FREERTOS_VERSION_9_0_0 If using FreeRTOS v9.0.0 + * TRC_FREERTOS_VERSION_9_0_1 If using FreeRTOS v9.0.1 + * TRC_FREERTOS_VERSION_9_0_2 If using FreeRTOS v9.0.2 + * TRC_FREERTOS_VERSION_10_0_0 If using FreeRTOS v10.0.0 + * TRC_FREERTOS_VERSION_10_0_1 If using FreeRTOS v10.0.1 + * TRC_FREERTOS_VERSION_10_1_0 If using FreeRTOS v10.1.0 + * TRC_FREERTOS_VERSION_10_1_1 If using FreeRTOS v10.1.1 + * TRC_FREERTOS_VERSION_10_2_0 If using FreeRTOS v10.2.0 + * TRC_FREERTOS_VERSION_10_2_1 If using FreeRTOS v10.2.1 + * TRC_FREERTOS_VERSION_10_3_0 If using FreeRTOS v10.3.0 + * TRC_FREERTOS_VERSION_10_3_1 If using FreeRTOS v10.3.1 + * TRC_FREERTOS_VERSION_10_4_0 If using FreeRTOS v10.4.0 or later + *****************************************************************************/ +#define TRC_CFG_FREERTOS_VERSION TRC_FREERTOS_VERSION_10_0_1 + +/******************************************************************************* + * TRC_CFG_SCHEDULING_ONLY + * + * Macro which should be defined as an integer value. + * + * If this setting is enabled (= 1), only scheduling events are recorded. + * If disabled (= 0), all events are recorded (unless filtered in other ways). + * + * Default value is 0 (= include additional events). + ******************************************************************************/ +#define TRC_CFG_SCHEDULING_ONLY 0 + + /****************************************************************************** + * TRC_CFG_INCLUDE_MEMMANG_EVENTS + * + * Macro which should be defined as either zero (0) or one (1). + * + * This controls if malloc and free calls should be traced. Set this to zero (0) + * to exclude malloc/free calls, or one (1) to include such events in the trace. + * + * Default value is 1. + *****************************************************************************/ +#define TRC_CFG_INCLUDE_MEMMANG_EVENTS 1 + + /****************************************************************************** + * TRC_CFG_INCLUDE_USER_EVENTS + * + * Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), all code related to User Events is excluded in order + * to reduce code size. Any attempts of storing User Events are then silently + * ignored. + * + * User Events are application-generated events, like "printf" but for the + * trace log, generated using vTracePrint and vTracePrintF. + * The formatting is done on host-side, by Tracealyzer. User Events are + * therefore much faster than a console printf and can often be used + * in timing critical code without problems. + * + * Note: In streaming mode, User Events are used to provide error messages + * and warnings from the recorder (in case of incorrect configuration) for + * display in Tracealyzer. Disabling user events will also disable these + * warnings. You can however still catch them by calling xTraceGetLastError + * or by putting breakpoints in prvTraceError and prvTraceWarning. + * + * Default value is 1. + *****************************************************************************/ +#define TRC_CFG_INCLUDE_USER_EVENTS 1 + + /***************************************************************************** + * TRC_CFG_INCLUDE_ISR_TRACING + * + * Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the code for recording Interrupt Service Routines is + * excluded, in order to reduce code size. This means that any calls to + * vTraceStoreISRBegin/vTraceStoreISREnd will be ignored. + * This does not completely disable ISR tracing, in cases where an ISR is + * calling a traced kernel service. These events will still be recorded and + * show up in anonymous ISR instances in Tracealyzer, with names such as + * "ISR sending to ". + * To disable such tracing, please refer to vTraceSetFilterGroup and + * vTraceSetFilterMask. + * + * Default value is 1. + * + * Note: tracing ISRs requires that you insert calls to vTraceStoreISRBegin + * and vTraceStoreISREnd in your interrupt handlers. + *****************************************************************************/ +#define TRC_CFG_INCLUDE_ISR_TRACING 1 + + /***************************************************************************** + * TRC_CFG_INCLUDE_READY_EVENTS + * + * Macro which should be defined as either zero (0) or one (1). + * + * If one (1), events are recorded when tasks enter scheduling state "ready". + * This allows Tracealyzer to show the initial pending time before tasks enter + * the execution state, and present accurate response times. + * If zero (0), "ready events" are not created, which allows for recording + * longer traces in the same amount of RAM. + * + * Default value is 1. + *****************************************************************************/ +#define TRC_CFG_INCLUDE_READY_EVENTS 1 + + /***************************************************************************** + * TRC_CFG_INCLUDE_OSTICK_EVENTS + * + * Macro which should be defined as either zero (0) or one (1). + * + * If this is one (1), events will be generated whenever the OS clock is + * increased. If zero (0), OS tick events are not generated, which allows for + * recording longer traces in the same amount of RAM. + * + * Default value is 1. + *****************************************************************************/ +#define TRC_CFG_INCLUDE_OSTICK_EVENTS 1 + + /***************************************************************************** + * TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS + * + * Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the trace will exclude any "event group" events. + * + * Default value is 0 (excluded) since dependent on event_groups.c + *****************************************************************************/ +#define TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS 0 + + /***************************************************************************** + * TRC_CFG_INCLUDE_TIMER_EVENTS + * + * Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the trace will exclude any Timer events. + * + * Default value is 0 since dependent on timers.c + *****************************************************************************/ +#define TRC_CFG_INCLUDE_TIMER_EVENTS 0 + + /***************************************************************************** + * TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS + * + * Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the trace will exclude any "pending function call" + * events, such as xTimerPendFunctionCall(). + * + * Default value is 0 since dependent on timers.c + *****************************************************************************/ +#define TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS 0 + +/******************************************************************************* + * Configuration Macro: TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS + * + * Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the trace will exclude any stream buffer or message + * buffer events. + * + * Default value is 0 since dependent on stream_buffer.c (new in FreeRTOS v10) + ******************************************************************************/ +#define TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS 0 + + /****************************************************************************** + * TRC_CFG_ENABLE_STACK_MONITOR + * + * If enabled (1), the recorder periodically reports the unused stack space of + * all active tasks. + * The stack monitoring runs in the Tracealyzer Control task, TzCtrl. This task + * is always created by the recorder when in streaming mode. + * In snapshot mode, the TzCtrl task is only used for stack monitoring and is + * not created unless this is enabled. + *****************************************************************************/ +#define TRC_CFG_ENABLE_STACK_MONITOR 1 + + /****************************************************************************** + * TRC_CFG_STACK_MONITOR_MAX_TASKS + * + * Macro which should be defined as a non-zero integer value. + * + * This controls how many tasks that can be monitored by the stack monitor. + * If this is too small, some tasks will be excluded and a warning is shown. + * + * Default value is 10. + *****************************************************************************/ +#define TRC_CFG_STACK_MONITOR_MAX_TASKS 10 + + /****************************************************************************** + * TRC_CFG_STACK_MONITOR_MAX_REPORTS + * + * Macro which should be defined as a non-zero integer value. + * + * This defines how many tasks that will be subject to stack usage analysis for + * each execution of the Tracealyzer Control task (TzCtrl). Note that the stack + * monitoring cycles between the tasks, so this does not affect WHICH tasks that + * are monitored, but HOW OFTEN each task stack is analyzed. + * + * This setting can be combined with TRC_CFG_CTRL_TASK_DELAY to tune the + * frequency of the stack monitoring. This is motivated since the stack analysis + * can take some time to execute. + * However, note that the stack analysis runs in a separate task (TzCtrl) that + * can be executed on low priority. This way, you can avoid that the stack + * analysis disturbs any time-sensitive tasks. + * + * Default value is 1. + *****************************************************************************/ +#define TRC_CFG_STACK_MONITOR_MAX_REPORTS 1 + + /******************************************************************************* + * Configuration Macro: TRC_CFG_CTRL_TASK_PRIORITY + * + * The scheduling priority of the Tracealyzer Control (TzCtrl) task. + * + * In streaming mode, TzCtrl is used to receive start/stop commands from + * Tracealyzer and in some cases also to transmit the trace data (for stream + * ports that uses the internal buffer, like TCP/IP). For such stream ports, + * make sure the TzCtrl priority is high enough to ensure reliable periodic + * execution and transfer of the data, but low enough to avoid disturbing any + * time-sensitive functions. + * + * In Snapshot mode, TzCtrl is only used for the stack usage monitoring and is + * not created if stack monitoring is disabled. TRC_CFG_CTRL_TASK_PRIORITY should + * be low, to avoid disturbing any time-sensitive tasks. + ******************************************************************************/ +#define TRC_CFG_CTRL_TASK_PRIORITY 1 + + /******************************************************************************* + * Configuration Macro: TRC_CFG_CTRL_TASK_DELAY + * + * The delay between loops of the TzCtrl task (see TRC_CFG_CTRL_TASK_PRIORITY), + * which affects the frequency of the stack monitoring. + * + * In streaming mode, this also affects the trace data transfer if you are using + * a stream port leveraging the internal buffer (like TCP/IP). A shorter delay + * increases the CPU load of TzCtrl somewhat, but may improve the performance of + * of the trace streaming, especially if the trace buffer is small. + ******************************************************************************/ +#define TRC_CFG_CTRL_TASK_DELAY 10 + + /******************************************************************************* + * Configuration Macro: TRC_CFG_CTRL_TASK_STACK_SIZE + * + * The stack size of the Tracealyzer Control (TzCtrl) task. + * See TRC_CFG_CTRL_TASK_PRIORITY for further information about TzCtrl. + ******************************************************************************/ +#define TRC_CFG_CTRL_TASK_STACK_SIZE (configMINIMAL_STACK_SIZE * 2) + +/******************************************************************************* + * Configuration Macro: TRC_CFG_RECORDER_BUFFER_ALLOCATION + * + * Specifies how the recorder buffer is allocated (also in case of streaming, in + * port using the recorder's internal temporary buffer) + * + * Values: + * TRC_RECORDER_BUFFER_ALLOCATION_STATIC - Static allocation (internal) + * TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC - Malloc in vTraceEnable + * TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM - Use vTraceSetRecorderDataBuffer + * + * Static and dynamic mode does the allocation for you, either in compile time + * (static) or in runtime (malloc). + * The custom mode allows you to control how and where the allocation is made, + * for details see TRC_ALLOC_CUSTOM_BUFFER and vTraceSetRecorderDataBuffer(). + ******************************************************************************/ +#define TRC_CFG_RECORDER_BUFFER_ALLOCATION TRC_RECORDER_BUFFER_ALLOCATION_STATIC + +/****************************************************************************** + * TRC_CFG_MAX_ISR_NESTING + * + * Defines how many levels of interrupt nesting the recorder can handle, in + * case multiple ISRs are traced and ISR nesting is possible. If this + * is exceeded, the particular ISR will not be traced and the recorder then + * logs an error message. This setting is used to allocate an internal stack + * for keeping track of the previous execution context (4 byte per entry). + * + * This value must be a non-zero positive constant, at least 1. + * + * Default value: 8 + *****************************************************************************/ +#define TRC_CFG_MAX_ISR_NESTING 8 + +/****************************************************************************** + * TRC_CFG_ACKNOWLEDGE_QUEUE_SET_SEND + * + * When using FreeRTOS v10.3.0 or v10.3.1, please make sure that the trace + * point in prvNotifyQueueSetContainer() in queue.c is renamed from + * traceQUEUE_SEND to traceQUEUE_SET_SEND in order to tell them apart from + * other traceQUEUE_SEND trace points. Then set this to TRC_ACKNOWLEDGED. + *****************************************************************************/ +#define TRC_CFG_ACKNOWLEDGE_QUEUE_SET_SEND 0 /* TRC_ACKNOWLEDGED */ + +/* Specific configuration, depending on Streaming/Snapshot mode */ +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) +#include "trcSnapshotConfig.h" +#elif (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) +#include "trcStreamingConfig.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* _TRC_CONFIG_H */ diff --git a/Tracealyzer/config/trcSnapshotConfig.h b/Tracealyzer/config/trcSnapshotConfig.h new file mode 100644 index 00000000..601dfda6 --- /dev/null +++ b/Tracealyzer/config/trcSnapshotConfig.h @@ -0,0 +1,377 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcSnapshotConfig.h + * + * Configuration parameters for trace recorder library in snapshot mode. + * Read more at http://percepio.com/2016/10/05/rtos-tracing/ + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef TRC_SNAPSHOT_CONFIG_H +#define TRC_SNAPSHOT_CONFIG_H + +#define TRC_SNAPSHOT_MODE_RING_BUFFER (0x01) +#define TRC_SNAPSHOT_MODE_STOP_WHEN_FULL (0x02) + +/****************************************************************************** + * TRC_CFG_SNAPSHOT_MODE + * + * Macro which should be defined as one of: + * - TRC_SNAPSHOT_MODE_RING_BUFFER + * - TRC_SNAPSHOT_MODE_STOP_WHEN_FULL + * Default is TRC_SNAPSHOT_MODE_RING_BUFFER. + * + * With TRC_CFG_SNAPSHOT_MODE set to TRC_SNAPSHOT_MODE_RING_BUFFER, the + * events are stored in a ring buffer, i.e., where the oldest events are + * overwritten when the buffer becomes full. This allows you to get the last + * events leading up to an interesting state, e.g., an error, without having + * to store the whole run since startup. + * + * When TRC_CFG_SNAPSHOT_MODE is TRC_SNAPSHOT_MODE_STOP_WHEN_FULL, the + * recording is stopped when the buffer becomes full. This is useful for + * recording events following a specific state, e.g., the startup sequence. + *****************************************************************************/ +#define TRC_CFG_SNAPSHOT_MODE TRC_SNAPSHOT_MODE_RING_BUFFER + +/******************************************************************************* + * TRC_CFG_EVENT_BUFFER_SIZE + * + * Macro which should be defined as an integer value. + * + * This defines the capacity of the event buffer, i.e., the number of records + * it may store. Most events use one record (4 byte), although some events + * require multiple 4-byte records. You should adjust this to the amount of RAM + * available in the target system. + * + * Default value is 1000, which means that 4000 bytes is allocated for the + * event buffer. + ******************************************************************************/ +#define TRC_CFG_EVENT_BUFFER_SIZE 1000 + +/******************************************************************************* + * TRC_CFG_NTASK, TRC_CFG_NISR, TRC_CFG_NQUEUE, TRC_CFG_NSEMAPHORE... + * + * A group of macros which should be defined as integer values, zero or larger. + * + * These define the capacity of the Object Property Table, i.e., the maximum + * number of objects active at any given point, within each object class (e.g., + * task, queue, semaphore, ...). + * + * If tasks or other objects are deleted in your system, this + * setting does not limit the total amount of objects created, only the number + * of objects that have been successfully created but not yet deleted. + * + * Using too small values will cause vTraceError to be called, which stores an + * error message in the trace that is shown when opening the trace file. The + * error message can also be retrieved using xTraceGetLastError. + * + * It can be wise to start with large values for these constants, + * unless you are very confident on these numbers. Then do a recording and + * check the actual usage by selecting View menu -> Trace Details -> + * Resource Usage -> Object Table. + ******************************************************************************/ +#define TRC_CFG_NTASK 15 +#define TRC_CFG_NISR 5 +#define TRC_CFG_NQUEUE 10 +#define TRC_CFG_NSEMAPHORE 10 +#define TRC_CFG_NMUTEX 10 +#define TRC_CFG_NTIMER 5 +#define TRC_CFG_NEVENTGROUP 5 +#define TRC_CFG_NSTREAMBUFFER 5 +#define TRC_CFG_NMESSAGEBUFFER 5 + +/****************************************************************************** + * TRC_CFG_INCLUDE_FLOAT_SUPPORT + * + * Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the support for logging floating point values in + * vTracePrintF is stripped out, in case floating point values are not used or + * supported by the platform used. + * + * Floating point values are only used in vTracePrintF and its subroutines, to + * allow for storing float (%f) or double (%lf) arguments. + * + * vTracePrintF can be used with integer and string arguments in either case. + * + * Default value is 0. + *****************************************************************************/ +#define TRC_CFG_INCLUDE_FLOAT_SUPPORT 0 + +/******************************************************************************* + * TRC_CFG_SYMBOL_TABLE_SIZE + * + * Macro which should be defined as an integer value. + * + * This defines the capacity of the symbol table, in bytes. This symbol table + * stores User Events labels and names of deleted tasks, queues, or other kernel + * objects. If you don't use User Events or delete any kernel + * objects you set this to a very low value. The minimum recommended value is 4. + * A size of zero (0) is not allowed since a zero-sized array may result in a + * 32-bit pointer, i.e., using 4 bytes rather than 0. + * + * Default value is 800. + ******************************************************************************/ +#define TRC_CFG_SYMBOL_TABLE_SIZE 800 + +#if (TRC_CFG_SYMBOL_TABLE_SIZE == 0) +#error "TRC_CFG_SYMBOL_TABLE_SIZE may not be zero!" +#endif + +/****************************************************************************** + * TRC_CFG_NAME_LEN_TASK, TRC_CFG_NAME_LEN_QUEUE, ... + * + * Macros that specify the maximum lengths (number of characters) for names of + * kernel objects, such as tasks and queues. If longer names are used, they will + * be truncated when stored in the recorder. + *****************************************************************************/ +#define TRC_CFG_NAME_LEN_TASK 15 +#define TRC_CFG_NAME_LEN_ISR 15 +#define TRC_CFG_NAME_LEN_QUEUE 15 +#define TRC_CFG_NAME_LEN_SEMAPHORE 15 +#define TRC_CFG_NAME_LEN_MUTEX 15 +#define TRC_CFG_NAME_LEN_TIMER 15 +#define TRC_CFG_NAME_LEN_EVENTGROUP 15 +#define TRC_CFG_NAME_LEN_STREAMBUFFER 15 +#define TRC_CFG_NAME_LEN_MESSAGEBUFFER 15 + +/****************************************************************************** + *** ADVANCED SETTINGS ******************************************************** + ****************************************************************************** + * The remaining settings are not necessary to modify but allows for optimizing + * the recorder setup for your specific needs, e.g., to exclude events that you + * are not interested in, in order to get longer traces. + *****************************************************************************/ + +/****************************************************************************** +* TRC_CFG_HEAP_SIZE_BELOW_16M +* +* An integer constant that can be used to reduce the buffer usage of memory +* allocation events (malloc/free). This value should be 1 if the heap size is +* below 16 MB (2^24 byte), and you can live with reported addresses showing the +* lower 24 bits only. If 0, you get the full 32-bit addresses. +* +* Default value is 0. +******************************************************************************/ +#define TRC_CFG_HEAP_SIZE_BELOW_16M 0 + +/****************************************************************************** + * TRC_CFG_USE_IMPLICIT_IFE_RULES + * + * Macro which should be defined as either zero (0) or one (1). + * Default is 1. + * + * Tracealyzer groups the events into "instances" based on Instance Finish + * Events (IFEs), produced either by default rules or calls to the recorder + * functions vTraceInstanceFinishedNow and vTraceInstanceFinishedNext. + * + * If TRC_CFG_USE_IMPLICIT_IFE_RULES is one (1), the default IFE rules is + * used, resulting in a "typical" grouping of events into instances. + * If these rules don't give appropriate instances in your case, you can + * override the default rules using vTraceInstanceFinishedNow/Next for one + * or several tasks. The default IFE rules are then disabled for those tasks. + * + * If TRC_CFG_USE_IMPLICIT_IFE_RULES is zero (0), the implicit IFE rules are + * disabled globally. You must then call vTraceInstanceFinishedNow or + * vTraceInstanceFinishedNext to manually group the events into instances, + * otherwise the tasks will appear a single long instance. + * + * The default IFE rules count the following events as "instance finished": + * - Task delay, delay until + * - Task suspend + * - Blocking on "input" operations, i.e., when the task is waiting for the + * next a message/signal/event. But only if this event is blocking. + * + * For details, see trcSnapshotKernelPort.h and look for references to the + * macro trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED. + *****************************************************************************/ +#define TRC_CFG_USE_IMPLICIT_IFE_RULES 1 + +/****************************************************************************** + * TRC_CFG_USE_16BIT_OBJECT_HANDLES + * + * Macro which should be defined as either zero (0) or one (1). + * + * If set to 0 (zero), the recorder uses 8-bit handles to identify kernel + * objects such as tasks and queues. This limits the supported number of + * concurrently active objects to 255 of each type (tasks, queues, mutexes, + * etc.) Note: 255, not 256, since handle 0 is reserved. + * + * If set to 1 (one), the recorder uses 16-bit handles to identify kernel + * objects such as tasks and queues. This limits the supported number of + * concurrent objects to 65535 of each type (object class). However, since the + * object property table is limited to 64 KB, the practical limit is about + * 3000 objects in total. + * + * Default is 0 (8-bit handles) + * + * NOTE: An object with handle above 255 will use an extra 4-byte record in + * the event buffer whenever the object is referenced. Moreover, some internal + * tables in the recorder gets slightly larger when using 16-bit handles. + *****************************************************************************/ +#define TRC_CFG_USE_16BIT_OBJECT_HANDLES 0 + +/****************************************************************************** + * TRC_CFG_USE_TRACE_ASSERT + * + * Macro which should be defined as either zero (0) or one (1). + * Default is 1. + * + * If this is one (1), the TRACE_ASSERT macro (used at various locations in the + * trace recorder) will verify that a relevant condition is true. + * If the condition is false, prvTraceError() will be called, which stops the + * recording and stores an error message that is displayed when opening the + * trace in Tracealyzer. + * + * This is used on several places in the recorder code for sanity checks on + * parameters. Can be switched off to reduce the footprint of the tracing, but + * we recommend to have it enabled initially. + *****************************************************************************/ +#define TRC_CFG_USE_TRACE_ASSERT 1 + +/******************************************************************************* + * TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER + * + * Macro which should be defined as an integer value. + * + * Set TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER to 1 to enable the + * separate user event buffer (UB). + * In this mode, user events are stored separately from other events, + * e.g., RTOS events. Thereby you can get a much longer history of + * user events as they don't need to share the buffer space with more + * frequent events. + * + * The UB is typically used with the snapshot ring-buffer mode, so the + * recording can continue when the main buffer gets full. And since the + * main buffer then overwrites the earliest events, Tracealyzer displays + * "Unknown Actor" instead of task scheduling for periods with UB data only. + * + * In UB mode, user events are structured as UB channels, which contains + * a channel name and a default format string. Register a UB channel using + * xTraceRegisterUBChannel. + * + * Events and data arguments are written using vTraceUBEvent and + * vTraceUBData. They are designed to provide efficient logging of + * repeating events, using the same format string within each channel. + * + * Examples: + * + * traceString chn1 = xTraceRegisterString("Channel 1"); + * traceString fmt1 = xTraceRegisterString("Event!"); + * traceUBChannel UBCh1 = xTraceRegisterUBChannel(chn1, fmt1); + * + * traceString chn2 = xTraceRegisterString("Channel 2"); + * traceString fmt2 = xTraceRegisterString("X: %d, Y: %d"); + * traceUBChannel UBCh2 = xTraceRegisterUBChannel(chn2, fmt2); + * + * // Result in "[Channel 1] Event!" + * vTraceUBEvent(UBCh1); + * + * // Result in "[Channel 2] X: 23, Y: 19" + * vTraceUBData(UBCh2, 23, 19); + * + * You can also use the other user event functions, like vTracePrintF. + * as they are then rerouted to the UB instead of the main event buffer. + * vTracePrintF then looks up the correct UB channel based on the + * provided channel name and format string, or creates a new UB channel + * if no match is found. The format string should therefore not contain + * "random" messages but mainly format specifiers. Random strings should + * be stored using %s and with the string as an argument. + * + * // Creates a new UB channel ("Channel 2", "%Z: %d") + * vTracePrintF(chn2, "%Z: %d", value1); + * + * // Finds the existing UB channel + * vTracePrintF(chn2, "%Z: %d", value2); + + ******************************************************************************/ +#define TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER 0 + +/******************************************************************************* + * TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE + * + * Macro which should be defined as an integer value. + * + * This defines the capacity of the user event buffer (UB), in number of slots. + * A single user event can use multiple slots, depending on the arguments. + * + * Only applicable if TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER is 1. + ******************************************************************************/ +#define TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE 200 + +/******************************************************************************* + * TRC_CFG_UB_CHANNELS + * + * Macro which should be defined as an integer value. + * + * This defines the number of User Event Buffer Channels (UB channels). + * These are used to structure the events when using the separate user + * event buffer, and contains both a User Event Channel (the name) and + * a default format string for the channel. + * + * Only applicable if TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER is 1. + ******************************************************************************/ +#define TRC_CFG_UB_CHANNELS 32 + +/******************************************************************************* + * TRC_CFG_ISR_TAILCHAINING_THRESHOLD + * + * Macro which should be defined as an integer value. + * + * If tracing multiple ISRs, this setting allows for accurate display of the + * context-switching also in cases when the ISRs execute in direct sequence. + * + * vTraceStoreISREnd normally assumes that the ISR returns to the previous + * context, i.e., a task or a preempted ISR. But if another traced ISR + * executes in direct sequence, Tracealyzer may incorrectly display a minimal + * fragment of the previous context in between the ISRs. + * + * By using TRC_CFG_ISR_TAILCHAINING_THRESHOLD you can avoid this. This is + * however a threshold value that must be measured for your specific setup. + * See http://percepio.com/2014/03/21/isr_tailchaining_threshold/ + * + * The default setting is 0, meaning "disabled" and that you may get an + * extra fragments of the previous context in between tail-chained ISRs. + * + * Note: This setting has separate definitions in trcSnapshotConfig.h and + * trcStreamingConfig.h, since it is affected by the recorder mode. + ******************************************************************************/ +#define TRC_CFG_ISR_TAILCHAINING_THRESHOLD 0 + +#endif /*TRC_SNAPSHOT_CONFIG_H*/ diff --git a/Tracealyzer/config/trcStreamingConfig.h b/Tracealyzer/config/trcStreamingConfig.h new file mode 100644 index 00000000..9ad2ce57 --- /dev/null +++ b/Tracealyzer/config/trcStreamingConfig.h @@ -0,0 +1,144 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcStreamingConfig.h + * + * Configuration parameters for the trace recorder library in streaming mode. + * Read more at http://percepio.com/2016/10/05/rtos-tracing/ + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef TRC_STREAMING_CONFIG_H +#define TRC_STREAMING_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/******************************************************************************* + * Configuration Macro: TRC_CFG_SYMBOL_TABLE_SLOTS + * + * The maximum number of symbols names that can be stored. This includes: + * - Task names + * - Named ISRs (vTraceSetISRProperties) + * - Named kernel objects (vTraceStoreKernelObjectName) + * - User event channels (xTraceRegisterString) + * + * If this value is too small, not all symbol names will be stored and the + * trace display will be affected. In that case, there will be warnings + * (as User Events) from TzCtrl task, that monitors this. + ******************************************************************************/ +#define TRC_CFG_SYMBOL_TABLE_SLOTS 40 + +/******************************************************************************* + * Configuration Macro: TRC_CFG_SYMBOL_MAX_LENGTH + * + * The maximum length of symbol names, including: + * - Task names + * - Named ISRs (vTraceSetISRProperties) + * - Named kernel objects (vTraceStoreKernelObjectName) + * - User event channel names (xTraceRegisterString) + * + * If longer symbol names are used, they will be truncated by the recorder, + * which will affect the trace display. In that case, there will be warnings + * (as User Events) from TzCtrl task, that monitors this. + ******************************************************************************/ +#define TRC_CFG_SYMBOL_MAX_LENGTH 25 + +/******************************************************************************* + * Configuration Macro: TRC_CFG_OBJECT_DATA_SLOTS + * + * The maximum number of object data entries (used for task priorities) that can + * be stored at the same time. Must be sufficient for all tasks, otherwise there + * will be warnings (as User Events) from TzCtrl task, that monitors this. + ******************************************************************************/ +#define TRC_CFG_OBJECT_DATA_SLOTS 40 + +/******************************************************************************* + * Configuration Macro: TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT + * + * Specifies the number of pages used by the paged event buffer. + * This may need to be increased if there are a lot of missed events. + * + * Note: not used by the J-Link RTT stream port (see trcStreamingPort.h instead) + ******************************************************************************/ +#define TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT 10 + +/******************************************************************************* + * Configuration Macro: TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE + * + * Specifies the size of each page in the paged event buffer. This can be tuned + * to match any internal low-level buffers used by the streaming interface, like + * the Ethernet MTU (Maximum Transmission Unit). However, since the currently + * active page can't be transfered, having more but smaller pages is more + * efficient with respect memory usage, than having a few large pages. + * + * Note: not used by the J-Link RTT stream port (see trcStreamingPort.h instead) + ******************************************************************************/ +#define TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE 500 + +/******************************************************************************* + * TRC_CFG_ISR_TAILCHAINING_THRESHOLD + * + * Macro which should be defined as an integer value. + * + * If tracing multiple ISRs, this setting allows for accurate display of the + * context-switching also in cases when the ISRs execute in direct sequence. + * + * vTraceStoreISREnd normally assumes that the ISR returns to the previous + * context, i.e., a task or a preempted ISR. But if another traced ISR + * executes in direct sequence, Tracealyzer may incorrectly display a minimal + * fragment of the previous context in between the ISRs. + * + * By using TRC_CFG_ISR_TAILCHAINING_THRESHOLD you can avoid this. This is + * however a threshold value that must be measured for your specific setup. + * See http://percepio.com/2014/03/21/isr_tailchaining_threshold/ + * + * The default setting is 0, meaning "disabled" and that you may get an + * extra fragments of the previous context in between tail-chained ISRs. + * + * Note: This setting has separate definitions in trcSnapshotConfig.h and + * trcStreamingConfig.h, since it is affected by the recorder mode. + ******************************************************************************/ +#define TRC_CFG_ISR_TAILCHAINING_THRESHOLD 0 + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_STREAMING_CONFIG_H */ diff --git a/Tracealyzer/include/aws_secure_sockets.tzext.h b/Tracealyzer/include/aws_secure_sockets.tzext.h new file mode 100644 index 00000000..f2ebf74c --- /dev/null +++ b/Tracealyzer/include/aws_secure_sockets.tzext.h @@ -0,0 +1,170 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.2.0 + * Percepio AB, www.percepio.com + * + * aws_secure_socket.tzext.h + * + * An example of a Tracealyzer extension for tracing API calls, in this case + * for tracing selected functions in Amazon FreeRTOS/aws_secure_sockets. + * See trcExtensions.h for information on how to use this. + * + * To create your own extension, first make sure to read the documentation + * in trcExtensions.h. Then, to create an extension header file like this + * one, you need to provide: + * + * - Extension Definitions - name and event codes of the extensions. + * + * - Trace Wrappers - calls the original function and traces the event. + * + * - Function Redefinitions - changes the function calls to the trace wrappers. + * + * See the below comments for details about these definitions. Note that you + * also need a matching .xml file for Tracealyzer to understand the data. + * See trcExtensions.h for further information. + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef _AWS_SECURE_SOCKETS_TZEXT_H +#define _AWS_SECURE_SOCKETS_TZEXT_H + +/***** Extension Definitions *****/ + +/****************************************************************************** + * _NAME + * The name of the extension as a string constant. This name is used by the + * Tracealyzer host application to find the right XML file for interpreting + * the events. Assuming the extension name is "aws_secure_sockets", Tracealyzer + * will look for an XML file named "aws_secure_sockets-.xml", first in + * the folder of the current trace file, next in the Tracealyzer 4/cfg folder. + * For the VERSION part, see the TRC_EXT__VERSION macros below. + * + * Note: The extension name displayed in Tracealyzer is defined in the XML file + * in the EventGroup element (e.g. ) + * + *****************************************************************************/ +#define TRC_EXT_SOCKETS_NAME "aws_secure_sockets" + +/****************************************************************************** + * _VERSION_MAJOR + * _VERSION_MINOR + * _VERSION_PATCH + * + * The version code of the extension (MAJOR.MINOR.PATCH) + * + * If you increment the version code when modifying an extension, you can still + * show old traces recorded using an earlier version of the extension. + * + * Assuming the extension name is "aws_secure_sockets", and the below version + * codes are 1 (MAJOR), 2 (MINOR), 3 (PATCH), Tracealyzer will assume the + * corresponding XML file is named "aws_secure_sockets-v1.2.3.xml". So if then + * view a trace recorded with extension version 1.2.2, those traces will look + * for "aws_secure_sockets-v1.2.2.xml" instead. + * + * Note that major and minor are stored as 8 bit values, while patch is stored + * using 16 bits. They are treated as unsigned integers, so the maximum values + * are 256, 256 and 65535. + *****************************************************************************/ +#define TRC_EXT_SOCKETS_VERSION_MAJOR 1 + +#define TRC_EXT_SOCKETS_VERSION_MINOR 0 + +#define TRC_EXT_SOCKETS_VERSION_PATCH 0 + + +/****************************************************************************** + * _ + * The event codes used in the trace wrapper functions. Important that these + * are relative to _FIRST. + *****************************************************************************/ +#define EVENTCODE_SOCKETS_Connect (TRC_EXT_BASECODE + 0) + +#define EVENTCODE_SOCKETS_Send (TRC_EXT_BASECODE + 1) + +#define EVENTCODE_SOCKETS_Recv (TRC_EXT_BASECODE + 2) + +/****************************************************************************** + * _COUNT + * The number of event codes used by this extension. Should be at least 1. + * Tracealyzer allows for events codes up to 4095. + *****************************************************************************/ +#define TRC_EXT_SOCKETS_COUNT 2 + + +/***** Trace Wrappers *****/ + +#include "aws_secure_sockets.h" /* Including the original header file, so that custom data types are understood. */ + +static inline int32_t SOCKETS_Connect__trace( Socket_t xSocket, SocketsSockaddr_t * pxAddress, Socklen_t xAddressLength ) +{ + int32_t ret = SOCKETS_Connect(xSocket, pxAddress, xAddressLength); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent3(EVENTCODE_SOCKETS_Connect, (uint32_t)xSocket, (uint32_t)pxAddress->ulAddress, (uint32_t)ret); + + return ret; +} + +static inline int32_t SOCKETS_Send__trace( Socket_t xSocket, const void * pvBuffer, size_t xDataLength, uint32_t ulFlags ) +{ + int32_t ret = SOCKETS_Send(xSocket, pvBuffer, xDataLength, ulFlags); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent2(EVENTCODE_SOCKETS_Send, (uint32_t)xSocket, (uint32_t)ret); + + return ret; +} + + +static inline int32_t SOCKETS_Recv__trace( Socket_t xSocket, void * pvBuffer, size_t xBufferLength, uint32_t ulFlags ) +{ + int32_t ret = SOCKETS_Recv(xSocket, pvBuffer, xBufferLength, ulFlags); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent2(EVENTCODE_SOCKETS_Recv, (uint32_t)xSocket, (uint32_t)ret); + + return ret; +} + +/***** Function Redefinitions *****/ + +#define SOCKETS_Connect SOCKETS_Connect__trace + +#define SOCKETS_Send SOCKETS_Send__trace + +#define SOCKETS_Recv SOCKETS_Recv__trace + +#endif /* _AWS_SECURE_SOCKETS_TZEXT_H */ diff --git a/Tracealyzer/include/aws_wifi.tzext.h b/Tracealyzer/include/aws_wifi.tzext.h new file mode 100644 index 00000000..238eacaf --- /dev/null +++ b/Tracealyzer/include/aws_wifi.tzext.h @@ -0,0 +1,169 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.2.0 + * Percepio AB, www.percepio.com + * + * aws_secure_socket.tzext.h + * + * An example of a Tracealyzer extension for tracing API calls, in this case + * for tracing selected functions in Amazon FreeRTOS/aws_wifi. + * See trcExtensions.h for information on how to use this. + * + * To create your own extension, first make sure to read the documentation + * in trcExtensions.h. Then, to create an extension header file like this + * one, you need to provide: + * + * - Extension Definitions - name and event codes of the extensions. + * + * - Trace Wrappers - calls the original function and traces the event. + * + * - Function Redefinitions - changes the function calls to the trace wrappers. + * + * See the below comments for details about these definitions. Note that you + * also need a matching .xml file for Tracealyzer to understand the data. + * See trcExtensions.h for further information. + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef _AWS_WIFI_TZEXT_H +#define _AWS_WIFI_TZEXT_H + +/***** Extension Definitions (must use the same prefix!) *****/ + +/****************************************************************************** + * _NAME + * The name of the extension as a string constant. This name is used by the + * Tracealyzer host application to find the right XML file for interpreting + * the events. Assuming the extension name is "aws_secure_sockets", Tracealyzer + * will look for an XML file named "aws_secure_sockets-.xml", first in + * the folder of the current trace file, next in the Tracealyzer 4/cfg folder. + * For the VERSION part, see the TRC_EXT__VERSION macros below. + * + * Note: The extension name displayed in Tracealyzer is defined in the XML file + * in the EventGroup element (e.g. ) + * + *****************************************************************************/ +#define TRC_EXT_WIFI_NAME "aws_wifi" + +/****************************************************************************** + * _VERSION_MAJOR + * _VERSION_MINOR + * _VERSION_PATCH + * + * The version code of the extension (MAJOR.MINOR.PATCH) + * + * If you increment the version code when modifying an extension, you can still + * show old traces recorded using an earlier version of the extension. + * + * Assuming the extension name is "aws_secure_sockets", and the below version + * codes are 1 (MAJOR), 2 (MINOR), 3 (PATCH), Tracealyzer will assume the + * corresponding XML file is named "aws_secure_sockets-v1.2.3.xml". So if then + * view a trace recorded with extension version 1.2.2, those traces will look + * for "aws_secure_sockets-v1.2.2.xml" instead. + * + * Note that major and minor are stored as 8 bit values, while patch is stored + * using 16 bits. They are treated as unsigned integers, so the maximum values + * are 256, 256 and 65535. + *****************************************************************************/ +#define TRC_EXT_WIFI_VERSION_MAJOR 1 + +#define TRC_EXT_WIFI_VERSION_MINOR 0 + +#define TRC_EXT_WIFI_VERSION_PATCH 0 + +/****************************************************************************** + * _ + * The event codes used in the trace wrapper functions. Important that these + * are relative to _FIRST. + *****************************************************************************/ +#define EVENTCODE_WIFI_On (TRC_EXT_BASECODE + 0) + +#define EVENTCODE_WIFI_Off (TRC_EXT_BASECODE + 1) + +#define EVENTCODE_WIFI_ConnectAP (TRC_EXT_BASECODE + 2) + +/****************************************************************************** + * _COUNT + * The number of event codes used by this extension. Should be at least 1. + * Tracealyzer allows for events codes up to 4095. + *****************************************************************************/ +#define TRC_EXT_WIFI_COUNT 3 + + +/***** Trace Wrappers *****/ + +#include "aws_wifi.h" /* Including the original header file, so that custom data types are understood. */ + +static inline WIFIReturnCode_t WIFI_On__trace( void ) +{ + WIFIReturnCode_t ret = WIFI_On(); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent1(EVENTCODE_WIFI_On, (uint32_t)ret); + + return ret; +} + + static inline WIFIReturnCode_t WIFI_Off__trace( void ) + { + WIFIReturnCode_t ret = WIFI_Off(); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent1(EVENTCODE_WIFI_Off, (uint32_t)ret); + + return ret; + } + + static inline WIFIReturnCode_t WIFI_ConnectAP__trace( const WIFINetworkParams_t * const pxNetworkParams ) + { + WIFIReturnCode_t ret = WIFI_ConnectAP(pxNetworkParams); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + + prvTraceStoreStringEvent(2, EVENTCODE_WIFI_ConnectAP, pxNetworkParams->pcSSID, pxNetworkParams->xSecurity, ret); + + return ret; + } + +/***** Function Redefinitions *****/ + +#define WIFI_On WIFI_On__trace + +#define WIFI_Off WIFI_Off__trace + +#define WIFI_ConnectAP WIFI_ConnectAP__trace + +#endif /* _AWS_SECURE_SOCKETS2_TZEXT_H */ diff --git a/Tracealyzer/include/trcExtensions.h b/Tracealyzer/include/trcExtensions.h new file mode 100644 index 00000000..dfcdfcea --- /dev/null +++ b/Tracealyzer/include/trcExtensions.h @@ -0,0 +1,422 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcExtensions.h + * + * The extension interface of the recorder library, allowing for tracing + * function calls to any API without modifications. All that is needed is a + * single #include line in the .c files calling the API. + * + * This can be used to provide more detailed traces, including calls to e.g. + * middleware, drivers or important APIs in your application code. This can be + * applied selectively to specified functions and may include selected + * parameters as well as the return value. + * + * Unlike the "User Event" concept, an extension is intended for systematic use + * and can benefit from all powerful features in Tracealyzer via host-side XML + * files that configure how Tracealyzer should interpret each event. + * + * Extensions are self-contained and easy to integrate, which makes them + * convenient for distribution. Software vendors can thus develop such + * extensions and provide trace support for their users. + * + * An extension consists of two files: + * + * - An extension header file (e.g. "api.tzext.h") - this defines how to + * trace the API function calls. + * + * - An XML file for the Tracealyzer application (e.g. "api-v1.0.0.xml"). + * This needs to match the tracing setup in your extension header file. + * + * + * USAGE + * + * This description assumes you already have the extension files for the APIs you + * like to trace. To include them, follow these steps: + * + * 1. Update trcExtensions.h with respect to: + * + * 1.1. TRC_CFG_EXTENSION_COUNT: The number of extensions to enable (max 4). + * + * 1.2. The name(s) of the extension header file(s) to include. + * + * 1.3. The Extension Prefix, i.e., the first part of the definition names + * used in each header file. + * + * 2. Add #include "trcExtensions.h" in all .c files calling the API: + * + * #include ... + * #include "api.h" // The API you like to trace + * #include ... + * #include "trcExtensions.h" + * + * We recommend to put this as the LAST #include statement. + * + * HOWEVER, don't include "trcExtensions.h" in the .c files containing the + * functions you intend to trace. The compiler will then complain about + * multiple definitions of the trace wrapper function. + * + * 3. Copy the extension XML file to the "Tracealyzer 4/cfg" folder. + * On Windows this is typically + * + * C:\Program Files\Percepio\Tracealyzer 4\cfg + * + * + * HOW IT WORKS + * + * By including "trcExtensions.h" in your .c files, the preprocessor will + * redefine all calls of the functions specified in the extension header file. + * Calls to those functions will now instead call the "trace wrapper functions" + * defined in the extension header. The trace wrapper functions then call the + * original function as well as the trace recorder library. + * + * call foo(a) ----> foo__trace(a) -----> foo(a) + * -----> trace recorder library + * + * Note that the trace wrapper function should have the same declaration as the + * original function (apart from the name) and also returns any return value + * back to the original caller. So functionally this is completely transparent. + * + * This works also for calls via function pointers, as the assignments of the + * function pointers will be affected, so the function pointers will point to + * the trace wrapper function. + * + * It even works when calling binary libraries, since only the calling code + * is modified, not the API itself. + * + * Extensions include a version code (Major.Minor.Patch), which is registered + * in the trace and also part of the XML file name. This way, Tracealyzer + * automatically finds the matching XML file, even if you open a old trace + * recorded using a earlier version of the extension (e.g. if the API has + * changed). + * + * LIMITATIONS + * + * The main limitation of this automatic approach is that it only allows for + * tracing call between different .c files. Moreover, you can't trace multiple + * APIs with calls between them. This since the calling file must include + * trcExtensions.h, while the called file must NOT include this. + * + * It is however possible to get around this limitation. You need to add + * #undef lines for each affected function to locally disable the redefinition, + * and modify each function call to instead call the trace wrapper function. + * + * #include "trcExtensions.h" + * #undef foo + * ... + * void foo(int a) + * { + * ... + * } + * ... + * foo__trace(a); // in another function - call foo and trace it + * + * These changes can remain in your code if you like, as the trace wrappers + * works even if the recorder is disabled. + * + * MAKING YOUR OWN EXTENSIONS + * + * Examples are found in the extensions directory. We recommend that you start + * by looking at aws_secure_sockets files (.h and .xml) that provides a basic + * example. The aws_wifi files provides a more advanced example. + * The header files include detailed documentation about how to design them, + * + * The XML files should have the same name as specified in the NAME property + * in the header file, followed by the version, i.e. + * + * -v.<..xml + * + * Documentation for the XML file format is not yet available, but is under + * development. + * + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef TRCEXTENSIONS_H_ +#define TRCEXTENSIONS_H_ + +#include "trcRecorder.h" + +/****************************************************************************** + * TRC_CFG_EXTENSION_COUNT + * + * Defines the number of extensions included in the trace. Maximum 4 extensions + * can be included. + * + * Default value is 0 (extension support disabled). + * + *****************************************************************************/ +#define TRC_CFG_EXTENSION_COUNT 0 + +/****************************************************************************** + * TRC_CFG_EXT_MAX_NAME_LEN + * + * Defines the maximum length of extension name(s), i.e. the _NAME + * macro(s) in trcExtensions.h. + * + * This value should will by rounded up to the nearest multiple of 4, and must + * not be zero. To disable extension support, see TRC_CFG_EXTENSION_COUNT. + * + * It is important that this setting is large enough so extension names are + * not truncated, otherwise the host-side Tracealyzer application won't be able + * to find the corresponding XML file. + * + * You may adjust this to reduce memory usage, or increase it to allow for + * longer extension names. + * + * Default value is 20. + *****************************************************************************/ +#define TRC_CFG_EXT_MAX_NAME_LEN 20 + +/****************************************************************************** + * TRC_EXTENSION_EVENTCODE_BASE + * + * The first event code used for the Extension system. This will be the first + * event code of the first extension, and other event codes are relative to + * this. This can be modified but this is normally not required. + *****************************************************************************/ +#define TRC_EXTENSION_EVENTCODE_BASE 256 + +/*** Included Extensions ****************************************************** + * + * Below you specify what extensions to include. For each + * extension you must define: + * + * - HEADER: The header file that defines the trace extension. + * + * - EXTENSION_PREFIX: The first part of the HEADER definition names. + * + *****************************************************************************/ +#define TRC_EXT1_HEADER "aws_secure_sockets.tzext.h" +#define TRC_EXT1_PREFIX TRC_EXT_SOCKETS + +#define TRC_EXT2_HEADER "aws_wifi.tzext.h" +#define TRC_EXT2_PREFIX TRC_EXT_WIFI + +#define TRC_EXT3_HEADER "Here you specify the header file for Extensions 3." +#define TRC_EXT3_PREFIX NOT_DEFINED + +#define TRC_EXT4_HEADER "Here you specify the header file for Extensions 4." +#define TRC_EXT4_PREFIX NOT_DEFINED + +/*** Don't modify below ******************************************************/ + +#define ROUNDUP4(n) (4*((n+3)/4)) + +typedef struct{ + uint16_t firstEventCode; + uint16_t lastEventCode; + uint16_t patchVersion; + uint8_t minorVersion; + uint8_t majorVersion; + char name[ROUNDUP4(TRC_CFG_EXT_MAX_NAME_LEN)]; +} PSFExtensionEntryType; + +typedef struct{ + uint16_t extensionEntryCount; + uint16_t baseEventCode; +#if (TRC_CFG_EXTENSION_COUNT > 0) + uint8_t extensionEntryNameMaxLength; + uint8_t extensionEntrySize; + PSFExtensionEntryType extension[TRC_CFG_EXTENSION_COUNT]; +#endif +} PSFExtensionInfoType; + + +extern PSFExtensionInfoType PSFExtensionInfo; + +#define CAT(a, ...) PRIMITIVE_CAT(a, __VA_ARGS__) +#define PRIMITIVE_CAT(a, ...) a ## __VA_ARGS__ + +#define TRC_EXT_BASECODE (PSFExtensionInfo.extension[TRC_EXT_NUMBER-1].firstEventCode) + +#if (TRC_CFG_EXTENSION_COUNT >= 1) + #ifdef TRC_EXT1_HEADER + #define TRC_EXT_NUMBER 1 + #include TRC_EXT1_HEADER + #undef TRC_EXT_NUMBER + #endif +#endif + +#if (TRC_CFG_EXTENSION_COUNT >= 2) + #ifdef TRC_EXT2_HEADER + #define TRC_EXT_NUMBER 2 + #include TRC_EXT2_HEADER + #undef TRC_EXT_NUMBER + #endif +#endif + +#if (TRC_CFG_EXTENSION_COUNT >= 3) + #ifdef TRC_EXT3_HEADER + #define TRC_EXT_NUMBER 3 + #include TRC_EXT3_HEADER + #undef TRC_EXT_NUMBER + #endif +#endif + +#if (TRC_CFG_EXTENSION_COUNT == 4) + #ifdef TRC_EXT3_HEADER + #define TRC_EXT_NUMBER 4 + #include TRC_EXT4_HEADER + #undef TRC_EXT_NUMBER + #endif +#endif + +#define TRC_EXT1_COUNT CAT(TRC_EXT1_PREFIX, _COUNT) +#define TRC_EXT2_COUNT CAT(TRC_EXT2_PREFIX, _COUNT) +#define TRC_EXT3_COUNT CAT(TRC_EXT3_PREFIX, _COUNT) +#define TRC_EXT4_COUNT CAT(TRC_EXT4_PREFIX, _COUNT) + +#define TRC_EXT1_NAME CAT(TRC_EXT1_PREFIX, _NAME) +#define TRC_EXT2_NAME CAT(TRC_EXT2_PREFIX, _NAME) +#define TRC_EXT3_NAME CAT(TRC_EXT3_PREFIX, _NAME) +#define TRC_EXT4_NAME CAT(TRC_EXT4_PREFIX, _NAME) + +#define TRC_EXT1_VERSION_MAJOR CAT(TRC_EXT1_PREFIX, _VERSION_MAJOR) +#define TRC_EXT2_VERSION_MAJOR CAT(TRC_EXT2_PREFIX, _VERSION_MAJOR) +#define TRC_EXT3_VERSION_MAJOR CAT(TRC_EXT3_PREFIX, _VERSION_MAJOR) +#define TRC_EXT4_VERSION_MAJOR CAT(TRC_EXT4_PREFIX, _VERSION_MAJOR) + +#define TRC_EXT1_VERSION_MINOR CAT(TRC_EXT1_PREFIX, _VERSION_MINOR) +#define TRC_EXT2_VERSION_MINOR CAT(TRC_EXT2_PREFIX, _VERSION_MINOR) +#define TRC_EXT3_VERSION_MINOR CAT(TRC_EXT3_PREFIX, _VERSION_MINOR) +#define TRC_EXT4_VERSION_MINOR CAT(TRC_EXT4_PREFIX, _VERSION_MINOR) + +#define TRC_EXT1_VERSION_PATCH CAT(TRC_EXT1_PREFIX, _VERSION_PATCH) +#define TRC_EXT2_VERSION_PATCH CAT(TRC_EXT2_PREFIX, _VERSION_PATCH) +#define TRC_EXT3_VERSION_PATCH CAT(TRC_EXT3_PREFIX, _VERSION_PATCH) +#define TRC_EXT4_VERSION_PATCH CAT(TRC_EXT4_PREFIX, _VERSION_PATCH) + +#if ((TRC_CFG_EXTENSION_COUNT > 4) || (TRC_CFG_EXTENSION_COUNT < 0)) + #error "TRC_CFG_EXTENSION_COUNT must be in range [0..4]" +#endif + +#if (TRC_CFG_EXTENSION_COUNT == 0) +#define TRC_EXTENSIONS_DATA +#endif + +#if (TRC_CFG_EXTENSION_COUNT == 1) +#define TRC_EXTENSIONS_DATA \ +{ \ + { TRC_EXTENSION_EVENTCODE_BASE, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT-1, \ + TRC_EXT1_VERSION_PATCH, \ + TRC_EXT1_VERSION_MINOR, \ + TRC_EXT1_VERSION_MAJOR, \ + TRC_EXT1_NAME } \ +} +#endif + +#if (TRC_CFG_EXTENSION_COUNT == 2) +#define TRC_EXTENSIONS_DATA \ +{ \ + { TRC_EXTENSION_EVENTCODE_BASE, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT-1, \ + TRC_EXT1_VERSION_PATCH, \ + TRC_EXT1_VERSION_MINOR, \ + TRC_EXT1_VERSION_MAJOR, \ + TRC_EXT1_NAME } \ + ,{ TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT + TRC_EXT2_COUNT-1, \ + TRC_EXT2_VERSION_PATCH, \ + TRC_EXT2_VERSION_MINOR, \ + TRC_EXT2_VERSION_MAJOR, \ + TRC_EXT2_NAME } \ +} +#endif + +#if (TRC_CFG_EXTENSION_COUNT == 3) +#define TRC_EXTENSIONS_DATA \ +{ \ + { TRC_EXTENSION_EVENTCODE_BASE, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT-1, \ + TRC_EXT1_VERSION_PATCH, \ + TRC_EXT1_VERSION_MINOR, \ + TRC_EXT1_VERSION_MAJOR, \ + TRC_EXT1_NAME } \ + ,{ TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT + TRC_EXT2_COUNT-1, \ + TRC_EXT2_VERSION_PATCH, \ + TRC_EXT2_VERSION_MINOR, \ + TRC_EXT2_VERSION_MAJOR, \ + TRC_EXT2_NAME } \ + ,{ TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT + TRC_EXT2_COUNT, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT + TRC_EXT2_COUNT + TRC_EXT3_COUNT - 1, \ + TRC_EXT3_VERSION_PATCH, \ + TRC_EXT3_VERSION_MINOR, \ + TRC_EXT3_VERSION_MAJOR, \ + TRC_EXT3_NAME } \ +} +#endif +#if (TRC_CFG_EXTENSION_COUNT == 4) +#define TRC_EXTENSIONS_DATA \ +{ \ + { TRC_EXTENSION_EVENTCODE_BASE, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT-1, \ + TRC_EXT1_VERSION_PATCH, \ + TRC_EXT1_VERSION_MINOR, \ + TRC_EXT1_VERSION_MAJOR, \ + TRC_EXT1_NAME } \ + ,{ TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT + TRC_EXT2_COUNT-1, \ + TRC_EXT2_VERSION_PATCH, \ + TRC_EXT2_VERSION_MINOR, \ + TRC_EXT2_VERSION_MAJOR, \ + TRC_EXT2_NAME } \ + ,{ TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT + TRC_EXT2_COUNT, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT + TRC_EXT2_COUNT + TRC_EXT3_COUNT - 1, \ + TRC_EXT3_VERSION_PATCH, \ + TRC_EXT3_VERSION_MINOR, \ + TRC_EXT3_VERSION_MAJOR, \ + TRC_EXT3_NAME } \ + ,{ TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT + TRC_EXT2_COUNT + TRC_EXT3_COUNT, \ + TRC_EXTENSION_EVENTCODE_BASE + TRC_EXT1_COUNT + TRC_EXT2_COUNT + TRC_EXT3_COUNT + TRC_EXT4_COUNT- 1, \ + TRC_EXT4_VERSION_PATCH, \ + TRC_EXT4_VERSION_MINOR, \ + TRC_EXT4_VERSION_MAJOR, \ + TRC_EXT4_NAME } \ +} +#endif + +#if (TRC_CFG_EXTENSION_COUNT > 0) +#define TRC_EXTENSION_INFO {TRC_CFG_EXTENSION_COUNT, TRC_EXTENSION_EVENTCODE_BASE, ROUNDUP4(TRC_CFG_EXT_MAX_NAME_LEN), sizeof(PSFExtensionEntryType), TRC_EXTENSIONS_DATA} +#else +#define TRC_EXTENSION_INFO {TRC_CFG_EXTENSION_COUNT, TRC_EXTENSION_EVENTCODE_BASE} +#endif + +#endif /* TRCEXTENSIONS_H_ */ diff --git a/Tracealyzer/include/trcHardwarePort.h b/Tracealyzer/include/trcHardwarePort.h new file mode 100644 index 00000000..e452999e --- /dev/null +++ b/Tracealyzer/include/trcHardwarePort.h @@ -0,0 +1,558 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcHardwarePort.h + * + * The hardware abstraction layer for the trace recorder. + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef TRC_HARDWARE_PORT_H +#define TRC_HARDWARE_PORT_H + +#include "trcPortDefines.h" + + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_NOT_SET) + #error "TRC_CFG_HARDWARE_PORT not selected - see trcConfig.h" +#endif + +/******************************************************************************* + * TRC_IRQ_PRIORITY_ORDER + * + * Macro which should be defined as an integer of 0 or 1. + * + * This should be 0 if lower IRQ priority values implies higher priority + * levels, such as on ARM Cortex M. If the opposite scheme is used, i.e., + * if higher IRQ priority values means higher priority, this should be 1. + * + * This setting is not critical. It is used only to sort and colorize the + * interrupts in priority order, in case you record interrupts using + * the vTraceStoreISRBegin and vTraceStoreISREnd routines. + * + ****************************************************************************** + * + * HWTC Macros + * + * These macros provides a hardware isolation layer representing the + * hardware timer/counter used for the event timestamping. + * + * TRC_HWTC_COUNT: How to read the current value of the timer/counter. + * + * TRC_HWTC_TYPE: Tells the type of timer/counter used for TRC_HWTC_COUNT: + * + * - TRC_FREE_RUNNING_32BIT_INCR: + * Free-running 32-bit timer/counter, counting upwards from 0. + * + * - TRC_FREE_RUNNING_32BIT_DECR + * Free-running 32-bit timer/counter, counting downwards from 0xFFFFFFFF. + * + * - TRC_OS_TIMER_INCR + * Periodic timer that drives the OS tick interrupt, counting upwards + * from 0 until (TRC_HWTC_PERIOD-1). + * + * - TRC_OS_TIMER_DECR + * Periodic timer that drives the OS tick interrupt, counting downwards + * from TRC_HWTC_PERIOD-1 until 0. + * + * - TRC_CUSTOM_TIMER_INCR + * A custom timer or counter independent of the OS tick, counting + * downwards from TRC_HWTC_PERIOD-1 until 0. (Currently only supported + * in streaming mode). + * + * - TRC_CUSTOM_TIMER_DECR + * A custom timer independent of the OS tick, counting downwards + * from TRC_HWTC_PERIOD-1 until 0. (Currently only supported + * in streaming mode). + * + * TRC_HWTC_PERIOD: The number of HWTC_COUNT ticks until the timer wraps + * around. If using TRC_FREE_RUNNING_32BIT_INCR/DECR, this should be 0. + * + * TRC_HWTC_FREQ_HZ: The clock rate of the TRC_HWTC_COUNT counter in Hz. If using + * TRC_OS_TIMER_INCR/DECR, this is should be TRC_HWTC_PERIOD * TRACE_TICK_RATE_HZ. + * If using a free-running timer, this is often TRACE_CPU_CLOCK_HZ (if running at + * the core clock rate). If using TRC_CUSTOM_TIMER_INCR/DECR, this should match + * the clock rate of your custom timer (i.e., TRC_HWTC_COUNT). If the default value + * of TRC_HWTC_FREQ_HZ is incorrect for your setup, you can override it by calling + * vTraceSetFrequency before calling vTraceEnable. + * + * TRC_HWTC_DIVISOR (used in snapshot mode only): + * In snapshot mode, the timestamp resolution is TRC_HWTC_FREQ_HZ/TRC_HWTC_DIVISOR. + * If the timer frequency is very high (hundreds of MHz), we recommend increasing + * the TRC_HWTC_DIVISOR prescaler, to reduce the bandwidth needed to store + * timestamps. This since extra "XTS" events are inserted if the time since the + * previous event exceeds a certain limit (255 or 65535 depending on event type). + * It is advised to keep the time between most events below 65535 native ticks + * (after division by TRC_HWTC_DIVISOR) to avoid frequent XTS events. + ******************************************************************************/ + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_NOT_SET) + #error "TRC_CFG_HARDWARE_PORT not selected - see trcConfig.h" +#endif + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Win32) + /* This can be used as a template for any free-running 32-bit counter */ + #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR + #define TRC_HWTC_COUNT (ulGetRunTimeCounterValue()) + #define TRC_HWTC_PERIOD 0 + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ 100000 + + #define TRC_IRQ_PRIORITY_ORDER 1 + + #define TRC_PORT_SPECIFIC_INIT() + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_HWIndependent) + /* Timestamping by OS tick only (typically 1 ms resolution) */ + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT 0 + #define TRC_HWTC_PERIOD 1 + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ TRACE_TICK_RATE_HZ + + /* Set the meaning of IRQ priorities in ISR tracing - see above */ + #define TRC_IRQ_PRIORITY_ORDER NOT_SET + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_Cortex_M) + + #ifndef __CORTEX_M + #error "Can't find the CMSIS API. Please include your processor's header file in trcConfig.h" + #endif + + /************************************************************************** + * For Cortex-M3, M4 and M7, the DWT cycle counter is used for timestamping. + * For Cortex-M0 and M0+, the SysTick timer is used since DWT is not + * available. Systick timestamping can also be forced on Cortex-M3, M4 and + * M7 by defining the preprocessor directive TRC_CFG_ARM_CM_USE_SYSTICK, + * either directly below or in trcConfig.h. + * + * #define TRC_CFG_ARM_CM_USE_SYSTICK + **************************************************************************/ + + #if ((__CORTEX_M >= 0x03) && (! defined TRC_CFG_ARM_CM_USE_SYSTICK)) + + void prvTraceInitCortexM(void); + + #define TRC_REG_DEMCR (*(volatile uint32_t*)0xE000EDFC) + #define TRC_REG_DWT_CTRL (*(volatile uint32_t*)0xE0001000) + #define TRC_REG_DWT_CYCCNT (*(volatile uint32_t*)0xE0001004) + #define TRC_REG_DWT_EXCCNT (*(volatile uint32_t*)0xE000100C) + + #define TRC_REG_ITM_LOCKACCESS (*(volatile uint32_t*)0xE0001FB0) + #define TRC_ITM_LOCKACCESS_UNLOCK (0xC5ACCE55) + + /* Bit mask for TRCENA bit in DEMCR - Global enable for DWT and ITM */ + #define TRC_DEMCR_TRCENA (1 << 24) + + /* Bit mask for NOPRFCNT bit in DWT_CTRL. If 1, DWT_EXCCNT is not supported */ + #define TRC_DWT_CTRL_NOPRFCNT (1 << 24) + + /* Bit mask for NOCYCCNT bit in DWT_CTRL. If 1, DWT_CYCCNT is not supported */ + #define TRC_DWT_CTRL_NOCYCCNT (1 << 25) + + /* Bit mask for EXCEVTENA_ bit in DWT_CTRL. Set to 1 to enable DWT_EXCCNT */ + #define TRC_DWT_CTRL_EXCEVTENA (1 << 18) + + /* Bit mask for EXCEVTENA_ bit in DWT_CTRL. Set to 1 to enable DWT_CYCCNT */ + #define TRC_DWT_CTRL_CYCCNTENA (1) + + #define TRC_PORT_SPECIFIC_INIT() prvTraceInitCortexM() + + #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR + #define TRC_HWTC_COUNT TRC_REG_DWT_CYCCNT + #define TRC_HWTC_PERIOD 0 + #define TRC_HWTC_DIVISOR 4 + #define TRC_HWTC_FREQ_HZ TRACE_CPU_CLOCK_HZ + #define TRC_IRQ_PRIORITY_ORDER 0 + + #else + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT (*((volatile uint32_t*)0xE000E018)) + #define TRC_HWTC_PERIOD ((*((volatile uint32_t*)0xE000E014)) + 1) + #define TRC_HWTC_DIVISOR 4 + #define TRC_HWTC_FREQ_HZ TRACE_CPU_CLOCK_HZ + #define TRC_IRQ_PRIORITY_ORDER 0 + + #endif + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Renesas_RX600) + + #include "iodefine.h" + + #if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (CMT0.CMCNT) + + #elif (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + + /* Decreasing counters better for Tickless Idle? */ + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT (CMT0.CMCOR - CMT0.CMCNT) + + #endif + + #define TRC_HWTC_PERIOD (CMT0.CMCOR + 1) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_MICROCHIP_PIC24_PIC32) + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (TMR1) + #define TRC_HWTC_PERIOD (PR1 + 1) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_TMS570_RM48) + + #define TRC_RTIFRC0 *((uint32_t *)0xFFFFFC10) + #define TRC_RTICOMP0 *((uint32_t *)0xFFFFFC50) + #define TRC_RTIUDCP0 *((uint32_t *)0xFFFFFC54) + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (TRC_RTIFRC0 - (TRC_RTICOMP0 - TRC_RTIUDCP0)) + #define TRC_HWTC_PERIOD (TRC_RTIUDCP0) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Atmel_AT91SAM7) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT ((uint32_t)(AT91C_BASE_PITC->PITC_PIIR & 0xFFFFF)) + #define TRC_HWTC_PERIOD ((uint32_t)(AT91C_BASE_PITC->PITC_PIMR + 1)) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Atmel_UC3A0) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO*/ + + /* For Atmel AVR32 (AT32UC3A) */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT ((uint32_t)sysreg_read(AVR32_COUNT)) + #define TRC_HWTC_PERIOD ((uint32_t)(sysreg_read(AVR32_COMPARE) + 1)) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_NXP_LPC210X) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */ + + /* Tested with LPC2106, but should work with most LPC21XX chips. */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT *((uint32_t *)0xE0004008 ) + #define TRC_HWTC_PERIOD *((uint32_t *)0xE0004018 ) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_MSP430) + + /* UNOFFICIAL PORT - NOT YET VERIFIED */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (TA0R) + #define TRC_HWTC_PERIOD (((uint16_t)TACCR0)+1) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_PPC405) + + /* UNOFFICIAL PORT - NOT YET VERIFIED */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT mfspr(0x3db) + #define TRC_HWTC_PERIOD (TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_PPC440) + + /* UNOFFICIAL PORT */ + + /* This should work with most PowerPC chips */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT mfspr(0x016) + #define TRC_HWTC_PERIOD (TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_MICROBLAZE) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */ + + /* This should work with most Microblaze configurations. + * It uses the AXI Timer 0 - the tick interrupt source. + * If an AXI Timer 0 peripheral is available on your hardware platform, no modifications are required. + */ + #include "xtmrctr_l.h" + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT XTmrCtr_GetTimerCounterReg( XPAR_TMRCTR_0_BASEADDR, 0 ) + #define TRC_HWTC_PERIOD (XTmrCtr_mGetLoadReg( XPAR_TMRCTR_0_BASEADDR, 0) + 1) + #define TRC_HWTC_DIVISOR 16 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_ZyncUltraScaleR5) + + #include "xttcps_hw.h" + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (*(volatile uint32_t *)(configTIMER_BASEADDR + XTTCPS_COUNT_VALUE_OFFSET)) + #define TRC_HWTC_PERIOD (*(volatile uint32_t *)(configTIMER_BASEADDR + XTTCPS_INTERVAL_VAL_OFFSET)) + #define TRC_HWTC_DIVISOR 16 + #define TRC_HWTC_FREQ_HZ (TRC_HWTC_PERIOD * TRACE_TICK_RATE_HZ) + #define TRC_IRQ_PRIORITY_ORDER 0 + + #ifdef __GNUC__ + /* For Arm Cortex-A and Cortex-R in general. */ + static inline uint32_t prvGetCPSR(void) + { + unsigned long ret; + /* GCC-style assembly for getting the CPSR/APSR register, where the system execution mode is found. */ + asm volatile (" mrs %0, cpsr" : "=r" (ret) : /* no inputs */ ); + return ret; + } + #else + #error "Only GCC Supported!" + #endif + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Altera_NiosII) + + /* OFFICIAL PORT */ + + #include + #include + + #define NOT_SET 1 + + /* The base address for the sustem timer set. + * The name user for the system timer can be found in the BSP editor. + * If the name of the timer is sys_tmr SYSTEM_TIMER_BASE should be set to SYS_TMR_BASE. + */ + #define SYSTEM_TIMER_BASE NOT_SET + + #if (SYSTEM_TIMER == NOT_SET) + #error "Set SYSTEM_TIMER_BASE to the timer base used for system ticks." + #endif + + static inline uint32_t altera_nios2_GetTimerSnapReg(void) + { + /* A processor can read the current counter value by first writing to either snapl or snaph to request a coherent snapshot of the counter, + * and then reading snapl and snaph for the full 32-bit value. + */ + IOWR_ALTERA_AVALON_TIMER_SNAPL(SYSTEM_TIMER_BASE, 0); + return (IORD_ALTERA_AVALON_TIMER_SNAPH(SYSTEM_TIMER_BASE) << 16) | IORD_ALTERA_AVALON_TIMER_SNAPL(SYSTEM_TIMER_BASE); + } + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT altera_nios2_GetTimerSnapReg() + #define TRC_HWTC_PERIOD (configCPU_CLOCK_HZ / configTICK_RATE_HZ ) + #define TRC_HWTC_DIVISOR 16 + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_CORTEX_A9) + + /************************************************************************** + * This hardware port only supports FreeRTOS and the GCC compiler at the + * moment, due to the implementation of critical sections (trcKernelPort.h). + * + * Assuming FreeRTOS is used: + * + * For critical sections, this uses vTaskEnterCritical is when called from + * task context and ulPortSetInterruptMask when called from ISR context. + * Thus, it does not disable all ISRs. This means that the trace recorder + * can only be called from ISRs with priority less or equal to + * configMAX_API_CALL_INTERRUPT_PRIORITY (like FreeRTOS fromISR functions). + * + * This hardware port has been tested on it a Xilinx Zync 7000 (Cortex-A9), + * but should work with all Cortex-A and R processors assuming that + * TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS is set accordingly. + **************************************************************************/ + + /* INPUT YOUR PERIPHERAL BASE ADDRESS HERE (0xF8F00000 for Xilinx Zynq 7000)*/ + #define TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS 0 + + #if (TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS == 0) + #error "Please specify TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS." + #endif + + #define TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET 0x0600 + #define TRC_CA9_MPCORE_PRIVCTR_PERIOD_REG (*(volatile uint32_t*)(TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS + TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET + 0x00)) + #define TRC_CA9_MPCORE_PRIVCTR_COUNTER_REG (*(volatile uint32_t*)(TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS + TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET + 0x04)) + #define TRC_CA9_MPCORE_PRIVCTR_CONTROL_REG (*(volatile uint32_t*)(TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS + TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET + 0x08)) + + #define TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_MASK 0x0000FF00 + #define TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_SHIFT 8 + #define TRC_CA9_MPCORE_PRIVCTR_PRESCALER (((TRC_CA9_MPCORE_PRIVCTR_CONTROL_REG & TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_MASK) >> TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_SHIFT) + 1) + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT TRC_CA9_MPCORE_PRIVCTR_COUNTER_REG + #define TRC_HWTC_PERIOD (TRC_CA9_MPCORE_PRIVCTR_PERIOD_REG + 1) + + /**************************************************************************************** + NOTE: The private timer ticks with a very high frequency (half the core-clock usually), + depending on the prescaler used. If a low prescaler is used, the number of HW ticks between + the trace events gets large, and thereby inefficient to store (sometimes extra events are + needed). To improve efficiency, you may use the TRC_HWTC_DIVISOR as an additional prescaler. + *****************************************************************************************/ + #define TRC_HWTC_DIVISOR 1 + + #define TRC_HWTC_FREQ_HZ (TRACE_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + + #ifdef __GNUC__ + /* For Arm Cortex-A and Cortex-R in general. */ + static inline uint32_t prvGetCPSR(void) + { + unsigned long ret; + /* GCC-style assembly for getting the CPSR/APSR register, where the system execution mode is found. */ + asm volatile (" mrs %0, cpsr" : "=r" (ret) : /* no inputs */ ); + return ret; + } + #else + #error "Only GCC Supported!" + #endif + + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_POWERPC_Z4) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + //#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING + #define TRC_HWTC_COUNT PIT.TIMER[configTICK_PIT_CHANNEL].CVAL.R // must be the PIT channel used for the systick + #define TRC_HWTC_PERIOD ((configPIT_CLOCK_HZ / configTICK_RATE_HZ) - 1U) // TODO FIXME or maybe not -1? what's the right "period" value? + #define TRC_HWTC_FREQ_HZ configPIT_CLOCK_HZ + #define TRC_HWTC_DIVISOR 1 + #define TRC_IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_APPLICATION_DEFINED) + + #if !( defined (TRC_HWTC_TYPE) && defined (TRC_HWTC_COUNT) && defined (TRC_HWTC_PERIOD) && defined (TRC_HWTC_FREQ_HZ) && defined (TRC_IRQ_PRIORITY_ORDER) ) + #error "The hardware port is not completely defined!" + #endif + +#elif (TRC_CFG_HARDWARE_PORT != TRC_HARDWARE_PORT_NOT_SET) + + #error "TRC_CFG_HARDWARE_PORT had unsupported value!" + #define TRC_CFG_HARDWARE_PORT TRC_HARDWARE_PORT_NOT_SET + +#endif + +#ifndef TRC_HWTC_DIVISOR + #define TRC_HWTC_DIVISOR 1 +#endif + +#ifndef TRC_PORT_SPECIFIC_INIT + #define TRC_PORT_SPECIFIC_INIT() +#endif + +/* If Win32 port */ +#ifdef WIN32 + + #undef _WIN32_WINNT + #define _WIN32_WINNT 0x0600 + + /* Standard includes. */ + #include + #include + #include + + /*************************************************************************** + * The Win32 port by default saves the trace to file and then kills the + * program when the recorder is stopped, to facilitate quick, simple tests + * of the recorder. + ***************************************************************************/ + #define WIN32_PORT_SAVE_WHEN_STOPPED 1 + #define WIN32_PORT_EXIT_WHEN_STOPPED 1 + +#endif + +#if (TRC_CFG_HARDWARE_PORT != TRC_HARDWARE_PORT_NOT_SET) + + #ifndef TRC_HWTC_TYPE + #error "TRC_HWTC_TYPE is not set!" + #endif + + #ifndef TRC_HWTC_COUNT + #error "TRC_HWTC_COUNT is not set!" + #endif + + #ifndef TRC_HWTC_PERIOD + #error "TRC_HWTC_PERIOD is not set!" + #endif + + #ifndef TRC_HWTC_DIVISOR + #error "TRC_HWTC_DIVISOR is not set!" + #endif + + #ifndef TRC_IRQ_PRIORITY_ORDER + #error "TRC_IRQ_PRIORITY_ORDER is not set!" + #elif (TRC_IRQ_PRIORITY_ORDER != 0) && (TRC_IRQ_PRIORITY_ORDER != 1) + #error "TRC_IRQ_PRIORITY_ORDER has bad value!" + #endif + + #if (TRC_HWTC_DIVISOR < 1) + #error "TRC_HWTC_DIVISOR must be a non-zero positive value!" + #endif + + #ifndef TRC_HWTC_FREQ_HZ + #error "TRC_HWTC_FREQ_HZ not defined!" + #endif + +#endif + +#endif /*TRC_SNAPSHOT_HARDWARE_PORT_H*/ diff --git a/Tracealyzer/include/trcKernelPort.h b/Tracealyzer/include/trcKernelPort.h new file mode 100644 index 00000000..d877e81c --- /dev/null +++ b/Tracealyzer/include/trcKernelPort.h @@ -0,0 +1,2791 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * FreeRTOS-specific definitions needed by the trace recorder + * + * + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef TRC_KERNEL_PORT_H +#define TRC_KERNEL_PORT_H + +#include "FreeRTOS.h" /* Defines configUSE_TRACE_FACILITY */ +#include "trcPortDefines.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define TRC_USE_TRACEALYZER_RECORDER configUSE_TRACE_FACILITY + +/*** FreeRTOS version codes **************************************************/ +#define FREERTOS_VERSION_NOT_SET 0 +#define TRC_FREERTOS_VERSION_7_3_X 1 /* v7.3 is earliest supported.*/ +#define TRC_FREERTOS_VERSION_7_4_X 2 +#define TRC_FREERTOS_VERSION_7_5_X 3 +#define TRC_FREERTOS_VERSION_7_6_X TRC_FREERTOS_VERSION_7_5_X +#define TRC_FREERTOS_VERSION_8_X_X 4 +#define TRC_FREERTOS_VERSION_9_0_0 5 +#define TRC_FREERTOS_VERSION_9_0_1 6 +#define TRC_FREERTOS_VERSION_9_0_2 7 +#define TRC_FREERTOS_VERSION_10_0_0 8 +#define TRC_FREERTOS_VERSION_10_0_1 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_1_0 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_1_1 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_2_0 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_2_1 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_3_0 9 +#define TRC_FREERTOS_VERSION_10_3_1 TRC_FREERTOS_VERSION_10_3_0 +#define TRC_FREERTOS_VERSION_10_4_0 10 + +/* Legacy FreeRTOS version codes for backwards compatibility with old trace configurations */ +#define TRC_FREERTOS_VERSION_7_3 TRC_FREERTOS_VERSION_7_3_X +#define TRC_FREERTOS_VERSION_7_4 TRC_FREERTOS_VERSION_7_4_X +#define TRC_FREERTOS_VERSION_7_5_OR_7_6 TRC_FREERTOS_VERSION_7_5_X +#define TRC_FREERTOS_VERSION_8_X TRC_FREERTOS_VERSION_8_X_X + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +#define prvGetStreamBufferType(x) ((( StreamBuffer_t * )x )->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER) +#else +#define prvGetStreamBufferType(x) 0 +#endif + +/* Added mainly for our internal testing. This makes it easier to create test applications that + runs on multiple FreeRTOS versions. */ +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_8_X_X) + /* FreeRTOS v7.x */ + #define STRING_CAST(x) ( (signed char*) x ) + #define TickType portTickType + #define TaskType xTaskHandle +#else + /* FreeRTOS v8.0 and later */ + #define STRING_CAST(x) x + #define TickType TickType_t + #define TaskType TaskHandle_t +#endif + + + +#if (defined(TRC_USE_TRACEALYZER_RECORDER)) && (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) + /* Required for this feature */ +#undef INCLUDE_uxTaskGetStackHighWaterMark +#define INCLUDE_uxTaskGetStackHighWaterMark 1 +#endif /* defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) */ + +/******************************************************************************* + * INCLUDE_xTaskGetCurrentTaskHandle must be set to 1 for tracing to work properly + ******************************************************************************/ +#undef INCLUDE_xTaskGetCurrentTaskHandle +#define INCLUDE_xTaskGetCurrentTaskHandle 1 + +#if (TRC_CFG_SCHEDULING_ONLY == 0) +/******************************************************************************* + * vTraceSetQueueName(void* object, const char* name) + * + * Parameter object: pointer to the Queue that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for Queue objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetQueueName(void* object, const char* name); + +/******************************************************************************* + * vTraceSetSemaphoreName(void* object, const char* name) + * + * Parameter object: pointer to the Semaphore that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for Semaphore objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetSemaphoreName(void* object, const char* name); + +/******************************************************************************* + * vTraceSetMutexName(void* object, const char* name) + * + * Parameter object: pointer to the Mutex that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for Semaphore objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetMutexName(void* object, const char* name); + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) +/******************************************************************************* +* vTraceSetEventGroupName(void* object, const char* name) +* +* Parameter object: pointer to the EventGroup that shall be named +* Parameter name: the name to set (const string literal) +* +* Sets a name for EventGroup objects for display in Tracealyzer. +******************************************************************************/ +void vTraceSetEventGroupName(void* object, const char* name); +#else /* (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) */ +#define vTraceSetEventGroupName(object, name) /* Do nothing */ +#endif /* (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) */ + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) +/******************************************************************************* +* vTraceSetStreamBufferName(void* object, const char* name) +* +* Parameter object: pointer to the StreamBuffer that shall be named +* Parameter name: the name to set (const string literal) +* +* Sets a name for StreamBuffer objects for display in Tracealyzer. +******************************************************************************/ +void vTraceSetStreamBufferName(void* object, const char* name); +#else /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) */ +#define vTraceSetStreamBufferName(object, name) /* Do nothing */ +#endif /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) */ + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) +/******************************************************************************* + * vTraceSetMessageBufferName(void* object, const char* name) + * + * Parameter object: pointer to the MessageBuffer that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for MessageBuffer objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetMessageBufferName(void* object, const char* name); +#else /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) */ +#define vTraceSetMessageBufferName(object, name) /* Do nothing */ +#endif /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) */ + +#if defined (TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) +void prvAddTaskToStackMonitor(void* task); +void prvRemoveTaskFromStackMonitor(void* task); +#else /* defined (TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) */ +#define prvAddTaskToStackMonitor(task) +#define prvRemoveTaskFromStackMonitor(task) +#endif /* defined (TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) */ + +#else /* (TRC_CFG_SCHEDULING_ONLY == 0) */ + +#define vTraceSetQueueName(object, name) /* Do nothing */ +#define vTraceSetSemaphoreName(object, name) /* Do nothing */ +#define vTraceSetMutexName(object, name) /* Do nothing */ +#define vTraceSetEventGroupName(object, name) /* Do nothing */ +#define vTraceSetStreamBufferName(object, name) /* Do nothing */ +#define vTraceSetMessageBufferName(object, name) /* Do nothing */ +#define prvAddTaskToStackMonitor(task) /* Do nothing */ +#define prvRemoveTaskFromStackMonitor(task) /* Do nothing */ + +#endif /* (TRC_CFG_SCHEDULING_ONLY == 0) */ + +/******************************************************************************* + * Note: Setting names for event groups is difficult to support, this has been + * excluded intentionally. This since we don't know if event_groups.c is + * included in the build, so referencing it from the recorder may cause errors. + ******************************************************************************/ + +/* Gives the currently executing task (wrapper for RTOS-specific function) */ +void* prvTraceGetCurrentTaskHandle(void); + +#if (((TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) && (TRC_CFG_INCLUDE_ISR_TRACING == 1)) || (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING)) +/* Tells if the scheduler currently is suspended (task-switches can't occur) */ +unsigned char prvTraceIsSchedulerSuspended(void); + +/******************************************************************************* + * INCLUDE_xTaskGetSchedulerState must be set to 1 for tracing to work properly + ******************************************************************************/ +#undef INCLUDE_xTaskGetSchedulerState +#define INCLUDE_xTaskGetSchedulerState 1 + +#endif /* (((TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) && (TRC_CFG_INCLUDE_ISR_TRACING == 1)) || (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING)) */ + +#define TRACE_KERNEL_VERSION 0x1AA1 +#define TRACE_TICK_RATE_HZ configTICK_RATE_HZ /* Defined in "FreeRTOS.h" */ +#define TRACE_CPU_CLOCK_HZ configCPU_CLOCK_HZ /* Defined in "FreeRTOSConfig.h" */ +#define TRACE_GET_CURRENT_TASK() prvTraceGetCurrentTaskHandle() + +#define TRACE_GET_OS_TICKS() (uiTraceTickCount) /* Streaming only */ + +/* If using dynamic allocation of snapshot trace buffer... */ +#define TRACE_MALLOC(size) pvPortMalloc(size) + +#if defined(configUSE_TIMERS) +#if (configUSE_TIMERS == 1) +#undef INCLUDE_xTimerGetTimerDaemonTaskHandle +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 1 +#endif /* configUSE_TIMERS == 1*/ +#endif /* configUSE_TIMERS */ + +/* For ARM Cortex-M devices - assumes the ARM CMSIS API is available */ +#if (defined (__CORTEX_M)) + #define TRACE_ALLOC_CRITICAL_SECTION() uint32_t __irq_status; + #define TRACE_ENTER_CRITICAL_SECTION() {__irq_status = __get_PRIMASK(); __set_PRIMASK(1);} /* PRIMASK disables ALL interrupts - allows for tracing in any ISR */ + #define TRACE_EXIT_CRITICAL_SECTION() {__set_PRIMASK(__irq_status);} +#endif + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_CORTEX_A9) || (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_ZyncUltraScaleR5) + + /************************************************************************** + * Disables "FreeRTOS-enabled" interrupts only , i.e. with priorities up to + * configMAX_API_CALL_INTERRUPT_PRIORITY. Don't add tracing in ISRs with + * greater priority. + *************************************************************************/ + + extern int cortex_a9_r5_enter_critical(void); + extern void cortex_a9_r5_exit_critical(int irq_already_masked_at_enter); + + #define TRACE_ALLOC_CRITICAL_SECTION() uint32_t __irq_mask_status; + + #define TRACE_ENTER_CRITICAL_SECTION() { __irq_mask_status = cortex_a9_r5_enter_critical(); } + + #define TRACE_EXIT_CRITICAL_SECTION() { cortex_a9_r5_exit_critical(__irq_mask_status); } + +#endif + +#if ( (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Renesas_RX600) || (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_MICROCHIP_PIC24_PIC32)) + #define TRACE_ALLOC_CRITICAL_SECTION() int __irq_status; + #define TRACE_ENTER_CRITICAL_SECTION() {__irq_status = portSET_INTERRUPT_MASK_FROM_ISR();} + #define TRACE_EXIT_CRITICAL_SECTION() {portCLEAR_INTERRUPT_MASK_FROM_ISR(__irq_status);} +#endif + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Altera_NiosII) + #include "system.h" + #include "sys/alt_irq.h" + #define TRACE_ALLOC_CRITICAL_SECTION() alt_irq_context __irq_status; + #define TRACE_ENTER_CRITICAL_SECTION(){__irq_status = alt_irq_disable_all();} + #define TRACE_EXIT_CRITICAL_SECTION() {alt_irq_enable_all(__irq_status);} +#endif + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Win32) + /* In the Win32 port, there are no real interrupts, so we can use the normal critical sections */ + #define TRACE_ALLOC_CRITICAL_SECTION() + #define TRACE_ENTER_CRITICAL_SECTION() portENTER_CRITICAL() + #define TRACE_EXIT_CRITICAL_SECTION() portEXIT_CRITICAL() +#endif + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_POWERPC_Z4) +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) + /* FreeRTOS v8.0 or later */ + #define TRACE_ALLOC_CRITICAL_SECTION() UBaseType_t __irq_status; + #define TRACE_ENTER_CRITICAL_SECTION() {__irq_status = portSET_INTERRUPT_MASK_FROM_ISR();} + #define TRACE_EXIT_CRITICAL_SECTION() {portCLEAR_INTERRUPT_MASK_FROM_ISR(__irq_status);} +#else + /* FreeRTOS v7.x */ + #define TRACE_ALLOC_CRITICAL_SECTION() unsigned portBASE_TYPE __irq_status; + #define TRACE_ENTER_CRITICAL_SECTION() {__irq_status = portSET_INTERRUPT_MASK_FROM_ISR();} + #define TRACE_EXIT_CRITICAL_SECTION() {portCLEAR_INTERRUPT_MASK_FROM_ISR(__irq_status);} +#endif +#endif + +#ifndef TRACE_ENTER_CRITICAL_SECTION + #error "This hardware port has no definition for critical sections! See http://percepio.com/2014/10/27/how-to-define-critical-sections-for-the-recorder/" +#endif + + +#if (TRC_CFG_FREERTOS_VERSION == TRC_FREERTOS_VERSION_9_0_1) + /****************************************************************************** + * Fix for FreeRTOS v9.0.1 to correctly identify xQueuePeek events. + * + * In FreeRTOS v9.0.1, the below trace hooks are incorrectly used from three + * different functions. This as the earlier function xQueueGenericReceive + * has been replaced by xQueuePeek, xQueueSemaphoreTake and xQueueReceive. + * + * xQueueGenericReceive had a parameter "xJustPeeking", used by the trace hooks + * to tell between xQueuePeek events and others. This is no longer present, so + * we need another way to correctly identify peek events. Since all three + * functions call the same trace macros, the context of these macro is unknown. + * + * We therefore check the __LINE__ macro inside of the trace macros. This gives + * the line number of queue.c, where the macros are used. This can be used to + * tell if the context is xQueuePeek or another function. + * __LINE__ is a standard compiler feature since ancient times, so it should + * work on all common compilers. + * + * This might seem as a quite brittle and unusual solution, but works in this + * particular case and is only for FreeRTOS v9.0.1. + * Future versions of FreeRTOS should not need this fix, as we have submitted + * a correction of queue.c with individual trace macros for each function. + ******************************************************************************/ +#define isQueueReceiveHookActuallyPeek (__LINE__ > 1674) /* Half way between the closes trace points */ + +#elif (TRC_CFG_FREERTOS_VERSION <= TRC_FREERTOS_VERSION_9_0_0) +#define isQueueReceiveHookActuallyPeek xJustPeeking + +#elif (TRC_CFG_FREERTOS_VERSION > TRC_FREERTOS_VERSION_9_0_1) +#define isQueueReceiveHookActuallyPeek (__LINE__ < 0) /* instead of pdFALSE to fix a warning of "constant condition" */ + +#endif + +extern uint16_t CurrentFilterMask; + +extern uint16_t CurrentFilterGroup; + +uint8_t prvTraceGetQueueType(void* handle); +uint16_t prvTraceGetTaskNumberLow16(void* handle); +uint16_t prvTraceGetTaskNumberHigh16(void* handle); +void prvTraceSetTaskNumberLow16(void* handle, uint16_t value); +void prvTraceSetTaskNumberHigh16(void* handle, uint16_t value); + +uint16_t prvTraceGetQueueNumberLow16(void* handle); +uint16_t prvTraceGetQueueNumberHigh16(void* handle); +void prvTraceSetQueueNumberLow16(void* handle, uint16_t value); +void prvTraceSetQueueNumberHigh16(void* handle, uint16_t value); + +#if (TRC_CFG_INCLUDE_TIMER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +uint16_t prvTraceGetTimerNumberLow16(void* handle); +uint16_t prvTraceGetTimerNumberHigh16(void* handle); +void prvTraceSetTimerNumberLow16(void* handle, uint16_t value); +void prvTraceSetTimerNumberHigh16(void* handle, uint16_t value); +#endif /* (TRC_CFG_INCLUDE_TIMER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +uint16_t prvTraceGetEventGroupNumberLow16(void* handle); +uint16_t prvTraceGetEventGroupNumberHigh16(void* handle); +void prvTraceSetEventGroupNumberLow16(void* handle, uint16_t value); +void prvTraceSetEventGroupNumberHigh16(void* handle, uint16_t value); +#endif /* (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +uint16_t prvTraceGetStreamBufferNumberLow16(void* handle); +uint16_t prvTraceGetStreamBufferNumberHigh16(void* handle); +void prvTraceSetStreamBufferNumberLow16(void* handle, uint16_t value); +void prvTraceSetStreamBufferNumberHigh16(void* handle, uint16_t value); +#endif /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#define TRACE_GET_TASK_FILTER(pxTask) prvTraceGetTaskNumberHigh16((void*)pxTask) +#define TRACE_SET_TASK_FILTER(pxTask, group) prvTraceSetTaskNumberHigh16((void*)pxTask, group) + +#define TRACE_GET_QUEUE_FILTER(pxObject) prvTraceGetQueueNumberHigh16((void*)pxObject) +#define TRACE_SET_QUEUE_FILTER(pxObject, group) prvTraceSetQueueNumberHigh16((void*)pxObject, group) + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +#define TRACE_GET_EVENTGROUP_FILTER(pxObject) prvTraceGetEventGroupNumberHigh16((void*)pxObject) +#define TRACE_SET_EVENTGROUP_FILTER(pxObject, group) prvTraceSetEventGroupNumberHigh16((void*)pxObject, group) +#else /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ +/* FreeRTOS versions before v10.0 does not support filtering for event groups */ +#define TRACE_GET_EVENTGROUP_FILTER(pxObject) 1 +#define TRACE_SET_EVENTGROUP_FILTER(pxObject, group) +#endif /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +#define TRACE_GET_TIMER_FILTER(pxObject) prvTraceGetTimerNumberHigh16((void*)pxObject) +#define TRACE_SET_TIMER_FILTER(pxObject, group) prvTraceSetTimerNumberHigh16((void*)pxObject, group) +#else /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ +/* FreeRTOS versions before v10.0 does not support filtering for timers */ +#define TRACE_GET_TIMER_FILTER(pxObject) 1 +#define TRACE_SET_TIMER_FILTER(pxObject, group) +#endif /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#define TRACE_GET_STREAMBUFFER_FILTER(pxObject) prvTraceGetStreamBufferNumberHigh16((void*)pxObject) +#define TRACE_SET_STREAMBUFFER_FILTER(pxObject, group) prvTraceSetStreamBufferNumberHigh16((void*)pxObject, group) + +/* We can only support filtering if FreeRTOS is at least v8.0 */ +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) +#define TRACE_GET_OBJECT_FILTER(CLASS, pxObject) TRACE_GET_##CLASS##_FILTER(pxObject) +#define TRACE_SET_OBJECT_FILTER(CLASS, pxObject, group) TRACE_SET_##CLASS##_FILTER(pxObject, group) +#else /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) */ +#define TRACE_GET_OBJECT_FILTER(CLASS, pxObject) 0xFFFF +#define TRACE_SET_OBJECT_FILTER(CLASS, pxObject, group) +#endif /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) */ + +/* Helpers needed to correctly expand names */ +#define TZ__CAT2(a,b) a ## b +#define TZ__CAT(a,b) TZ__CAT2(a, b) + +/**************************************************************************/ +/* Makes sure xQueueGiveFromISR also has a xCopyPosition parameter */ +/**************************************************************************/ + +/* Expands name if this header is included... uxQueueType must be a macro that only exists in queue.c or whatever, and it must expand to nothing or to something that's valid in identifiers */ +#define xQueueGiveFromISR(a,b) TZ__CAT(xQueueGiveFromISR__, uxQueueType) (a,b) + +/* If in queue.c, the "uxQueueType" macro expands to "pcHead". queueSEND_TO_BACK is the value we need to send in */ +#define xQueueGiveFromISR__pcHead(__a, __b) MyWrapper_xQueueGiveFromISR(__a, __b, const BaseType_t xCopyPosition); \ +BaseType_t xQueueGiveFromISR(__a, __b) { return MyWrapper_xQueueGiveFromISR(xQueue, pxHigherPriorityTaskWoken, queueSEND_TO_BACK); } \ +BaseType_t MyWrapper_xQueueGiveFromISR(__a, __b, const BaseType_t xCopyPosition) + +/* If not in queue.c, "uxQueueType" isn't expanded */ +#define xQueueGiveFromISR__uxQueueType(__a, __b) xQueueGiveFromISR(__a,__b) + +/**************************************************************************/ +/* End of xQueueGiveFromISR fix */ +/**************************************************************************/ + +/******************************************************************************/ +/*** Definitions for Snapshot mode ********************************************/ +/******************************************************************************/ +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + +/*** The object classes *******************************************************/ + +#define TRACE_NCLASSES 9 +#define TRACE_CLASS_QUEUE ((traceObjectClass)0) +#define TRACE_CLASS_SEMAPHORE ((traceObjectClass)1) +#define TRACE_CLASS_MUTEX ((traceObjectClass)2) +#define TRACE_CLASS_TASK ((traceObjectClass)3) +#define TRACE_CLASS_ISR ((traceObjectClass)4) +#define TRACE_CLASS_TIMER ((traceObjectClass)5) +#define TRACE_CLASS_EVENTGROUP ((traceObjectClass)6) +#define TRACE_CLASS_STREAMBUFFER ((traceObjectClass)7) +#define TRACE_CLASS_MESSAGEBUFFER ((traceObjectClass)8) + +/*** Definitions for Object Table ********************************************/ +#define TRACE_KERNEL_OBJECT_COUNT ((TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) + (TRC_CFG_NTIMER) + (TRC_CFG_NEVENTGROUP) + (TRC_CFG_NSTREAMBUFFER) + (TRC_CFG_NMESSAGEBUFFER)) + +/* Queue properties (except name): current number of message in queue */ +#define PropertyTableSizeQueue ((TRC_CFG_NAME_LEN_QUEUE) + 1) + +/* Semaphore properties (except name): state (signaled = 1, cleared = 0) */ +#define PropertyTableSizeSemaphore ((TRC_CFG_NAME_LEN_SEMAPHORE) + 1) + +/* Mutex properties (except name): owner (task handle, 0 = free) */ +#define PropertyTableSizeMutex ((TRC_CFG_NAME_LEN_MUTEX) + 1) + +/* Task properties (except name): Byte 0: Current priority + Byte 1: state (if already active) + Byte 2: legacy, not used + Byte 3: legacy, not used */ +#define PropertyTableSizeTask ((TRC_CFG_NAME_LEN_TASK) + 4) + +/* ISR properties: Byte 0: priority + Byte 1: state (if already active) */ +#define PropertyTableSizeISR ((TRC_CFG_NAME_LEN_ISR) + 2) + +/* TRC_CFG_NTIMER properties: Byte 0: state (unused for now) */ +#define PropertyTableSizeTimer ((TRC_CFG_NAME_LEN_TIMER) + 1) + +/* TRC_CFG_NEVENTGROUP properties: Byte 0-3: state (unused for now)*/ +#define PropertyTableSizeEventGroup ((TRC_CFG_NAME_LEN_EVENTGROUP) + 4) + +/* TRC_CFG_NSTREAMBUFFER properties: Byte 0-3: state (unused for now)*/ +#define PropertyTableSizeStreamBuffer ((TRC_CFG_NAME_LEN_STREAMBUFFER) + 4) + +/* TRC_CFG_NMESSAGEBUFFER properties: Byte 0-3: state (unused for now)*/ +#define PropertyTableSizeMessageBuffer ((TRC_CFG_NAME_LEN_MESSAGEBUFFER) + 4) + + +/* The layout of the byte array representing the Object Property Table */ +#define StartIndexQueue (0) +#define StartIndexSemaphore (StartIndexQueue + (TRC_CFG_NQUEUE) * PropertyTableSizeQueue) +#define StartIndexMutex (StartIndexSemaphore + (TRC_CFG_NSEMAPHORE) * PropertyTableSizeSemaphore) +#define StartIndexTask (StartIndexMutex + (TRC_CFG_NMUTEX) * PropertyTableSizeMutex) +#define StartIndexISR (StartIndexTask + (TRC_CFG_NTASK) * PropertyTableSizeTask) +#define StartIndexTimer (StartIndexISR + (TRC_CFG_NISR) * PropertyTableSizeISR) +#define StartIndexEventGroup (StartIndexTimer + (TRC_CFG_NTIMER) * PropertyTableSizeTimer) +#define StartIndexStreamBuffer (StartIndexEventGroup + (TRC_CFG_NEVENTGROUP) * PropertyTableSizeEventGroup) +#define StartIndexMessageBuffer (StartIndexStreamBuffer + (TRC_CFG_NSTREAMBUFFER) * PropertyTableSizeStreamBuffer) + +/* Number of bytes used by the object table */ +#define TRACE_OBJECT_TABLE_SIZE (StartIndexMessageBuffer + (TRC_CFG_NMESSAGEBUFFER) * PropertyTableSizeMessageBuffer) + +/* Flag to tell the context of tracePEND_FUNC_CALL_FROM_ISR */ +extern int uiInEventGroupSetBitsFromISR; + +/* Initialization of the object property table */ +void vTraceInitObjectPropertyTable(void); + +/* Initialization of the handle mechanism, see e.g, prvTraceGetObjectHandle */ +void vTraceInitObjectHandleStack(void); + +/* Returns the "Not enough handles" error message for the specified object class */ +const char* pszTraceGetErrorNotEnoughHandles(traceObjectClass objectclass); + +void* prvTraceGetCurrentTaskHandle(void); + +/****************************************************************************** + * TraceQueueClassTable + * Translates a FreeRTOS QueueType into trace objects classes (TRACE_CLASS_). + * Has one entry for each QueueType, gives TRACE_CLASS ID. + ******************************************************************************/ +extern traceObjectClass TraceQueueClassTable[5]; + + +/*** Event codes for snapshot mode - must match Tracealyzer config files ******/ + +#define NULL_EVENT (0x00UL) + +/******************************************************************************* + * EVENTGROUP_DIV + * + * Miscellaneous events. + ******************************************************************************/ +#define EVENTGROUP_DIV (NULL_EVENT + 1UL) /*0x01*/ +#define DIV_XPS (EVENTGROUP_DIV + 0UL) /*0x01*/ +#define DIV_TASK_READY (EVENTGROUP_DIV + 1UL) /*0x02*/ +#define DIV_NEW_TIME (EVENTGROUP_DIV + 2UL) /*0x03*/ + +/******************************************************************************* + * EVENTGROUP_TS + * + * Events for storing task-switches and interrupts. The RESUME events are + * generated if the task/interrupt is already marked active. + ******************************************************************************/ +#define EVENTGROUP_TS (EVENTGROUP_DIV + 3UL) /*0x04*/ +#define TS_ISR_BEGIN (EVENTGROUP_TS + 0UL) /*0x04*/ +#define TS_ISR_RESUME (EVENTGROUP_TS + 1UL) /*0x05*/ +#define TS_TASK_BEGIN (EVENTGROUP_TS + 2UL) /*0x06*/ +#define TS_TASK_RESUME (EVENTGROUP_TS + 3UL) /*0x07*/ + +/******************************************************************************* + * EVENTGROUP_OBJCLOSE_NAME + * + * About Close Events + * When an object is evicted from the object property table (object close), two + * internal events are stored (EVENTGROUP_OBJCLOSE_NAME and + * EVENTGROUP_OBJCLOSE_PROP), containing the handle-name mapping and object + * properties valid up to this point. + ******************************************************************************/ +#define EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS (EVENTGROUP_TS + 4UL) /*0x08*/ + +/******************************************************************************* + * EVENTGROUP_OBJCLOSE_PROP + * + * The internal event carrying properties of deleted objects + * The handle and object class of the closed object is not stored in this event, + * but is assumed to be the same as in the preceding CLOSE event. Thus, these + * two events must be generated from within a critical section. + * When queues are closed, arg1 is the "state" property (i.e., number of + * buffered messages/signals). + * When actors are closed, arg1 is priority, arg2 is handle of the "instance + * finish" event, and arg3 is event code of the "instance finish" event. + * In this case, the lower three bits is the object class of the instance finish + * handle. The lower three bits are not used (always zero) when queues are + * closed since the queue type is given in the previous OBJCLOSE_NAME event. + ******************************************************************************/ +#define EVENTGROUP_OBJCLOSE_PROP_TRCSUCCESS (EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS + 8UL) /*0x10*/ + +/******************************************************************************* + * EVENTGROUP_CREATE + * + * The events in this group are used to log Kernel object creations. + * The lower three bits in the event code gives the object class, i.e., type of + * create operation (task, queue, semaphore, etc). + ******************************************************************************/ +#define EVENTGROUP_CREATE_OBJ_TRCSUCCESS (EVENTGROUP_OBJCLOSE_PROP_TRCSUCCESS + 8UL) /*0x18*/ + +/******************************************************************************* + * EVENTGROUP_SEND + * + * The events in this group are used to log Send/Give events on queues, + * semaphores and mutexes The lower three bits in the event code gives the + * object class, i.e., what type of object that is operated on (queue, semaphore + * or mutex). + ******************************************************************************/ +#define EVENTGROUP_SEND_TRCSUCCESS (EVENTGROUP_CREATE_OBJ_TRCSUCCESS + 8UL) /*0x20*/ + +/******************************************************************************* + * EVENTGROUP_RECEIVE + * + * The events in this group are used to log Receive/Take events on queues, + * semaphores and mutexes. The lower three bits in the event code gives the + * object class, i.e., what type of object that is operated on (queue, semaphore + * or mutex). + ******************************************************************************/ +#define EVENTGROUP_RECEIVE_TRCSUCCESS (EVENTGROUP_SEND_TRCSUCCESS + 8UL) /*0x28*/ + +/* Send/Give operations, from ISR */ +#define EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS \ + (EVENTGROUP_RECEIVE_TRCSUCCESS + 8UL) /*0x30*/ + +/* Receive/Take operations, from ISR */ +#define EVENTGROUP_RECEIVE_FROM_ISR_TRCSUCCESS \ + (EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS + 8UL) /*0x38*/ + +/* "Failed" event type versions of above (timeout, failed allocation, etc) */ +#define EVENTGROUP_KSE_TRCFAILED \ + (EVENTGROUP_RECEIVE_FROM_ISR_TRCSUCCESS + 8UL) /*0x40*/ + +/* Failed create calls - memory allocation failed */ +#define EVENTGROUP_CREATE_OBJ_TRCFAILED (EVENTGROUP_KSE_TRCFAILED) /*0x40*/ + +/* Failed send/give - timeout! */ +#define EVENTGROUP_SEND_TRCFAILED (EVENTGROUP_CREATE_OBJ_TRCFAILED + 8UL) /*0x48*/ + +/* Failed receive/take - timeout! */ +#define EVENTGROUP_RECEIVE_TRCFAILED (EVENTGROUP_SEND_TRCFAILED + 8UL) /*0x50*/ + +/* Failed non-blocking send/give - queue full */ +#define EVENTGROUP_SEND_FROM_ISR_TRCFAILED (EVENTGROUP_RECEIVE_TRCFAILED + 8UL) /*0x58*/ + +/* Failed non-blocking receive/take - queue empty */ +#define EVENTGROUP_RECEIVE_FROM_ISR_TRCFAILED \ + (EVENTGROUP_SEND_FROM_ISR_TRCFAILED + 8UL) /*0x60*/ + +/* Events when blocking on receive/take */ +#define EVENTGROUP_RECEIVE_TRCBLOCK \ + (EVENTGROUP_RECEIVE_FROM_ISR_TRCFAILED + 8UL) /*0x68*/ + +/* Events when blocking on send/give */ +#define EVENTGROUP_SEND_TRCBLOCK (EVENTGROUP_RECEIVE_TRCBLOCK + 8UL) /*0x70*/ + +/* Events on queue peek (receive) */ +#define EVENTGROUP_PEEK_TRCSUCCESS (EVENTGROUP_SEND_TRCBLOCK + 8UL) /*0x78*/ + +/* Events on object delete (vTaskDelete or vQueueDelete) */ +#define EVENTGROUP_DELETE_OBJ_TRCSUCCESS (EVENTGROUP_PEEK_TRCSUCCESS + 8UL) /*0x80*/ + +/* Other events - object class is implied: TASK */ +#define EVENTGROUP_OTHERS (EVENTGROUP_DELETE_OBJ_TRCSUCCESS + 8UL) /*0x88*/ +#define TASK_DELAY_UNTIL (EVENTGROUP_OTHERS + 0UL) /*0x88*/ +#define TASK_DELAY (EVENTGROUP_OTHERS + 1UL) /*0x89*/ +#define TASK_SUSPEND (EVENTGROUP_OTHERS + 2UL) /*0x8A*/ +#define TASK_RESUME (EVENTGROUP_OTHERS + 3UL) /*0x8B*/ +#define TASK_RESUME_FROM_ISR (EVENTGROUP_OTHERS + 4UL) /*0x8C*/ +#define TASK_PRIORITY_SET (EVENTGROUP_OTHERS + 5UL) /*0x8D*/ +#define TASK_PRIORITY_INHERIT (EVENTGROUP_OTHERS + 6UL) /*0x8E*/ +#define TASK_PRIORITY_DISINHERIT (EVENTGROUP_OTHERS + 7UL) /*0x8F*/ + +#define EVENTGROUP_MISC_PLACEHOLDER (EVENTGROUP_OTHERS + 8UL) /*0x90*/ +#define PEND_FUNC_CALL (EVENTGROUP_MISC_PLACEHOLDER+0UL) /*0x90*/ +#define PEND_FUNC_CALL_FROM_ISR (EVENTGROUP_MISC_PLACEHOLDER+1UL) /*0x91*/ +#define PEND_FUNC_CALL_TRCFAILED (EVENTGROUP_MISC_PLACEHOLDER+2UL) /*0x92*/ +#define PEND_FUNC_CALL_FROM_ISR_TRCFAILED (EVENTGROUP_MISC_PLACEHOLDER+3UL) /*0x93*/ +#define MEM_MALLOC_SIZE (EVENTGROUP_MISC_PLACEHOLDER+4UL) /*0x94*/ +#define MEM_MALLOC_ADDR (EVENTGROUP_MISC_PLACEHOLDER+5UL) /*0x95*/ +#define MEM_FREE_SIZE (EVENTGROUP_MISC_PLACEHOLDER+6UL) /*0x96*/ +#define MEM_FREE_ADDR (EVENTGROUP_MISC_PLACEHOLDER+7UL) /*0x97*/ + +/* User events */ +#define EVENTGROUP_USEREVENT (EVENTGROUP_MISC_PLACEHOLDER + 8UL) /*0x98*/ +#define USER_EVENT (EVENTGROUP_USEREVENT + 0UL) + +/* Allow for 0-15 arguments (the number of args is added to event code) */ +#define USER_EVENT_LAST (EVENTGROUP_USEREVENT + 15UL) /*0xA7*/ + +/******************************************************************************* + * XTS Event - eXtended TimeStamp events + * The timestamps used in the recorder are "differential timestamps" (DTS), i.e. + * the time since the last stored event. The DTS fields are either 1 or 2 bytes + * in the other events, depending on the bytes available in the event struct. + * If the time since the last event (the DTS) is larger than allowed for by + * the DTS field of the current event, an XTS event is inserted immediately + * before the original event. The XTS event contains up to 3 additional bytes + * of the DTS value - the higher bytes of the true DTS value. The lower 1-2 + * bytes are stored in the normal DTS field. + * There are two types of XTS events, XTS8 and XTS16. An XTS8 event is stored + * when there is only room for 1 byte (8 bit) DTS data in the original event, + * which means a limit of 0xFF (255UL). The XTS16 is used when the original event + * has a 16 bit DTS field and thereby can handle values up to 0xFFFF (65535UL). + * + * Using a very high frequency time base can result in many XTS events. + * Preferably, the time between two OS ticks should fit in 16 bits, i.e., + * at most 65535. If your time base has a higher frequency, you can define + * the TRACE + ******************************************************************************/ + +#define EVENTGROUP_SYS (EVENTGROUP_USEREVENT + 16UL) /*0xA8*/ +#define XTS8 (EVENTGROUP_SYS + 0UL) /*0xA8*/ +#define XTS16 (EVENTGROUP_SYS + 1UL) /*0xA9*/ +#define EVENT_BEING_WRITTEN (EVENTGROUP_SYS + 2UL) /*0xAA*/ +#define RESERVED_DUMMY_CODE (EVENTGROUP_SYS + 3UL) /*0xAB*/ +#define LOW_POWER_BEGIN (EVENTGROUP_SYS + 4UL) /*0xAC*/ +#define LOW_POWER_END (EVENTGROUP_SYS + 5UL) /*0xAD*/ +#define XID (EVENTGROUP_SYS + 6UL) /*0xAE*/ +#define XTS16L (EVENTGROUP_SYS + 7UL) /*0xAF*/ + +#define EVENTGROUP_TIMER (EVENTGROUP_SYS + 8UL) /*0xB0*/ +#define TIMER_CREATE (EVENTGROUP_TIMER + 0UL) /*0xB0*/ +#define TIMER_START (EVENTGROUP_TIMER + 1UL) /*0xB1*/ +#define TIMER_RST (EVENTGROUP_TIMER + 2UL) /*0xB2*/ +#define TIMER_STOP (EVENTGROUP_TIMER + 3UL) /*0xB3*/ +#define TIMER_CHANGE_PERIOD (EVENTGROUP_TIMER + 4UL) /*0xB4*/ +#define TIMER_DELETE_OBJ (EVENTGROUP_TIMER + 5UL) /*0xB5*/ +#define TIMER_START_FROM_ISR (EVENTGROUP_TIMER + 6UL) /*0xB6*/ +#define TIMER_RESET_FROM_ISR (EVENTGROUP_TIMER + 7UL) /*0xB7*/ +#define TIMER_STOP_FROM_ISR (EVENTGROUP_TIMER + 8UL) /*0xB8*/ + +#define TIMER_CREATE_TRCFAILED (EVENTGROUP_TIMER + 9UL) /*0xB9*/ +#define TIMER_START_TRCFAILED (EVENTGROUP_TIMER + 10UL) /*0xBA*/ +#define TIMER_RESET_TRCFAILED (EVENTGROUP_TIMER + 11UL) /*0xBB*/ +#define TIMER_STOP_TRCFAILED (EVENTGROUP_TIMER + 12UL) /*0xBC*/ +#define TIMER_CHANGE_PERIOD_TRCFAILED (EVENTGROUP_TIMER + 13UL) /*0xBD*/ +#define TIMER_DELETE_TRCFAILED (EVENTGROUP_TIMER + 14UL) /*0xBE*/ +#define TIMER_START_FROM_ISR_TRCFAILED (EVENTGROUP_TIMER + 15UL) /*0xBF*/ +#define TIMER_RESET_FROM_ISR_TRCFAILED (EVENTGROUP_TIMER + 16UL) /*0xC0*/ +#define TIMER_STOP_FROM_ISR_TRCFAILED (EVENTGROUP_TIMER + 17UL) /*0xC1*/ + +#define EVENTGROUP_EG (EVENTGROUP_TIMER + 18UL) /*0xC2*/ +#define EVENT_GROUP_CREATE (EVENTGROUP_EG + 0UL) /*0xC2*/ +#define EVENT_GROUP_CREATE_TRCFAILED (EVENTGROUP_EG + 1UL) /*0xC3*/ +#define EVENT_GROUP_SYNC_TRCBLOCK (EVENTGROUP_EG + 2UL) /*0xC4*/ +#define EVENT_GROUP_SYNC_END (EVENTGROUP_EG + 3UL) /*0xC5*/ +#define EVENT_GROUP_WAIT_BITS_TRCBLOCK (EVENTGROUP_EG + 4UL) /*0xC6*/ +#define EVENT_GROUP_WAIT_BITS_END (EVENTGROUP_EG + 5UL) /*0xC7*/ +#define EVENT_GROUP_CLEAR_BITS (EVENTGROUP_EG + 6UL) /*0xC8*/ +#define EVENT_GROUP_CLEAR_BITS_FROM_ISR (EVENTGROUP_EG + 7UL) /*0xC9*/ +#define EVENT_GROUP_SET_BITS (EVENTGROUP_EG + 8UL) /*0xCA*/ +#define EVENT_GROUP_DELETE_OBJ (EVENTGROUP_EG + 9UL) /*0xCB*/ +#define EVENT_GROUP_SYNC_END_TRCFAILED (EVENTGROUP_EG + 10UL) /*0xCC*/ +#define EVENT_GROUP_WAIT_BITS_END_TRCFAILED (EVENTGROUP_EG + 11UL) /*0xCD*/ +#define EVENT_GROUP_SET_BITS_FROM_ISR (EVENTGROUP_EG + 12UL) /*0xCE*/ +#define EVENT_GROUP_SET_BITS_FROM_ISR_TRCFAILED (EVENTGROUP_EG + 13UL) /*0xCF*/ + +#define TASK_INSTANCE_FINISHED_NEXT_KSE (EVENTGROUP_EG + 14UL) /*0xD0*/ +#define TASK_INSTANCE_FINISHED_DIRECT (EVENTGROUP_EG + 15UL) /*0xD1*/ + +#define TRACE_TASK_NOTIFY_GROUP (EVENTGROUP_EG + 16UL) /*0xD2*/ +#define TRACE_TASK_NOTIFY (TRACE_TASK_NOTIFY_GROUP + 0UL) /*0xD2*/ +#define TRACE_TASK_NOTIFY_TAKE (TRACE_TASK_NOTIFY_GROUP + 1UL) /*0xD3*/ +#define TRACE_TASK_NOTIFY_TAKE_TRCBLOCK (TRACE_TASK_NOTIFY_GROUP + 2UL) /*0xD4*/ +#define TRACE_TASK_NOTIFY_TAKE_TRCFAILED (TRACE_TASK_NOTIFY_GROUP + 3UL) /*0xD5*/ +#define TRACE_TASK_NOTIFY_WAIT (TRACE_TASK_NOTIFY_GROUP + 4UL) /*0xD6*/ +#define TRACE_TASK_NOTIFY_WAIT_TRCBLOCK (TRACE_TASK_NOTIFY_GROUP + 5UL) /*0xD7*/ +#define TRACE_TASK_NOTIFY_WAIT_TRCFAILED (TRACE_TASK_NOTIFY_GROUP + 6UL) /*0xD8*/ +#define TRACE_TASK_NOTIFY_FROM_ISR (TRACE_TASK_NOTIFY_GROUP + 7UL) /*0xD9*/ +#define TRACE_TASK_NOTIFY_GIVE_FROM_ISR (TRACE_TASK_NOTIFY_GROUP + 8UL) /*0xDA*/ + +#define TIMER_EXPIRED (TRACE_TASK_NOTIFY_GROUP + 9UL) /*0xDB*/ + + /* Events on queue peek (receive) */ +#define EVENTGROUP_PEEK_TRCBLOCK (TRACE_TASK_NOTIFY_GROUP + 10UL) /*0xDC*/ +/* peek block on queue: 0xDC */ +/* peek block on semaphore: 0xDD */ +/* peek block on mutex: 0xDE */ + +/* Events on queue peek (receive) */ +#define EVENTGROUP_PEEK_TRCFAILED (EVENTGROUP_PEEK_TRCBLOCK + 3UL) /*0xDF*/ +/* peek failed on queue: 0xDF */ +/* peek failed on semaphore: 0xE0 */ +/* peek failed on mutex: 0xE1 */ + +#define EVENTGROUP_STREAMBUFFER_DIV (EVENTGROUP_PEEK_TRCFAILED + 3UL) /*0xE2*/ +#define TRACE_STREAMBUFFER_RESET (EVENTGROUP_STREAMBUFFER_DIV + 0) /*0xE2*/ +#define TRACE_MESSAGEBUFFER_RESET (EVENTGROUP_STREAMBUFFER_DIV + 1UL) /*0xE3*/ +#define TRACE_STREAMBUFFER_OBJCLOSE_NAME_TRCSUCCESS (EVENTGROUP_STREAMBUFFER_DIV + 2UL) /*0xE4*/ +#define TRACE_MESSAGEBUFFER_OBJCLOSE_NAME_TRCSUCCESS (EVENTGROUP_STREAMBUFFER_DIV + 3UL) /*0xE5*/ +#define TRACE_STREAMBUFFER_OBJCLOSE_PROP_TRCSUCCESS (EVENTGROUP_STREAMBUFFER_DIV + 4UL) /*0xE6*/ +#define TRACE_MESSAGEBUFFER_OBJCLOSE_PROP_TRCSUCCESS (EVENTGROUP_STREAMBUFFER_DIV + 5UL) /*0xE7*/ + +#define EVENTGROUP_MALLOC_FAILED (EVENTGROUP_STREAMBUFFER_DIV + 6UL) /*0xE8*/ +#define MEM_MALLOC_SIZE_TRCFAILED (EVENTGROUP_MALLOC_FAILED + 0UL) /*0xE8*/ +#define MEM_MALLOC_ADDR_TRCFAILED (EVENTGROUP_MALLOC_FAILED + 1UL) /*0xE9*/ + +/* The following are using previously "lost" event codes */ +#define TRACE_STREAMBUFFER_CREATE_OBJ_TRCSUCCESS (EVENTGROUP_CREATE_OBJ_TRCSUCCESS + 4UL) /*0x1C*/ +#define TRACE_STREAMBUFFER_CREATE_OBJ_TRCFAILED (EVENTGROUP_CREATE_OBJ_TRCFAILED + 4UL) /*0x44*/ +#define TRACE_STREAMBUFFER_DELETE_OBJ_TRCSUCCESS (EVENTGROUP_DELETE_OBJ_TRCSUCCESS + 4UL) /*0x84*/ +#define TRACE_STREAMBUFFER_SEND_TRCSUCCESS (EVENTGROUP_SEND_TRCSUCCESS + 3UL) /*0x23*/ +#define TRACE_STREAMBUFFER_SEND_TRCBLOCK (EVENTGROUP_SEND_TRCBLOCK + 3UL) /*0x73*/ +#define TRACE_STREAMBUFFER_SEND_TRCFAILED (EVENTGROUP_SEND_TRCFAILED + 3UL) /*0x4B*/ +#define TRACE_STREAMBUFFER_RECEIVE_TRCSUCCESS (EVENTGROUP_RECEIVE_TRCSUCCESS + 3UL) /*0x2B*/ +#define TRACE_STREAMBUFFER_RECEIVE_TRCBLOCK (EVENTGROUP_RECEIVE_TRCBLOCK + 3UL) /*0x6B*/ +#define TRACE_STREAMBUFFER_RECEIVE_TRCFAILED (EVENTGROUP_RECEIVE_TRCFAILED + 3UL) /*0x53*/ +#define TRACE_STREAMBUFFER_SEND_FROM_ISR_TRCSUCCESS (EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS + 3UL) /*0x33*/ +#define TRACE_STREAMBUFFER_SEND_FROM_ISR_TRCFAILED (EVENTGROUP_SEND_FROM_ISR_TRCFAILED + 3UL) /*0x5B*/ +#define TRACE_STREAMBUFFER_RECEIVE_FROM_ISR_TRCSUCCESS (EVENTGROUP_RECEIVE_FROM_ISR_TRCSUCCESS + 3UL) /*0x3B*/ +#define TRACE_STREAMBUFFER_RECEIVE_FROM_ISR_TRCFAILED (EVENTGROUP_RECEIVE_FROM_ISR_TRCFAILED + 3UL) /*0x63*/ + +/* The following are using previously "lost" event codes. These macros aren't even directly referenced, instead we do (equivalent STREAMBUFFER code) + 1. */ +#define TRACE_MESSAGEBUFFER_CREATE_OBJ_TRCSUCCESS (EVENTGROUP_CREATE_OBJ_TRCSUCCESS + 5UL) /*0x1D*/ +#define TRACE_MESSAGEBUFFER_CREATE_OBJ_TRCFAILED (EVENTGROUP_CREATE_OBJ_TRCFAILED + 5UL) /*0x45*/ +#define TRACE_MESSAGEBUFFER_DELETE_OBJ_TRCSUCCESS (EVENTGROUP_DELETE_OBJ_TRCSUCCESS + 5UL) /*0x85*/ +#define TRACE_MESSAGEBUFFER_SEND_TRCSUCCESS (EVENTGROUP_SEND_TRCSUCCESS + 4UL) /*0x24*/ +#define TRACE_MESSAGEBUFFER_SEND_TRCBLOCK (EVENTGROUP_SEND_TRCBLOCK + 4UL) /*0x74*/ +#define TRACE_MESSAGEBUFFER_SEND_TRCFAILED (EVENTGROUP_SEND_TRCFAILED + 4UL) /*0x4C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_TRCSUCCESS (EVENTGROUP_RECEIVE_TRCSUCCESS + 4UL) /*0x2C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_TRCBLOCK (EVENTGROUP_RECEIVE_TRCBLOCK + 4UL) /*0x6C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_TRCFAILED (EVENTGROUP_RECEIVE_TRCFAILED + 4UL) /*0x54*/ +#define TRACE_MESSAGEBUFFER_SEND_FROM_ISR_TRCSUCCESS (EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS + 4UL) /*0x34*/ +#define TRACE_MESSAGEBUFFER_SEND_FROM_ISR_TRCFAILED (EVENTGROUP_SEND_FROM_ISR_TRCFAILED + 4UL) /*0x5C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_FROM_ISR_TRCSUCCESS (EVENTGROUP_RECEIVE_FROM_ISR_TRCSUCCESS + 4UL) /*0x3C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_FROM_ISR_TRCFAILED (EVENTGROUP_RECEIVE_FROM_ISR_TRCFAILED + 4UL) /*0x64*/ + +#define TRACE_QUEUE_SEND_TO_FRONT_TRCSUCCESS (EVENTGROUP_SEND_TRCSUCCESS + 5UL) /*0x25*/ +#define TRACE_QUEUE_SEND_TO_FRONT_TRCBLOCK (EVENTGROUP_SEND_TRCBLOCK + 5UL) /*0x75*/ +#define TRACE_QUEUE_SEND_TO_FRONT_TRCFAILED (EVENTGROUP_SEND_TRCFAILED + 5UL) /*0x4D*/ +#define TRACE_QUEUE_SEND_TO_FRONT_FROM_ISR_TRCSUCCESS (EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS + 5UL) /*0x35*/ +#define TRACE_QUEUE_SEND_TO_FRONT_FROM_ISR_TRCFAILED (EVENTGROUP_SEND_FROM_ISR_TRCFAILED + 5UL) /*0x5D*/ + +#define TRACE_UNUSED_STACK (EVENTGROUP_MALLOC_FAILED + 2UL) /*0xEA*/ + +/* LAST EVENT (0xEA) */ + +/**************************** +* MACROS TO GET TRACE CLASS * +****************************/ +#define TRACE_GET_TRACE_CLASS_FROM_TASK_CLASS(kernelClass) (TRACE_CLASS_TASK) +#define TRACE_GET_TRACE_CLASS_FROM_TASK_OBJECT(pxObject) (TRACE_CLASS_TASK) + +#define TRACE_GET_TRACE_CLASS_FROM_QUEUE_CLASS(kernelClass) TraceQueueClassTable[kernelClass] +#define TRACE_GET_TRACE_CLASS_FROM_QUEUE_OBJECT(pxObject) TRACE_GET_TRACE_CLASS_FROM_QUEUE_CLASS(prvTraceGetQueueType(pxObject)) + +#define TRACE_GET_TRACE_CLASS_FROM_TIMER_CLASS(kernelClass) (TRACE_CLASS_TIMER) +#define TRACE_GET_TRACE_CLASS_FROM_TIMER_OBJECT(pxObject) (TRACE_CLASS_TIMER) + +#define TRACE_GET_TRACE_CLASS_FROM_EVENTGROUP_CLASS(kernelClass) (TRACE_CLASS_EVENTGROUP) +#define TRACE_GET_TRACE_CLASS_FROM_EVENTGROUP_OBJECT(pxObject) (TRACE_CLASS_EVENTGROUP) + +/* TRACE_GET_TRACE_CLASS_FROM_STREAMBUFFER_CLASS can only be accessed with a parameter indicating if it is a MessageBuffer */ +#define TRACE_GET_TRACE_CLASS_FROM_STREAMBUFFER_CLASS(xIsMessageBuffer) (xIsMessageBuffer == 1 ? TRACE_CLASS_MESSAGEBUFFER : TRACE_CLASS_STREAMBUFFER) +#define TRACE_GET_TRACE_CLASS_FROM_STREAMBUFFER_OBJECT(pxObject) (prvGetStreamBufferType(pxObject) == 1 ? TRACE_CLASS_MESSAGEBUFFER : TRACE_CLASS_STREAMBUFFER) + +/* Generic versions */ +#define TRACE_GET_CLASS_TRACE_CLASS(CLASS, kernelClass) TRACE_GET_TRACE_CLASS_FROM_##CLASS##_CLASS(kernelClass) +#define TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject) TRACE_GET_TRACE_CLASS_FROM_##CLASS##_OBJECT(pxObject) + +/****************************** +* MACROS TO GET OBJECT NUMBER * +******************************/ +#define TRACE_GET_TASK_NUMBER(pxTCB) (traceHandle)(prvTraceGetTaskNumberLow16(pxTCB)) +#define TRACE_SET_TASK_NUMBER(pxTCB) prvTraceSetTaskNumberLow16(pxTCB, prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(TASK, pxTCB))); + +#define TRACE_GET_QUEUE_NUMBER(queue) ( ( traceHandle ) prvTraceGetQueueNumberLow16(queue) ) +#define TRACE_SET_QUEUE_NUMBER(queue) prvTraceSetQueueNumberLow16(queue, (uint16_t)prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, queue))); + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +#define TRACE_GET_TIMER_NUMBER(tmr) ( ( traceHandle ) prvTraceGetTimerNumberLow16(tmr) ) +#define TRACE_SET_TIMER_NUMBER(tmr) prvTraceSetTimerNumberLow16(tmr, (uint16_t)prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(TIMER, tmr))); +#else /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ +#define TRACE_GET_TIMER_NUMBER(tmr) ( ( traceHandle ) ((Timer_t*)tmr)->uxTimerNumber ) +#define TRACE_SET_TIMER_NUMBER(tmr) ((Timer_t*)tmr)->uxTimerNumber = prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(TIMER, tmr)); +#endif /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +#define TRACE_GET_EVENTGROUP_NUMBER(eg) ( ( traceHandle ) prvTraceGetEventGroupNumberLow16(eg) ) +#define TRACE_SET_EVENTGROUP_NUMBER(eg) prvTraceSetEventGroupNumberLow16(eg, (uint16_t)prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(EVENTGROUP, eg))); +#else /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ +#define TRACE_GET_EVENTGROUP_NUMBER(eg) ( ( traceHandle ) uxEventGroupGetNumber(eg) ) +#define TRACE_SET_EVENTGROUP_NUMBER(eg) ((EventGroup_t*)eg)->uxEventGroupNumber = prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(EVENTGROUP, eg)); +#endif /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + + +#define TRACE_GET_STREAMBUFFER_NUMBER(sb) ( ( traceHandle ) prvTraceGetStreamBufferNumberLow16(sb) ) +#define TRACE_SET_STREAMBUFFER_NUMBER(sb) prvTraceSetStreamBufferNumberLow16(sb, (uint16_t)prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(STREAMBUFFER, sb))); + +/* Generic versions */ +#define TRACE_GET_OBJECT_NUMBER(CLASS, pxObject) TRACE_GET_##CLASS##_NUMBER(pxObject) +#define TRACE_SET_OBJECT_NUMBER(CLASS, pxObject) TRACE_SET_##CLASS##_NUMBER(pxObject) + +/****************************** +* MACROS TO GET EVENT CODES * +******************************/ +#define TRACE_GET_TASK_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) (uint8_t)(EVENTGROUP_##SERVICE##_##RESULT + TRACE_GET_CLASS_TRACE_CLASS(TASK, kernelClass)) +#define TRACE_GET_QUEUE_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) (uint8_t)(EVENTGROUP_##SERVICE##_##RESULT + TRACE_GET_CLASS_TRACE_CLASS(QUEUE, kernelClass)) +#define TRACE_GET_TIMER_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) -- THIS IS NOT USED -- +#define TRACE_GET_EVENTGROUP_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) -- THIS IS NOT USED -- +#define TRACE_GET_STREAMBUFFER_CLASS_EVENT_CODE(SERVICE, RESULT, isMessageBuffer) (uint8_t)(TRACE_STREAMBUFFER_##SERVICE##_##RESULT + (uint8_t)isMessageBuffer) + +#define TRACE_GET_TASK_OBJECT_EVENT_CODE(SERVICE, RESULT, pxTCB) (uint8_t)(EVENTGROUP_##SERVICE##_##RESULT + TRACE_CLASS_TASK) +#define TRACE_GET_QUEUE_OBJECT_EVENT_CODE(SERVICE, RESULT, pxObject) (uint8_t)(EVENTGROUP_##SERVICE##_##RESULT + TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxObject)) +#define TRACE_GET_TIMER_OBJECT_EVENT_CODE(SERVICE, RESULT, UNUSED) -- THIS IS NOT USED -- +#define TRACE_GET_EVENTGROUP_OBJECT_EVENT_CODE(SERVICE, RESULT, UNUSED) -- THIS IS NOT USED -- +#define TRACE_GET_STREAMBUFFER_OBJECT_EVENT_CODE(SERVICE, RESULT, pxObject) (uint8_t)(TRACE_STREAMBUFFER_##SERVICE##_##RESULT + prvGetStreamBufferType(pxObject)) + +/* Generic versions */ +#define TRACE_GET_CLASS_EVENT_CODE(SERVICE, RESULT, CLASS, kernelClass) TRACE_GET_##CLASS##_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) +#define TRACE_GET_OBJECT_EVENT_CODE(SERVICE, RESULT, CLASS, pxObject) TRACE_GET_##CLASS##_OBJECT_EVENT_CODE(SERVICE, RESULT, pxObject) + +/****************************** +* SPECIAL MACROS FOR TASKS * +******************************/ +#define TRACE_GET_TASK_PRIORITY(pxTCB) ((uint8_t)pxTCB->uxPriority) +#define TRACE_GET_TASK_NAME(pxTCB) ((char*)pxTCB->pcTaskName) + +/*** The trace macros for snapshot mode **************************************/ + +/* A macro that will update the tick count when returning from tickless idle */ +#undef traceINCREASE_TICK_COUNT +#define traceINCREASE_TICK_COUNT( xCount ) + +/* Called for each task that becomes ready */ +#undef traceMOVED_TASK_TO_READY_STATE +#define traceMOVED_TASK_TO_READY_STATE( pxTCB ) \ + trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE(pxTCB); + +/* Called on each OS tick. Will call uiPortGetTimestamp to make sure it is called at least once every OS tick. */ +#undef traceTASK_INCREMENT_TICK + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_3_0) + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || xPendedTicks == 0) { trcKERNEL_HOOKS_INCREMENT_TICK(); } \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE) { trcKERNEL_HOOKS_NEW_TIME(DIV_NEW_TIME, xTickCount + 1); } + +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_5_X) + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || uxPendedTicks == 0) { trcKERNEL_HOOKS_INCREMENT_TICK(); } \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE) { trcKERNEL_HOOKS_NEW_TIME(DIV_NEW_TIME, xTickCount + 1); } + +#else + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || uxMissedTicks == 0) { trcKERNEL_HOOKS_INCREMENT_TICK(); } \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE) { trcKERNEL_HOOKS_NEW_TIME(DIV_NEW_TIME, xTickCount + 1); } + +#endif + +extern volatile uint32_t uiTraceSystemState; + +/* Called on each task-switch */ +#undef traceTASK_SWITCHED_IN +#define traceTASK_SWITCHED_IN() \ + uiTraceSystemState = TRC_STATE_IN_TASKSWITCH; \ + trcKERNEL_HOOKS_TASK_SWITCH(TRACE_GET_CURRENT_TASK()); \ + uiTraceSystemState = TRC_STATE_IN_APPLICATION; + +/* Called on vTaskCreate */ +#undef traceTASK_CREATE +#define traceTASK_CREATE(pxNewTCB) \ + if (pxNewTCB != NULL) \ + { \ + trcKERNEL_HOOKS_TASK_CREATE(TRACE_GET_OBJECT_EVENT_CODE(CREATE_OBJ, TRCSUCCESS, TASK, pxNewTCB), TASK, pxNewTCB); \ + prvAddTaskToStackMonitor(pxNewTCB); \ + } + +/* Called in vTaskCreate, if it fails (typically if the stack can not be allocated) */ +#undef traceTASK_CREATE_FAILED +#define traceTASK_CREATE_FAILED() \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY(TRACE_GET_CLASS_EVENT_CODE(CREATE_OBJ, TRCFAILED, TASK, NOT_USED), 0); + +/* Called on vTaskDelete */ +#undef traceTASK_DELETE +#define traceTASK_DELETE( pxTaskToDelete ) \ + { TRACE_ALLOC_CRITICAL_SECTION(); \ + TRACE_ENTER_CRITICAL_SECTION(); \ + trcKERNEL_HOOKS_TASK_DELETE(TRACE_GET_OBJECT_EVENT_CODE(DELETE_OBJ, TRCSUCCESS, TASK, pxTaskToDelete), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_NAME, TRCSUCCESS, TASK, pxTaskToDelete), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_PROP, TRCSUCCESS, TASK, pxTaskToDelete), pxTaskToDelete); \ + prvRemoveTaskFromStackMonitor(pxTaskToDelete); \ + TRACE_EXIT_CRITICAL_SECTION(); } + +#if (TRC_CFG_SCHEDULING_ONLY == 0) + +#if defined(configUSE_TICKLESS_IDLE) +#if (configUSE_TICKLESS_IDLE != 0) + +#undef traceLOW_POWER_IDLE_BEGIN +#define traceLOW_POWER_IDLE_BEGIN() \ + { \ + extern uint32_t trace_disable_timestamp; \ + prvTraceStoreLowPower(0); \ + trace_disable_timestamp = 1; \ + } + +#undef traceLOW_POWER_IDLE_END +#define traceLOW_POWER_IDLE_END() \ + { \ + extern uint32_t trace_disable_timestamp; \ + trace_disable_timestamp = 0; \ + prvTraceStoreLowPower(1); \ + } + +#endif /* (configUSE_TICKLESS_IDLE != 0) */ +#endif /* defined(configUSE_TICKLESS_IDLE) */ + +/* Called on vTaskSuspend */ +#undef traceTASK_SUSPEND +#define traceTASK_SUSPEND( pxTaskToSuspend ) \ + trcKERNEL_HOOKS_TASK_SUSPEND(TASK_SUSPEND, pxTaskToSuspend); + +/* Called from special case with timer only */ +#undef traceTASK_DELAY_SUSPEND +#define traceTASK_DELAY_SUSPEND( pxTaskToSuspend ) \ + trcKERNEL_HOOKS_TASK_SUSPEND(TASK_SUSPEND, pxTaskToSuspend); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +/* Called on vTaskDelay - note the use of FreeRTOS variable xTicksToDelay */ +#undef traceTASK_DELAY +#define traceTASK_DELAY() \ + trcKERNEL_HOOKS_TASK_DELAY(TASK_DELAY, pxCurrentTCB, xTicksToDelay); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +/* Called on vTaskDelayUntil - note the use of FreeRTOS variable xTimeToWake */ +#undef traceTASK_DELAY_UNTIL +#if TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 +#define traceTASK_DELAY_UNTIL(xTimeToWake) \ + trcKERNEL_HOOKS_TASK_DELAY(TASK_DELAY_UNTIL, pxCurrentTCB, xTimeToWake); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 */ +#define traceTASK_DELAY_UNTIL() \ + trcKERNEL_HOOKS_TASK_DELAY(TASK_DELAY_UNTIL, pxCurrentTCB, xTimeToWake); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 */ + +/* Called in xQueueCreate, and thereby for all other object based on queues, such as semaphores. */ +#undef traceQUEUE_CREATE +#define traceQUEUE_CREATE( pxNewQueue ) \ + trcKERNEL_HOOKS_OBJECT_CREATE(TRACE_GET_OBJECT_EVENT_CODE(CREATE_OBJ, TRCSUCCESS, QUEUE, pxNewQueue), QUEUE, pxNewQueue); + +/* Called in xQueueCreate, if the queue creation fails */ +#undef traceQUEUE_CREATE_FAILED +#define traceQUEUE_CREATE_FAILED( queueType ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY(TRACE_GET_CLASS_EVENT_CODE(CREATE_OBJ, TRCFAILED, QUEUE, queueType), 0); + +/* Called on vQueueDelete */ +#undef traceQUEUE_DELETE +#define traceQUEUE_DELETE( pxQueue ) \ + { TRACE_ALLOC_CRITICAL_SECTION(); \ + TRACE_ENTER_CRITICAL_SECTION(); \ + trcKERNEL_HOOKS_OBJECT_DELETE(TRACE_GET_OBJECT_EVENT_CODE(DELETE_OBJ, TRCSUCCESS, QUEUE, pxQueue), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_NAME, TRCSUCCESS, QUEUE, pxQueue), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_PROP, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + TRACE_EXIT_CRITICAL_SECTION(); } + +/* This macro is not necessary as of FreeRTOS v9.0.0 */ +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) +/* Called in xQueueCreateMutex, and thereby also from xSemaphoreCreateMutex and xSemaphoreCreateRecursiveMutex */ +#undef traceCREATE_MUTEX +#define traceCREATE_MUTEX( pxNewQueue ) \ + trcKERNEL_HOOKS_OBJECT_CREATE(TRACE_GET_OBJECT_EVENT_CODE(CREATE_OBJ, TRCSUCCESS, QUEUE, pxNewQueue), QUEUE, pxNewQueue); + +/* Called in xQueueCreateMutex when the operation fails (when memory allocation fails) */ +#undef traceCREATE_MUTEX_FAILED +#define traceCREATE_MUTEX_FAILED() \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY(TRACE_GET_CLASS_EVENT_CODE(CREATE_OBJ, TRCFAILED, QUEUE, queueQUEUE_TYPE_MUTEX), 0); +#endif /* (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) */ + +/* Called when the Mutex can not be given, since not holder */ +#undef traceGIVE_MUTEX_RECURSIVE_FAILED +#define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCFAILED, QUEUE, pxMutex), QUEUE, pxMutex); + +/* Called when a message is sent to a queue */ /* CS IS NEW ! */ +#undef traceQUEUE_SEND +#define traceQUEUE_SEND( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCSUCCESS, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_TRCSUCCESS, QUEUE, pxQueue); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxQueue) == TRACE_CLASS_MUTEX ? (uint8_t)0 : (uint8_t)(pxQueue->uxMessagesWaiting + 1)); + +/* Called when a message is sent to a queue set */ +#undef traceQUEUE_SET_SEND +#define traceQUEUE_SET_SEND( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, (uint8_t)(pxQueue->uxMessagesWaiting + 1)); + +/* Called when a message failed to be sent to a queue (timeout) */ +#undef traceQUEUE_SEND_FAILED +#define traceQUEUE_SEND_FAILED( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCFAILED, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_TRCFAILED, QUEUE, pxQueue); + +/* Called when the task is blocked due to a send operation on a full queue */ +#undef traceBLOCKING_ON_QUEUE_SEND +#define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCBLOCK, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_TRCBLOCK, QUEUE, pxQueue); + +/* Called when a message is received from a queue */ +#undef traceQUEUE_RECEIVE +#define traceQUEUE_RECEIVE( pxQueue ) \ + if (isQueueReceiveHookActuallyPeek) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxQueue) == TRACE_CLASS_MUTEX ? (uint8_t)TRACE_GET_TASK_NUMBER(TRACE_GET_CURRENT_TASK()) : (uint8_t)(pxQueue->uxMessagesWaiting - 1)); + +/* Called when a receive operation on a queue fails (timeout) */ +#undef traceQUEUE_RECEIVE_FAILED +#define traceQUEUE_RECEIVE_FAILED( pxQueue ) \ + if (isQueueReceiveHookActuallyPeek) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCFAILED, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCFAILED, QUEUE, pxQueue), QUEUE, pxQueue); \ + } + +/* Called when the task is blocked due to a receive operation on an empty queue */ +#undef traceBLOCKING_ON_QUEUE_RECEIVE +#define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) \ + if (isQueueReceiveHookActuallyPeek) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCBLOCK, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCBLOCK, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + if (TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxQueue) != TRACE_CLASS_MUTEX) \ + { \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); \ + } + +/* Called on xQueuePeek */ +#undef traceQUEUE_PEEK +#define traceQUEUE_PEEK( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); + +/* Called on xQueuePeek fail/timeout (added in FreeRTOS v9.0.2) */ +#undef traceQUEUE_PEEK_FAILED +#define traceQUEUE_PEEK_FAILED( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCFAILED, QUEUE, pxQueue), QUEUE, pxQueue); + +/* Called on xQueuePeek blocking (added in FreeRTOS v9.0.2) */ +#undef traceBLOCKING_ON_QUEUE_PEEK +#define traceBLOCKING_ON_QUEUE_PEEK( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCBLOCK, QUEUE, pxQueue), QUEUE, pxQueue); \ + if (TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxQueue) != TRACE_CLASS_MUTEX) \ + { \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); \ + } + +/* Called when a message is sent from interrupt context, e.g., using xQueueSendFromISR */ +#undef traceQUEUE_SEND_FROM_ISR +#define traceQUEUE_SEND_FROM_ISR( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND_FROM_ISR, TRCSUCCESS, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_FROM_ISR_TRCSUCCESS, QUEUE, pxQueue); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, (uint8_t)(pxQueue->uxMessagesWaiting + 1)); + +/* Called when a message send from interrupt context fails (since the queue was full) */ +#undef traceQUEUE_SEND_FROM_ISR_FAILED +#define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND_FROM_ISR, TRCFAILED, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_FROM_ISR_TRCFAILED, QUEUE, pxQueue); + +/* Called when a message is received in interrupt context, e.g., using xQueueReceiveFromISR */ +#undef traceQUEUE_RECEIVE_FROM_ISR +#define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE_FROM_ISR, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, (uint8_t)(pxQueue->uxMessagesWaiting - 1)); + +/* Called when a message receive from interrupt context fails (since the queue was empty) */ +#undef traceQUEUE_RECEIVE_FROM_ISR_FAILED +#define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE_FROM_ISR, TRCFAILED, QUEUE, pxQueue), QUEUE, pxQueue); + +#undef traceQUEUE_REGISTRY_ADD +#define traceQUEUE_REGISTRY_ADD(object, name) prvTraceSetObjectName(TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, object), TRACE_GET_OBJECT_NUMBER(QUEUE, object), name); + +/* Called in vTaskPrioritySet */ +#undef traceTASK_PRIORITY_SET +#define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) \ + trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE(TASK_PRIORITY_SET, pxTask, uxNewPriority); + +/* Called in vTaskPriorityInherit, which is called by Mutex operations */ +#undef traceTASK_PRIORITY_INHERIT +#define traceTASK_PRIORITY_INHERIT( pxTask, uxNewPriority ) \ + trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE(TASK_PRIORITY_INHERIT, pxTask, uxNewPriority); + +/* Called in vTaskPriorityDisinherit, which is called by Mutex operations */ +#undef traceTASK_PRIORITY_DISINHERIT +#define traceTASK_PRIORITY_DISINHERIT( pxTask, uxNewPriority ) \ + trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE(TASK_PRIORITY_DISINHERIT, pxTask, uxNewPriority); + +/* Called in vTaskResume */ +#undef traceTASK_RESUME +#define traceTASK_RESUME( pxTaskToResume ) \ + trcKERNEL_HOOKS_TASK_RESUME(TASK_RESUME, pxTaskToResume); + +/* Called in vTaskResumeFromISR */ +#undef traceTASK_RESUME_FROM_ISR +#define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) \ + trcKERNEL_HOOKS_TASK_RESUME_FROM_ISR(TASK_RESUME_FROM_ISR, pxTaskToResume); + + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) + +#if (TRC_CFG_INCLUDE_MEMMANG_EVENTS == 1) + +extern void vTraceStoreMemMangEvent(uint32_t ecode, uint32_t address, int32_t size); + +/* MALLOC and FREE are always stored, no matter if they happen inside filtered task */ +#undef traceMALLOC +#define traceMALLOC( pvAddress, uiSize ) \ + if (pvAddress != 0) \ + { \ + vTraceStoreMemMangEvent(MEM_MALLOC_SIZE, ( uint32_t ) pvAddress, (int32_t)uiSize); \ + } \ + else \ + { \ + vTraceStoreMemMangEvent(MEM_MALLOC_SIZE_TRCFAILED, ( uint32_t ) pvAddress, (int32_t)uiSize); \ + } + +#undef traceFREE +#define traceFREE( pvAddress, uiSize ) \ + vTraceStoreMemMangEvent(MEM_FREE_SIZE, ( uint32_t ) pvAddress, -((int32_t)uiSize)); + +#endif /* (TRC_CFG_INCLUDE_MEMMANG_EVENTS == 1) */ + +#if (TRC_CFG_INCLUDE_TIMER_EVENTS == 1) + +/* Called in timer.c - xTimerCreate */ +#undef traceTIMER_CREATE +#define traceTIMER_CREATE(tmr) \ + trcKERNEL_HOOKS_OBJECT_CREATE(TIMER_CREATE, TIMER, tmr); + +#undef traceTIMER_CREATE_FAILED +#define traceTIMER_CREATE_FAILED() \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY(TIMER_CREATE_TRCFAILED, 0); + +/* Note that xCommandID can never be tmrCOMMAND_EXECUTE_CALLBACK (-1) since the trace macro is not called in that case */ +#undef traceTIMER_COMMAND_SEND +#define traceTIMER_COMMAND_SEND(tmr, xCommandID, xOptionalValue, xReturn) \ + if (xCommandID > tmrCOMMAND_START_DONT_TRACE) \ + { \ + if (xCommandID == tmrCOMMAND_CHANGE_PERIOD) \ + { \ + if (xReturn == pdPASS) { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TIMER_CHANGE_PERIOD, TIMER, tmr, xOptionalValue); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TIMER_CHANGE_PERIOD_TRCFAILED, TIMER, tmr, xOptionalValue); \ + } \ + } \ + else if ((xCommandID == tmrCOMMAND_DELETE) && (xReturn == pdPASS)) \ + { \ + trcKERNEL_HOOKS_OBJECT_DELETE(TIMER_DELETE_OBJ, EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS + TRACE_GET_OBJECT_TRACE_CLASS(TIMER, tmr), EVENTGROUP_OBJCLOSE_PROP_TRCSUCCESS + TRACE_GET_OBJECT_TRACE_CLASS(TIMER, tmr), TIMER, tmr); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENTGROUP_TIMER + (uint32_t)xCommandID + ((xReturn == pdPASS) ? 0 : (TIMER_CREATE_TRCFAILED - TIMER_CREATE)), TIMER, tmr, xOptionalValue); \ + }\ + } + +#undef traceTIMER_EXPIRED +#define traceTIMER_EXPIRED(tmr) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TIMER_EXPIRED, TIMER, tmr); + +#endif /* (TRC_CFG_INCLUDE_TIMER_EVENTS == 1) */ + +#if (TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS == 1) + +#undef tracePEND_FUNC_CALL +#define tracePEND_FUNC_CALL(func, arg1, arg2, ret) \ + if (ret == pdPASS){ \ + trcKERNEL_HOOKS_KERNEL_SERVICE(PEND_FUNC_CALL, TASK, xTimerGetTimerDaemonTaskHandle() ); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(PEND_FUNC_CALL_TRCFAILED, TASK, xTimerGetTimerDaemonTaskHandle() ); \ + } + +#undef tracePEND_FUNC_CALL_FROM_ISR +#define tracePEND_FUNC_CALL_FROM_ISR(func, arg1, arg2, ret) \ + if (! uiInEventGroupSetBitsFromISR) \ + prvTraceStoreKernelCall(PEND_FUNC_CALL_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTimerGetTimerDaemonTaskHandle()) ); \ + uiInEventGroupSetBitsFromISR = 0; + +#endif /* (TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS == 1) */ + +#endif /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) */ + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) + +#undef traceEVENT_GROUP_CREATE +#define traceEVENT_GROUP_CREATE(eg) \ + trcKERNEL_HOOKS_OBJECT_CREATE(EVENT_GROUP_CREATE, EVENTGROUP, eg); + +#undef traceEVENT_GROUP_CREATE_FAILED +#define traceEVENT_GROUP_CREATE_FAILED() \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY(EVENT_GROUP_CREATE_TRCFAILED, 0); + +#undef traceEVENT_GROUP_DELETE +#define traceEVENT_GROUP_DELETE(eg) \ + { TRACE_ALLOC_CRITICAL_SECTION(); \ + TRACE_ENTER_CRITICAL_SECTION(); \ + trcKERNEL_HOOKS_OBJECT_DELETE(EVENT_GROUP_DELETE_OBJ, EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS + TRACE_GET_OBJECT_TRACE_CLASS(EVENTGROUP, eg), EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS + TRACE_GET_OBJECT_TRACE_CLASS(EVENTGROUP, eg), EVENTGROUP, eg); \ + TRACE_EXIT_CRITICAL_SECTION(); } + +#undef traceEVENT_GROUP_SYNC_BLOCK +#define traceEVENT_GROUP_SYNC_BLOCK(eg, bitsToSet, bitsToWaitFor) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_SYNC_TRCBLOCK, EVENTGROUP, eg, bitsToWaitFor); + +#undef traceEVENT_GROUP_SYNC_END +#define traceEVENT_GROUP_SYNC_END(eg, bitsToSet, bitsToWaitFor, wasTimeout) \ + if (wasTimeout) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_SYNC_END_TRCFAILED, EVENTGROUP, eg, bitsToWaitFor); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_SYNC_END, EVENTGROUP, eg, bitsToWaitFor); \ + } + +#undef traceEVENT_GROUP_WAIT_BITS_BLOCK +#define traceEVENT_GROUP_WAIT_BITS_BLOCK(eg, bitsToWaitFor) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_WAIT_BITS_TRCBLOCK, EVENTGROUP, eg, bitsToWaitFor); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +#undef traceEVENT_GROUP_WAIT_BITS_END +#define traceEVENT_GROUP_WAIT_BITS_END(eg, bitsToWaitFor, wasTimeout) \ + if (wasTimeout) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_WAIT_BITS_END_TRCFAILED, EVENTGROUP, eg, bitsToWaitFor); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_WAIT_BITS_END, EVENTGROUP, eg, bitsToWaitFor); \ + } + +#undef traceEVENT_GROUP_CLEAR_BITS +#define traceEVENT_GROUP_CLEAR_BITS(eg, bitsToClear) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_CLEAR_BITS, EVENTGROUP, eg, bitsToClear); + +#undef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR +#define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR(eg, bitsToClear) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM_FROM_ISR(EVENT_GROUP_CLEAR_BITS_FROM_ISR, EVENTGROUP, eg, bitsToClear); + +#undef traceEVENT_GROUP_SET_BITS +#define traceEVENT_GROUP_SET_BITS(eg, bitsToSet) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_SET_BITS, EVENTGROUP, eg, bitsToSet); + +#undef traceEVENT_GROUP_SET_BITS_FROM_ISR +#define traceEVENT_GROUP_SET_BITS_FROM_ISR(eg, bitsToSet) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM_FROM_ISR(EVENT_GROUP_SET_BITS_FROM_ISR, EVENTGROUP, eg, bitsToSet); \ + uiInEventGroupSetBitsFromISR = 1; + +#endif /* (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) */ + +#undef traceTASK_NOTIFY_TAKE +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) +#define traceTASK_NOTIFY_TAKE() \ + if (pxCurrentTCB->eNotifyState == eNotified){ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE, TASK, pxCurrentTCB, xTicksToWait); \ + } \ + else{ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCFAILED, TASK, pxCurrentTCB, xTicksToWait); \ + } +#elif (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_TAKE() \ + if (pxCurrentTCB->ucNotifyState == taskNOTIFICATION_RECEIVED){ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE, TASK, pxCurrentTCB, xTicksToWait); \ + }else{ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCFAILED, TASK, pxCurrentTCB, xTicksToWait);} +#else /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0 */ +#define traceTASK_NOTIFY_TAKE(index) \ + if (pxCurrentTCB->ucNotifyState[index] == taskNOTIFICATION_RECEIVED){ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE, TASK, pxCurrentTCB, xTicksToWait); \ + }else{ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCFAILED, TASK, pxCurrentTCB, xTicksToWait);} +#endif /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0 */ + +#undef traceTASK_NOTIFY_TAKE_BLOCK +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_TAKE_BLOCK() \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCBLOCK, TASK, pxCurrentTCB, xTicksToWait); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); +#else /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_TAKE_BLOCK(index) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCBLOCK, TASK, pxCurrentTCB, xTicksToWait); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); +#endif /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY_WAIT +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) +#define traceTASK_NOTIFY_WAIT() \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + { \ + if (pxCurrentTCB->eNotifyState == eNotified) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + else \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCFAILED, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + } +#elif (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_WAIT() \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + { \ + if (pxCurrentTCB->ucNotifyState == taskNOTIFICATION_RECEIVED) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + else \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCFAILED, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + } +#else /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0 */ +#define traceTASK_NOTIFY_WAIT(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + { \ + if (pxCurrentTCB->ucNotifyState[index] == taskNOTIFICATION_RECEIVED) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + else \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCFAILED, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + } +#endif /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0 */ + +#undef traceTASK_NOTIFY_WAIT_BLOCK +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_WAIT_BLOCK() \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCBLOCK, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); +#else /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_WAIT_BLOCK(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCBLOCK, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); +#endif /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); +#else /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); +#endif /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY_FROM_ISR +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_FROM_ISR() \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); +#else /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_FROM_ISR(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); +#endif /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY_GIVE_FROM_ISR +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_GIVE_FROM_ISR() \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY_GIVE_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); +#else /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_GIVE_FROM_ISR(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY_GIVE_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); +#endif /* TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0 */ + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) + +#undef traceSTREAM_BUFFER_CREATE +#define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ) \ + trcKERNEL_HOOKS_OBJECT_CREATE(TRACE_GET_OBJECT_EVENT_CODE(CREATE_OBJ, TRCSUCCESS, STREAMBUFFER, pxStreamBuffer), STREAMBUFFER, pxStreamBuffer); + +#undef traceSTREAM_BUFFER_CREATE_FAILED +#define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY(TRACE_GET_CLASS_EVENT_CODE(CREATE_OBJ, TRCFAILED, STREAMBUFFER, xIsMessageBuffer), 0); + +#undef traceSTREAM_BUFFER_CREATE_STATIC_FAILED +#define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer ) \ + traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) + +#undef traceSTREAM_BUFFER_DELETE +#define traceSTREAM_BUFFER_DELETE( xStreamBuffer ) \ + trcKERNEL_HOOKS_OBJECT_DELETE(TRACE_GET_OBJECT_EVENT_CODE(DELETE_OBJ, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_NAME, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_PROP, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_RESET +#define traceSTREAM_BUFFER_RESET( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(prvGetStreamBufferType(xStreamBuffer) > 0 ? TRACE_MESSAGEBUFFER_RESET : TRACE_STREAMBUFFER_RESET, STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, 0); + +#undef traceSTREAM_BUFFER_SEND +#define traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); + +#undef traceBLOCKING_ON_STREAM_BUFFER_SEND +#define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCBLOCK, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_SEND_FAILED +#define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCFAILED, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_RECEIVE +#define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); + + +#undef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE +#define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCBLOCK, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_RECEIVE_FAILED +#define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCFAILED, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_SEND_FROM_ISR +#define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xReturn ) \ + if( xReturn > ( size_t ) 0 ) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(SEND_FROM_ISR, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(SEND_FROM_ISR, TRCFAILED, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + } + +#undef traceSTREAM_BUFFER_RECEIVE_FROM_ISR +#define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ) \ + if( xReceivedLength > ( size_t ) 0 ) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE_FROM_ISR, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE_FROM_ISR, TRCFAILED, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + } + +#endif /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) */ + +#endif /* (TRC_CFG_SCHEDULING_ONLY == 0) */ + +#endif /*#if TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT */ + +/******************************************************************************/ +/*** Definitions for Streaming mode *******************************************/ +/******************************************************************************/ +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +/******************************************************************************* +* vTraceStoreKernelObjectName +* +* Set the name for a kernel object (defined by its address). +******************************************************************************/ +void vTraceStoreKernelObjectName(void* object, const char* name); + +/******************************************************************************* +* prvIsNewTCB +* +* Tells if this task is already executing, or if there has been a task-switch. +* Assumed to be called within a trace hook in kernel context. +*******************************************************************************/ +uint32_t prvIsNewTCB(void* pNewTCB); + +#define TRACE_GET_CURRENT_TASK() prvTraceGetCurrentTaskHandle() + +/*************************************************************************/ +/* KERNEL SPECIFIC OBJECT CONFIGURATION */ +/*************************************************************************/ + +/******************************************************************************* + * The event codes - should match the offline config file. + ******************************************************************************/ + +/*** Event codes for streaming - should match the Tracealyzer config file *****/ +#define PSF_EVENT_NULL_EVENT 0x00 + +#define PSF_EVENT_TRACE_START 0x01 +#define PSF_EVENT_TS_CONFIG 0x02 +#define PSF_EVENT_OBJ_NAME 0x03 +#define PSF_EVENT_TASK_PRIORITY 0x04 +#define PSF_EVENT_TASK_PRIO_INHERIT 0x05 +#define PSF_EVENT_TASK_PRIO_DISINHERIT 0x06 +#define PSF_EVENT_DEFINE_ISR 0x07 + +#define PSF_EVENT_TASK_CREATE 0x10 +#define PSF_EVENT_QUEUE_CREATE 0x11 +#define PSF_EVENT_SEMAPHORE_BINARY_CREATE 0x12 +#define PSF_EVENT_MUTEX_CREATE 0x13 +#define PSF_EVENT_TIMER_CREATE 0x14 +#define PSF_EVENT_EVENTGROUP_CREATE 0x15 +#define PSF_EVENT_SEMAPHORE_COUNTING_CREATE 0x16 +#define PSF_EVENT_MUTEX_RECURSIVE_CREATE 0x17 +#define PSF_EVENT_STREAMBUFFER_CREATE 0x18 +#define PSF_EVENT_MESSAGEBUFFER_CREATE 0x19 + +#define PSF_EVENT_TASK_DELETE 0x20 +#define PSF_EVENT_QUEUE_DELETE 0x21 +#define PSF_EVENT_SEMAPHORE_DELETE 0x22 +#define PSF_EVENT_MUTEX_DELETE 0x23 +#define PSF_EVENT_TIMER_DELETE 0x24 +#define PSF_EVENT_EVENTGROUP_DELETE 0x25 +#define PSF_EVENT_STREAMBUFFER_DELETE 0x28 +#define PSF_EVENT_MESSAGEBUFFER_DELETE 0x29 + +#define PSF_EVENT_TASK_READY 0x30 +#define PSF_EVENT_NEW_TIME 0x31 +#define PSF_EVENT_NEW_TIME_SCHEDULER_SUSPENDED 0x32 +#define PSF_EVENT_ISR_BEGIN 0x33 +#define PSF_EVENT_ISR_RESUME 0x34 +#define PSF_EVENT_TS_BEGIN 0x35 +#define PSF_EVENT_TS_RESUME 0x36 +#define PSF_EVENT_TASK_ACTIVATE 0x37 + +#define PSF_EVENT_MALLOC 0x38 +#define PSF_EVENT_FREE 0x39 + +#define PSF_EVENT_LOWPOWER_BEGIN 0x3A +#define PSF_EVENT_LOWPOWER_END 0x3B + +#define PSF_EVENT_IFE_NEXT 0x3C +#define PSF_EVENT_IFE_DIRECT 0x3D + +#define PSF_EVENT_TASK_CREATE_FAILED 0x40 +#define PSF_EVENT_QUEUE_CREATE_FAILED 0x41 +#define PSF_EVENT_SEMAPHORE_BINARY_CREATE_FAILED 0x42 +#define PSF_EVENT_MUTEX_CREATE_FAILED 0x43 +#define PSF_EVENT_TIMER_CREATE_FAILED 0x44 +#define PSF_EVENT_EVENTGROUP_CREATE_FAILED 0x45 +#define PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED 0x46 +#define PSF_EVENT_MUTEX_RECURSIVE_CREATE_FAILED 0x47 +#define PSF_EVENT_STREAMBUFFER_CREATE_FAILED 0x49 +#define PSF_EVENT_MESSAGEBUFFER_CREATE_FAILED 0x4A + +#define PSF_EVENT_TIMER_DELETE_FAILED 0x48 + +#define PSF_EVENT_QUEUE_SEND 0x50 +#define PSF_EVENT_SEMAPHORE_GIVE 0x51 +#define PSF_EVENT_MUTEX_GIVE 0x52 + +#define PSF_EVENT_QUEUE_SEND_FAILED 0x53 +#define PSF_EVENT_SEMAPHORE_GIVE_FAILED 0x54 +#define PSF_EVENT_MUTEX_GIVE_FAILED 0x55 + +#define PSF_EVENT_QUEUE_SEND_BLOCK 0x56 +#define PSF_EVENT_SEMAPHORE_GIVE_BLOCK 0x57 +#define PSF_EVENT_MUTEX_GIVE_BLOCK 0x58 + +#define PSF_EVENT_QUEUE_SEND_FROMISR 0x59 +#define PSF_EVENT_SEMAPHORE_GIVE_FROMISR 0x5A + +#define PSF_EVENT_QUEUE_SEND_FROMISR_FAILED 0x5C +#define PSF_EVENT_SEMAPHORE_GIVE_FROMISR_FAILED 0x5D + +#define PSF_EVENT_QUEUE_RECEIVE 0x60 +#define PSF_EVENT_SEMAPHORE_TAKE 0x61 +#define PSF_EVENT_MUTEX_TAKE 0x62 + +#define PSF_EVENT_QUEUE_RECEIVE_FAILED 0x63 +#define PSF_EVENT_SEMAPHORE_TAKE_FAILED 0x64 +#define PSF_EVENT_MUTEX_TAKE_FAILED 0x65 + +#define PSF_EVENT_QUEUE_RECEIVE_BLOCK 0x66 +#define PSF_EVENT_SEMAPHORE_TAKE_BLOCK 0x67 +#define PSF_EVENT_MUTEX_TAKE_BLOCK 0x68 + +#define PSF_EVENT_QUEUE_RECEIVE_FROMISR 0x69 +#define PSF_EVENT_SEMAPHORE_TAKE_FROMISR 0x6A + +#define PSF_EVENT_QUEUE_RECEIVE_FROMISR_FAILED 0x6C +#define PSF_EVENT_SEMAPHORE_TAKE_FROMISR_FAILED 0x6D + +#define PSF_EVENT_QUEUE_PEEK 0x70 +#define PSF_EVENT_SEMAPHORE_PEEK 0x71 +#define PSF_EVENT_MUTEX_PEEK 0x72 + +#define PSF_EVENT_QUEUE_PEEK_FAILED 0x73 +#define PSF_EVENT_SEMAPHORE_PEEK_FAILED 0x74 +#define PSF_EVENT_MUTEX_PEEK_FAILED 0x75 + +#define PSF_EVENT_QUEUE_PEEK_BLOCK 0x76 +#define PSF_EVENT_SEMAPHORE_PEEK_BLOCK 0x77 +#define PSF_EVENT_MUTEX_PEEK_BLOCK 0x78 + +#define PSF_EVENT_TASK_DELAY_UNTIL 0x79 +#define PSF_EVENT_TASK_DELAY 0x7A +#define PSF_EVENT_TASK_SUSPEND 0x7B +#define PSF_EVENT_TASK_RESUME 0x7C +#define PSF_EVENT_TASK_RESUME_FROMISR 0x7D + +#define PSF_EVENT_TIMER_PENDFUNCCALL 0x80 +#define PSF_EVENT_TIMER_PENDFUNCCALL_FROMISR 0x81 +#define PSF_EVENT_TIMER_PENDFUNCCALL_FAILED 0x82 +#define PSF_EVENT_TIMER_PENDFUNCCALL_FROMISR_FAILED 0x83 + +#define PSF_EVENT_USER_EVENT 0x90 + +#define PSF_EVENT_TIMER_START 0xA0 +#define PSF_EVENT_TIMER_RESET 0xA1 +#define PSF_EVENT_TIMER_STOP 0xA2 +#define PSF_EVENT_TIMER_CHANGEPERIOD 0xA3 +#define PSF_EVENT_TIMER_START_FROMISR 0xA4 +#define PSF_EVENT_TIMER_RESET_FROMISR 0xA5 +#define PSF_EVENT_TIMER_STOP_FROMISR 0xA6 +#define PSF_EVENT_TIMER_CHANGEPERIOD_FROMISR 0xA7 +#define PSF_EVENT_TIMER_START_FAILED 0xA8 +#define PSF_EVENT_TIMER_RESET_FAILED 0xA9 +#define PSF_EVENT_TIMER_STOP_FAILED 0xAA +#define PSF_EVENT_TIMER_CHANGEPERIOD_FAILED 0xAB +#define PSF_EVENT_TIMER_START_FROMISR_FAILED 0xAC +#define PSF_EVENT_TIMER_RESET_FROMISR_FAILED 0xAD +#define PSF_EVENT_TIMER_STOP_FROMISR_FAILED 0xAE +#define PSF_EVENT_TIMER_CHANGEPERIOD_FROMISR_FAILED 0xAF + +#define PSF_EVENT_EVENTGROUP_SYNC 0xB0 +#define PSF_EVENT_EVENTGROUP_WAITBITS 0xB1 +#define PSF_EVENT_EVENTGROUP_CLEARBITS 0xB2 +#define PSF_EVENT_EVENTGROUP_CLEARBITS_FROMISR 0xB3 +#define PSF_EVENT_EVENTGROUP_SETBITS 0xB4 +#define PSF_EVENT_EVENTGROUP_SETBITS_FROMISR 0xB5 +#define PSF_EVENT_EVENTGROUP_SYNC_BLOCK 0xB6 +#define PSF_EVENT_EVENTGROUP_WAITBITS_BLOCK 0xB7 +#define PSF_EVENT_EVENTGROUP_SYNC_FAILED 0xB8 +#define PSF_EVENT_EVENTGROUP_WAITBITS_FAILED 0xB9 + +#define PSF_EVENT_QUEUE_SEND_FRONT 0xC0 +#define PSF_EVENT_QUEUE_SEND_FRONT_FAILED 0xC1 +#define PSF_EVENT_QUEUE_SEND_FRONT_BLOCK 0xC2 +#define PSF_EVENT_QUEUE_SEND_FRONT_FROMISR 0xC3 +#define PSF_EVENT_QUEUE_SEND_FRONT_FROMISR_FAILED 0xC4 +#define PSF_EVENT_MUTEX_GIVE_RECURSIVE 0xC5 +#define PSF_EVENT_MUTEX_GIVE_RECURSIVE_FAILED 0xC6 +#define PSF_EVENT_MUTEX_TAKE_RECURSIVE 0xC7 +#define PSF_EVENT_MUTEX_TAKE_RECURSIVE_FAILED 0xC8 + +#define PSF_EVENT_TASK_NOTIFY 0xC9 +#define PSF_EVENT_TASK_NOTIFY_TAKE 0xCA +#define PSF_EVENT_TASK_NOTIFY_TAKE_BLOCK 0xCB +#define PSF_EVENT_TASK_NOTIFY_TAKE_FAILED 0xCC +#define PSF_EVENT_TASK_NOTIFY_WAIT 0xCD +#define PSF_EVENT_TASK_NOTIFY_WAIT_BLOCK 0xCE +#define PSF_EVENT_TASK_NOTIFY_WAIT_FAILED 0xCF +#define PSF_EVENT_TASK_NOTIFY_FROM_ISR 0xD0 +#define PSF_EVENT_TASK_NOTIFY_GIVE_FROM_ISR 0xD1 + +#define PSF_EVENT_TIMER_EXPIRED 0xD2 + +#define PSF_EVENT_STREAMBUFFER_SEND 0xD3 +#define PSF_EVENT_STREAMBUFFER_SEND_BLOCK 0xD4 +#define PSF_EVENT_STREAMBUFFER_SEND_FAILED 0xD5 +#define PSF_EVENT_STREAMBUFFER_RECEIVE 0xD6 +#define PSF_EVENT_STREAMBUFFER_RECEIVE_BLOCK 0xD7 +#define PSF_EVENT_STREAMBUFFER_RECEIVE_FAILED 0xD8 +#define PSF_EVENT_STREAMBUFFER_SEND_FROM_ISR 0xD9 +#define PSF_EVENT_STREAMBUFFER_SEND_FROM_ISR_FAILED 0xDA +#define PSF_EVENT_STREAMBUFFER_RECEIVE_FROM_ISR 0xDB +#define PSF_EVENT_STREAMBUFFER_RECEIVE_FROM_ISR_FAILED 0xDC +#define PSF_EVENT_STREAMBUFFER_RESET 0xDD + +#define PSF_EVENT_MESSAGEBUFFER_SEND 0xDE +#define PSF_EVENT_MESSAGEBUFFER_SEND_BLOCK 0xDF +#define PSF_EVENT_MESSAGEBUFFER_SEND_FAILED 0xE0 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE 0xE1 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE_BLOCK 0xE2 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE_FAILED 0xE3 +#define PSF_EVENT_MESSAGEBUFFER_SEND_FROM_ISR 0xE4 +#define PSF_EVENT_MESSAGEBUFFER_SEND_FROM_ISR_FAILED 0xE5 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE_FROM_ISR 0xE6 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE_FROM_ISR_FAILED 0xE7 +#define PSF_EVENT_MESSAGEBUFFER_RESET 0xE8 + +#define PSF_EVENT_MALLOC_FAILED 0xE9 + +#define PSF_EVENT_UNUSED_STACK 0xEA + +/*** The trace macros for streaming ******************************************/ + +/* A macro that will update the tick count when returning from tickless idle */ +#undef traceINCREASE_TICK_COUNT +/* Note: This can handle time adjustments of max 2^32 ticks, i.e., 35 seconds at 120 MHz. Thus, tick-less idle periods longer than 2^32 ticks will appear "compressed" on the time line.*/ +#define traceINCREASE_TICK_COUNT( xCount ) { extern uint32_t uiTraceTickCount; uiTraceTickCount += xCount; } + +#if (TRC_CFG_INCLUDE_OSTICK_EVENTS == 1) +#define OS_TICK_EVENT(uxSchedulerSuspended, xTickCount) if (uxSchedulerSuspended == (unsigned portBASE_TYPE) pdFALSE) { prvTraceStoreEvent1(PSF_EVENT_NEW_TIME, (uint32_t)(xTickCount + 1)); } +#else +#define OS_TICK_EVENT(uxSchedulerSuspended, xTickCount) +#endif + +/* Called on each OS tick. Will call uiPortGetTimestamp to make sure it is called at least once every OS tick. */ +#undef traceTASK_INCREMENT_TICK +#if TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_3_0 + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || xPendedTicks == 0) { extern uint32_t uiTraceTickCount; uiTraceTickCount++; } \ + OS_TICK_EVENT(uxSchedulerSuspended, xTickCount) + +#elif TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_5_X + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || uxPendedTicks == 0) { extern uint32_t uiTraceTickCount; uiTraceTickCount++; } \ + OS_TICK_EVENT(uxSchedulerSuspended, xTickCount) + +#else + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || uxMissedTicks == 0) { extern uint32_t uiTraceTickCount; uiTraceTickCount++; } \ + OS_TICK_EVENT(uxSchedulerSuspended, xTickCount) + +#endif + +extern volatile uint32_t uiTraceSystemState; + +/* Called on each task-switch */ +#undef traceTASK_SWITCHED_IN +#define traceTASK_SWITCHED_IN() \ + uiTraceSystemState = TRC_STATE_IN_TASKSWITCH; \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + { \ + if (prvIsNewTCB(pxCurrentTCB)) \ + { \ + prvTraceStoreEvent2(PSF_EVENT_TASK_ACTIVATE, (uint32_t)pxCurrentTCB, pxCurrentTCB->uxPriority); \ + } \ + } \ + uiTraceSystemState = TRC_STATE_IN_APPLICATION; + +/* Called for each task that becomes ready */ +#if (TRC_CFG_INCLUDE_READY_EVENTS == 1) +#undef traceMOVED_TASK_TO_READY_STATE +#define traceMOVED_TASK_TO_READY_STATE( pxTCB ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_READY, (uint32_t)pxTCB); +#endif + +#undef traceTASK_CREATE +#if TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 +#define traceTASK_CREATE(pxNewTCB) \ + if (pxNewTCB != NULL) \ + { \ + prvAddTaskToStackMonitor(pxNewTCB); \ + prvTraceSaveObjectSymbol(pxNewTCB, pxNewTCB->pcTaskName); \ + prvTraceSaveObjectData(pxNewTCB, pxNewTCB->uxPriority); \ + prvTraceStoreStringEvent(1, PSF_EVENT_OBJ_NAME, pxNewTCB->pcTaskName, pxNewTCB); \ + TRACE_SET_OBJECT_FILTER(TASK, pxNewTCB, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxNewTCB) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_CREATE, (uint32_t)pxNewTCB, pxNewTCB->uxPriority); \ + } +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 */ +#define traceTASK_CREATE(pxNewTCB) \ + if (pxNewTCB != NULL) \ + { \ + prvAddTaskToStackMonitor(pxNewTCB); \ + prvTraceSaveObjectSymbol(pxNewTCB, (const char*)pcName); \ + prvTraceSaveObjectData(pxNewTCB, uxPriority); \ + prvTraceStoreStringEvent(1, PSF_EVENT_OBJ_NAME, (const char*)pcName, pxNewTCB); \ + TRACE_SET_OBJECT_FILTER(TASK, pxNewTCB, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxNewTCB) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_CREATE, (uint32_t)pxNewTCB, uxPriority); \ + } +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 */ + +/* Called in vTaskCreate, if it fails (typically if the stack can not be allocated) */ +#undef traceTASK_CREATE_FAILED +#define traceTASK_CREATE_FAILED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent0(PSF_EVENT_TASK_CREATE_FAILED); + +/* Called on vTaskDelete */ +#undef traceTASK_DELETE // We don't allow for filtering out "delete" events. They are important and not very frequent. Moreover, we can't exclude create events, so this should be symmetrical. +#define traceTASK_DELETE( pxTaskToDelete ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTaskToDelete) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_DELETE, (uint32_t)pxTaskToDelete, (pxTaskToDelete != NULL) ? (pxTaskToDelete->uxPriority) : 0); \ + prvTraceDeleteSymbol(pxTaskToDelete); \ + prvTraceDeleteObjectData(pxTaskToDelete); \ + prvRemoveTaskFromStackMonitor(pxTaskToDelete); + +#if (TRC_CFG_SCHEDULING_ONLY == 0) + +#if (defined(configUSE_TICKLESS_IDLE) && configUSE_TICKLESS_IDLE != 0) + +#undef traceLOW_POWER_IDLE_BEGIN +#define traceLOW_POWER_IDLE_BEGIN() \ + { \ + prvTraceStoreEvent1(PSF_EVENT_LOWPOWER_BEGIN, xExpectedIdleTime); \ + } + +#undef traceLOW_POWER_IDLE_END +#define traceLOW_POWER_IDLE_END() \ + { \ + prvTraceStoreEvent0(PSF_EVENT_LOWPOWER_END); \ + } + +#endif /* (defined(configUSE_TICKLESS_IDLE) && configUSE_TICKLESS_IDLE != 0) */ + +/* Called on vTaskSuspend */ +#undef traceTASK_SUSPEND +#define traceTASK_SUSPEND( pxTaskToSuspend ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTaskToSuspend) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_SUSPEND, (uint32_t)pxTaskToSuspend); + +/* Called on vTaskDelay - note the use of FreeRTOS variable xTicksToDelay */ +#undef traceTASK_DELAY +#define traceTASK_DELAY() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_DELAY, xTicksToDelay); + +/* Called on vTaskDelayUntil - note the use of FreeRTOS variable xTimeToWake */ +#undef traceTASK_DELAY_UNTIL +#if TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 +#define traceTASK_DELAY_UNTIL(xTimeToWake) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_DELAY_UNTIL, (uint32_t)xTimeToWake); +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 */ +#define traceTASK_DELAY_UNTIL() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_DELAY_UNTIL, (uint32_t)xTimeToWake); +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 */ + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0) +#define traceQUEUE_CREATE_HELPER() \ + case queueQUEUE_TYPE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_CREATE, (uint32_t)pxNewQueue); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_RECURSIVE_CREATE, (uint32_t)pxNewQueue); \ + break; +#else +#define traceQUEUE_CREATE_HELPER() +#endif /* (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) */ + +/* Called in xQueueCreate, and thereby for all other object based on queues, such as semaphores. */ +#undef traceQUEUE_CREATE +#define traceQUEUE_CREATE( pxNewQueue )\ + TRACE_SET_OBJECT_FILTER(QUEUE, pxNewQueue, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + { \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxNewQueue) & CurrentFilterMask) \ + { \ + switch (pxNewQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(PSF_EVENT_QUEUE_CREATE, (uint32_t)pxNewQueue, uxQueueLength); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + prvTraceStoreEvent1(PSF_EVENT_SEMAPHORE_BINARY_CREATE, (uint32_t)pxNewQueue); \ + break; \ + traceQUEUE_CREATE_HELPER() \ + } \ + } \ + } + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0) +#define traceQUEUE_CREATE_FAILED_HELPER() \ + case queueQUEUE_TYPE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_CREATE_FAILED, 0); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_RECURSIVE_CREATE_FAILED, 0); \ + break; +#else +#define traceQUEUE_CREATE_FAILED_HELPER() +#endif /* (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) */ + +/* Called in xQueueCreate, if the queue creation fails */ +#undef traceQUEUE_CREATE_FAILED +#define traceQUEUE_CREATE_FAILED( queueType ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + { \ + switch (queueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(PSF_EVENT_QUEUE_CREATE_FAILED, 0, uxQueueLength); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + prvTraceStoreEvent1(PSF_EVENT_SEMAPHORE_BINARY_CREATE_FAILED, 0); \ + break; \ + traceQUEUE_CREATE_FAILED_HELPER() \ + } \ + } + +#undef traceQUEUE_DELETE // We don't allow for filtering out "delete" events. They are important and not very frequent. Moreover, we can't exclude create events, so this should be symmetrical. +#define traceQUEUE_DELETE( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + { \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + { \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(PSF_EVENT_QUEUE_DELETE, (uint32_t)pxQueue, (pxQueue != NULL) ? (pxQueue->uxMessagesWaiting) : 0); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent2(PSF_EVENT_MUTEX_DELETE, (uint32_t)pxQueue, (pxQueue != NULL) ? (pxQueue->uxMessagesWaiting) : 0); \ + break; \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_DELETE, (uint32_t)pxQueue, (pxQueue != NULL) ? (pxQueue->uxMessagesWaiting) : 0); \ + break; \ + } \ + } \ + } \ + prvTraceDeleteSymbol(pxQueue); + +/* Called in xQueueCreateCountingSemaphore, if the queue creation fails */ +#undef traceCREATE_COUNTING_SEMAPHORE +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) +#define traceCREATE_COUNTING_SEMAPHORE() \ + TRACE_SET_OBJECT_FILTER(QUEUE, xHandle, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, xHandle) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_COUNTING_CREATE, (uint32_t)xHandle, uxMaxCount) +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_5_X) +#define traceCREATE_COUNTING_SEMAPHORE() \ + TRACE_SET_OBJECT_FILTER(QUEUE, xHandle, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, xHandle) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_COUNTING_CREATE, (uint32_t)xHandle, uxInitialCount); +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_4_X) +#define traceCREATE_COUNTING_SEMAPHORE() \ + TRACE_SET_OBJECT_FILTER(QUEUE, xHandle, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, xHandle) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_COUNTING_CREATE, (uint32_t)xHandle, uxCountValue); +#else +#define traceCREATE_COUNTING_SEMAPHORE() \ + TRACE_SET_OBJECT_FILTER(QUEUE, pxHandle, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxHandle) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_COUNTING_CREATE, (uint32_t)pxHandle, uxCountValue); +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X */ + +#undef traceCREATE_COUNTING_SEMAPHORE_FAILED +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) +#define traceCREATE_COUNTING_SEMAPHORE_FAILED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED, 0, uxMaxCount); +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_5_X) +#define traceCREATE_COUNTING_SEMAPHORE_FAILED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED, 0, uxInitialCount); +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_4_X) +#define traceCREATE_COUNTING_SEMAPHORE_FAILED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED, 0, uxCountValue); +#else +#define traceCREATE_COUNTING_SEMAPHORE_FAILED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED, 0, uxCountValue); +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X */ + + +/* This macro is not necessary as of FreeRTOS v9.0.0 */ +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) +/* Called in xQueueCreateMutex, and thereby also from xSemaphoreCreateMutex and xSemaphoreCreateRecursiveMutex */ +#undef traceCREATE_MUTEX +#define traceCREATE_MUTEX( pxNewQueue ) \ + TRACE_SET_OBJECT_FILTER(QUEUE, pxNewQueue, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + { \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxNewQueue) & CurrentFilterMask) \ + { \ + switch (pxNewQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_CREATE, (uint32_t)pxNewQueue); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_RECURSIVE_CREATE, (uint32_t)pxNewQueue); \ + break; \ + } \ + }\ + } + +/* Called in xQueueCreateMutex when the operation fails (when memory allocation fails) */ +#undef traceCREATE_MUTEX_FAILED +#define traceCREATE_MUTEX_FAILED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_CREATE_FAILED, 0); +#endif /* (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) */ + +/* Called when a message is sent to a queue */ /* CS IS NEW ! */ +#undef traceQUEUE_SEND +#define traceQUEUE_SEND( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND : PSF_EVENT_QUEUE_SEND_FRONT, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting + 1); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_GIVE, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting + 1); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_GIVE, (uint32_t)pxQueue); \ + break; \ + } + +#undef traceQUEUE_SET_SEND +#define traceQUEUE_SET_SEND( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_QUEUE_SEND, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting + 1); + +/* Called when a message failed to be sent to a queue (timeout) */ +#undef traceQUEUE_SEND_FAILED +#define traceQUEUE_SEND_FAILED( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND_FAILED : PSF_EVENT_QUEUE_SEND_FRONT_FAILED, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_GIVE_FAILED, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_GIVE_FAILED, (uint32_t)pxQueue); \ + break; \ + } + +/* Called when the task is blocked due to a send operation on a full queue */ +#undef traceBLOCKING_ON_QUEUE_SEND +#define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND_BLOCK : PSF_EVENT_QUEUE_SEND_FRONT_BLOCK, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_GIVE_BLOCK, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_GIVE_BLOCK, (uint32_t)pxQueue); \ + break; \ + } + +/* Called when a message is sent from interrupt context, e.g., using xQueueSendFromISR */ +#undef traceQUEUE_SEND_FROM_ISR +#define traceQUEUE_SEND_FROM_ISR( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND_FROMISR : PSF_EVENT_QUEUE_SEND_FRONT_FROMISR, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting + 1); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_GIVE_FROMISR, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting + 1); \ + break; \ + } + +/* Called when a message send from interrupt context fails (since the queue was full) */ +#undef traceQUEUE_SEND_FROM_ISR_FAILED +#define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND_FROMISR_FAILED : PSF_EVENT_QUEUE_SEND_FRONT_FROMISR_FAILED, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_GIVE_FROMISR_FAILED, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting); \ + break; \ + } + +/* Called when a message is received from a queue */ +#undef traceQUEUE_RECEIVE +#define traceQUEUE_RECEIVE( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + if (isQueueReceiveHookActuallyPeek) \ + prvTraceStoreEvent3(PSF_EVENT_QUEUE_PEEK, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting - 1); \ + else\ + prvTraceStoreEvent3(PSF_EVENT_QUEUE_RECEIVE, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting - 1); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + if (isQueueReceiveHookActuallyPeek) \ + prvTraceStoreEvent3(PSF_EVENT_SEMAPHORE_PEEK, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting - 1); \ + else \ + prvTraceStoreEvent3(PSF_EVENT_SEMAPHORE_TAKE, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting - 1); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + if (isQueueReceiveHookActuallyPeek) \ + prvTraceStoreEvent2(PSF_EVENT_MUTEX_PEEK, (uint32_t)pxQueue, xTicksToWait); \ + else \ + prvTraceStoreEvent2(PSF_EVENT_MUTEX_TAKE, (uint32_t)pxQueue, xTicksToWait); \ + break; \ + } + +/* Called when a receive operation on a queue fails (timeout) */ +#undef traceQUEUE_RECEIVE_FAILED +#define traceQUEUE_RECEIVE_FAILED( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent3(isQueueReceiveHookActuallyPeek ? PSF_EVENT_QUEUE_PEEK_FAILED : PSF_EVENT_QUEUE_RECEIVE_FAILED, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent3(isQueueReceiveHookActuallyPeek ? PSF_EVENT_SEMAPHORE_PEEK_FAILED : PSF_EVENT_SEMAPHORE_TAKE_FAILED, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent2(isQueueReceiveHookActuallyPeek ? PSF_EVENT_MUTEX_PEEK_FAILED : PSF_EVENT_MUTEX_TAKE_FAILED, (uint32_t)pxQueue, xTicksToWait); \ + break; \ + } + +/* Called when the task is blocked due to a receive operation on an empty queue */ +#undef traceBLOCKING_ON_QUEUE_RECEIVE +#define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent3(isQueueReceiveHookActuallyPeek ? PSF_EVENT_QUEUE_PEEK_BLOCK : PSF_EVENT_QUEUE_RECEIVE_BLOCK, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent3(isQueueReceiveHookActuallyPeek ? PSF_EVENT_SEMAPHORE_PEEK_BLOCK : PSF_EVENT_SEMAPHORE_TAKE_BLOCK, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent2(isQueueReceiveHookActuallyPeek ? PSF_EVENT_MUTEX_PEEK_BLOCK : PSF_EVENT_MUTEX_TAKE_BLOCK, (uint32_t)pxQueue, xTicksToWait); \ + break; \ + } + +#if (TRC_CFG_FREERTOS_VERSION > TRC_FREERTOS_VERSION_9_0_1) +/* Called when a peek operation on a queue fails (timeout) */ +#undef traceQUEUE_PEEK_FAILED +#define traceQUEUE_PEEK_FAILED( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent3(PSF_EVENT_QUEUE_PEEK_FAILED, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent3(PSF_EVENT_SEMAPHORE_PEEK_FAILED, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent2(PSF_EVENT_MUTEX_PEEK_FAILED, (uint32_t)pxQueue, xTicksToWait); \ + break; \ + } + +/* Called when the task is blocked due to a peek operation on an empty queue */ +#undef traceBLOCKING_ON_QUEUE_PEEK +#define traceBLOCKING_ON_QUEUE_PEEK( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent3(PSF_EVENT_QUEUE_PEEK_BLOCK, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent3(PSF_EVENT_SEMAPHORE_PEEK_BLOCK, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent2(PSF_EVENT_MUTEX_PEEK_BLOCK, (uint32_t)pxQueue, xTicksToWait); \ + break; \ + } + +#endif /* (TRC_CFG_FREERTOS_VERSION > TRC_FREERTOS_VERSION_9_0_1) */ + +/* Called when a message is received in interrupt context, e.g., using xQueueReceiveFromISR */ +#undef traceQUEUE_RECEIVE_FROM_ISR +#define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(PSF_EVENT_QUEUE_RECEIVE_FROMISR, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting - 1); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_TAKE_FROMISR, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting - 1); \ + break; \ + } + +/* Called when a message receive from interrupt context fails (since the queue was empty) */ +#undef traceQUEUE_RECEIVE_FROM_ISR_FAILED +#define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent2(PSF_EVENT_QUEUE_RECEIVE_FROMISR_FAILED, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent2(PSF_EVENT_SEMAPHORE_TAKE_FROMISR_FAILED, (uint32_t)pxQueue, pxQueue->uxMessagesWaiting); \ + break; \ + } + +/* Called on xQueuePeek */ +#undef traceQUEUE_PEEK +#define traceQUEUE_PEEK( pxQueue ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(QUEUE, pxQueue) & CurrentFilterMask) \ + switch (pxQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent3(PSF_EVENT_QUEUE_PEEK, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent3(PSF_EVENT_SEMAPHORE_PEEK, (uint32_t)pxQueue, xTicksToWait, pxQueue->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent1(PSF_EVENT_MUTEX_PEEK, (uint32_t)pxQueue); \ + break; \ + } + +/* Called in vTaskPrioritySet */ +#undef traceTASK_PRIORITY_SET +#define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) \ + prvTraceSaveObjectData(pxTask, uxNewPriority); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTask) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_PRIORITY, (uint32_t)pxTask, uxNewPriority); + +/* Called in vTaskPriorityInherit, which is called by Mutex operations */ +#undef traceTASK_PRIORITY_INHERIT +#define traceTASK_PRIORITY_INHERIT( pxTask, uxNewPriority ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTask) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_PRIO_INHERIT, (uint32_t)pxTask, uxNewPriority); + +/* Called in vTaskPriorityDisinherit, which is called by Mutex operations */ +#undef traceTASK_PRIORITY_DISINHERIT +#define traceTASK_PRIORITY_DISINHERIT( pxTask, uxNewPriority ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTask) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_PRIO_DISINHERIT, (uint32_t)pxTask, uxNewPriority); + +/* Called in vTaskResume */ +#undef traceTASK_RESUME +#define traceTASK_RESUME( pxTaskToResume ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTaskToResume) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_RESUME, (uint32_t)pxTaskToResume); + +/* Called in vTaskResumeFromISR */ +#undef traceTASK_RESUME_FROM_ISR +#define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTaskToResume) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_RESUME_FROMISR, (uint32_t)pxTaskToResume); + +#if (TRC_CFG_INCLUDE_MEMMANG_EVENTS == 1) + +extern uint32_t trcHeapCounter; + +#undef traceMALLOC +#define traceMALLOC( pvAddress, uiSize ) \ + if (pvAddress != 0) \ + { \ + trcHeapCounter += uiSize; \ + } \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + { \ + if (pvAddress != 0) \ + { \ + prvTraceStoreEvent2(PSF_EVENT_MALLOC, (uint32_t)pvAddress, uiSize); \ + } \ + else \ + { \ + prvTraceStoreEvent2(PSF_EVENT_MALLOC_FAILED, (uint32_t)pvAddress, uiSize); \ + } \ + } + +#undef traceFREE +#define traceFREE( pvAddress, uiSize ) \ + trcHeapCounter -= uiSize; \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_FREE, (uint32_t)pvAddress, (uint32_t)(0 - uiSize)); /* "0 -" instead of just "-" to get rid of a warning... */ + +#endif /* (TRC_CFG_INCLUDE_MEMMANG_EVENTS == 1) */ + +#if (TRC_CFG_INCLUDE_TIMER_EVENTS == 1) + +/* Called in timer.c - xTimerCreate */ +#undef traceTIMER_CREATE +#define traceTIMER_CREATE(tmr) \ + TRACE_SET_OBJECT_FILTER(TIMER, tmr, CurrentFilterGroup); \ + prvTraceSaveObjectSymbol(tmr, (const char*)tmr->pcTimerName); \ + prvTraceStoreStringEvent(1, PSF_EVENT_OBJ_NAME, (const char*)tmr->pcTimerName, tmr); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TIMER, tmr) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TIMER_CREATE, (uint32_t)tmr, tmr->xTimerPeriodInTicks); + +#undef traceTIMER_CREATE_FAILED +#define traceTIMER_CREATE_FAILED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent0(PSF_EVENT_TIMER_CREATE_FAILED); + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) +#define traceTIMER_COMMAND_SEND_8_0_CASES(tmr) \ + case tmrCOMMAND_RESET: \ + prvTraceStoreEvent2((xReturn == pdPASS) ? PSF_EVENT_TIMER_RESET : PSF_EVENT_TIMER_RESET_FAILED, (uint32_t)tmr, xOptionalValue); \ + break; \ + case tmrCOMMAND_START_FROM_ISR: \ + prvTraceStoreEvent2((xReturn == pdPASS) ? PSF_EVENT_TIMER_START_FROMISR : PSF_EVENT_TIMER_START_FROMISR_FAILED, (uint32_t)tmr, xOptionalValue); \ + break; \ + case tmrCOMMAND_RESET_FROM_ISR: \ + prvTraceStoreEvent2((xReturn == pdPASS) ? PSF_EVENT_TIMER_RESET_FROMISR : PSF_EVENT_TIMER_RESET_FROMISR_FAILED, (uint32_t)tmr, xOptionalValue); \ + break; \ + case tmrCOMMAND_STOP_FROM_ISR: \ + prvTraceStoreEvent2((xReturn == pdPASS) ? PSF_EVENT_TIMER_STOP_FROMISR : PSF_EVENT_TIMER_STOP_FROMISR_FAILED, (uint32_t)tmr, xOptionalValue); \ + break; \ + case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR: \ + prvTraceStoreEvent2((xReturn == pdPASS) ? PSF_EVENT_TIMER_CHANGEPERIOD_FROMISR : PSF_EVENT_TIMER_CHANGEPERIOD_FROMISR_FAILED, (uint32_t)tmr, xOptionalValue); \ + break; +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X */ +#define traceTIMER_COMMAND_SEND_8_0_CASES(tmr) +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X */ + +/* Note that xCommandID can never be tmrCOMMAND_EXECUTE_CALLBACK (-1) since the trace macro is not called in that case */ +#undef traceTIMER_COMMAND_SEND +#define traceTIMER_COMMAND_SEND(tmr, xCommandID, xOptionalValue, xReturn) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TIMER, tmr) & CurrentFilterMask) \ + switch(xCommandID) \ + { \ + case tmrCOMMAND_START: \ + prvTraceStoreEvent1((xReturn == pdPASS) ? PSF_EVENT_TIMER_START : PSF_EVENT_TIMER_START_FAILED, (uint32_t)tmr); \ + break; \ + case tmrCOMMAND_STOP: \ + prvTraceStoreEvent1((xReturn == pdPASS) ? PSF_EVENT_TIMER_STOP : PSF_EVENT_TIMER_STOP_FAILED, (uint32_t)tmr); \ + break; \ + case tmrCOMMAND_CHANGE_PERIOD: \ + prvTraceStoreEvent2((xReturn == pdPASS) ? PSF_EVENT_TIMER_CHANGEPERIOD : PSF_EVENT_TIMER_CHANGEPERIOD_FAILED, (uint32_t)tmr, xOptionalValue); \ + break; \ + case tmrCOMMAND_DELETE: \ + prvTraceStoreEvent1((xReturn == pdPASS) ? PSF_EVENT_TIMER_DELETE : PSF_EVENT_TIMER_DELETE_FAILED, (uint32_t)tmr); \ + break; \ + traceTIMER_COMMAND_SEND_8_0_CASES(tmr) \ + } + +#undef traceTIMER_EXPIRED +#define traceTIMER_EXPIRED(tmr) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TIMER, tmr) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TIMER_EXPIRED, (uint32_t)tmr->pxCallbackFunction, (uint32_t)tmr->pvTimerID); + +#endif /* #if (TRC_CFG_INCLUDE_TIMER_EVENTS == 1) */ + + +#if (TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS == 1) + +#undef tracePEND_FUNC_CALL +#define tracePEND_FUNC_CALL(func, arg1, arg2, ret) \ + prvTraceStoreEvent1((ret == pdPASS) ? PSF_EVENT_TIMER_PENDFUNCCALL : PSF_EVENT_TIMER_PENDFUNCCALL_FAILED, (uint32_t)func); + +#undef tracePEND_FUNC_CALL_FROM_ISR +#define tracePEND_FUNC_CALL_FROM_ISR(func, arg1, arg2, ret) \ + prvTraceStoreEvent1((ret == pdPASS) ? PSF_EVENT_TIMER_PENDFUNCCALL_FROMISR : PSF_EVENT_TIMER_PENDFUNCCALL_FROMISR_FAILED, (uint32_t)func); + +#endif /* (TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS == 1) */ + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) + +#undef traceEVENT_GROUP_CREATE +#define traceEVENT_GROUP_CREATE(eg) \ + TRACE_SET_OBJECT_FILTER(EVENTGROUP, eg, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_EVENTGROUP_CREATE, (uint32_t)eg); + +#undef traceEVENT_GROUP_DELETE +#define traceEVENT_GROUP_DELETE(eg) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_EVENTGROUP_DELETE, (uint32_t)eg); \ + prvTraceDeleteSymbol(eg); + +#undef traceEVENT_GROUP_CREATE_FAILED +#define traceEVENT_GROUP_CREATE_FAILED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent0(PSF_EVENT_EVENTGROUP_CREATE_FAILED); + +#undef traceEVENT_GROUP_SYNC_BLOCK +#define traceEVENT_GROUP_SYNC_BLOCK(eg, bitsToSet, bitsToWaitFor) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_EVENTGROUP_SYNC_BLOCK, (uint32_t)eg, bitsToWaitFor); + +#undef traceEVENT_GROUP_SYNC_END +#define traceEVENT_GROUP_SYNC_END(eg, bitsToSet, bitsToWaitFor, wasTimeout) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent2((wasTimeout != pdTRUE) ? PSF_EVENT_EVENTGROUP_SYNC : PSF_EVENT_EVENTGROUP_SYNC_FAILED, (uint32_t)eg, bitsToWaitFor); + +#undef traceEVENT_GROUP_WAIT_BITS_BLOCK +#define traceEVENT_GROUP_WAIT_BITS_BLOCK(eg, bitsToWaitFor) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_EVENTGROUP_WAITBITS_BLOCK, (uint32_t)eg, bitsToWaitFor); + +#undef traceEVENT_GROUP_WAIT_BITS_END +#define traceEVENT_GROUP_WAIT_BITS_END(eg, bitsToWaitFor, wasTimeout) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent2((wasTimeout != pdTRUE) ? PSF_EVENT_EVENTGROUP_WAITBITS : PSF_EVENT_EVENTGROUP_WAITBITS_FAILED, (uint32_t)eg, bitsToWaitFor); + +#undef traceEVENT_GROUP_CLEAR_BITS +#define traceEVENT_GROUP_CLEAR_BITS(eg, bitsToClear) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_EVENTGROUP_CLEARBITS, (uint32_t)eg, bitsToClear); + +#undef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR +#define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR(eg, bitsToClear) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_EVENTGROUP_CLEARBITS_FROMISR, (uint32_t)eg, bitsToClear); + +#undef traceEVENT_GROUP_SET_BITS +#define traceEVENT_GROUP_SET_BITS(eg, bitsToSet) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_EVENTGROUP_SETBITS, (uint32_t)eg, bitsToSet); + +#undef traceEVENT_GROUP_SET_BITS_FROM_ISR +#define traceEVENT_GROUP_SET_BITS_FROM_ISR(eg, bitsToSet) \ + if (TRACE_GET_OBJECT_FILTER(EVENTGROUP, eg) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_EVENTGROUP_SETBITS_FROMISR, (uint32_t)eg, bitsToSet); + +#endif /* (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) */ + +#undef traceTASK_NOTIFY_TAKE +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_TAKE(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask){ \ + if (pxCurrentTCB->ucNotifyState[index] == taskNOTIFICATION_RECEIVED) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_TAKE, (uint32_t)pxCurrentTCB, xTicksToWait); \ + else \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_TAKE_FAILED, (uint32_t)pxCurrentTCB, xTicksToWait);} +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0) +#define traceTASK_NOTIFY_TAKE() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask){ \ + if (pxCurrentTCB->ucNotifyState == taskNOTIFICATION_RECEIVED) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_TAKE, (uint32_t)pxCurrentTCB, xTicksToWait); \ + else \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_TAKE_FAILED, (uint32_t)pxCurrentTCB, xTicksToWait);} +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_TAKE() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask){ \ + if (pxCurrentTCB->eNotifyState == eNotified) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_TAKE, (uint32_t)pxCurrentTCB, xTicksToWait); \ + else \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_TAKE_FAILED, (uint32_t)pxCurrentTCB, xTicksToWait);} +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY_TAKE_BLOCK +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_TAKE_BLOCK(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_TAKE_BLOCK, (uint32_t)pxCurrentTCB, xTicksToWait); +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_TAKE_BLOCK() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_TAKE_BLOCK, (uint32_t)pxCurrentTCB, xTicksToWait); +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY_WAIT +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_WAIT(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask){ \ + if (pxCurrentTCB->ucNotifyState[index] == taskNOTIFICATION_RECEIVED) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_WAIT, (uint32_t)pxCurrentTCB, xTicksToWait); \ + else \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_WAIT_FAILED, (uint32_t)pxCurrentTCB, xTicksToWait);} +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0) +#define traceTASK_NOTIFY_WAIT() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask){ \ + if (pxCurrentTCB->ucNotifyState == taskNOTIFICATION_RECEIVED) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_WAIT, (uint32_t)pxCurrentTCB, xTicksToWait); \ + else \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_WAIT_FAILED, (uint32_t)pxCurrentTCB, xTicksToWait);} +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_WAIT() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask){ \ + if (pxCurrentTCB->eNotifyState == eNotified) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_WAIT, (uint32_t)pxCurrentTCB, xTicksToWait); \ + else \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_WAIT_FAILED, (uint32_t)pxCurrentTCB, xTicksToWait);} +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY_WAIT_BLOCK +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_WAIT_BLOCK(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_WAIT_BLOCK, (uint32_t)pxCurrentTCB, xTicksToWait); +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_WAIT_BLOCK() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(PSF_EVENT_TASK_NOTIFY_WAIT_BLOCK, (uint32_t)pxCurrentTCB, xTicksToWait); +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_NOTIFY, (uint32_t)xTaskToNotify); +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_NOTIFY, (uint32_t)xTaskToNotify); +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY_FROM_ISR +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_FROM_ISR(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_NOTIFY_FROM_ISR, (uint32_t)xTaskToNotify); +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_FROM_ISR() \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_NOTIFY_FROM_ISR, (uint32_t)xTaskToNotify); +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceTASK_NOTIFY_GIVE_FROM_ISR +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) +#define traceTASK_NOTIFY_GIVE_FROM_ISR(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_NOTIFY_GIVE_FROM_ISR, (uint32_t)xTaskToNotify); +#else /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ +#define traceTASK_NOTIFY_GIVE_FROM_ISR() \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreEvent1(PSF_EVENT_TASK_NOTIFY_GIVE_FROM_ISR, (uint32_t)xTaskToNotify); +#endif /* TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0 */ + +#undef traceQUEUE_REGISTRY_ADD +#define traceQUEUE_REGISTRY_ADD(object, name) \ + prvTraceSaveObjectSymbol(object, (const char*)name); \ + prvTraceStoreStringEvent(1, PSF_EVENT_OBJ_NAME, name, object); + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) + +#undef traceSTREAM_BUFFER_CREATE +#define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ) \ + TRACE_SET_OBJECT_FILTER(STREAMBUFFER, pxStreamBuffer, CurrentFilterGroup); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, pxStreamBuffer) & CurrentFilterMask) \ + prvTraceStoreEvent2(xIsMessageBuffer == 1 ? PSF_EVENT_MESSAGEBUFFER_CREATE : PSF_EVENT_STREAMBUFFER_CREATE, (uint32_t)pxStreamBuffer, xBufferSizeBytes); + +#undef traceSTREAM_BUFFER_CREATE_FAILED +#define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreEvent2(xIsMessageBuffer == 1 ? PSF_EVENT_MESSAGEBUFFER_CREATE_FAILED : PSF_EVENT_STREAMBUFFER_CREATE_FAILED, 0 , xBufferSizeBytes); + +#undef traceSTREAM_BUFFER_CREATE_STATIC_FAILED +#define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer ) \ + traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) + +#undef traceSTREAM_BUFFER_DELETE +#define traceSTREAM_BUFFER_DELETE( xStreamBuffer ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, pxStreamBuffer) & CurrentFilterMask) \ + prvTraceStoreEvent2(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_DELETE : PSF_EVENT_STREAMBUFFER_DELETE, (uint32_t)xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); \ + prvTraceDeleteSymbol(xStreamBuffer); + +#undef traceSTREAM_BUFFER_RESET +#define traceSTREAM_BUFFER_RESET( xStreamBuffer ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, xStreamBuffer) & CurrentFilterMask) \ + prvTraceStoreEvent2(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RESET : PSF_EVENT_STREAMBUFFER_RESET, (uint32_t)xStreamBuffer, 0); + +#undef traceSTREAM_BUFFER_SEND +#define traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, xStreamBuffer) & CurrentFilterMask) \ + prvTraceStoreEvent2(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND : PSF_EVENT_STREAMBUFFER_SEND, (uint32_t)xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); + +#undef traceBLOCKING_ON_STREAM_BUFFER_SEND +#define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, xStreamBuffer) & CurrentFilterMask) \ + prvTraceStoreEvent1(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND_BLOCK : PSF_EVENT_STREAMBUFFER_SEND_BLOCK, (uint32_t)xStreamBuffer); + +#undef traceSTREAM_BUFFER_SEND_FAILED +#define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, xStreamBuffer) & CurrentFilterMask) \ + prvTraceStoreEvent1(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND_FAILED : PSF_EVENT_STREAMBUFFER_SEND_FAILED, (uint32_t)xStreamBuffer); + +#undef traceSTREAM_BUFFER_RECEIVE +#define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, xStreamBuffer) & CurrentFilterMask) \ + prvTraceStoreEvent2(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE: PSF_EVENT_STREAMBUFFER_RECEIVE, (uint32_t)xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); + +#undef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE +#define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, xStreamBuffer) & CurrentFilterMask) \ + prvTraceStoreEvent1(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE_BLOCK: PSF_EVENT_STREAMBUFFER_RECEIVE_BLOCK, (uint32_t)xStreamBuffer); + +#undef traceSTREAM_BUFFER_RECEIVE_FAILED +#define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, xStreamBuffer) & CurrentFilterMask) \ + prvTraceStoreEvent1(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE_FAILED: PSF_EVENT_STREAMBUFFER_RECEIVE_FAILED, (uint32_t)xStreamBuffer); + +#undef traceSTREAM_BUFFER_SEND_FROM_ISR +#define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xReturn ) \ + if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, xStreamBuffer) & CurrentFilterMask) \ + { \ + if ( xReturn > ( size_t ) 0 ) \ + { \ + prvTraceStoreEvent2(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND_FROM_ISR : PSF_EVENT_STREAMBUFFER_SEND_FROM_ISR, (uint32_t)xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); \ + } \ + else \ + { \ + prvTraceStoreEvent1(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND_FROM_ISR_FAILED : PSF_EVENT_STREAMBUFFER_SEND_FROM_ISR_FAILED, (uint32_t)xStreamBuffer); \ + } \ + } + +#undef traceSTREAM_BUFFER_RECEIVE_FROM_ISR +#define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ) \ +if (TRACE_GET_OBJECT_FILTER(STREAMBUFFER, xStreamBuffer) & CurrentFilterMask) \ + { \ + if ( xReceivedLength > ( size_t ) 0 ) \ + { \ + prvTraceStoreEvent2(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE_FROM_ISR : PSF_EVENT_STREAMBUFFER_RECEIVE_FROM_ISR, (uint32_t)xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); \ + } \ + else \ + { \ + prvTraceStoreEvent1(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE_FROM_ISR_FAILED : PSF_EVENT_STREAMBUFFER_RECEIVE_FROM_ISR_FAILED, (uint32_t)xStreamBuffer); \ + } \ + } + +#endif /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) */ + +#endif /* (TRC_CFG_SCHEDULING_ONLY == 0) */ + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#else /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +/* When recorder is disabled */ +#define vTraceSetQueueName(object, name) +#define vTraceSetSemaphoreName(object, name) +#define vTraceSetMutexName(object, name) +#define vTraceSetEventGroupName(object, name) +#define vTraceSetStreamBufferName(object, name) +#define vTraceSetMessageBufferName(object, name) + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_KERNEL_PORT_H */ diff --git a/Tracealyzer/include/trcPortDefines.h b/Tracealyzer/include/trcPortDefines.h new file mode 100644 index 00000000..99a2fbf5 --- /dev/null +++ b/Tracealyzer/include/trcPortDefines.h @@ -0,0 +1,138 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcPortDefines.h + * + * Some common defines for the trace recorder. + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef TRC_PORTDEFINES_H +#define TRC_PORTDEFINES_H + +#define TRC_FREE_RUNNING_32BIT_INCR 1 +#define TRC_FREE_RUNNING_32BIT_DECR 2 +#define TRC_OS_TIMER_INCR 3 +#define TRC_OS_TIMER_DECR 4 +#define TRC_CUSTOM_TIMER_INCR 5 +#define TRC_CUSTOM_TIMER_DECR 6 + +/* Start options for vTraceEnable. */ +#define TRC_INIT 0 +#define TRC_START 1 +#define TRC_START_AWAIT_HOST 2 + +/* Command codes for TzCtrl task */ +#define CMD_SET_ACTIVE 1 /* Start (param1 = 1) or Stop (param1 = 0) */ + +/* The final command code, used to validate commands. */ +#define CMD_LAST_COMMAND 1 + +#define TRC_RECORDER_MODE_SNAPSHOT 0 +#define TRC_RECORDER_MODE_STREAMING 1 + +#define TRC_RECORDER_BUFFER_ALLOCATION_STATIC (0x00) +#define TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC (0x01) +#define TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM (0x02) + +/* Filter Groups */ +#define FilterGroup0 (uint16_t)0x0001 +#define FilterGroup1 (uint16_t)0x0002 +#define FilterGroup2 (uint16_t)0x0004 +#define FilterGroup3 (uint16_t)0x0008 +#define FilterGroup4 (uint16_t)0x0010 +#define FilterGroup5 (uint16_t)0x0020 +#define FilterGroup6 (uint16_t)0x0040 +#define FilterGroup7 (uint16_t)0x0080 +#define FilterGroup8 (uint16_t)0x0100 +#define FilterGroup9 (uint16_t)0x0200 +#define FilterGroup10 (uint16_t)0x0400 +#define FilterGroup11 (uint16_t)0x0800 +#define FilterGroup12 (uint16_t)0x1000 +#define FilterGroup13 (uint16_t)0x2000 +#define FilterGroup14 (uint16_t)0x4000 +#define FilterGroup15 (uint16_t)0x8000 + +/****************************************************************************** + * Supported ports + * + * TRC_HARDWARE_PORT_HWIndependent + * A hardware independent fallback option for event timestamping. Provides low + * resolution timestamps based on the OS tick. + * This may be used on the Win32 port, but may also be used on embedded hardware + * platforms. All time durations will be truncated to the OS tick frequency, + * typically 1 KHz. This means that a task or ISR that executes in less than + * 1 ms get an execution time of zero. + * + * TRC_HARDWARE_PORT_APPLICATION_DEFINED + * Allows for defining the port macros in other source code files. + * + * TRC_HARDWARE_PORT_Win32 + * "Accurate" timestamping based on the Windows performance counter for Win32 + * builds. Note that this gives the host machine time, not the kernel time. + * + * Hardware specific ports + * To get accurate timestamping, a hardware timer is necessary. Below are the + * available ports. Some of these are "unofficial", meaning that + * they have not yet been verified by Percepio but have been contributed by + * external developers. They should work, otherwise let us know by emailing + * support@percepio.com. Some work on any OS platform, while other are specific + * to a certain operating system. + *****************************************************************************/ + +/****** Port Name ************************************* Code ** Official ** OS Platform *********/ +#define TRC_HARDWARE_PORT_APPLICATION_DEFINED 98 /* - - */ +#define TRC_HARDWARE_PORT_NOT_SET 99 /* - - */ +#define TRC_HARDWARE_PORT_HWIndependent 0 /* Yes Any */ +#define TRC_HARDWARE_PORT_Win32 1 /* Yes FreeRTOS on Win32 */ +#define TRC_HARDWARE_PORT_Atmel_AT91SAM7 2 /* No Any */ +#define TRC_HARDWARE_PORT_Atmel_UC3A0 3 /* No Any */ +#define TRC_HARDWARE_PORT_ARM_Cortex_M 4 /* Yes Any */ +#define TRC_HARDWARE_PORT_Renesas_RX600 6 /* Yes Any */ +#define TRC_HARDWARE_PORT_MICROCHIP_PIC24_PIC32 7 /* Yes Any */ +#define TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_TMS570_RM48 8 /* Yes Any */ +#define TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_MSP430 9 /* No Any */ +#define TRC_HARDWARE_PORT_XILINX_PPC405 11 /* No FreeRTOS */ +#define TRC_HARDWARE_PORT_XILINX_PPC440 12 /* No FreeRTOS */ +#define TRC_HARDWARE_PORT_XILINX_MICROBLAZE 13 /* No Any */ +#define TRC_HARDWARE_PORT_XILINX_ZyncUltraScaleR5 14 /* No FreeRTOS */ +#define TRC_HARDWARE_PORT_NXP_LPC210X 15 /* No Any */ +#define TRC_HARDWARE_PORT_ARM_CORTEX_A9 16 /* Yes Any */ +#define TRC_HARDWARE_PORT_POWERPC_Z4 17 /* No FreeRTOS */ +#define TRC_HARDWARE_PORT_Altera_NiosII 18 /* Yes Any (Tested with FreeRTOS) */ +#endif /*TRC_PORTDEFINES_H*/ diff --git a/Tracealyzer/include/trcRecorder.h b/Tracealyzer/include/trcRecorder.h new file mode 100644 index 00000000..3d4f3d63 --- /dev/null +++ b/Tracealyzer/include/trcRecorder.h @@ -0,0 +1,1905 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcRecorder.h + * + * The public API of the trace recorder. + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#ifndef TRC_RECORDER_H +#define TRC_RECORDER_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +#define TRC_ACKNOWLEDGED (0xABC99123) + +#include "trcConfig.h" +#include "trcPortDefines.h" + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + +typedef uint16_t traceString; +typedef uint8_t traceUBChannel; +typedef uint8_t traceObjectClass; + +#if (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) +typedef uint16_t traceHandle; +#else /* (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) */ +typedef uint8_t traceHandle; +#endif /* (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) */ + +#include "trcHardwarePort.h" +#include "trcKernelPort.h" + +/* Not yet available in snapshot mode */ +#define vTraceConsoleChannelPrintF(fmt, ...) (void)(fmt) +#define prvTraceStoreEvent0(...) +#define prvTraceStoreEvent1(...) +#define prvTraceStoreEvent2(...) +#define prvTraceStoreEvent3(...) +#define prvTraceStoreEvent(...) +#define prvTraceStoreStringEvent(...) + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) */ + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +typedef const char* traceString; +typedef const void* traceHandle; + +#include "trcHardwarePort.h" +#include "trcStreamingPort.h" +#include "trcKernelPort.h" + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#define TRC_STATE_IN_STARTUP 0 +#define TRC_STATE_IN_TASKSWITCH 1 +#define TRC_STATE_IN_APPLICATION 2 + +/* The user event channel for recorder warnings, must be defined in trcKernelPort.c */ +extern traceString trcWarningChannel; + +#define TRACE_GET_LOW16(value) ((uint16_t)((value) & 0x0000FFFF)) +#define TRACE_GET_HIGH16(value) ((uint16_t)(((value) >> 16) & 0x0000FFFF)) +#define TRACE_SET_LOW16(current, value) (((current) & 0xFFFF0000) | (value)) +#define TRACE_SET_HIGH16(current, value) (((current) & 0x0000FFFF) | (((uint32_t)(value)) << 16)) + +/******************************************************************************/ +/*** Common API - both Snapshot and Streaming mode ****************************/ +/******************************************************************************/ + +/****************************************************************************** +* vTraceEnable(int startOption); +* +* Initializes and optionally starts the trace, depending on the start option. +* To use the trace recorder, the startup must call vTraceEnable before any RTOS +* calls are made (including "create" calls). Three start options are provided: +* +* TRC_START: Starts the tracing directly. In snapshot mode this allows for +* starting the trace at any point in your code, assuming vTraceEnable(TRC_INIT) +* has been called in the startup. +* Can also be used for streaming without Tracealyzer control, e.g. to a local +* flash file system (assuming such a "stream port", see trcStreamingPort.h). +* +* TRC_START_AWAIT_HOST: For streaming mode only. Initializes the trace recorder +* if necessary and waits for a Start command from Tracealyzer ("Start Recording" +* button). This call is intentionally blocking! By calling vTraceEnable with +* this option from the startup code, you start tracing at this point and capture +* the early events. +* +* TRC_INIT: Initializes the trace recorder, but does not start the tracing. +* In snapshot mode, this must be followed by a vTraceEnable(TRC_START) sometime +* later. +* +* Usage examples: +* +* Snapshot trace, from startup: +* +* vTraceEnable(TRC_START); +* +* +* Snapshot trace, from a later point: +* +* vTraceEnable(TRC_INIT); +* +* ... +* vTraceEnable(TRC_START); // e.g., in task context, at some relevant event +* +* Streaming trace, from startup: +* +* vTraceEnable(TRC_START_AWAIT_HOST); // Blocks! +* +* +* Streaming trace, from a later point: +* +* vTraceEnable(TRC_INIT); +* +* +******************************************************************************/ +void vTraceEnable(int startOption); + +/****************************************************************************** + * vTracePrintF + * + * Generates "User Events", with formatted text and data, similar to a "printf". + * User Events can be used for very efficient logging from your application code. + * It is very fast since the actual string formatting is done on the host side, + * when the trace is displayed. The execution time is just some microseconds on + * a 32-bit MCU. + * + * User Events are shown as yellow labels in the main trace view of $PNAME. + * + * An advantage of User Events is that data can be plotted in the "User Event + * Signal Plot" view, visualizing any data you log as User Events, discrete + * states or control system signals (e.g. system inputs or outputs). + * + * You may group User Events into User Event Channels. The yellow User Event + * labels show the logged string, preceded by the channel name within brackets. + * + * Example: + * + * "[MyChannel] Hello World!" + * + * The User Event Channels are shown in the View Filter, which makes it easy to + * select what User Events you wish to display. User Event Channels are created + * using xTraceRegisterString(). + * + * Example: + * + * traceString adc_uechannel = xTraceRegisterString("ADC User Events"); + * ... + * vTracePrintF(adc_uechannel, + * "ADC channel %d: %d volts", + * ch, adc_reading); + * + * The following format specifiers are supported in both modes: + * %d - signed integer. + * %u - unsigned integer. + * %X - hexadecimal, uppercase. + * %x - hexadecimal, lowercase. + * %s - string (see comment below) + * + * For integer formats (%d, %u, %x, %X) you may also use width and padding. + * If using -42 as data argument, two examples are: + * "%05d" -> "-0042" + * "%5d" -> " -42". + * + * String arguments are supported in both snapshot and streaming, but in streaming + * mode you need to use xTraceRegisterString and use the returned traceString as + * the argument. In snapshot you simply provide a char* as argument. + * + * Snapshot: vTracePrintF(myChn, "my string: %s", str); + * Streaming: vTracePrintF(myChn, "my string: %s", xTraceRegisterString(str)); + * + * In snapshot mode you can specify 8-bit or 16-bit arguments to reduce RAM usage: + * %hd -> 16 bit (h) signed integer (d). + * %bu -> 8 bit (b) unsigned integer (u). + * + * However, in streaming mode all data arguments are assumed to be 32 bit wide. + * Width specifiers (e.g. %hd) are accepted but ignored (%hd treated like %d). + * + * The maximum event size also differs between the modes. In streaming this is + * limited by a maximum payload size of 52 bytes, including format string and + * data arguments. So if using one data argument, the format string is limited + * to 48 byte, etc. If this is exceeded, the format string is truncated and you + * get a warning in Tracealyzer. + * + * In snapshot mode you are limited to maximum 15 arguments, that must not exceed + * 32 bytes in total (not counting the format string). If exceeded, the recorder + * logs an internal error (displayed when opening the trace) and stops recording. + ******************************************************************************/ +#if (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) +void vTracePrintF(traceString chn, const char* fmt, ...); +#else +#define vTracePrintF(chn, fmt, ...) (void)(chn), (void)(fmt) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#endif + +/****************************************************************************** + * vTraceVPrintF + * + * vTracePrintF variant that accepts a va_list. + * See vTracePrintF documentation for further details. + * + ******************************************************************************/ +#if (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) +void vTraceVPrintF(traceString eventLabel, const char* formatStr, va_list vl); +#else +#define vTraceVPrintF(chn, formatStr, vl) (void)(chn), (void)(formatStr), (void)(vl) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#endif + +/****************************************************************************** +* vTracePrint +* +* A faster version of vTracePrintF, that only allows for logging a string. +* +* Example: +* +* traceString chn = xTraceRegisterString("MyChannel"); +* ... +* vTracePrint(chn, "Hello World!"); +******************************************************************************/ +#if (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) +void vTracePrint(traceString chn, const char* str); +#else +#define vTracePrint(chn, str) (void)(chn), (void)(str) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#endif + + +/******************************************************************************* +* vTraceConsoleChannelPrintF +* +* Wrapper for vTracePrint, using the default channel. Can be used as a drop-in +* replacement for printf and similar functions, e.g. in a debug logging macro. +* +* Example: +* +* // Old: #define LogString debug_console_printf +* +* // New, log to Tracealyzer instead: +* #define LogString vTraceConsoleChannelPrintF +* ... +* LogString("My value is: %d", myValue); +******************************************************************************/ +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) +void vTraceConsoleChannelPrintF(const char* fmt, ...); +#endif + +/******************************************************************************* +* xTraceRegisterString +* +* Register strings in the recorder, e.g. for names of user event channels. +* +* Example: +* myEventHandle = xTraceRegisterString("MyUserEvent"); +* ... +* vTracePrintF(myEventHandle, "My value is: %d", myValue); +******************************************************************************/ +#if (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) +traceString xTraceRegisterString(const char* name); +#else +#define xTraceRegisterString(x) ((void)(x), (traceString)0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ +#endif + +/******************************************************************************* + * vTraceSet...Name(void* object, const char* name) + * + * Parameter object: pointer to the kernel object that shall be named + * Parameter name: the name to set + * + * Kernel-specific functions for setting names of kernel objects, for display in + * Tracealyzer. + ******************************************************************************/ +/* See trcKernelPort.h for details (kernel-specific) */ + +/******************************************************************************* + * xTraceSetISRProperties + * + * Stores a name and priority level for an Interrupt Service Routine, to allow + * for better visualization. Returns a traceHandle used by vTraceStoreISRBegin. + * + * Example: + * #define PRIO_ISR_TIMER1 3 // the hardware priority of the interrupt + * ... + * traceHandle Timer1Handle = xTraceSetISRProperties("ISRTimer1", PRIO_ISR_TIMER1); + * ... + * void ISR_handler() + * { + * vTraceStoreISRBegin(Timer1Handle); + * ... + * vTraceStoreISREnd(0); + * } + ******************************************************************************/ +traceHandle xTraceSetISRProperties(const char* name, uint8_t priority); + +/******************************************************************************* + * vTraceStoreISRBegin + * + * Registers the beginning of an Interrupt Service Routine, using a traceHandle + * provided by xTraceSetISRProperties. + * + * Example: + * #define PRIO_ISR_TIMER1 3 // the hardware priority of the interrupt + * ... + * traceHandle Timer1Handle = xTraceSetISRProperties("ISRTimer1", PRIO_ISR_TIMER1); + * ... + * void ISR_handler() + * { + * vTraceStoreISRBegin(Timer1Handle); + * ... + * vTraceStoreISREnd(0); + * } + ******************************************************************************/ +void vTraceStoreISRBegin(traceHandle handle); + +/******************************************************************************* + * vTraceStoreISREnd + * + * Registers the end of an Interrupt Service Routine. + * + * The parameter pendingISR indicates if the interrupt has requested a + * task-switch (= 1), e.g., by signaling a semaphore. Otherwise (= 0) the + * interrupt is assumed to return to the previous context. + * + * Example: + * #define PRIO_OF_ISR_TIMER1 3 // the hardware priority of the interrupt + * traceHandle traceHandleIsrTimer1 = 0; // The ID set by the recorder + * ... + * traceHandleIsrTimer1 = xTraceSetISRProperties("ISRTimer1", PRIO_OF_ISR_TIMER1); + * ... + * void ISR_handler() + * { + * vTraceStoreISRBegin(traceHandleIsrTimer1); + * ... + * vTraceStoreISREnd(0); + * } + ******************************************************************************/ +void vTraceStoreISREnd(int isTaskSwitchRequired); + +/******************************************************************************* + * vTraceInstanceFinishNow + * + * Creates an event that ends the current task instance at this very instant. + * This makes the viewer to splits the current fragment at this point and begin + * a new actor instance, even if no task-switch has occurred. + *****************************************************************************/ +void vTraceInstanceFinishedNow(void); + +/******************************************************************************* + * vTraceInstanceFinishedNext + * + * Marks the current "task instance" as finished on the next kernel call. + * + * If that kernel call is blocking, the instance ends after the blocking event + * and the corresponding return event is then the start of the next instance. + * If the kernel call is not blocking, the viewer instead splits the current + * fragment right before the kernel call, which makes this call the first event + * of the next instance. + *****************************************************************************/ +void vTraceInstanceFinishedNext(void); + +/******************************************************************************* + * xTraceGetLastError + * + * Returns the last error or warning as a string, or NULL if none. + *****************************************************************************/ +const char* xTraceGetLastError(void); + +/******************************************************************************* + * vTraceClearError + * + * Clears any errors. + *****************************************************************************/ +void vTraceClearError(void); + +/******************************************************************************* +* vTraceStop +* +* Stops the recording. Intended for snapshot mode or if streaming without +* Tracealyzer control (e.g., to a device file system). +******************************************************************************/ +void vTraceStop(void); + +/****************************************************************************** +* vTraceSetFrequency +* +* Registers the clock rate of the time source for the event timestamping. +* This is normally not required, but if the default value (TRC_HWTC_FREQ_HZ) +* should be incorrect for your setup, you can override it using this function. +* +* Must be called prior to vTraceEnable, and the time source is assumed to +* have a fixed clock frequency after the startup. +* +* Note that, in snapshot mode, the value is divided by the TRC_HWTC_DIVISOR. +* This is a software "prescaler" that is also applied on the timestamps. +*****************************************************************************/ +void vTraceSetFrequency(uint32_t frequency); + +/******************************************************************************* +* vTraceSetRecorderDataBuffer +* +* The trcConfig.h setting TRC_CFG_RECORDER_BUFFER_ALLOCATION allows for selecting +* custom allocation (TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM), which allows you to +* control where the recorder trace buffer is allocated. +* +* When custom allocation is selected, use TRC_ALLOC_CUSTOM_BUFFER to make the +* allocation (in global context) and then call vTraceSetRecorderDataBuffer to +* register the allocated buffer. This supports both snapshot and streaming, +* and has no effect if using other allocation modes than CUSTOM. +* +* NOTE: vTraceSetRecorderDataBuffer must be called before vTraceEnable. +******************************************************************************/ +#if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM) +void vTraceSetRecorderDataBuffer(void* pRecorderData); +#else +#define vTraceSetRecorderDataBuffer(pRecorderData) /* If not CUSTOM, pRecorderData will be an undefined symbol (same as in TRC_ALLOC_CUSTOM_BUFFER), so no (void) here */ +#endif + + +/******************************************************************************* +* TRC_ALLOC_CUSTOM_BUFFER +* +* If using custom allocation of the trace buffer (i.e., your trcConfig.h has the +* setting TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM), this macro allows you to declare +* the trace buffer in a portable way that works both in snapshot and streaming. +* +* This macro has no effect if using another allocation mode, so you can easily +* switch between different recording modes and configurations, using the same +* initialization code. +* +* This translates to a single static allocation, on which you can apply linker +* directives to place it in a particular memory region. +* +* - Snapshot mode: "RecorderDataType " +* +* - Streaming mode: "char []", +* where is defined in trcStreamingConfig.h. +* +* Example: +* +* // GCC example: place myTraceBuffer in section .tz, defined in the .ld file. +* TRC_ALLOC_CUSTOM_BUFFER(myTraceBuffer) __attribute__((section(".tz"))); +* +* int main(void) +* { +* ... +* vTraceSetRecorderDataBuffer(&myTraceBuffer); // Note the "&" +* ... +* vTraceEnable(TRC_INIT); // Initialize the data structure +******************************************************************************/ +#if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM) + #if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + #define TRC_ALLOC_CUSTOM_BUFFER(bufname) RecorderDataType bufname; + #elif (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + #ifdef TRC_CFG_RTT_BUFFER_SIZE_UP /* J-Link RTT */ + #define TRC_ALLOC_CUSTOM_BUFFER(bufname) char bufname [TRC_CFG_RTT_BUFFER_SIZE_UP]; /* Not static in this case, since declared in user code */ + #else + #define TRC_ALLOC_CUSTOM_BUFFER(bufname) char bufname [(TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT) * (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE)]; + #endif + #endif +#else + #define TRC_ALLOC_CUSTOM_BUFFER(bufname) /* If not CUSTOM, bufname will be an undefined symbol (same as in vTraceSetRecorderDataBuffer), so no (void) here */ +#endif + +/****************************************************************************** +* xTraceIsRecordingEnabled +* +* Returns true (1) if the recorder is enabled (i.e. is recording), otherwise 0. +******************************************************************************/ +int xTraceIsRecordingEnabled(void); + +/******************************************************************************* +* vTraceSetFilterGroup +* +* Sets the "filter group" to assign when creating RTOS objects, such as tasks, +* queues, semaphores and mutexes. This together with vTraceSetFilterMask +* allows you to control what events that are recorded, based on the +* objects they refer to. +* +* There are 16 filter groups named FilterGroup0 .. FilterGroup15. +* +* Note: We don't recommend filtering out the Idle task, so make sure to call +* vTraceSetFilterGroup just before initializing the RTOS, in order to assign +* such "default" objects to the right Filter Group (typically group 0). +* +* Example: +* +* // Assign tasks T1 to FilterGroup0 (default) +* +* +* // Assign Q1 and Q2 to FilterGroup1 +* vTraceSetFilterGroup(FilterGroup1); +* +* +* +* // Assigns Q3 to FilterGroup2 +* vTraceSetFilterGroup(FilterGroup2); +* +* +* // Only include FilterGroup0 and FilterGroup2, exclude FilterGroup1 (Q1 and Q2) from the trace +* vTraceSetFilterMask( FilterGroup0 | FilterGroup2 ); +* +* // Assign the default RTOS objects (e.g. Idle task) to FilterGroup0 +* vTraceSetFilterGroup(FilterGroup0); +* +* +* Note that you may define your own names for the filter groups using +* preprocessor definitions, to make the code easier to understand. +* +* Example: +* +* #define BASE FilterGroup0 +* #define USB_EVENTS FilterGroup1 +* #define CAN_EVENTS FilterGroup2 +* +* Note that filtering per event type (regardless of object) is also available +* in trcConfig.h. +******************************************************************************/ +void vTraceSetFilterGroup(uint16_t filterGroup); + +/****************************************************************************** +* vTraceSetFilterMask +* +* Sets the "filter mask" that is used to filter the events by object. This can +* be used to reduce the trace data rate, i.e., if your streaming interface is +* a bottleneck or if you want longer snapshot traces without increasing the +* buffer size. +* +* Note: There are two kinds of filters in the recorder. The other filter type +* excludes all events of certain kinds (e.g., OS ticks). See trcConfig.h. +* +* The filtering is based on bitwise AND with the Filter Group ID, assigned +* to RTOS objects such as tasks, queues, semaphores and mutexes. +* This together with vTraceSetFilterGroup allows you to control what +* events that are recorded, based on the objects they refer to. +* +* See example for vTraceSetFilterGroup. +******************************************************************************/ +void vTraceSetFilterMask(uint16_t filterMask); + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + +/******************************************************************************/ +/*** Extended API for Snapshot mode *******************************************/ +/******************************************************************************/ + +/****************************************************************************** +* TRACE_STOP_HOOK - Hook Pointer Data Type +* +* Declares a data type for a call back function that will be invoked whenever +* the recorder is stopped. +* +* Snapshot mode only! +******************************************************************************/ +typedef void(*TRACE_STOP_HOOK)(void); + +/******************************************************************************* +* vTraceStopHookPtr +* +* Points to a call back function that is called from vTraceStop(). +* +* Snapshot mode only! +******************************************************************************/ +extern TRACE_STOP_HOOK vTraceStopHookPtr; + +/******************************************************************************* +* vTraceSetStopHook +* +* Sets a function to be called when the recorder is stopped. +* +* Snapshot mode only! +******************************************************************************/ +void vTraceSetStopHook(TRACE_STOP_HOOK stopHookFunction); + +/******************************************************************************* +* uiTraceStart +* +* [DEPRECATED] Use vTraceEnable instead. +* +* Starts the recorder. The recorder will not be started if an error has been +* indicated using prvTraceError, e.g. if any of the Nx constants in +* trcSnapshotConfig.h has a too small value (TRC_CFG_NTASK, TRC_CFG_NQUEUE, etc). +* +* Returns 1 if the recorder was started successfully. +* Returns 0 if the recorder start was prevented due to a previous internal +* error. In that case, check xTraceGetLastError to get the error message. +* Any error message is also presented when opening a trace file. +* +* Snapshot mode only! +******************************************************************************/ +uint32_t uiTraceStart(void); + +/******************************************************************************* +* vTraceStart +* +* [DEPRECATED] Use vTraceEnable instead. +* +* Starts the recorder. The recorder will not be started if an error has been +* indicated using prvTraceError, e.g. if any of the Nx constants in +* trcSnapshotConfig.h has a too small value (TRC_CFG_NTASK, TRC_CFG_NQUEUE, etc). +* +* Snapshot mode only! +******************************************************************************/ +void vTraceStart(void); + +/******************************************************************************* +* vTraceClear +* +* Resets the recorder. Only necessary if a restart is desired - this is not +* needed in the startup initialization. +* +* Snapshot mode only! +******************************************************************************/ +void vTraceClear(void); + + +/*****************************************************************************/ +/*** INTERNAL SNAPSHOT FUNCTIONS *********************************************/ +/*****************************************************************************/ + +#define TRC_UNUSED + +#ifndef TRC_CFG_INCLUDE_OBJECT_DELETE +#define TRC_CFG_INCLUDE_OBJECT_DELETE 0 +#endif + +#ifndef TRC_CFG_INCLUDE_READY_EVENTS +#define TRC_CFG_INCLUDE_READY_EVENTS 1 +#endif + +#ifndef TRC_CFG_INCLUDE_OSTICK_EVENTS +#define TRC_CFG_INCLUDE_OSTICK_EVENTS 0 +#endif + +/* This macro will create a task in the object table */ +#undef trcKERNEL_HOOKS_TASK_CREATE +#define trcKERNEL_HOOKS_TASK_CREATE(SERVICE, CLASS, pxTCB) \ + TRACE_SET_OBJECT_NUMBER(TASK, pxTCB); \ + TRACE_SET_OBJECT_FILTER(TASK, pxTCB, CurrentFilterGroup); \ + prvTraceSetObjectName(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_GET_TASK_NAME(pxTCB)); \ + prvTraceSetPriorityProperty(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_GET_TASK_PRIORITY(pxTCB)); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); + +/* This macro will remove the task and store it in the event buffer */ +#undef trcKERNEL_HOOKS_TASK_DELETE +#define trcKERNEL_HOOKS_TASK_DELETE(SERVICE, SERVICE_NAME, SERVICE_PROP, pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); \ + prvTraceStoreObjectNameOnCloseEvent(SERVICE_NAME, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_CLASS_TASK); \ + prvTraceStoreObjectPropertiesOnCloseEvent(SERVICE_PROP, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_CLASS_TASK); \ + prvTraceSetPriorityProperty(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_GET_TASK_PRIORITY(pxTCB)); \ + prvTraceSetObjectState(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), TASK_STATE_INSTANCE_NOT_ACTIVE); \ + prvTraceFreeObjectHandle(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); + + +/* This macro will setup a task in the object table */ +#undef trcKERNEL_HOOKS_OBJECT_CREATE +#define trcKERNEL_HOOKS_OBJECT_CREATE(SERVICE, CLASS, pxObject)\ + TRACE_SET_OBJECT_NUMBER(CLASS, pxObject);\ + TRACE_SET_OBJECT_FILTER(CLASS, pxObject, CurrentFilterGroup); \ + prvMarkObjectAsUsed(TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject));\ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); \ + prvTraceSetObjectState(TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), 0); + +/* This macro will remove the object and store it in the event buffer */ +#undef trcKERNEL_HOOKS_OBJECT_DELETE +#define trcKERNEL_HOOKS_OBJECT_DELETE(SERVICE, SERVICE_NAME, SERVICE_PROP, CLASS, pxObject) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); \ + prvTraceStoreObjectNameOnCloseEvent(SERVICE_NAME, TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject)); \ + prvTraceStoreObjectPropertiesOnCloseEvent(SERVICE_PROP, TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject)); \ + prvTraceFreeObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE +#define trcKERNEL_HOOKS_KERNEL_SERVICE(SERVICE, CLASS, pxObject) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); + +/* This macro will create a call to a kernel service with a certain result, with a null object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT +#define trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT(SERVICE, TRACECLASS) \ + if (TRACE_GET_TASK_FILTER(TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACECLASS, 0); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM +#define trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(SERVICE, CLASS, pxObject, param) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), (uint32_t)param); + +/* This macro will create a call to a kernel service with a certain result, with a null object and other value as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_WITH_PARAM +#define trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_WITH_PARAM(SERVICE, TRACECLASS, param) \ + if (TRACE_GET_TASK_FILTER(TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACECLASS, 0, param); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY +#define trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY(SERVICE, param) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithNumericParamOnly(SERVICE, (uint32_t)param); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(SERVICE, CLASS, pxObject) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); + +/* This macro will create a call to a kernel service with a certain result, with a null object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_FROM_ISR(SERVICE, TRACECLASS) \ + prvTraceStoreKernelCall(SERVICE, TRACECLASS, 0); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM_FROM_ISR(SERVICE, CLASS, pxObject, param) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), (uint32_t)param); + +/* This macro will create a call to a kernel service with a certain result, with a null object and other value as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_WITH_PARAM_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_WITH_PARAM_FROM_ISR(SERVICE, TRACECLASS, param) \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACECLASS, 0, param); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY_FROM_ISR(SERVICE, param) \ + prvTraceStoreKernelCallWithNumericParamOnly(SERVICE, (uint32_t)param); + +/* This macro will set the state for an object */ +#undef trcKERNEL_HOOKS_SET_OBJECT_STATE +#define trcKERNEL_HOOKS_SET_OBJECT_STATE(CLASS, pxObject, STATE) \ + prvTraceSetObjectState(TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), (uint8_t)STATE); + +/* This macro will flag a certain task as a finished instance */ +#undef trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED +#define trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceSetTaskInstanceFinished(TRACE_GET_TASK_NUMBER(TRACE_GET_CURRENT_TASK())); + +#if (TRC_CFG_INCLUDE_READY_EVENTS == 1) +/* This macro will create an event to indicate that a task became Ready */ +#undef trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE +#define trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE(pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreTaskReady(TRACE_GET_TASK_NUMBER(pxTCB)); +#else /*(TRC_CFG_INCLUDE_READY_EVENTS == 1)*/ +#undef trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE +#define trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE(pxTCB) +#endif /*(TRC_CFG_INCLUDE_READY_EVENTS == 1)*/ + +/* This macro will update the internal tick counter and call prvTracePortGetTimeStamp(0) to update the internal counters */ +#undef trcKERNEL_HOOKS_INCREMENT_TICK +#define trcKERNEL_HOOKS_INCREMENT_TICK() \ + { \ + extern uint32_t uiTraceTickCount; \ + uiTraceTickCount++; \ + prvTracePortGetTimeStamp(0); \ + } + +#if (TRC_CFG_INCLUDE_OSTICK_EVENTS == 1) +/* This macro will create an event indicating that the OS tick count has increased */ +#undef trcKERNEL_HOOKS_NEW_TIME +#define trcKERNEL_HOOKS_NEW_TIME(SERVICE, xValue) \ + prvTraceStoreKernelCallWithNumericParamOnly(SERVICE, xValue); +#else /*(TRC_CFG_INCLUDE_OSTICK_EVENTS == 1)*/ +#undef trcKERNEL_HOOKS_NEW_TIME +#define trcKERNEL_HOOKS_NEW_TIME(SERVICE, xValue) +#endif /*(TRC_CFG_INCLUDE_OSTICK_EVENTS == 1)*/ + +/* This macro will create a task switch event to the currently executing task */ +#undef trcKERNEL_HOOKS_TASK_SWITCH +#define trcKERNEL_HOOKS_TASK_SWITCH( pxTCB ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreTaskswitch(TRACE_GET_TASK_NUMBER(pxTCB)); + +/* This macro will create an event to indicate that the task has been suspended */ +#undef trcKERNEL_HOOKS_TASK_SUSPEND +#define trcKERNEL_HOOKS_TASK_SUSPEND(SERVICE, pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); \ + prvTraceSetTaskInstanceFinished((uint8_t)TRACE_GET_TASK_NUMBER(pxTCB)); + +/* This macro will create an event to indicate that a task has called a wait/delay function */ +#undef trcKERNEL_HOOKS_TASK_DELAY +#define trcKERNEL_HOOKS_TASK_DELAY(SERVICE, pxTCB, xValue) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + { \ + prvTraceStoreKernelCallWithNumericParamOnly(SERVICE, xValue); \ + prvTraceSetTaskInstanceFinished((uint8_t)TRACE_GET_TASK_NUMBER(pxTCB)); \ + } + +/* This macro will create an event to indicate that a task has gotten its priority changed */ +#undef trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE +#define trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE(SERVICE, pxTCB, uxNewPriority) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + { \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), prvTraceGetPriorityProperty(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)));\ + prvTraceSetPriorityProperty(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), (uint8_t)uxNewPriority); \ + } + +/* This macro will create an event to indicate that the task has been resumed */ +#undef trcKERNEL_HOOKS_TASK_RESUME +#define trcKERNEL_HOOKS_TASK_RESUME(SERVICE, pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); + +#undef trcKERNEL_HOOKS_TASK_RESUME_FROM_ISR +#define trcKERNEL_HOOKS_TASK_RESUME_FROM_ISR(SERVICE, pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); + +#if !defined TRC_CFG_INCLUDE_READY_EVENTS || TRC_CFG_INCLUDE_READY_EVENTS == 1 + void prvTraceSetReadyEventsEnabled(int status); + void prvTraceStoreTaskReady(traceHandle handle); +#else + #define prvTraceSetReadyEventsEnabled(status) +#endif + +void prvTraceStoreLowPower(uint32_t flag); + +void prvTraceStoreTaskswitch(traceHandle task_handle); + + +#if (TRC_CFG_SCHEDULING_ONLY == 0) + +void prvTraceStoreKernelCall(uint32_t eventcode, traceObjectClass objectClass, uint32_t byteParam); + +void prvTraceStoreKernelCallWithNumericParamOnly(uint32_t evtcode, uint32_t param); + +void prvTraceStoreKernelCallWithParam(uint32_t evtcode, traceObjectClass objectClass, + uint32_t objectNumber, uint32_t param); +#else + +#define prvTraceStoreKernelCall(eventcode, objectClass, byteParam) {} +#define prvTraceStoreKernelCallWithNumericParamOnly(evtcode, param) {} +#define prvTraceStoreKernelCallWithParam(evtcode, objectClass, objectNumber, param) {} + +#endif + +/******************************************************************************* +* prvTraceInitTraceData +* +* Allocates and initializes the recorder data structure, based on the constants +* in trcConfig.h. This allows for allocating the data on the heap, instead of +* using a static declaration. +******************************************************************************/ +void prvTraceInitTraceData(void); + +void prvTraceSetTaskInstanceFinished(traceHandle handle); + +void prvTraceSetPriorityProperty(uint8_t objectclass, traceHandle id, uint8_t value); + +uint8_t prvTraceGetPriorityProperty(uint8_t objectclass, traceHandle id); + +void prvTraceSetObjectState(uint8_t objectclass, traceHandle id, uint8_t value); + +void prvMarkObjectAsUsed(traceObjectClass objectclass, traceHandle handle); + +void prvTraceStoreObjectNameOnCloseEvent(uint8_t evtcode, traceHandle handle, + traceObjectClass objectclass); + +void prvTraceStoreObjectPropertiesOnCloseEvent(uint8_t evtcode, traceHandle handle, + traceObjectClass objectclass); + +/* Internal constants for task state */ +#define TASK_STATE_INSTANCE_NOT_ACTIVE 0 +#define TASK_STATE_INSTANCE_ACTIVE 1 + + +#if (TRC_CFG_INCLUDE_ISR_TRACING == 0) + +#undef vTraceSetISRProperties +#define vTraceSetISRProperties(handle, name, priority) (void)(handle), (void)(name), (void)(priority) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ + +#undef vTraceStoreISRBegin +#define vTraceStoreISRBegin(x) (void)(x) + +#undef vTraceStoreISREnd +#define vTraceStoreISREnd(x) (void)(x) + +#undef xTraceSetISRProperties +#define xTraceSetISRProperties(name, priority) ((void)(name), (void)(priority), (traceHandle)0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ + +#endif /*(TRC_CFG_INCLUDE_ISR_TRACING == 0)*/ + +/******************************************************************************* + * xTraceGetTraceBuffer + * + * Returns a pointer to the recorder data structure. Use this together with + * uiTraceGetTraceBufferSize if you wish to implement an own store/upload + * solution, e.g., in case a debugger connection is not available for uploading + * the data. + ******************************************************************************/ +void* xTraceGetTraceBuffer(void); + +/******************************************************************************* + * uiTraceGetTraceBufferSize + * + * Gets the size of the recorder data structure. For use together with + * vTraceGetTraceBuffer if you wish to implement an own store/upload solution, + * e.g., in case a debugger connection is not available for uploading the data. + ******************************************************************************/ +uint32_t uiTraceGetTraceBufferSize(void); + +#if (TRC_CFG_SCHEDULING_ONLY == 1) +#undef TRC_CFG_INCLUDE_USER_EVENTS +#define TRC_CFG_INCLUDE_USER_EVENTS 0 +#endif /*(TRC_CFG_SCHEDULING_ONLY == 1)*/ + +#if ((TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_SCHEDULING_ONLY == 0)) + +#if (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) +traceUBChannel xTraceRegisterUBChannel(traceString channel, traceString formatStr); +void vTraceUBData(traceUBChannel channel, ...); +void vTraceUBEvent(traceUBChannel channel); +#endif /*(TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)*/ + +#else /*((TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_SCHEDULING_ONLY == 0))*/ + +#undef vTracePrint +#define vTracePrint(chn, ...) (void)(chn) +#undef vTracePrintF +#define vTracePrintF(chn, fmt, ...) (void)(chn), (void)(fmt) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#undef vTraceVPrintF +#define vTraceVPrintF(chn, formatStr, vl) (void)(chn), (void)(formatStr), (void)(vl) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#undef xTraceRegisterString +#define xTraceRegisterString(x) ((void)(x), (traceString)0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ +#undef xTraceRegisterChannelFormat +#define xTraceRegisterChannelFormat(eventLabel, formatStr) ((void)(eventLabel), (void)(formatStr), 0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ +#undef vTraceUBData +#define vTraceUBData(label, ...) (void)(label) +#undef vTraceChannelPrint +#define vTraceChannelPrint(label) (void)(label) + +#endif /*(TRC_CFG_INCLUDE_USER_EVENTS == 1)*/ + +#define NEventCodes 0x100 + +/* Our local critical sections for the recorder */ +#define trcCRITICAL_SECTION_BEGIN() {TRACE_ENTER_CRITICAL_SECTION(); recorder_busy++;} +#define trcCRITICAL_SECTION_END() {recorder_busy--; TRACE_EXIT_CRITICAL_SECTION();} + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_Cortex_M) + #define trcSR_ALLOC_CRITICAL_SECTION_ON_CORTEX_M_ONLY TRACE_ALLOC_CRITICAL_SECTION + #define trcCRITICAL_SECTION_BEGIN_ON_CORTEX_M_ONLY trcCRITICAL_SECTION_BEGIN + #define trcCRITICAL_SECTION_END_ON_CORTEX_M_ONLY trcCRITICAL_SECTION_END +#else + #define trcSR_ALLOC_CRITICAL_SECTION_ON_CORTEX_M_ONLY() {} + #define trcCRITICAL_SECTION_BEGIN_ON_CORTEX_M_ONLY() recorder_busy++; + #define trcCRITICAL_SECTION_END_ON_CORTEX_M_ONLY() recorder_busy--; +#endif + +/****************************************************************************** + * ObjectHandleStack + * This data-structure is used to provide a mechanism for 1-byte trace object + * handles. This way, only 1 byte is necessary instead of 4 bytes (a pointer) + * when storing a reference to an object. This allows for up to 255 objects of + * each object class active at any given moment. There can be more "historic" + * objects, that have been deleted - that number is only limited by the size of + * the symbol table. + * + * Note that handle zero (0) is not used, it is a code for an invalid handle. + * + * This data structure keeps track of the FREE handles, not the handles in use. + * This data structure contains one stack per object class. When a handle is + * allocated to an object, the next free handle is popped from the stack. When + * a handle is released (on object delete), it is pushed back on the stack. + * Note that there is no initialization code that pushed the free handles + * initially, that is not necessary due to the following optimization: + * + * The stack of handles (objectHandles) is initially all zeros. Since zero + * is not a valid handle, that is a signal of additional handles needed. + * If a zero is received when popping a new handle, it is replaced by the + * index of the popped handle instead. + *****************************************************************************/ +typedef struct +{ + /* For each object class, the index of the next handle to allocate */ + uint16_t indexOfNextAvailableHandle[ TRACE_NCLASSES ]; + + /* The lowest index of this class (constant) */ + uint16_t lowestIndexOfClass[ TRACE_NCLASSES ]; + + /* The highest index of this class (constant) */ + uint16_t highestIndexOfClass[ TRACE_NCLASSES ]; + + /* The highest use count for this class (for statistics) */ + uint16_t handleCountWaterMarksOfClass[ TRACE_NCLASSES ]; + + /* The free object handles - a set of stacks within this array */ + traceHandle objectHandles[ TRACE_KERNEL_OBJECT_COUNT ]; + +} objectHandleStackType; + +extern objectHandleStackType objectHandleStacks; + +/****************************************************************************** + * Object Property Table + * The Object Table contains name and other properties of the objects (tasks, + * queues, mutexes, etc). The below data structures defines the properties of + * each object class and are used to cast the byte buffer into a cleaner format. + * + * The values in the object table are continuously overwritten and always + * represent the current state. If a property is changed during runtime, the OLD + * value should be stored in the trace buffer, not the new value (since the new + * value is found in the Object Property Table). + * + * For close events this mechanism is the old names are stored in the symbol + * table), for "priority set" (the old priority is stored in the event data) + * and for "isActive", where the value decides if the task switch event type + * should be "new" or "resume". + ******************************************************************************/ + +typedef struct +{ + /* = NCLASSES */ + uint32_t NumberOfObjectClasses; + + uint32_t ObjectPropertyTableSizeInBytes; + + /* This is used to calculate the index in the dynamic object table + (handle - 1 - nofStaticObjects = index)*/ +#if (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) + traceHandle NumberOfObjectsPerClass[2*((TRACE_NCLASSES+1)/2)]; +#else + traceHandle NumberOfObjectsPerClass[4*((TRACE_NCLASSES+3)/4)]; +#endif + + /* Allocation size rounded up to the closest multiple of 4 */ + uint8_t NameLengthPerClass[ 4*((TRACE_NCLASSES+3)/4) ]; + + uint8_t TotalPropertyBytesPerClass[ 4*((TRACE_NCLASSES+3)/4) ]; + + /* Allocation size rounded up to the closest multiple of 2 */ + uint16_t StartIndexOfClass[ 2*((TRACE_NCLASSES+1)/2) ]; + + /* The actual handles issued, should be Initiated to all zeros */ + uint8_t objbytes[ 4*((TRACE_OBJECT_TABLE_SIZE+3)/4) ]; +} ObjectPropertyTableType; + +/* Symbol table data structure */ +typedef struct +{ + /* = SYMBOL_HISTORY_TABLE_SIZE_IN_BYTES */ + uint32_t symTableSize; + + /* Entry 0 is reserved. Any reference to entry 0 implies NULL*/ + uint32_t nextFreeSymbolIndex; + + /* Size rounded up to closest multiple of 4, to avoid alignment issues*/ + uint8_t symbytes[4*(((TRC_CFG_SYMBOL_TABLE_SIZE)+3)/4)]; + + /* Used for lookups - Up to 64 linked lists within the symbol table + connecting all entries with the same 6 bit checksum. + This field holds the current list heads. Should be initiated to zeros */ + uint16_t latestEntryOfChecksum[64]; +} symbolTableType; + + +/******************************************************************************* + * The data structures of the different events, all 4 bytes long + ******************************************************************************/ + +typedef struct +{ + uint8_t type; + uint8_t objHandle; + uint16_t dts; /* differential timestamp - time since last event */ +} TSEvent, TREvent; + +typedef struct +{ + uint8_t type; + uint8_t dummy; + uint16_t dts; /* differential timestamp - time since last event */ +} LPEvent; + +typedef struct +{ + uint8_t type; + uint8_t objHandle; + uint16_t dts; /* differential timestamp - time since last event */ +} KernelCall; + +typedef struct +{ + uint8_t type; + uint8_t objHandle; + uint8_t param; + uint8_t dts; /* differential timestamp - time since last event */ +} KernelCallWithParamAndHandle; + +typedef struct +{ + uint8_t type; + uint8_t dts; /* differential timestamp - time since last event */ + uint16_t param; +} KernelCallWithParam16; + +typedef struct +{ + uint8_t type; + uint8_t objHandle; /* the handle of the closed object */ + uint16_t symbolIndex; /* the name of the closed object */ +} ObjCloseNameEvent; + +typedef struct +{ + uint8_t type; + uint8_t arg1; + uint8_t arg2; + uint8_t arg3; +} ObjClosePropEvent; + +typedef struct +{ + uint8_t type; + uint8_t unused1; + uint8_t unused2; + uint8_t dts; +} TaskInstanceStatusEvent; + +typedef struct +{ + uint8_t type; + uint8_t dts; + uint16_t payload; /* the name of the user event */ +} UserEvent; + +typedef struct +{ + uint8_t type; + + /* 8 bits extra for storing DTS, if it does not fit in ordinary event + (this one is always MSB if used) */ + uint8_t xts_8; + + /* 16 bits extra for storing DTS, if it does not fit in ordinary event. */ + uint16_t xts_16; +} XTSEvent; + +typedef struct +{ + uint8_t type; + + uint8_t xps_8; + uint16_t xps_16; +} XPSEvent; + +typedef struct{ + uint8_t type; + uint8_t dts; + uint16_t size; +} MemEventSize; + +typedef struct{ + uint8_t type; + uint8_t addr_high; + uint16_t addr_low; +} MemEventAddr; + +/******************************************************************************* + * The separate user event buffer structure. Can be enabled in trcConfig.h. + ******************************************************************************/ + +#if (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) +typedef struct +{ + traceString name; + traceString defaultFormat; +} ChannelFormatPair; + +typedef struct +{ + uint16_t bufferID; + uint16_t version; + uint32_t wraparoundCounter; + uint32_t numberOfSlots; + uint32_t nextSlotToWrite; + uint8_t numberOfChannels; + uint8_t padding1; + uint8_t padding2; + uint8_t padding3; + ChannelFormatPair channels[(TRC_CFG_UB_CHANNELS)+1]; + uint8_t channelBuffer[((TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE) + 3) & 0xFFFFFFFC]; /* 1 byte per slot, with padding for 4 byte alignment */ + uint8_t dataBuffer[(TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE) * 4]; /* 4 bytes per slot */ + +} UserEventBuffer; +#endif + +/******************************************************************************* + * The main data structure, read by Tracealyzer from the RAM dump + ******************************************************************************/ + +typedef struct +{ + volatile uint8_t startmarker0; /* Volatile is important, see init code. */ + volatile uint8_t startmarker1; + volatile uint8_t startmarker2; + volatile uint8_t startmarker3; + volatile uint8_t startmarker4; + volatile uint8_t startmarker5; + volatile uint8_t startmarker6; + volatile uint8_t startmarker7; + volatile uint8_t startmarker8; + volatile uint8_t startmarker9; + volatile uint8_t startmarker10; + volatile uint8_t startmarker11; + + /* Used to determine Kernel and Endianess */ + uint16_t version; + + /* Currently 5 */ + uint8_t minor_version; + + /* This should be 0 if lower IRQ priority values implies higher priority + levels, such as on ARM Cortex M. If the opposite scheme is used, i.e., + if higher IRQ priority values means higher priority, this should be 1. */ + uint8_t irq_priority_order; + + /* sizeof(RecorderDataType) - just for control */ + uint32_t filesize; + + /* Current number of events recorded */ + uint32_t numEvents; + + /* The buffer size, in number of event records */ + uint32_t maxEvents; + + /* The event buffer index, where to write the next event */ + uint32_t nextFreeIndex; + + /* 1 if the buffer is full, 0 otherwise */ + uint32_t bufferIsFull; + + /* The frequency of the clock/timer/counter used as time base */ + uint32_t frequency; + + /* The absolute timestamp of the last stored event, in the native + timebase, modulo frequency! */ + uint32_t absTimeLastEvent; + + /* The number of seconds in total - lasts for 136 years */ + uint32_t absTimeLastEventSecond; + + /* 1 if the recorder has been started, 0 if not yet started or stopped. + This is a 32 bit variable due to alignment issues. */ + uint32_t recorderActive; + + /* If > 0, tells the maximum time between two traced ISRs that execute + back-to-back. If the time between vTraceStoreISREnd and a directly + following vTraceISRBegin is above isrTailchainingThreshold, we assume a + return to the previous context in between the ISRs, otherwise we assume + the have executed back-to-back and don't show any fragment of the previous + context in between. */ + uint32_t isrTailchainingThreshold; + + /* Not used, remains for compatibility and future use */ + uint8_t notused[24]; + + /* The amount of heap memory remaining at the last malloc or free event */ + uint32_t heapMemUsage; + + /* 0xF0F0F0F0 - for control only */ + int32_t debugMarker0; + + /* Set to value of TRC_CFG_USE_16BIT_OBJECT_HANDLES */ + uint32_t isUsing16bitHandles; + + /* The Object Property Table holds information about currently active + tasks, queues, and other recorded objects. This is updated on each + create call and includes object name and other properties. */ + ObjectPropertyTableType ObjectPropertyTable; + + /* 0xF1F1F1F1 - for control only */ + int32_t debugMarker1; + + /* The Symbol Table stores strings for User Events and is also used to + store names of deleted objects, which still may be in the trace but no + longer are available. */ + symbolTableType SymbolTable; + + /* For inclusion of float support, and for endian detection of floats. + The value should be (float)1 or (uint32_t)0 */ +#if (TRC_CFG_INCLUDE_FLOAT_SUPPORT == 1) + float exampleFloatEncoding; +#else + uint32_t exampleFloatEncoding; +#endif + /* This is non-zero if an internal error occurred in the recorder, e.g., if + one of the Nxxx constants was too small. The systemInfo string will then + contain an error message that is displayed when attempting to view the + trace file. */ + uint32_t internalErrorOccured; + + /* 0xF2F2F2F2 - for control only */ + int32_t debugMarker2; + + /* Error messages from the recorder. */ + char systemInfo[80]; + + /* 0xF3F3F3F3 - for control only */ + int32_t debugMarker3; + + /* The event data, in 4-byte records */ + uint8_t eventData[ (TRC_CFG_EVENT_BUFFER_SIZE) * 4 ]; + +#if (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) + UserEventBuffer userEventBuffer; +#endif + + /* This should always be 0 */ + uint32_t endOfSecondaryBlocks; + + uint8_t endmarker0; + uint8_t endmarker1; + uint8_t endmarker2; + uint8_t endmarker3; + uint8_t endmarker4; + uint8_t endmarker5; + uint8_t endmarker6; + uint8_t endmarker7; + uint8_t endmarker8; + uint8_t endmarker9; + uint8_t endmarker10; + uint8_t endmarker11; +} RecorderDataType; + +extern RecorderDataType* RecorderDataPtr; + +/* Internal functions */ + +/* Signal an error. */ +void prvTraceError(const char* msg); + +/******************************************************************************* + * prvTracePortGetTimeStamp + * + * Returns the current time based on the HWTC macros which provide a hardware + * isolation layer towards the hardware timer/counter. + * + * The HWTC macros and prvTracePortGetTimeStamp is the main porting issue + * or the trace recorder library. Typically you should not need to change + * the code of prvTracePortGetTimeStamp if using the HWTC macros. + * + ******************************************************************************/ +void prvTracePortGetTimeStamp(uint32_t *puiTimestamp); + +traceHandle prvTraceGetObjectHandle(traceObjectClass objectclass); + +void prvTraceFreeObjectHandle(traceObjectClass objectclass, + traceHandle handle); + +/* Private function. Use the public functions in trcKernelPort.h */ +void prvTraceSetObjectName(traceObjectClass objectclass, + traceHandle handle, + const char* name); + +/* Internal macros */ + +#define TRACE_PROPERTY_NAME_GET(objectclass, objecthandle) \ +(const char*)(& RecorderDataPtr->ObjectPropertyTable.objbytes \ +[uiIndexOfObject(objecthandle, objectclass)]) + +#define TRACE_PROPERTY_OBJECT_STATE(objectclass, handle) \ +RecorderDataPtr->ObjectPropertyTable.objbytes[uiIndexOfObject(handle, objectclass) \ ++ RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[objectclass]] + +#define TRACE_PROPERTY_ACTOR_PRIORITY(objectclass, handle) \ +RecorderDataPtr->ObjectPropertyTable.objbytes[uiIndexOfObject(handle, objectclass) \ ++ RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[objectclass] + 1] + +/* DEBUG ASSERTS */ +#if defined TRC_CFG_USE_TRACE_ASSERT && TRC_CFG_USE_TRACE_ASSERT != 0 +#define TRACE_ASSERT(eval, msg, defRetVal) \ +if (!(eval)) \ +{ \ + prvTraceError("TRACE_ASSERT: " msg); \ + return defRetVal; \ +} +#else +#define TRACE_ASSERT(eval, msg, defRetVal) +#endif + +#endif /*(TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT)*/ + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +/****************************************************************************** + * Default values for STREAM PORT macros + * + * As a normal user, this is nothing you don't need to bother about. This is + * only important if you want to define your own custom streaming interface. + * + * You may override these in your own trcStreamingPort.h to create a custom + * stream port, and thereby stream the trace on any host-target interface. + * These default values are suitable for most cases, except the J-Link port. + ******************************************************************************/ + +/****************************************************************************** + * TRC_STREAM_PORT_USE_INTERNAL_BUFFER + * + * There are two kinds of stream ports, those that store the event to the + * internal buffer (with periodic flushing by the TzCtrl task) and those that + * write directly to the streaming interface. Most stream ports use the + * recorder's internal buffer, except for the SEGGER J-Link port (also uses a + * RAM buffer, but one defined in the SEGGER code). + * + * If the stream port (trcStreamingPort.h) defines this as zero (0), it is + * expected to transmit the data directly using TRC_STREAM_PORT_COMMIT_EVENT. + * Otherwise it is expected that the trace data is stored in the internal buffer + * and the TzCtrl task will then send the buffer pages when they become full. + ******************************************************************************/ +#ifndef TRC_STREAM_PORT_USE_INTERNAL_BUFFER +#define TRC_STREAM_PORT_USE_INTERNAL_BUFFER 1 +#endif + + /****************************************************************************** + * TRC_STREAM_PORT_ON_TRACE_BEGIN + * + * Defining any actions needed in the stream port when the recording is activated. + *******************************************************************************/ +#ifndef TRC_STREAM_PORT_ON_TRACE_BEGIN + #define TRC_STREAM_PORT_ON_TRACE_BEGIN() /* Do nothing */ +#endif + + /****************************************************************************** + * TRC_STREAM_PORT_ON_TRACE_END + * + * Defining any actions needed in the stream port when the tracing stops. + * Empty by default. + *******************************************************************************/ +#ifndef TRC_STREAM_PORT_ON_TRACE_END +#define TRC_STREAM_PORT_ON_TRACE_END() /* Do nothing */ +#endif + + /****************************************************************************** + * TRC_STREAM_PORT_ALLOCATE_EVENT + * + * This macro is used to allocate memory for each event record, just before + * assigning the record fields. + * Depending on "TRC_STREAM_PORT_USE_INTERNAL_BUFFER", this either allocates + * space in the paged event buffer, or on the local stack. In the latter case, + * the COMMIT event is used to write the data to the streaming interface. + * + * The BLOCKING option is only used within vTraceEnable, to ensure the full + * header, object table and symbol table is transferred without data loss. + ******************************************************************************/ +#ifndef TRC_STREAM_PORT_ALLOCATE_EVENT +#if (TRC_STREAM_PORT_USE_INTERNAL_BUFFER == 1) + #define TRC_STREAM_PORT_ALLOCATE_EVENT(_type, _ptrData, _size) \ + _type* _ptrData; \ + _ptrData = (_type*)prvPagedEventBufferGetWritePointer(_size); + + /************************************************************************** + If your application gets stuck in TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING, + it means it fails to transfer the header, object table or symbol table + during vTraceEnable. + This occurs if the trace buffer is too small to accomodate these in full, + i.e. before the streaming interface is started and begins to transfer. + + Note that this is intentionally blocking to avoid data loss, but only + used within vTraceEnable. + **************************************************************************/ + + #define TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING(_type, _ptrData, _size) \ + _type* _ptrData; \ + do { _ptrData = (_type*)prvPagedEventBufferGetWritePointer(_size); } while (_ptrData == NULL); + +#else + #define TRC_STREAM_PORT_ALLOCATE_EVENT(_type, _ptrData, _size) _type _tmpArray[_size / sizeof(_type)]; _type* _ptrData = _tmpArray; + #define TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING(_type, _ptrData, _size) _type _tmpArray[_size / sizeof(_type)]; _type* _ptrData = _tmpArray; +#endif +#endif + + /****************************************************************************** + * TRC_STREAM_PORT_ALLOCATE_DYNAMIC_EVENT + * + * This macro is used to allocate memory for each event record, just before + * assigning the record fields. + * This has the same purpose as TRC_STREAM_PORT_ALLOCATE_EVENT and by default + * it has the same definition as TRC_STREAM_PORT_ALLOCATE_EVENT. This is used + * for events carrying variable-sized payload, such as strings. + * In the SEGGER RTT port, we need this in order to make a worst-case + * allocation on the stack. + ******************************************************************************/ +#ifndef TRC_STREAM_PORT_ALLOCATE_DYNAMIC_EVENT +#if (TRC_STREAM_PORT_USE_INTERNAL_BUFFER == 1) + #define TRC_STREAM_PORT_ALLOCATE_DYNAMIC_EVENT(_type, _ptrData, _size) TRC_STREAM_PORT_ALLOCATE_EVENT(_type, _ptrData, _size) /* We do the same thing as for non-dynamic event sizes */ +#else + #define TRC_STREAM_PORT_ALLOCATE_DYNAMIC_EVENT(_type, _ptrData, _size) _type _tmpArray[sizeof(largestEventType) / sizeof(_type)]; _type* _ptrData = _tmpArray; +#endif +#endif + + /****************************************************************************** + * TRC_STREAM_PORT_COMMIT_EVENT + * TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING + * + * The COMMIT macro is used to write a single event record directly to the + * streaming inteface, without first storing the event in the internal buffer. + * This is currently only used in the SEGGER J-Link RTT port. + * + * The BLOCKING version is used when sending the initial trace header, which is + * important to receive in full. Otherwise, when using non-blocking RTT transfer + * this may be corrupted if using an RTT buffer smaller than the combined size + * of the header, object table and symbol table. + * + * This relies on the TRC_STREAM_PORT_WRITE_DATA macro, defined in by the + * stream port in trcStreamingPort.h. The COMMIT macro calls + * prvTraceWarning(TRC_STREAM_PORT_WRITE_DATA) if a non-zero value is returned + * from TRC_STREAM_PORT_WRITE_DATA. If zero (0) is returned, it is assumed + * that all data was successfully written. + * + * In ports using the internal buffer, this macro has no purpose as the events + * are written to the internal buffer instead. They are then flushed to the + * streaming interface in the TzCtrl task using TRC_STREAM_PORT_WRITE_DATA. + ******************************************************************************/ +#ifndef TRC_STREAM_PORT_COMMIT_EVENT +#if (TRC_STREAM_PORT_USE_INTERNAL_BUFFER == 1) + #define TRC_STREAM_PORT_COMMIT_EVENT(_ptrData, _size) /* Not used */ + #define TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING(_ptrData, _size) /* Not used */ +#else + #define TRC_STREAM_PORT_COMMIT_EVENT(_ptrData, _size) \ + { \ + int32_t dummy = 0; \ + (void)dummy; \ + if (TRC_STREAM_PORT_WRITE_DATA(_ptrData, _size, &dummy) != 0) \ + { \ + vTraceStop(); \ + } \ + } + + /* Only used during vTraceEnable */ + #define TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING(_ptrData, _size) \ + { \ + char* ptrWrite = (char*)_ptrData; \ + uint32_t writeSize = _size; \ + uint32_t attemptCounter = 0; \ + int32_t bytesWritten; \ + int32_t status; \ + do \ + { \ + bytesWritten = 0; \ + status = TRC_STREAM_PORT_WRITE_DATA(ptrWrite, writeSize, &bytesWritten); \ + if (status != 0) \ + { \ + prvTraceError(PSF_ERROR_STREAM_PORT_WRITE); \ + break; \ + } \ + ptrWrite += bytesWritten; \ + writeSize -= bytesWritten; \ + attemptCounter++; \ + } while (writeSize > 0); \ + \ + if (attemptCounter > 1) \ + { \ + prvTraceWarning(PSF_WARNING_STREAM_PORT_INITIAL_BLOCKING); \ + } \ + } + +#endif +#endif + +/****************************************************************************** + * TRC_STREAM_PORT_READ_DATA (defined in trcStreamingPort.h) + * + * Defining how to read data from host (commands from Tracealyzer). + * + * If there is no direct interface to host (e.g., if streaming to a file + * system) this should be defined as 0. Instead use vTraceEnable(TRC_START) and + * vTraceStop() to control the recording from target. + * + * Parameters: + * + * - _ptrData: a pointer to a data buffer, where the received data shall be + * stored (TracealyzerCommandType*). + * + * - _size: the number of bytes to read (int). + * + * - _ptrBytesRead: a pointer to an integer (int), that should be assigned + * with the number of bytes that was received. + * + * Example: + * + * int32_t myRead(void* ptrData, uint32_t size, int32_t* ptrBytesRead); + * + * #define TRC_STREAM_PORT_READ_DATA(_ptrData, _size, _ptrBytesRead) \ + * myRead(_ptrData, _size, _ptrBytesRead) + * + * Your "myRead" function should return 0 if successful, i.e. if at least some + * bytes were received. A non-zero value should be returned if the streaming + * interface returned an error (e.g. a closed socket), which results in the + * recorder calling prvTraceWarning with the error code + * PSF_WARNING_STREAM_PORT_WRITE. + * + * If developing your own custom stream port and using the default internal + * buffer, it is important that the _ptrBytesRead parameter is assigned + * correctly by "myRead", i.e. with the number of bytes actually written. + * Otherwise the data stream may get out of sync in case the streaming interface + * can't swallow all data at once. + ******************************************************************************/ +#ifndef TRC_STREAM_PORT_READ_DATA +#error "No definition for TRC_STREAM_PORT_READ_DATA (should be in trcStreamingPort.h)" +#endif + +/****************************************************************************** + * TRC_STREAM_PORT_WRITE_DATA (defined in trcStreamingPort.h) + * + * Defining how to write trace data to the streaming interface. + * + * Parameters: + * + * - _ptrData: a pointer (void*) to the data to write. + * + * - _size: the number of bytes to write (uint32_t). + * + * - _ptrBytesWritten: a pointer to an integer (int32_t), that should be + * assigned with the number of bytes actually written. + * + * Example: + * + * int32_t myWrite(void* ptrData, uint32_t size, int32_t* ptrBytesWritten); + * + * #define TRC_STREAM_PORT_WRITE_DATA(_ptrData, _size, _ptrBytesWritten) \ + * myWrite(_ptrData, _size, _ptrBytesWritten) + * + * Your "myWrite" function should return 0 if successful, i.e. if at least some + * bytes were sent. A non-zero value should be returned if the streaming interface + * returned an error (e.g. a closed socket), which results in the recorder calling + * prvTraceWarning with the error code PSF_WARNING_STREAM_PORT_WRITE. + * + * If developing your own custom stream port and using the default internal + * buffer, it is important that the _ptrBytesWritten parameter is assigned + * correctly by "myWrite", i.e. with the number of bytes actually written. + * Otherwise the data stream may get out of sync in case the streaming interface + * can't swallow all data at once. + * + * Assuming TRC_STREAM_PORT_USE_INTERNAL_BUFFER is 1 (default), the TzCtrl task + * will use this macro to send one buffer page at a time. In case all data can't + * be written at once (if _ptrBytesWritten is less than _size), the TzCtrl task + * is smart enough to make repeated calls (with updated parameters) in order to + * send the remaining data. + * + * However, if TRC_STREAM_PORT_USE_INTERNAL_BUFFER is 0, this is used from the + * COMMIT macro, directly in the "event functions". In that case, the + * _ptrBytesWritten parameter will be NULL and should be ignored by the write + * function. In this case, it is assumed that all data can be sent in a single + * call, otherwise the write function should return a non-zero error code. + ******************************************************************************/ +#ifndef TRC_STREAM_PORT_WRITE_DATA +#error "No definition for TRC_STREAM_PORT_WRITE_DATA (should be in trcStreamingPort.h)" +#endif + +/****************************************************************************** +* Data structure declaration, depending on TRC_CFG_RECORDER_BUFFER_ALLOCATION +*******************************************************************************/ +#if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_STATIC) + + /* Static allocation. */ + + /* If not defined in trcStreamingPort.h */ + #ifndef TRC_STREAM_PORT_ALLOCATE_FIELDS + #define TRC_STREAM_PORT_ALLOCATE_FIELDS() \ + char _TzTraceData[(TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT) * (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE)]; + extern char _TzTraceData[(TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT) * (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE)]; + #endif + + /* If not defined in trcStreamingPort.h */ + #ifndef TRC_STREAM_PORT_MALLOC + #define TRC_STREAM_PORT_MALLOC() /* Static allocation. Not used. */ + #endif +#else + /* For Dynamic or Custom Allocation mode */ + + /* If not defined in trcStreamingPort.h */ + #ifndef TRC_STREAM_PORT_ALLOCATE_FIELDS + #define TRC_STREAM_PORT_ALLOCATE_FIELDS() char* _TzTraceData = NULL; + extern char* _TzTraceData; + #endif + + /* If not defined in trcStreamingPort.h */ + #ifndef TRC_STREAM_PORT_MALLOC + #if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC) + #define TRC_STREAM_PORT_MALLOC() \ + _TzTraceData = TRC_PORT_MALLOC((TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT) * (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE)); + extern char* _TzTraceData; + #else + #define TRC_STREAM_PORT_MALLOC() /* Custom allocation. Not used. */ + #endif + #endif +#endif + +#ifndef TRC_STREAM_PORT_INIT + #define TRC_STREAM_PORT_INIT() \ + TRC_STREAM_PORT_MALLOC(); /* Empty if static allocation mode */ \ + prvPagedEventBufferInit(_TzTraceData); +#endif + + +/* Signal an error. */ +void prvTraceError(int errCode); + +/* Signal an warning (does not stop the recorder). */ +void prvTraceWarning(int errCode); + +/******************************************************************************/ +/*** ERROR AND WARNING CODES (check using xTraceGetLastError) *****************/ +/******************************************************************************/ + +#define PSF_ERROR_NONE 0 +#define PSF_ERROR_EVENT_CODE_TOO_LARGE 1 +#define PSF_ERROR_ISR_NESTING_OVERFLOW 2 +#define PSF_ERROR_DWT_NOT_SUPPORTED 3 +#define PSF_ERROR_DWT_CYCCNT_NOT_SUPPORTED 4 +#define PSF_ERROR_TZCTRLTASK_NOT_CREATED 5 +#define PSF_ERROR_STREAM_PORT_WRITE 6 + +#define PSF_WARNING_SYMBOL_TABLE_SLOTS 7 +#define PSF_WARNING_SYMBOL_MAX_LENGTH 8 +#define PSF_WARNING_OBJECT_DATA_SLOTS 9 +#define PSF_WARNING_STRING_TOO_LONG 10 +#define PSF_WARNING_STREAM_PORT_READ 11 +#define PSF_WARNING_STREAM_PORT_WRITE 12 +#define PSF_WARNING_STREAM_PORT_INITIAL_BLOCKING 13 +#define PSF_WARNING_STACKMON_NO_SLOTS 14 + +/******************************************************************************/ +/*** INTERNAL STREAMING FUNCTIONS *********************************************/ +/******************************************************************************/ + +/* Saves a symbol name in the symbol table and returns the slot address */ +void* prvTraceSaveSymbol(const char *name); + +/* Saves a string in the symbol table for an object (task name etc.) */ +void prvTraceSaveObjectSymbol(void* address, const char *name); + +/* Deletes a symbol name (task name etc.) from symbol table */ +void prvTraceDeleteSymbol(void *address); + +/* Saves an object data entry (task base priority) in object data table */ +void prvTraceSaveObjectData(const void *address, uint32_t data); + +/* Removes an object data entry (task base priority) from object data table */ +void prvTraceDeleteObjectData(void *address); + +/* Store an event with zero parameters (event ID only) */ +void prvTraceStoreEvent0(uint16_t eventID); + +/* Store an event with one 32-bit parameter (pointer address or an int) */ +void prvTraceStoreEvent1(uint16_t eventID, + uint32_t param1); + +/* Store an event with two 32-bit parameters */ +void prvTraceStoreEvent2(uint16_t eventID, + uint32_t param1, + uint32_t param2); + +/* Store an event with three 32-bit parameters */ +void prvTraceStoreEvent3(uint16_t eventID, + uint32_t param1, + uint32_t param2, + uint32_t param3); + +/* Stores an event with 32-bit integer parameters */ +void prvTraceStoreEvent(int nParam, uint16_t EventID, ...); + +/* Stories an event with a string and 32-bit integer parameters */ +void prvTraceStoreStringEvent(int nArgs, uint16_t eventID, const char* str, ...); + +/* Initializes the paged event buffer used by certain stream ports */ +void prvPagedEventBufferInit(char* buffer); + +/* Retrieve a pointer to the paged event buffer */ +void* prvPagedEventBufferGetWritePointer(int sizeOfEvent); + +/* Transfer a full buffer page */ +uint32_t prvPagedEventBufferTransfer(void); + +/* The data structure for commands (a bit overkill) */ +typedef struct +{ + unsigned char cmdCode; + unsigned char param1; + unsigned char param2; + unsigned char param3; + unsigned char param4; + unsigned char param5; + unsigned char checksumLSB; + unsigned char checksumMSB; +} TracealyzerCommandType; + +/* Checks if the provided command is a valid command */ +int prvIsValidCommand(TracealyzerCommandType* cmd); + +/* Executed the received command (Start or Stop) */ +void prvProcessCommand(TracealyzerCommandType* cmd); + +#define vTraceSetStopHook(x) (void)(x) + +#endif /*(TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING)*/ + +#else /* when TRC_USE_TRACEALYZER_RECORDER == 0 */ + +#define vTraceEnable(x) (void)(x) +#define xTraceRegisterString(x) ((void)(x), (traceString)0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ +#define vTracePrint(chn, ...) (void)(chn) +#define vTracePrintF(chn, fmt, ...) (void)(chn), (void)(fmt) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#define vTraceVPrintF(chn, formatStr, vl) (void)(chn), (void)(formatStr), (void)(vl) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#define vTraceInstanceFinishedNow() +#define vTraceInstanceFinishedNext() +#define vTraceStoreISRBegin(x) (void)(x) +#define vTraceStoreISREnd(x) (void)(x) +#define xTraceSetISRProperties(a, b) ((void)(a), (void)(b), (traceHandle)0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ +#define vTraceStoreKernelObjectName(a, b) (void)(a), (void)(b) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#define xTraceRegisterChannelFormat(eventLabel, formatStr) ((void)(eventLabel), (void)(formatStr), 0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ +#define vTraceChannelPrint(label) (void)(label) +#define vTraceUBData(label, ...) (void)(label) + +#define vTraceSetFilterGroup(x) (void)(x) +#define vTraceSetFilterMask(x) (void)(x) + +#define prvTraceSetReadyEventsEnabled(status) (void)(status) + +#define vTraceExcludeTask(handle) (void)(handle) + +#define uiTraceStart() (1) +#define vTraceStart() +#define vTraceStop() + +#ifndef vTraceSetRecorderDataBuffer +#define vTraceSetRecorderDataBuffer(pRecorderData) /* No (void) here - ignore parameter since undefined symbol if custom allocation is not used */ +#endif + +#define vTraceConsoleChannelPrintF(fmt, ...) (void)(fmt) + +#ifndef TRC_ALLOC_CUSTOM_BUFFER +#define TRC_ALLOC_CUSTOM_BUFFER(bufname) +#endif + +#define xTraceIsRecordingEnabled() (0) + +#define vTraceSetStopHook(x) (void)(x) + +#endif /*(TRC_USE_TRACEALYZER_RECORDER == 1)*/ + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_RECORDER_H */ diff --git a/Tracealyzer/trcKernelPort.c b/Tracealyzer/trcKernelPort.c new file mode 100644 index 00000000..374e9a6d --- /dev/null +++ b/Tracealyzer/trcKernelPort.c @@ -0,0 +1,1083 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcKernelPort.c + * + * The FreeRTOS-specific parts of the trace recorder + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#include "FreeRTOS.h" + +#if (!defined(TRC_USE_TRACEALYZER_RECORDER) && configUSE_TRACE_FACILITY == 1) +#error Trace Recorder: You need to include trcRecorder.h at the end of your FreeRTOSConfig.h! +#endif + +#if (defined(TRC_USE_TRACEALYZER_RECORDER) && TRC_USE_TRACEALYZER_RECORDER == 1) + +#ifndef TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS + /* TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS is missing in trcConfig.h. */ +#error "TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS must be defined in trcConfig.h." +#endif + +#ifndef TRC_CFG_INCLUDE_TIMER_EVENTS + /* TRC_CFG_INCLUDE_TIMER_EVENTS is missing in trcConfig.h. */ +#error "TRC_CFG_INCLUDE_TIMER_EVENTS must be defined in trcConfig.h." +#endif + +#ifndef TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS + /* TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS is missing in trcConfig.h. */ +#error "TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS must be defined in trcConfig.h." +#endif + +#ifndef TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS + /* TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS is missing in trcConfig.h. Define this as 1 if using FreeRTOS v10 or later and like to trace stream buffer or message buffer events, otherwise 0. */ +#error "TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS must be defined in trcConfig.h." +#endif + +#if (configUSE_TICKLESS_IDLE != 0 && (TRC_HWTC_TYPE == TRC_OS_TIMER_INCR || TRC_HWTC_TYPE == TRC_OS_TIMER_DECR)) + /* + The below error message is to alert you on the following issue: + + The hardware port selected in trcConfig.h uses the operating system timer for the + timestamping, i.e., the periodic interrupt timer that drives the OS tick interrupt. + + When using "tickless idle" mode, the recorder needs an independent time source in + order to correctly record the durations of the idle times. Otherwise, the trace may appear + to have a different length than in reality, and the reported CPU load is also affected. + + You may override this warning by defining the TRC_CFG_ACKNOWLEDGE_TICKLESS_IDLE_WARNING + macro in your trcConfig.h file. But then the time scale may be incorrect during + tickless idle periods. + + To get this correct, override the default timestamping by setting TRC_CFG_HARDWARE_PORT + in trcConfig.h to TRC_HARDWARE_PORT_APPLICATION_DEFINED and define the HWTC macros + accordingly, using a free running counter or an independent periodic interrupt timer. + See trcHardwarePort.h for details. + + For ARM Cortex-M3, M4 and M7 MCUs this is not an issue, since the recorder uses the + DWT cycle counter for timestamping in these cases. + */ + + #ifndef TRC_CFG_ACKNOWLEDGE_TICKLESS_IDLE_WARNING + #error Trace Recorder: This timestamping mode is not recommended with Tickless Idle. + #endif +#endif /* (configUSE_TICKLESS_IDLE != 0 && (TRC_HWTC_TYPE == TRC_OS_TIMER_INCR || TRC_HWTC_TYPE == TRC_OS_TIMER_DECR)) */ + +#include "task.h" +#include "queue.h" + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) || (defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0)) + +static TaskType HandleTzCtrl = NULL; /* TzCtrl task TCB */ + +#if defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION == 1) + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0) +static StackType_t stackTzCtrl[TRC_CFG_CTRL_TASK_STACK_SIZE]; +static StaticTask_t tcbTzCtrl; +#else +#error "configSUPPORT_STATIC_ALLOCATION not supported before FreeRTOS v9" +#endif + +#endif /* defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION == 1) */ + + +/* The TzCtrl task - receives commands from Tracealyzer (start/stop) */ +static portTASK_FUNCTION(TzCtrl, pvParameters); + +#if defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) +void prvReportStackUsage(void); +#else /* defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) */ +#define prvReportStackUsage() +#endif /* defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) */ + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) || (defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0)) */ + +#if (TRC_CFG_INCLUDE_TIMER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) +/* If the project does not include the FreeRTOS timers, TRC_CFG_INCLUDE_TIMER_EVENTS must be set to 0 */ +#include "timers.h" +#endif /* (TRC_CFG_INCLUDE_TIMER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) */ + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) +/* If the project does not include the FreeRTOS event groups, TRC_CFG_INCLUDE_TIMER_EVENTS must be set to 0 */ +#include "event_groups.h" +#endif /* (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) */ + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +/* If the project does not include the FreeRTOS stream buffers, TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS must be set to 0 */ +#include "stream_buffer.h" +#endif /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#if (TRC_CFG_ACKNOWLEDGE_QUEUE_SET_SEND != TRC_ACKNOWLEDGED) && (TRC_CFG_FREERTOS_VERSION == TRC_FREERTOS_VERSION_10_3_0 || TRC_CFG_FREERTOS_VERSION == TRC_FREERTOS_VERSION_10_3_1) && (configUSE_QUEUE_SETS == 1) +#error "When using FreeRTOS v10.3.0 or v10.3.1, please make sure that the trace point in prvNotifyQueueSetContainer() in queue.c is renamed from traceQUEUE_SEND to traceQUEUE_SET_SEND in order to tell them apart from other traceQUEUE_SEND trace points. Then set TRC_CFG_ACKNOWLEDGE_QUEUE_SET_SEND in trcConfig.h to TRC_ACKNOWLEDGED to get rid of this error." +#endif /* (TRC_CFG_ACKNOWLEDGE_QUEUE_SET_SEND != TRC_ACKNOWLEDGED) && (TRC_CFG_FREERTOS_VERSION == TRC_FREERTOS_VERSION_10_3_0 || TRC_CFG_FREERTOS_VERSION == TRC_FREERTOS_VERSION_10_3_1) && (configUSE_QUEUE_SETS == 1) */ + +uint32_t prvTraceGetQueueNumber(void* handle); + +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_8_X_X) + +extern unsigned char ucQueueGetQueueNumber( xQueueHandle pxQueue ); +extern void vQueueSetQueueNumber( xQueueHandle pxQueue, unsigned char ucQueueNumber ); +extern unsigned char ucQueueGetQueueType( xQueueHandle pxQueue ); + +uint32_t prvTraceGetQueueNumber(void* handle) +{ + return (uint32_t)ucQueueGetQueueNumber(handle); +} +#else +uint32_t prvTraceGetQueueNumber(void* handle) +{ + return (uint32_t)uxQueueGetQueueNumber(handle); +} +#endif /* (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_8_X_X) */ + +uint8_t prvTraceGetQueueType(void* handle) +{ + // This is either declared in header file in FreeRTOS 8 and later, or as extern above + return ucQueueGetQueueType(handle); +} + +/* Tasks */ +uint16_t prvTraceGetTaskNumberLow16(void* handle) +{ + return TRACE_GET_LOW16(uxTaskGetTaskNumber(handle)); +} + +uint16_t prvTraceGetTaskNumberHigh16(void* handle) +{ + return TRACE_GET_HIGH16(uxTaskGetTaskNumber(handle)); +} + +void prvTraceSetTaskNumberLow16(void* handle, uint16_t value) +{ + vTaskSetTaskNumber(handle, TRACE_SET_LOW16(uxTaskGetTaskNumber(handle), value)); +} + +void prvTraceSetTaskNumberHigh16(void* handle, uint16_t value) +{ + vTaskSetTaskNumber(handle, TRACE_SET_HIGH16(uxTaskGetTaskNumber(handle), value)); +} + +uint16_t prvTraceGetQueueNumberLow16(void* handle) +{ + return TRACE_GET_LOW16(prvTraceGetQueueNumber(handle)); +} + +uint16_t prvTraceGetQueueNumberHigh16(void* handle) +{ + return TRACE_GET_HIGH16(prvTraceGetQueueNumber(handle)); +} + +void prvTraceSetQueueNumberLow16(void* handle, uint16_t value) +{ + vQueueSetQueueNumber(handle, TRACE_SET_LOW16(prvTraceGetQueueNumber(handle), value)); +} + +void prvTraceSetQueueNumberHigh16(void* handle, uint16_t value) +{ + vQueueSetQueueNumber(handle, TRACE_SET_HIGH16(prvTraceGetQueueNumber(handle), value)); +} + +#if (TRC_CFG_INCLUDE_TIMER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) + +uint16_t prvTraceGetTimerNumberLow16(void* handle) +{ + return TRACE_GET_LOW16(uxTimerGetTimerNumber(handle)); +} + +uint16_t prvTraceGetTimerNumberHigh16(void* handle) +{ + return TRACE_GET_HIGH16(uxTimerGetTimerNumber(handle)); +} + +void prvTraceSetTimerNumberLow16(void* handle, uint16_t value) +{ + vTimerSetTimerNumber(handle, TRACE_SET_LOW16(uxTimerGetTimerNumber(handle), value)); +} + +void prvTraceSetTimerNumberHigh16(void* handle, uint16_t value) +{ + vTimerSetTimerNumber(handle, TRACE_SET_HIGH16(uxTimerGetTimerNumber(handle), value)); +} +#endif /* (TRC_CFG_INCLUDE_TIMER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) + +uint16_t prvTraceGetEventGroupNumberLow16(void* handle) +{ + return TRACE_GET_LOW16(uxEventGroupGetNumber(handle)); +} + +uint16_t prvTraceGetEventGroupNumberHigh16(void* handle) +{ + return TRACE_GET_HIGH16(uxEventGroupGetNumber(handle)); +} + +void prvTraceSetEventGroupNumberLow16(void* handle, uint16_t value) +{ + vEventGroupSetNumber(handle, TRACE_SET_LOW16(uxEventGroupGetNumber(handle), value)); +} + +void prvTraceSetEventGroupNumberHigh16(void* handle, uint16_t value) +{ + vEventGroupSetNumber(handle, TRACE_SET_HIGH16(uxEventGroupGetNumber(handle), value)); +} +#endif /* (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) + +uint16_t prvTraceGetStreamBufferNumberLow16(void* handle) +{ + return TRACE_GET_LOW16(uxStreamBufferGetStreamBufferNumber(handle)); +} + +uint16_t prvTraceGetStreamBufferNumberHigh16(void* handle) +{ + return TRACE_GET_HIGH16(uxStreamBufferGetStreamBufferNumber(handle)); +} + +void prvTraceSetStreamBufferNumberLow16(void* handle, uint16_t value) +{ + vStreamBufferSetStreamBufferNumber(handle, TRACE_SET_LOW16(uxStreamBufferGetStreamBufferNumber(handle), value)); +} + +void prvTraceSetStreamBufferNumberHigh16(void* handle, uint16_t value) +{ + vStreamBufferSetStreamBufferNumber(handle, TRACE_SET_HIGH16(uxStreamBufferGetStreamBufferNumber(handle), value)); +} +#endif /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_CORTEX_A9) + +#define CS_TYPE_NONE 0 +#define CS_TYPE_TASK 1 +#define CS_TYPE_ISR_MASK_CHANGED 2 +#define CS_TYPE_ISR_MASK_NOT_CHANGED 3 + +#define CS_TYPE_INVALID 0xFFFFFFFF + +int cortex_a9_r5_enter_critical(void) +{ + uint32_t cs_type = CS_TYPE_INVALID; + + if ((prvGetCPSR() & 0x001F) == 0x13) // CSPR (ASPR) mode = SVC + { + /* Executing in an ISR other than the context-switch (where interrupts might have been enabled, motivating a critical section). */ + if (ulPortSetInterruptMask() == pdTRUE) + { + cs_type = CS_TYPE_ISR_MASK_NOT_CHANGED; + } + else + { + cs_type = CS_TYPE_ISR_MASK_CHANGED; + } + } + else if (uiTraceSystemState == TRC_STATE_IN_TASKSWITCH) + { + // In the context-switch code. All interrupts are already masked here, so don't modify the mask. + cs_type = CS_TYPE_NONE; + } + else if (uiTraceSystemState != TRC_STATE_IN_TASKSWITCH) + { + // Not within ISR or task-switch context, use a regular critical section. + vPortEnterCritical(); + cs_type = CS_TYPE_TASK; + } + + return cs_type; +} + +void cortex_a9_r5_exit_critical(int cs_type) +{ + switch (cs_type) + { + case CS_TYPE_TASK: + vPortExitCritical(); + break; + + case CS_TYPE_ISR_MASK_CHANGED: + vPortClearInterruptMask(pdFALSE); // pdFALSE means it will reset the IRQ mask. + break; + + case CS_TYPE_ISR_MASK_NOT_CHANGED: + case CS_TYPE_NONE: + // No action in these two cases. + break; + + default: + // Error, should not be possible; + for (;;); + } +} +#endif + +#if defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) + +typedef struct { + void* tcb; + uint32_t uiPreviousLowMark; +} TaskStackMonitorEntry_t; + +TaskStackMonitorEntry_t tasksInStackMonitor[TRC_CFG_STACK_MONITOR_MAX_TASKS] = { { NULL } }; + +int tasksNotIncluded = 0; + +void prvAddTaskToStackMonitor(void* task) +{ + int i; + int foundEmptySlot = 0; + + // find an empty slot + for (i = 0; i < TRC_CFG_STACK_MONITOR_MAX_TASKS; i++) + { + if (tasksInStackMonitor[i].tcb == NULL) + { + tasksInStackMonitor[i].tcb = task; + tasksInStackMonitor[i].uiPreviousLowMark = 0xFFFFFFFF; + foundEmptySlot = 1; + break; + } + } + + if (foundEmptySlot == 0) + { + tasksNotIncluded++; + } +} + +void prvRemoveTaskFromStackMonitor(void* task) +{ + int i; + + for (i = 0; i < TRC_CFG_STACK_MONITOR_MAX_TASKS; i++) + { + if (tasksInStackMonitor[i].tcb == task) + { + tasksInStackMonitor[i].tcb = NULL; + tasksInStackMonitor[i].uiPreviousLowMark = 0; + } + } +} + +void prvReportStackUsage() +{ + static int i = 0; /* Static index used to loop over the monitored tasks */ + int count = 0; /* The number of generated reports */ + int initial = i; /* Used to make sure we break if we are back at the inital value */ + + do + { + /* Check the current spot */ + if (tasksInStackMonitor[i].tcb != NULL) + { + /* Get the amount of unused stack */ + uint32_t unusedStackSpace = uxTaskGetStackHighWaterMark((TaskType)tasksInStackMonitor[i].tcb); + + /* Store for later use */ + if (tasksInStackMonitor[i].uiPreviousLowMark > unusedStackSpace) + tasksInStackMonitor[i].uiPreviousLowMark = unusedStackSpace; + +#if TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT + prvTraceStoreKernelCallWithParam(TRACE_UNUSED_STACK, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(tasksInStackMonitor[i].tcb), tasksInStackMonitor[i].uiPreviousLowMark); +#else /* TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT */ + prvTraceStoreEvent2(PSF_EVENT_UNUSED_STACK, (uint32_t)tasksInStackMonitor[i].tcb, tasksInStackMonitor[i].uiPreviousLowMark); +#endif /* TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT */ + + count++; + } + + i = (i + 1) % TRC_CFG_STACK_MONITOR_MAX_TASKS; // Move i beyond this task + } while (count < TRC_CFG_STACK_MONITOR_MAX_REPORTS && i != initial); +} +#endif /* defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) */ + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +static void* pCurrentTCB = NULL; + +/* Monitored by TzCtrl task, that give warnings as User Events */ +extern volatile uint32_t NoRoomForSymbol; +extern volatile uint32_t NoRoomForObjectData; +extern volatile uint32_t LongestSymbolName; +extern volatile uint32_t MaxBytesTruncated; + +/* User Event Channel for giving warnings regarding NoRoomForSymbol etc. */ +traceString trcWarningChannel; + +#define TRC_PORT_MALLOC(size) pvPortMalloc(size) + +TRC_STREAM_PORT_ALLOCATE_FIELDS() + +/* Called by TzCtrl task periodically (Normally every 100 ms) */ +static void prvCheckRecorderStatus(void); + +extern void prvTraceWarning(int errCode); + +/******************************************************************************* + * vTraceEnable + * + * Function that enables the tracing and creates the control task. It will halt + * execution until a Start command has been received if haltUntilStart is true. + * + ******************************************************************************/ +void vTraceEnable(int startOption) +{ + int32_t bytes = 0; + int32_t status; + extern uint32_t RecorderEnabled; + TracealyzerCommandType msg; + + /* Only do this first time...*/ + if (HandleTzCtrl == NULL) + { + TRC_STREAM_PORT_INIT(); + + /* The #WFR channel means "Warnings from Recorder" and + * is used to store warnings and errors from the recorder. + * The abbreviation #WFR is used instead of the longer full name, + * to avoid truncation by small slots in the symbol table. + * This is translated in Tracealyzer and shown as the full name, + * "Warnings from Recorder". + * + * Note: Requires that TRC_CFG_INCLUDE_USER_EVENTS is 1. */ + + trcWarningChannel = xTraceRegisterString("#WFR"); + + /* Creates the TzCtrl task - receives trace commands (start, stop, ...) */ + #if defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION == 1) + HandleTzCtrl = xTaskCreateStatic(TzCtrl, STRING_CAST("TzCtrl"), TRC_CFG_CTRL_TASK_STACK_SIZE, NULL, TRC_CFG_CTRL_TASK_PRIORITY, stackTzCtrl, &tcbTzCtrl); + #else + xTaskCreate( TzCtrl, STRING_CAST("TzCtrl"), TRC_CFG_CTRL_TASK_STACK_SIZE, NULL, TRC_CFG_CTRL_TASK_PRIORITY, &HandleTzCtrl ); + #endif + + if (HandleTzCtrl == NULL) + { + prvTraceError(PSF_ERROR_TZCTRLTASK_NOT_CREATED); + } + } + + if (startOption == TRC_START_AWAIT_HOST) + { + /* We keep trying to read commands until the recorder has been started */ + do + { + bytes = 0; + + status = TRC_STREAM_PORT_READ_DATA(&msg, sizeof(TracealyzerCommandType), (int32_t*)&bytes); + + if (status != 0) + { + prvTraceWarning(PSF_WARNING_STREAM_PORT_READ); + } + + if ((status == 0) && (bytes == sizeof(TracealyzerCommandType))) + { + if (prvIsValidCommand(&msg)) + { + if (msg.cmdCode == CMD_SET_ACTIVE && msg.param1 == 1) + { + /* On start, init and reset the timestamping */ + TRC_PORT_SPECIFIC_INIT(); + } + + prvProcessCommand(&msg); + } + } + } + while (RecorderEnabled == 0); + } + else if (startOption == TRC_START) + { + /* We start streaming directly - this assumes that the interface is ready! */ + TRC_PORT_SPECIFIC_INIT(); + + msg.cmdCode = CMD_SET_ACTIVE; + msg.param1 = 1; + prvProcessCommand(&msg); + } + else + { + /* On TRC_INIT */ + TRC_PORT_SPECIFIC_INIT(); + } +} + +#if (TRC_CFG_SCHEDULING_ONLY == 0) +/******************************************************************************* + * vTraceSetQueueName(void* object, const char* name) + * + * Parameter object: pointer to the Queue that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for Queue objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetQueueName(void* object, const char* name) +{ + vTraceStoreKernelObjectName(object, name); +} + +/******************************************************************************* + * vTraceSetSemaphoreName(void* object, const char* name) + * + * Parameter object: pointer to the Semaphore that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for Semaphore objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetSemaphoreName(void* object, const char* name) +{ + vTraceStoreKernelObjectName(object, name); +} + +/******************************************************************************* + * vTraceSetMutexName(void* object, const char* name) + * + * Parameter object: pointer to the Mutex that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for Mutex objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetMutexName(void* object, const char* name) +{ + vTraceStoreKernelObjectName(object, name); +} + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) +/******************************************************************************* +* vTraceSetEventGroupName(void* object, const char* name) +* +* Parameter object: pointer to the vTraceSetEventGroupName that shall be named +* Parameter name: the name to set (const string literal) +* +* Sets a name for EventGroup objects for display in Tracealyzer. +******************************************************************************/ +void vTraceSetEventGroupName(void* object, const char* name) +{ + vTraceStoreKernelObjectName(object, name); +} +#endif /* (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) */ + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +/******************************************************************************* +* vTraceSetStreamBufferName(void* object, const char* name) +* +* Parameter object: pointer to the StreamBuffer that shall be named +* Parameter name: the name to set (const string literal) +* +* Sets a name for StreamBuffer objects for display in Tracealyzer. +******************************************************************************/ +void vTraceSetStreamBufferName(void* object, const char* name) +{ + vTraceStoreKernelObjectName(object, name); +} + +/******************************************************************************* +* vTraceSetMessageBufferName(void* object, const char* name) +* +* Parameter object: pointer to the MessageBuffer that shall be named +* Parameter name: the name to set (const string literal) +* +* Sets a name for MessageBuffer objects for display in Tracealyzer. +******************************************************************************/ +void vTraceSetMessageBufferName(void* object, const char* name) +{ + vTraceStoreKernelObjectName(object, name); +} +#endif /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#endif /* (TRC_CFG_SCHEDULING_ONLY == 0) */ + +/******************************************************************************* + * prvGetCurrentTaskHandle + * + * Function that returns the handle to the currently executing task. + * + ******************************************************************************/ +void* prvTraceGetCurrentTaskHandle(void) +{ + return xTaskGetCurrentTaskHandle(); +} + +/******************************************************************************* + * prvIsNewTCB + * + * Tells if this task is already executing, or if there has been a task-switch. + * Assumed to be called within a trace hook in kernel context. + ******************************************************************************/ +uint32_t prvIsNewTCB(void* pNewTCB) +{ + if (pCurrentTCB != pNewTCB) + { + pCurrentTCB = pNewTCB; + return 1; + } + return 0; +} + +/******************************************************************************* + * prvTraceIsSchedulerSuspended + * + * Returns true if the RTOS scheduler currently is disabled, thus preventing any + * task-switches from occurring. Only called from vTraceStoreISREnd. + ******************************************************************************/ +unsigned char prvTraceIsSchedulerSuspended(void) +{ + /* Assumed to be available in FreeRTOS. According to the FreeRTOS docs, + INCLUDE_xTaskGetSchedulerState or configUSE_TIMERS must be set to 1 in + FreeRTOSConfig.h for this function to be available. */ + + return xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED; +} + +/******************************************************************************* + * prvCheckRecorderStatus + * + * Called by TzCtrl task periodically (every 100 ms - seems reasonable). + * Checks a number of diagnostic variables and give warnings as user events, + * in most cases including a suggested solution. + ******************************************************************************/ +static void prvCheckRecorderStatus(void) +{ +#if defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) + if (tasksNotIncluded > 0) + { + prvTraceWarning(PSF_WARNING_STACKMON_NO_SLOTS); + tasksNotIncluded = 0; + } +#endif /* defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) */ + + if (NoRoomForSymbol > 0) + { + prvTraceWarning(PSF_WARNING_SYMBOL_TABLE_SLOTS); + NoRoomForSymbol = 0; + } + + if (NoRoomForObjectData > 0) + { + prvTraceWarning(PSF_WARNING_OBJECT_DATA_SLOTS); + NoRoomForObjectData = 0; + } + + if (LongestSymbolName > (TRC_CFG_SYMBOL_MAX_LENGTH)) + { + prvTraceWarning(PSF_WARNING_SYMBOL_MAX_LENGTH); + LongestSymbolName = 0; + } + + if (MaxBytesTruncated > 0) + { + prvTraceWarning(PSF_WARNING_STRING_TOO_LONG); + MaxBytesTruncated = 0; + } +} + +/******************************************************************************* + * TzCtrl + * + * Task for sending the trace data from the internal buffer to the stream + * interface (assuming TRC_STREAM_PORT_USE_INTERNAL_BUFFER == 1) and for + * receiving commands from Tracealyzer. Also does some diagnostics. + ******************************************************************************/ +static portTASK_FUNCTION( TzCtrl, pvParameters ) +{ + TracealyzerCommandType msg; + int32_t bytes = 0; + int32_t status = 0; + (void)pvParameters; + + while (1) + { + do + { + /* Listen for new commands */ + bytes = 0; + status = TRC_STREAM_PORT_READ_DATA(&msg, sizeof(TracealyzerCommandType), (int32_t*)&bytes); + + if (status != 0) + { + /* The connection has failed, stop tracing */ + vTraceStop(); + } + + if ((status == 0) && (bytes == sizeof(TracealyzerCommandType))) + { + if (prvIsValidCommand(&msg)) + { + prvProcessCommand(&msg); /* Start or Stop currently... */ + } + } + +/* If the internal buffer is disabled, the COMMIT macro instead sends the data directly + from the "event functions" (using TRC_STREAM_PORT_WRITE_DATA). */ +#if (TRC_STREAM_PORT_USE_INTERNAL_BUFFER == 1) + /* If there is a buffer page, this sends it to the streaming interface using TRC_STREAM_PORT_WRITE_DATA. */ + bytes = prvPagedEventBufferTransfer(); +#endif + + /* If there was data sent or received (bytes != 0), loop around and repeat, if there is more data to send or receive. + Otherwise, step out of this loop and sleep for a while. */ + + } while (bytes != 0); + + if (xTraceIsRecordingEnabled()) + { + prvCheckRecorderStatus(); + prvReportStackUsage(); + } + + vTaskDelay(TRC_CFG_CTRL_TASK_DELAY); + } +} + +#endif /*(TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING)*/ + + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + +/* Internal flag to tell the context of tracePEND_FUNC_CALL_FROM_ISR */ +int uiInEventGroupSetBitsFromISR = 0; + +/****************************************************************************** + * TraceQueueClassTable + * Translates a FreeRTOS QueueType into trace objects classes (TRACE_CLASS_). + * Has one entry for each QueueType, gives TRACE_CLASS ID. + ******************************************************************************/ +traceObjectClass TraceQueueClassTable[5] = { + TRACE_CLASS_QUEUE, + TRACE_CLASS_MUTEX, + TRACE_CLASS_SEMAPHORE, + TRACE_CLASS_SEMAPHORE, + TRACE_CLASS_MUTEX +}; + +#if (TRC_CFG_SCHEDULING_ONLY == 0) +/******************************************************************************* + * vTraceSetQueueName(void* object, const char* name) + * + * Parameter object: pointer to the Queue that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for Queue objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetQueueName(void* object, const char* name) +{ + prvTraceSetObjectName(TRACE_CLASS_QUEUE, TRACE_GET_OBJECT_NUMBER(QUEUE, object), name); +} + +/******************************************************************************* + * vTraceSetSemaphoreName(void* object, const char* name) + * + * Parameter object: pointer to the Semaphore that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for Semaphore objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetSemaphoreName(void* object, const char* name) +{ + prvTraceSetObjectName(TRACE_CLASS_SEMAPHORE, TRACE_GET_OBJECT_NUMBER(QUEUE, object), name); +} + +/******************************************************************************* + * vTraceSetMutexName(void* object, const char* name) + * + * Parameter object: pointer to the Mutex that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for Semaphore objects for display in Tracealyzer. + ******************************************************************************/ +void vTraceSetMutexName(void* object, const char* name) +{ + prvTraceSetObjectName(TRACE_CLASS_MUTEX, TRACE_GET_OBJECT_NUMBER(QUEUE, object), name); +} + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) +/******************************************************************************* +* vTraceSetEventGroupName(void* object, const char* name) +* +* Parameter object: pointer to the EventGroup that shall be named +* Parameter name: the name to set (const string literal) +* +* Sets a name for EventGroup objects for display in Tracealyzer. +******************************************************************************/ +void vTraceSetEventGroupName(void* object, const char* name) +{ + prvTraceSetObjectName(TRACE_CLASS_EVENTGROUP, TRACE_GET_OBJECT_NUMBER(EVENTGROUP, object), name); +} +#endif /* (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) */ + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +/******************************************************************************* +* vTraceSetStreamBufferName(void* object, const char* name) +* +* Parameter object: pointer to the StreamBuffer that shall be named +* Parameter name: the name to set (const string literal) +* +* Sets a name for StreamBuffer objects for display in Tracealyzer. +******************************************************************************/ +void vTraceSetStreamBufferName(void* object, const char* name) +{ + prvTraceSetObjectName(TRACE_CLASS_STREAMBUFFER, TRACE_GET_OBJECT_NUMBER(STREAMBUFFER, object), name); +} + +/******************************************************************************* +* vTraceSetMessageBufferName(void* object, const char* name) +* +* Parameter object: pointer to the MessageBuffer that shall be named +* Parameter name: the name to set (const string literal) +* +* Sets a name for MessageBuffer objects for display in Tracealyzer. +******************************************************************************/ +void vTraceSetMessageBufferName(void* object, const char* name) +{ + prvTraceSetObjectName(TRACE_CLASS_MESSAGEBUFFER, TRACE_GET_OBJECT_NUMBER(STREAMBUFFER, object), name); +} +#endif /* (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#endif /* (TRC_CFG_SCHEDULING_ONLY == 0) */ + +void* prvTraceGetCurrentTaskHandle() +{ + return xTaskGetCurrentTaskHandle(); +} + +/****************************************************************************** +* vTraceEnable(int startOption) - snapshot mode +* +* Initializes and optionally starts the trace, depending on the start option. +* To use the trace recorder, the startup must call vTraceEnable before any RTOS +* calls are made (including "create" calls). Three start options are provided: +* +* TRC_START: Starts the tracing directly. In snapshot mode this allows for +* starting the trace at any point in your code, assuming vTraceEnable(TRC_INIT) +* has been called in the startup. +* Can also be used for streaming without Tracealyzer control, e.g. to a local +* flash file system (assuming such a "stream port", see trcStreamingPort.h). +* +* TRC_INIT: Initializes the trace recorder, but does not start the tracing. +* In snapshot mode, this must be followed by a vTraceEnable(TRC_START) sometime +* later. +* +* Usage examples, in snapshot mode: +* +* Snapshot trace, from startup: +* +* vTraceEnable(TRC_START); +* +* +* Snapshot trace, from a later point: +* +* vTraceEnable(TRC_INIT); +* +* ... +* vTraceEnable(TRC_START); // e.g., in task context, at some relevant event +* +* +* Note: See other implementation of vTraceEnable in trcStreamingRecorder.c +******************************************************************************/ +void vTraceEnable(int startOption) +{ + prvTraceInitTraceData(); + + if (startOption == TRC_START) + { + vTraceStart(); + } + else if (startOption == TRC_START_AWAIT_HOST) + { + prvTraceError("vTraceEnable(TRC_START_AWAIT_HOST) not allowed in Snapshot mode"); + } + else if (startOption != TRC_INIT) + { + prvTraceError("Unexpected argument to vTraceEnable (snapshot mode)"); + } + +#if defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) + /* Creates the TzCtrl task - reports unsed stack */ + if (HandleTzCtrl == NULL) + { +#if defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION == 1) + HandleTzCtrl = xTaskCreateStatic(TzCtrl, STRING_CAST("TzCtrl"), TRC_CFG_CTRL_TASK_STACK_SIZE, NULL, TRC_CFG_CTRL_TASK_PRIORITY, stackTzCtrl, &tcbTzCtrl); +#else /* defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION == 1) */ + xTaskCreate(TzCtrl, STRING_CAST("TzCtrl"), TRC_CFG_CTRL_TASK_STACK_SIZE, NULL, TRC_CFG_CTRL_TASK_PRIORITY, &HandleTzCtrl); +#endif /* defined(configSUPPORT_STATIC_ALLOCATION) && (configSUPPORT_STATIC_ALLOCATION == 1) */ + } + +#endif /* defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) */ +} + +/******************************************************************************* +* TzCtrl +* +* Task for sending the trace data from the internal buffer to the stream +* interface (assuming TRC_STREAM_PORT_USE_INTERNAL_BUFFER == 1) and for +* receiving commands from Tracealyzer. Also does some diagnostics. +******************************************************************************/ +#if defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) +static portTASK_FUNCTION(TzCtrl, pvParameters) +{ + (void)pvParameters; + + while (1) + { + if (xTraceIsRecordingEnabled()) + { + prvReportStackUsage(); + } + + vTaskDelay(TRC_CFG_CTRL_TASK_DELAY); + } +} +#endif + +/* Initialization of the object property table */ +void vTraceInitObjectPropertyTable() +{ + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectClasses = TRACE_NCLASSES; + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[0] = TRC_CFG_NQUEUE; + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[1] = TRC_CFG_NSEMAPHORE; + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[2] = TRC_CFG_NMUTEX; + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[3] = TRC_CFG_NTASK; + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[4] = TRC_CFG_NISR; + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[5] = TRC_CFG_NTIMER; + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[6] = TRC_CFG_NEVENTGROUP; + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[7] = TRC_CFG_NSTREAMBUFFER; + RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[8] = TRC_CFG_NMESSAGEBUFFER; + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[0] = TRC_CFG_NAME_LEN_QUEUE; + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[1] = TRC_CFG_NAME_LEN_SEMAPHORE; + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[2] = TRC_CFG_NAME_LEN_MUTEX; + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[3] = TRC_CFG_NAME_LEN_TASK; + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[4] = TRC_CFG_NAME_LEN_ISR; + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[5] = TRC_CFG_NAME_LEN_TIMER; + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[6] = TRC_CFG_NAME_LEN_EVENTGROUP; + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[7] = TRC_CFG_NAME_LEN_STREAMBUFFER; + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[8] = TRC_CFG_NAME_LEN_MESSAGEBUFFER; + RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[0] = PropertyTableSizeQueue; + RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[1] = PropertyTableSizeSemaphore; + RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[2] = PropertyTableSizeMutex; + RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[3] = PropertyTableSizeTask; + RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[4] = PropertyTableSizeISR; + RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[5] = PropertyTableSizeTimer; + RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[6] = PropertyTableSizeEventGroup; + RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[7] = PropertyTableSizeStreamBuffer; + RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[8] = PropertyTableSizeMessageBuffer; + RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[0] = StartIndexQueue; + RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[1] = StartIndexSemaphore; + RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[2] = StartIndexMutex; + RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[3] = StartIndexTask; + RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[4] = StartIndexISR; + RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[5] = StartIndexTimer; + RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[6] = StartIndexEventGroup; + RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[7] = StartIndexStreamBuffer; + RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[8] = StartIndexMessageBuffer; + RecorderDataPtr->ObjectPropertyTable.ObjectPropertyTableSizeInBytes = TRACE_OBJECT_TABLE_SIZE; +} + +/* Initialization of the handle mechanism, see e.g, prvTraceGetObjectHandle */ +void vTraceInitObjectHandleStack() +{ + objectHandleStacks.indexOfNextAvailableHandle[0] = objectHandleStacks.lowestIndexOfClass[0] = 0; + objectHandleStacks.indexOfNextAvailableHandle[1] = objectHandleStacks.lowestIndexOfClass[1] = (TRC_CFG_NQUEUE); + objectHandleStacks.indexOfNextAvailableHandle[2] = objectHandleStacks.lowestIndexOfClass[2] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE); + objectHandleStacks.indexOfNextAvailableHandle[3] = objectHandleStacks.lowestIndexOfClass[3] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX); + objectHandleStacks.indexOfNextAvailableHandle[4] = objectHandleStacks.lowestIndexOfClass[4] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK); + objectHandleStacks.indexOfNextAvailableHandle[5] = objectHandleStacks.lowestIndexOfClass[5] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR); + objectHandleStacks.indexOfNextAvailableHandle[6] = objectHandleStacks.lowestIndexOfClass[6] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) + (TRC_CFG_NTIMER); + objectHandleStacks.indexOfNextAvailableHandle[7] = objectHandleStacks.lowestIndexOfClass[7] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) + (TRC_CFG_NTIMER) + (TRC_CFG_NEVENTGROUP); + objectHandleStacks.indexOfNextAvailableHandle[8] = objectHandleStacks.lowestIndexOfClass[8] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) + (TRC_CFG_NTIMER) + (TRC_CFG_NEVENTGROUP) + (TRC_CFG_NSTREAMBUFFER); + + objectHandleStacks.highestIndexOfClass[0] = (TRC_CFG_NQUEUE) - 1; + objectHandleStacks.highestIndexOfClass[1] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) - 1; + objectHandleStacks.highestIndexOfClass[2] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) - 1; + objectHandleStacks.highestIndexOfClass[3] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) - 1; + objectHandleStacks.highestIndexOfClass[4] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) - 1; + objectHandleStacks.highestIndexOfClass[5] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) + (TRC_CFG_NTIMER) - 1; + objectHandleStacks.highestIndexOfClass[6] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) + (TRC_CFG_NTIMER) + (TRC_CFG_NEVENTGROUP) - 1; + objectHandleStacks.highestIndexOfClass[7] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) + (TRC_CFG_NTIMER) + (TRC_CFG_NEVENTGROUP) + (TRC_CFG_NSTREAMBUFFER) - 1; + objectHandleStacks.highestIndexOfClass[8] = (TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) + (TRC_CFG_NTIMER) + (TRC_CFG_NEVENTGROUP) + (TRC_CFG_NSTREAMBUFFER) + (TRC_CFG_NMESSAGEBUFFER) - 1; +} + +/* Returns the "Not enough handles" error message for this object class */ +const char* pszTraceGetErrorNotEnoughHandles(traceObjectClass objectclass) +{ + switch(objectclass) + { + case TRACE_CLASS_TASK: + return "Not enough TASK handles - increase TRC_CFG_NTASK in trcSnapshotConfig.h"; + case TRACE_CLASS_ISR: + return "Not enough ISR handles - increase TRC_CFG_NISR in trcSnapshotConfig.h"; + case TRACE_CLASS_SEMAPHORE: + return "Not enough SEMAPHORE handles - increase TRC_CFG_NSEMAPHORE in trcSnapshotConfig.h"; + case TRACE_CLASS_MUTEX: + return "Not enough MUTEX handles - increase TRC_CFG_NMUTEX in trcSnapshotConfig.h"; + case TRACE_CLASS_QUEUE: + return "Not enough QUEUE handles - increase TRC_CFG_NQUEUE in trcSnapshotConfig.h"; + case TRACE_CLASS_TIMER: + return "Not enough TIMER handles - increase TRC_CFG_NTIMER in trcSnapshotConfig.h"; + case TRACE_CLASS_EVENTGROUP: + return "Not enough EVENTGROUP handles - increase TRC_CFG_NEVENTGROUP in trcSnapshotConfig.h"; + case TRACE_CLASS_STREAMBUFFER: + return "Not enough STREAMBUFFER handles - increase TRC_CFG_NSTREAMBUFFER in trcSnapshotConfig.h"; + case TRACE_CLASS_MESSAGEBUFFER: + return "Not enough MESSAGEBUFFER handles - increase TRC_CFG_NMESSAGEBUFFER in trcSnapshotConfig.h"; + default: + return "pszTraceGetErrorHandles: Invalid objectclass!"; + } +} + +/******************************************************************************* + * prvTraceIsSchedulerSuspended + * + * Returns true if the RTOS scheduler currently is disabled, thus preventing any + * task-switches from occurring. Only called from vTraceStoreISREnd. + ******************************************************************************/ +#if (TRC_CFG_INCLUDE_ISR_TRACING == 1) +unsigned char prvTraceIsSchedulerSuspended(void) +{ + /* Assumed to be available in FreeRTOS. According to the FreeRTOS docs, + INCLUDE_xTaskGetSchedulerState or configUSE_TIMERS must be set to 1 in + FreeRTOSConfig.h for this function to be available. */ + + return xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED; +} +#endif + +#endif /* Snapshot mode */ + +#endif /*(TRC_USE_TRACEALYZER_RECORDER == 1)*/ diff --git a/Tracealyzer/trcSnapshotRecorder.c b/Tracealyzer/trcSnapshotRecorder.c new file mode 100644 index 00000000..a2513b08 --- /dev/null +++ b/Tracealyzer/trcSnapshotRecorder.c @@ -0,0 +1,3074 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcSnapshotRecorder.c + * + * The generic core of the trace recorder's snapshot mode. + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#include "trcRecorder.h" + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#include +#include +#include + +#if ((TRC_HWTC_TYPE == TRC_CUSTOM_TIMER_INCR) || (TRC_HWTC_TYPE == TRC_CUSTOM_TIMER_DECR)) + #error "CUSTOM timestamping mode is not (yet) supported in snapshot mode!" +#endif + +/* DO NOT CHANGE */ +#define TRACE_MINOR_VERSION 5 +#if (TRC_CFG_INCLUDE_ISR_TRACING == 1) +static traceHandle isrstack[TRC_CFG_MAX_ISR_NESTING]; +int32_t isPendingContextSwitch = 0; +#endif /* (TRC_CFG_INCLUDE_ISR_TRACING == 1) */ + +#if !defined TRC_CFG_INCLUDE_READY_EVENTS || TRC_CFG_INCLUDE_READY_EVENTS == 1 +static int readyEventsEnabled = 1; +#endif /*!defined TRC_CFG_INCLUDE_READY_EVENTS || TRC_CFG_INCLUDE_READY_EVENTS == 1*/ + +/******************************************************************************* + * uiTraceTickCount + * + * This variable is should be updated by the Kernel tick interrupt. This does + * not need to be modified when developing a new timer port. It is preferred to + * keep any timer port changes in the HWTC macro definitions, which typically + * give sufficient flexibility. + ******************************************************************************/ +uint32_t uiTraceTickCount = 0; + +uint32_t trace_disable_timestamp = 0; + +static uint32_t last_timestamp = 0; + +/* Indicates if we are currently performing a context switch or just running application code */ +volatile uint32_t uiTraceSystemState = TRC_STATE_IN_STARTUP; + +/* Flag that shows if inside a critical section of the recorder */ +volatile int recorder_busy = 0; + +/* Holds the value set by vTraceSetFrequency */ +uint32_t timestampFrequency = 0; + +/* The last error message of the recorder. NULL if no error message. */ +const char* traceErrorMessage = NULL; + +int8_t nISRactive = 0; + +traceHandle handle_of_last_logged_task = 0; + +/* Called when the recorder is stopped, set by vTraceSetStopHook. */ +TRACE_STOP_HOOK vTraceStopHookPtr = (TRACE_STOP_HOOK)0; + +uint16_t CurrentFilterMask = 0xFFFF; + +uint16_t CurrentFilterGroup = FilterGroup0; + +extern int8_t nISRactive; + +extern traceHandle handle_of_last_logged_task; + +/*************** Private Functions *******************************************/ +static void prvStrncpy(char* dst, const char* src, uint32_t maxLength); +static uint8_t prvTraceGetObjectState(uint8_t objectclass, traceHandle id); +static void prvTraceGetChecksum(const char *pname, uint8_t* pcrc, uint8_t* plength); +static void* prvTraceNextFreeEventBufferSlot(void); +static uint16_t prvTraceGetDTS(uint16_t param_maxDTS); +static traceString prvTraceOpenSymbol(const char* name, traceString userEventChannel); +static void prvTraceUpdateCounters(void); + +void vTraceStoreMemMangEvent(uint32_t ecode, uint32_t address, int32_t signed_size); + +#if (TRC_CFG_SNAPSHOT_MODE == TRC_SNAPSHOT_MODE_RING_BUFFER) +static void prvCheckDataToBeOverwrittenForMultiEntryEvents(uint8_t nEntries); +#endif + +static traceString prvTraceCreateSymbolTableEntry(const char* name, + uint8_t crc6, + uint8_t len, + traceString channel); + +static traceString prvTraceLookupSymbolTableEntry(const char* name, + uint8_t crc6, + uint8_t len, + traceString channel); + + +#if (TRC_CFG_INCLUDE_ISR_TRACING == 0) +/* ISR tracing is turned off */ +void prvTraceIncreaseISRActive(void); +void prvTraceDecreaseISRActive(void); +#endif /*(TRC_CFG_INCLUDE_ISR_TRACING == 0)*/ + +#if (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) +static uint8_t prvTraceGet8BitHandle(traceHandle handle); +#else +#define prvTraceGet8BitHandle(x) ((uint8_t)x) +#endif + + +#if (TRC_CFG_INCLUDE_MEMMANG_EVENTS == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) +static uint32_t heapMemUsage = 0; +#endif + +#if (TRC_CFG_SCHEDULING_ONLY == 0) +static uint32_t prvTraceGetParam(uint32_t, uint32_t); +#endif + +/******************************************************************************* + * prvTracePortGetTimeStamp + * + * Returns the current time based on the HWTC macros which provide a hardware + * isolation layer towards the hardware timer/counter. + * + * The HWTC macros and prvTracePortGetTimeStamp is the main porting issue + * or the trace recorder library. Typically you should not need to change + * the code of prvTracePortGetTimeStamp if using the HWTC macros. + * + ******************************************************************************/ +void prvTracePortGetTimeStamp(uint32_t *puiTimestamp); + +static void prvTraceTaskInstanceFinish(int8_t direct); + +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) +#if (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) +static void vTraceUBData_Helper(traceUBChannel channelPair, va_list vl); +static void prvTraceUBHelper1(traceUBChannel channel, traceString eventLabel, traceString formatLabel, va_list vl); +static void prvTraceUBHelper2(traceUBChannel channel, uint32_t* data, uint32_t noOfSlots); +#endif /* (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) */ +#endif /* ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) */ + +/********* Public Functions **************************************************/ + +uint16_t uiIndexOfObject(traceHandle objecthandle, uint8_t objectclass); + +/******************************************************************************* + * prvTraceError + * + * Called by various parts in the recorder. Stops the recorder and stores a + * pointer to an error message, which is printed by the monitor task. + ******************************************************************************/ +void prvTraceError(const char* msg); + +/******************************************************************************* + * vTraceSetRecorderDataBuffer + * + * If custom allocation is used, this function must be called so the recorder + * library knows where to save the trace data. + ******************************************************************************/ +#if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM) +void vTraceSetRecorderDataBuffer(void* pRecorderData) +{ + TRACE_ASSERT(pRecorderData != NULL, "vTraceSetRecorderDataBuffer, pRecorderData == NULL", TRC_UNUSED); + RecorderDataPtr = pRecorderData; +} +#endif + +/******************************************************************************* + * vTraceSetStopHook + * + * Sets a function to be called when the recorder is stopped. This can be used + * to save the trace to a file system, if available. This is only implemented + * for snapshot mode. + ******************************************************************************/ +void vTraceSetStopHook(TRACE_STOP_HOOK stopHookFunction) +{ + vTraceStopHookPtr = stopHookFunction; +} + +/******************************************************************************* + * vTraceClear + * + * Resets the recorder. Only necessary if a restart is desired - this is not + * needed in the startup initialization. + ******************************************************************************/ +void vTraceClear(void) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + trcCRITICAL_SECTION_BEGIN(); + RecorderDataPtr->absTimeLastEventSecond = 0; + RecorderDataPtr->absTimeLastEvent = 0; + RecorderDataPtr->nextFreeIndex = 0; + RecorderDataPtr->numEvents = 0; + RecorderDataPtr->bufferIsFull = 0; + traceErrorMessage = NULL; + RecorderDataPtr->internalErrorOccured = 0; + (void)memset(RecorderDataPtr->eventData, 0, RecorderDataPtr->maxEvents * 4); + handle_of_last_logged_task = 0; + trcCRITICAL_SECTION_END(); +} + +/******************************************************************************* + * uiTraceStart + * + * Starts the recorder. The recorder will not be started if an error has been + * indicated using prvTraceError, e.g. if any of the Nx constants in trcConfig.h + * has a too small value (TRC_CFG_NTASK, TRC_CFG_NQUEUE, etc). + * + * Returns 1 if the recorder was started successfully. + * Returns 0 if the recorder start was prevented due to a previous internal + * error. In that case, check xTraceGetLastError to get the error message. + * Any error message is also presented when opening a trace file. + * + * This function is obsolete, but has been saved for backwards compatibility. + * We recommend using vTraceEnable instead. + ******************************************************************************/ +uint32_t uiTraceStart(void) +{ + traceHandle handle; + TRACE_ALLOC_CRITICAL_SECTION(); + + handle = 0; + + if (RecorderDataPtr == NULL) + { + TRACE_ASSERT(RecorderDataPtr != NULL, "Recorder not initialized. Use vTraceEnable() instead!", 0); + return 0; + } + + if (RecorderDataPtr->recorderActive == 1) + return 1; /* Already running */ + + if (traceErrorMessage == NULL) + { + trcCRITICAL_SECTION_BEGIN(); + RecorderDataPtr->recorderActive = 1; + + handle = TRACE_GET_TASK_NUMBER(TRACE_GET_CURRENT_TASK()); + if (handle == 0) + { + /* This occurs if the scheduler is not yet started. + This creates a dummy "(startup)" task entry internally in the + recorder */ + handle = prvTraceGetObjectHandle(TRACE_CLASS_TASK); + prvTraceSetObjectName(TRACE_CLASS_TASK, handle, "(startup)"); + + prvTraceSetPriorityProperty(TRACE_CLASS_TASK, handle, 0); + } + + prvTraceStoreTaskswitch(handle); /* Register the currently running task */ + trcCRITICAL_SECTION_END(); + } + + return RecorderDataPtr->recorderActive; +} + +/******************************************************************************* + * vTraceStart + * + * Starts the recorder. The recorder will not be started if an error has been + * indicated using prvTraceError, e.g. if any of the Nx constants in trcConfig.h + * has a too small value (TRC_CFG_NTASK, TRC_CFG_NQUEUE, etc). + * + * This function is obsolete, but has been saved for backwards compatibility. + * We recommend using vTraceEnable instead. + ******************************************************************************/ +void vTraceStart(void) +{ + (void)uiTraceStart(); +} + +/******************************************************************************* + * vTraceStop + * + * Stops the recorder. The recording can be resumed by calling vTraceStart. + * This does not reset the recorder. Use vTraceClear if that is desired. + ******************************************************************************/ +void vTraceStop(void) +{ + if (RecorderDataPtr != NULL) + { + RecorderDataPtr->recorderActive = 0; + } + + if (vTraceStopHookPtr != (TRACE_STOP_HOOK)0) + { + (*vTraceStopHookPtr)(); /* An application call-back function. */ + } +} + +/******************************************************************************* +* xTraceIsRecordingEnabled +* Returns true (1) if the recorder is enabled (i.e. is recording), otherwise 0. +******************************************************************************/ +int xTraceIsRecordingEnabled(void) +{ + if (RecorderDataPtr != NULL) + { + return (int)RecorderDataPtr->recorderActive; + } + else + { + return 0; + } +} + +/******************************************************************************* + * xTraceGetLastError + * + * Gives the last error message, if any. NULL if no error message is stored. + * Any error message is also presented when opening a trace file. + ******************************************************************************/ +const char* xTraceGetLastError(void) +{ + return traceErrorMessage; +} + +/******************************************************************************* +* vTraceClearError +* +* Removes any previous error message generated by recorder calling prvTraceError. +* By calling this function, it may be possible to start/restart the trace +* despite errors in the recorder, but there is no guarantee that the trace +* recorder will work correctly in that case, depending on the type of error. +******************************************************************************/ +void vTraceClearError(void) +{ + traceErrorMessage = NULL; + if (RecorderDataPtr != NULL) + { + RecorderDataPtr->internalErrorOccured = 0; + } +} + +/******************************************************************************* + * xTraceGetTraceBuffer + * + * Returns a pointer to the recorder data structure. Use this together with + * uiTraceGetTraceBufferSize if you wish to implement an own store/upload + * solution, e.g., in case a debugger connection is not available for uploading + * the data. + ******************************************************************************/ +void* xTraceGetTraceBuffer(void) +{ + return RecorderDataPtr; +} + +/******************************************************************************* + * uiTraceGetTraceBufferSize + * + * Gets the size of the recorder data structure. For use together with + * vTraceGetTraceBuffer if you wish to implement an own store/upload solution, + * e.g., in case a debugger connection is not available for uploading the data. + ******************************************************************************/ +uint32_t uiTraceGetTraceBufferSize(void) +{ + return sizeof(RecorderDataType); +} + +/****************************************************************************** + * prvTraceTaskInstanceFinish + * + * Private common function for the vTraceTaskInstanceFinishXXX functions. + *****************************************************************************/ +static void prvTraceTaskInstanceFinish(int8_t direct) +{ + TaskInstanceStatusEvent* tis; + uint8_t dts45; + + TRACE_ALLOC_CRITICAL_SECTION(); + + trcCRITICAL_SECTION_BEGIN(); + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + { + dts45 = (uint8_t)prvTraceGetDTS(0xFF); + tis = (TaskInstanceStatusEvent*) prvTraceNextFreeEventBufferSlot(); + if (tis != NULL) + { + if (direct == 0) + tis->type = TASK_INSTANCE_FINISHED_NEXT_KSE; + else + tis->type = TASK_INSTANCE_FINISHED_DIRECT; + + tis->dts = dts45; + prvTraceUpdateCounters(); + } + } + trcCRITICAL_SECTION_END(); +} + +/****************************************************************************** + * vTraceInstanceFinishedNext(void) + * + * Marks the current task instance as finished on the next kernel call. + * + * If that kernel call is blocking, the instance ends after the blocking event + * and the corresponding return event is then the start of the next instance. + * If the kernel call is not blocking, the viewer instead splits the current + * fragment right before the kernel call, which makes this call the first event + * of the next instance. + * + * See also TRC_CFG_USE_IMPLICIT_IFE_RULES in trcConfig.h + * + * Example: + * + * while(1) + * { + * xQueueReceive(CommandQueue, &command, timeoutDuration); + * processCommand(command); + * vTraceInstanceFinishedNext(); + * } + *****************************************************************************/ +void vTraceInstanceFinishedNext(void) +{ + prvTraceTaskInstanceFinish(0); +} + +/****************************************************************************** + * vTraceInstanceFinishedNow(void) + * + * Marks the current task instance as finished at this very instant. + * This makes the viewer to splits the current fragment at this point and begin + * a new actor instance. + * + * See also TRC_CFG_USE_IMPLICIT_IFE_RULES in trcConfig.h + * + * Example: + * + * This example will generate two instances for each loop iteration. + * The first instance ends at vTraceInstanceFinishedNow(), while the second + * instance ends at the next xQueueReceive call. + * + * while (1) + * { + * xQueueReceive(CommandQueue, &command, timeoutDuration); + * ProcessCommand(command); + * vTraceInstanceFinishedNow(); + * DoSometingElse(); + * vTraceInstanceFinishedNext(); + * } + *****************************************************************************/ +void vTraceInstanceFinishedNow(void) +{ + prvTraceTaskInstanceFinish(1); +} + +/******************************************************************************* + * Interrupt recording functions + ******************************************************************************/ + +#if (TRC_CFG_INCLUDE_ISR_TRACING == 1) + +/******************************************************************************* + * xTraceSetISRProperties + * + * Stores a name and priority level for an Interrupt Service Routine, to allow + * for better visualization. Returns a traceHandle used by vTraceStoreISRBegin. + * + * Example: + * #define PRIO_ISR_TIMER1 3 // the hardware priority of the interrupt + * ... + * traceHandle Timer1Handle = xTraceSetISRProperties("ISRTimer1", PRIO_ISR_TIMER1); + * ... + * void ISR_handler() + * { + * vTraceStoreISRBegin(Timer1Handle); + * ... + * vTraceStoreISREnd(0); + * } + ******************************************************************************/ + traceHandle xTraceSetISRProperties(const char* name, uint8_t priority) +{ + static traceHandle handle = 0; + TRACE_ASSERT(RecorderDataPtr != NULL, "Recorder not initialized, call vTraceEnable() first!", (traceHandle)0); + TRACE_ASSERT(handle <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[TRACE_CLASS_ISR], "xTraceSetISRProperties: Invalid value for handle", 0); + TRACE_ASSERT(name != NULL, "xTraceSetISRProperties: name == NULL", 0); + + handle++; + + prvTraceSetObjectName(TRACE_CLASS_ISR, handle, name); + prvTraceSetPriorityProperty(TRACE_CLASS_ISR, handle, priority); + + return handle; +} + +/******************************************************************************* + * vTraceStoreISRBegin + * + * Registers the beginning of an Interrupt Service Routine, using a traceHandle + * provided by xTraceSetISRProperties. + * + * Example: + * #define PRIO_ISR_TIMER1 3 // the hardware priority of the interrupt + * ... + * traceHandle Timer1Handle = xTraceSetISRProperties("ISRTimer1", PRIO_ISR_TIMER1); + * ... + * void ISR_handler() + * { + * vTraceStoreISRBegin(Timer1Handle); + * ... + * vTraceStoreISREnd(0); + * } + ******************************************************************************/ +void vTraceStoreISRBegin(traceHandle handle) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + if (recorder_busy) + { + /************************************************************************* + * This occurs if an ISR calls a trace function, preempting a previous + * trace call that is being processed in a different ISR or task. + * If this occurs, there is probably a problem in the definition of the + * recorder's internal critical sections (TRACE_ENTER_CRITICAL_SECTION and + * TRACE_EXIT_CRITICAL_SECTION). They must disable the RTOS tick interrupt + * and any other ISRs that calls the trace recorder directly or via + * traced kernel functions. The ARM port disables all interrupts using the + * PRIMASK register to avoid this issue. + *************************************************************************/ + prvTraceError("vTraceStoreISRBegin - recorder busy! See code comment."); + return; + } + trcCRITICAL_SECTION_BEGIN(); + + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + { + uint16_t dts4; + + TRACE_ASSERT(handle != 0, "vTraceStoreISRBegin: Invalid ISR handle (NULL)", TRC_UNUSED); + TRACE_ASSERT(handle <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[TRACE_CLASS_ISR], "vTraceStoreISRBegin: Invalid ISR handle (> NISR)", TRC_UNUSED); + + dts4 = (uint16_t)prvTraceGetDTS(0xFFFF); + + if (RecorderDataPtr->recorderActive) /* Need to repeat this check! */ + { + if (nISRactive < TRC_CFG_MAX_ISR_NESTING) + { + TSEvent* ts; + uint8_t hnd8 = prvTraceGet8BitHandle(handle); + isrstack[nISRactive] = handle; + nISRactive++; + ts = (TSEvent*)prvTraceNextFreeEventBufferSlot(); + if (ts != NULL) + { + ts->type = TS_ISR_BEGIN; + ts->dts = dts4; + ts->objHandle = hnd8; + prvTraceUpdateCounters(); + } + } + else + { + /* This should not occur unless something is very wrong */ + prvTraceError("Too many nested interrupts!"); + } + } + } + trcCRITICAL_SECTION_END(); +} + +/******************************************************************************* + * vTraceStoreISREnd + * + * Registers the end of an Interrupt Service Routine. + * + * The parameter pendingISR indicates if the interrupt has requested a + * task-switch (= 1), e.g., by signaling a semaphore. Otherwise (= 0) the + * interrupt is assumed to return to the previous context. + * + * Example: + * #define PRIO_OF_ISR_TIMER1 3 // the hardware priority of the interrupt + * traceHandle traceHandleIsrTimer1 = 0; // The ID set by the recorder + * ... + * traceHandleIsrTimer1 = xTraceSetISRProperties("ISRTimer1", PRIO_OF_ISR_TIMER1); + * ... + * void ISR_handler() + * { + * vTraceStoreISRBegin(traceHandleIsrTimer1); + * ... + * vTraceStoreISREnd(0); + * } + ******************************************************************************/ +void vTraceStoreISREnd(int pendingISR) +{ + TSEvent* ts; + uint16_t dts5; + uint8_t hnd8 = 0, type = 0; + + TRACE_ALLOC_CRITICAL_SECTION(); + + if (! RecorderDataPtr->recorderActive || ! handle_of_last_logged_task) + { + return; + } + + if (recorder_busy) + { + /************************************************************************* + * This occurs if an ISR calls a trace function, preempting a previous + * trace call that is being processed in a different ISR or task. + * If this occurs, there is probably a problem in the definition of the + * recorder's internal critical sections (TRACE_ENTER_CRITICAL_SECTION and + * TRACE_EXIT_CRITICAL_SECTION). They must disable the RTOS tick interrupt + * and any other ISRs that calls the trace recorder directly or via + * traced kernel functions. The ARM port disables all interrupts using the + * PRIMASK register to avoid this issue. + *************************************************************************/ + prvTraceError("vTraceStoreISREnd - recorder busy! See code comment."); + return; + } + + if (nISRactive == 0) + { + prvTraceError("Unmatched call to vTraceStoreISREnd (nISRactive == 0, expected > 0)"); + return; + } + + trcCRITICAL_SECTION_BEGIN(); + isPendingContextSwitch |= pendingISR; /* Is there a pending context switch right now? */ + nISRactive--; + if (nISRactive > 0) + { + /* Return to another ISR */ + type = TS_ISR_RESUME; + hnd8 = prvTraceGet8BitHandle(isrstack[nISRactive - 1]); /* isrstack[nISRactive] is the handle of the ISR we're currently exiting. isrstack[nISRactive - 1] is the handle of the ISR that was executing previously. */ + } + else if ((isPendingContextSwitch == 0) || (prvTraceIsSchedulerSuspended())) + { + /* Return to interrupted task, if no context switch will occur in between. */ + type = TS_TASK_RESUME; + hnd8 = prvTraceGet8BitHandle(handle_of_last_logged_task); + } + + if (type != 0) + { + dts5 = (uint16_t)prvTraceGetDTS(0xFFFF); + ts = (TSEvent*)prvTraceNextFreeEventBufferSlot(); + if (ts != NULL) + { + ts->type = type; + ts->objHandle = hnd8; + ts->dts = dts5; + prvTraceUpdateCounters(); + } + } + + trcCRITICAL_SECTION_END(); +} + +#else + +/* ISR tracing is turned off */ +void prvTraceIncreaseISRActive(void) +{ + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + nISRactive++; +} + +void prvTraceDecreaseISRActive(void) +{ + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + nISRactive--; +} +#endif /* (TRC_CFG_INCLUDE_ISR_TRACING == 1)*/ + + +/********************************************************************************/ +/* User Event functions */ +/********************************************************************************/ + +#define MAX_ARG_SIZE (4+32) + +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) +static uint8_t writeInt8(void * buffer, uint8_t i, uint8_t value) +{ + TRACE_ASSERT(buffer != NULL, "writeInt8: buffer == NULL", 0); + + if (i >= MAX_ARG_SIZE) + { + return 255; + } + + ((uint8_t*)buffer)[i] = value; + + if (i + 1 > MAX_ARG_SIZE) + { + return 255; + } + + return ((uint8_t) (i + 1)); +} +#endif + +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) +static uint8_t writeInt16(void * buffer, uint8_t i, uint16_t value) +{ + TRACE_ASSERT(buffer != NULL, "writeInt16: buffer == NULL", 0); + + /* Align to multiple of 2 */ + while ((i % 2) != 0) + { + if (i >= MAX_ARG_SIZE) + { + return 255; + } + + ((uint8_t*)buffer)[i] = 0; + i++; + } + + if (i + 2 > MAX_ARG_SIZE) + { + return 255; + } + + ((uint16_t*)buffer)[i/2] = value; + + return ((uint8_t) (i + 2)); +} +#endif + +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) +static uint8_t writeInt32(void * buffer, uint8_t i, uint32_t value) +{ + TRACE_ASSERT(buffer != NULL, "writeInt32: buffer == NULL", 0); + + /* A 32 bit value should begin at an even 4-byte address */ + while ((i % 4) != 0) + { + if (i >= MAX_ARG_SIZE) + { + return 255; + } + + ((uint8_t*)buffer)[i] = 0; + i++; + } + + if (i + 4 > MAX_ARG_SIZE) + { + return 255; + } + + ((uint32_t*)buffer)[i/4] = value; + + return ((uint8_t) (i + 4)); +} +#endif + +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_INCLUDE_FLOAT_SUPPORT)) +static uint8_t writeFloat(void * buffer, uint8_t i, float value) +{ + TRACE_ASSERT(buffer != NULL, "writeFloat: buffer == NULL", 0); + + /* A 32 bit value should begin at an even 4-byte address */ + while ((i % 4) != 0) + { + if (i >= MAX_ARG_SIZE) + { + return 255; + } + + ((uint8_t*)buffer)[i] = 0; + i++; + } + + if (i + 4 > MAX_ARG_SIZE) + { + return 255; + } + + ((float*)buffer)[i/4] = value; + + return i + 4; +} +#endif + +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_INCLUDE_FLOAT_SUPPORT)) +static uint8_t writeDouble(void * buffer, uint8_t i, double value) +{ + uint32_t * dest; + uint32_t * src = (uint32_t*)&value; + + TRACE_ASSERT(buffer != NULL, "writeDouble: buffer == NULL", 0); + + /* The double is written as two 32 bit values, and should begin at an even + 4-byte address (to avoid having to align with 8 byte) */ + while (i % 4 != 0) + { + if (i >= MAX_ARG_SIZE) + { + return 255; + } + + ((uint8_t*)buffer)[i] = 0; + i++; + } + + if (i + 8 > MAX_ARG_SIZE) + { + return 255; + } + + dest = &(((uint32_t *)buffer)[i/4]); + + dest[0] = src[0]; + dest[1] = src[1]; + + return i + 8; +} +#endif + +/******************************************************************************* + * prvTraceUserEventFormat + * + * Parses the format string and stores the arguments in the buffer. + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) +static uint8_t prvTraceUserEventFormat(const char* formatStr, va_list vl, uint8_t* buffer, uint8_t byteOffset) +{ + uint16_t formatStrIndex = 0; + uint8_t argCounter = 0; + uint8_t i = byteOffset; + + while (formatStr[formatStrIndex] != '\0') + { + if (formatStr[formatStrIndex] == '%') + { + if (formatStr[formatStrIndex + 1] == '%') + { + formatStrIndex += 2; + continue; + } + + /* We found a possible argument */ + argCounter++; + + formatStrIndex++; + + while ((formatStr[formatStrIndex] >= '0' && formatStr[formatStrIndex] <= '9') || formatStr[formatStrIndex] == '#' || formatStr[formatStrIndex] == '.') + formatStrIndex++; + + /* This check is necessary to avoid moving past end of string. */ + if (formatStr[formatStrIndex] != '\0') + { + switch (formatStr[formatStrIndex]) + { + case 'd': + i = writeInt32( buffer, + i, + (uint32_t)va_arg(vl, uint32_t)); + break; + case 'x': + case 'X': + case 'u': + i = writeInt32( buffer, + i, + (uint32_t)va_arg(vl, uint32_t)); + break; + case 's': + i = writeInt16( buffer, + i, + xTraceRegisterString((char*)va_arg(vl, char*))); + break; + +#if (TRC_CFG_INCLUDE_FLOAT_SUPPORT) + /* Yes, "double" as type also in the float + case. This since "float" is promoted into "double" + by the va_arg stuff. */ + case 'f': + i = writeFloat( buffer, + i, + (float)va_arg(vl, double)); + break; +#else + /* No support for floats, but attempt to store a float user event + avoid a possible crash due to float reference. Instead store the + data on uint_32 format (will not be displayed anyway). This is just + to keep va_arg and i consistent. */ + + case 'f': + i = writeInt32( buffer, + i, + (uint32_t)va_arg(vl, double)); + break; +#endif + case 'l': + formatStrIndex++; + switch (formatStr[formatStrIndex]) + { +#if (TRC_CFG_INCLUDE_FLOAT_SUPPORT) + case 'f': i = writeDouble(buffer, + i, + (double)va_arg(vl, double)); + break; +#else + /* No support for floats, but attempt to store a float user event + avoid a possible crash due to float reference. Instead store the + data on uint_32 format (will not be displayed anyway). This is just + to keep va_arg and i consistent. */ + case 'f': + i = writeInt32( buffer, /* In this case, the value will not be shown anyway */ + i, + (uint32_t)va_arg(vl, double)); + + i = writeInt32( buffer, /* Do it twice, to write in total 8 bytes */ + i, + (uint32_t)va_arg(vl, double)); + break; +#endif + } + break; + case 'h': + formatStrIndex++; + switch (formatStr[formatStrIndex]) + { + case 'd': + i = writeInt16( buffer, + i, + (uint16_t)va_arg(vl, uint32_t)); + break; + case 'u': + i = writeInt16( buffer, + i, + (uint16_t)va_arg(vl, uint32_t)); + break; + } + break; + case 'b': + formatStrIndex++; + switch (formatStr[formatStrIndex]) + { + case 'd': + i = writeInt8( buffer, + i, + (uint8_t)va_arg(vl, uint32_t)); + break; + case 'u': + i = writeInt8( buffer, + i, + (uint8_t)va_arg(vl, uint32_t)); + break; + } + break; + default: + /* False alarm: this wasn't a valid format specifier */ + argCounter--; + break; + } + + if (argCounter > 15) + { + prvTraceError("vTracePrintF - Too many arguments, max 15 allowed!"); + return 0; + } + } + else + break; + } + formatStrIndex++; + if (i == 255) + { + prvTraceError("vTracePrintF - Too large arguments, max 32 byte allowed!"); + return 0; + } + } + return (uint8_t)(i+3)/4; +} +#endif + +/******************************************************************************* + * prvTraceClearChannelBuffer + * + * Clears a number of items in the channel buffer, starting from nextSlotToWrite. + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)) +static void prvTraceClearChannelBuffer(uint32_t count) +{ + uint32_t slots; + + TRACE_ASSERT((TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE) >= count, + "prvTraceClearChannelBuffer: TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE is too small to handle this event.", TRC_UNUSED); + + /* Check if we're close to the end of the buffer */ + if (RecorderDataPtr->userEventBuffer.nextSlotToWrite + count > (TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE)) + { + slots = (TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE) - RecorderDataPtr->userEventBuffer.nextSlotToWrite; /* Number of slots before end of buffer */ + (void)memset(&RecorderDataPtr->userEventBuffer.channelBuffer[RecorderDataPtr->userEventBuffer.nextSlotToWrite], 0, slots); + (void)memset(&RecorderDataPtr->userEventBuffer.channelBuffer[0], 0, (count - slots)); + } + else + (void)memset(&RecorderDataPtr->userEventBuffer.channelBuffer[RecorderDataPtr->userEventBuffer.nextSlotToWrite], 0, count); +} +#endif + +/******************************************************************************* + * prvTraceCopyToDataBuffer + * + * Copies a number of items to the data buffer, starting from nextSlotToWrite. + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)) +static void prvTraceCopyToDataBuffer(uint32_t* data, uint32_t count) +{ + uint32_t slots; + + TRACE_ASSERT(data != NULL, + "prvTraceCopyToDataBuffer: data == NULL.", TRC_UNUSED); + TRACE_ASSERT(count <= (TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE), + "prvTraceCopyToDataBuffer: TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE is too small to handle this event.", TRC_UNUSED); + /* Check if we're close to the end of the buffer */ + if (RecorderDataPtr->userEventBuffer.nextSlotToWrite + count > (TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE)) + { + slots = (TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE) - RecorderDataPtr->userEventBuffer.nextSlotToWrite; /* Number of slots before end of buffer */ + (void)memcpy(&RecorderDataPtr->userEventBuffer.dataBuffer[RecorderDataPtr->userEventBuffer.nextSlotToWrite * 4], data, slots * 4); + (void)memcpy(&RecorderDataPtr->userEventBuffer.dataBuffer[0], data + slots, (count - slots) * 4); + } + else + { + (void)memcpy(&RecorderDataPtr->userEventBuffer.dataBuffer[RecorderDataPtr->userEventBuffer.nextSlotToWrite * 4], data, count * 4); + } +} +#endif + +/******************************************************************************* + * prvTraceUBHelper1 + * + * Calls on prvTraceUserEventFormat() to do the actual formatting, then goes on + * to the next helper function. + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)) +static void prvTraceUBHelper1(traceUBChannel channel, traceString eventLabel, traceString formatLabel, va_list vl) +{ + uint32_t data[(3 + MAX_ARG_SIZE) / 4]; + uint8_t byteOffset = 4; /* Need room for timestamp */ + uint8_t noOfSlots; + + if (channel == 0) + { + /* We are dealing with an unknown channel format pair */ + byteOffset = (uint8_t)(byteOffset + 4); /* Also need room for channel and format */ + ((uint16_t*)data)[2] = eventLabel; + ((uint16_t*)data)[3] = formatLabel; + } + + noOfSlots = prvTraceUserEventFormat((char*)&(RecorderDataPtr->SymbolTable.symbytes[formatLabel+4]), vl, (uint8_t*)data, byteOffset); + + prvTraceUBHelper2(channel, data, noOfSlots); +} +#endif + +/******************************************************************************* + * prvTraceUBHelper2 + * + * This function simply copies the data buffer to the actual user event buffer. + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)) +static void prvTraceUBHelper2(traceUBChannel channel, uint32_t* data, uint32_t noOfSlots) +{ + static uint32_t old_timestamp = 0; + uint32_t old_nextSlotToWrite = 0; + + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ASSERT((TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE) >= noOfSlots, "prvTraceUBHelper2: TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE is too small to handle this event.", TRC_UNUSED); + + trcCRITICAL_SECTION_BEGIN(); + /* Store the timestamp */ + prvTracePortGetTimeStamp(data); + + if (*data < old_timestamp) + { + RecorderDataPtr->userEventBuffer.wraparoundCounter++; + } + + old_timestamp = *data; + + /* Start by erasing any information in the channel buffer */ + prvTraceClearChannelBuffer(noOfSlots); + + prvTraceCopyToDataBuffer(data, noOfSlots); /* Will wrap around the data if necessary */ + + old_nextSlotToWrite = RecorderDataPtr->userEventBuffer.nextSlotToWrite; /* Save the index that we want to write the channel data at when we're done */ + RecorderDataPtr->userEventBuffer.nextSlotToWrite = (RecorderDataPtr->userEventBuffer.nextSlotToWrite + noOfSlots) % (TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE); /* Make sure we never end up outside the buffer */ + + /* Write to the channel buffer to indicate that this user event is ready to be used */ + if (channel != 0) + { + RecorderDataPtr->userEventBuffer.channelBuffer[old_nextSlotToWrite] = channel; + } + else + { + /* 0xFF indicates that this is not a normal channel id */ + RecorderDataPtr->userEventBuffer.channelBuffer[old_nextSlotToWrite] = (traceUBChannel)0xFF; + } + trcCRITICAL_SECTION_END(); +} +#endif + +/******************************************************************************* + * xTraceRegisterUBChannel + * + * Registers a channel for Separated User Events, i.e., those stored in the + * separate user event buffer. + * + * Note: Only available if TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER is enabled in + * trcSnapshotConfig.h + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)) +traceUBChannel xTraceRegisterUBChannel(traceString channel, traceString formatStr) +{ + uint8_t i; + traceUBChannel retVal = 0; + + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ASSERT(formatStr != 0, "xTraceRegisterChannelFormat: formatStr == 0", (traceUBChannel)0); + + trcCRITICAL_SECTION_BEGIN(); + for (i = 1; i <= (TRC_CFG_UB_CHANNELS); i++) /* Size of the channels buffer is TRC_CFG_UB_CHANNELS + 1. Index 0 is unused. */ + { + if(RecorderDataPtr->userEventBuffer.channels[i].name == 0 && RecorderDataPtr->userEventBuffer.channels[i].defaultFormat == 0) + { + /* Found empty slot */ + RecorderDataPtr->userEventBuffer.channels[i].name = channel; + RecorderDataPtr->userEventBuffer.channels[i].defaultFormat = formatStr; + retVal = (traceUBChannel)i; + break; + } + + if (RecorderDataPtr->userEventBuffer.channels[i].name == channel && RecorderDataPtr->userEventBuffer.channels[i].defaultFormat == formatStr) + { + /* Found a match */ + retVal = (traceUBChannel)i; + break; + } + } + trcCRITICAL_SECTION_END(); + + return retVal; +} +#endif + +/****************************************************************************** + * vTraceUBData + * + * Slightly faster version of vTracePrintF() due to no lookups. + * + * Note: This is only available if TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER is + * enabled in trcSnapshotConfig.h + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)) +void vTraceUBData(traceUBChannel channelPair, ...) +{ + va_list vl; + + TRACE_ASSERT(channelPair != 0, "vTraceUBData: Not a valid traceUBChannel!", TRC_UNUSED); + + va_start(vl, channelPair); + vTraceUBData_Helper(channelPair, vl); + va_end(vl); +} +#endif + +/* Extracts the channel name and format string from the traceUBChannel, then calls prvTraceUBHelper1. */ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)) +void vTraceUBData_Helper(traceUBChannel channelPair, va_list vl) +{ + traceString channel; + traceString formatStr; + + TRACE_ASSERT(channelPair != 0, "vTraceUBData_Helper: channelPair == 0", TRC_UNUSED); + TRACE_ASSERT(channelPair <= (TRC_CFG_UB_CHANNELS), "vTraceUBData_Helper: ", TRC_UNUSED); + + channel = RecorderDataPtr->userEventBuffer.channels[channelPair].name; + formatStr = RecorderDataPtr->userEventBuffer.channels[channelPair].defaultFormat; + + prvTraceUBHelper1(channelPair, channel, formatStr, vl); +} +#endif + +/****************************************************************************** + * vTraceUBEvent + * + * Slightly faster version of ... due to no lookups. + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)) +void vTraceUBEvent(traceUBChannel channelPair) +{ + uint32_t data[(3 + MAX_ARG_SIZE) / 4]; + + TRACE_ASSERT(channelPair != 0, "vTraceUBEvent: channelPair == 0", TRC_UNUSED); + TRACE_ASSERT(channelPair <= (TRC_CFG_UB_CHANNELS), "vTraceUBEvent: ", TRC_UNUSED); + + prvTraceUBHelper2(channelPair, data, 1); /* Only need one slot for timestamp */ +} +#endif + +/****************************************************************************** + * vTracePrintF + * + * Generates User Event with formatted text and data, similar to a "printf". + * It is very fast compared to a normal "printf" since this function only + * stores the arguments. The actual formatting is done + * on the host PC when the trace is displayed in the viewer tool. + * + * User Event labels are created using xTraceRegisterString. + * Example: + * + * traceString adc_uechannel = xTraceRegisterString("ADC User Events"); + * ... + * vTracePrintF(adc_uechannel, + * "ADC channel %d: %lf volts", + * ch, (double)adc_reading/(double)scale); + * + * This can be combined into one line, if desired, but this is slower: + * + * vTracePrintF(xTraceRegisterString("ADC User Events"), + * "ADC channel %d: %lf volts", + * ch, (double)adc_reading/(double)scale); + * + * Calling xTraceRegisterString multiple times will not create duplicate entries, but + * it is of course faster to just do it once, and then keep the handle for later + * use. If you don't have any data arguments, only a text label/string, it is + * better to use vTracePrint - it is faster. + * + * Format specifiers supported: + * %d - 32 bit signed integer + * %u - 32 bit unsigned integer + * %f - 32 bit float + * %s - string (is copied to the recorder symbol table) + * %hd - 16 bit signed integer + * %hu - 16 bit unsigned integer + * %bd - 8 bit signed integer + * %bu - 8 bit unsigned integer + * %lf - double-precision float (Note! See below...) + * + * Up to 15 data arguments are allowed, with a total size of maximum 32 byte. + * In case this is exceeded, the user event is changed into an error message. + * + * The data is stored in trace buffer, and is packed to allow storing multiple + * smaller data entries in the same 4-byte record, e.g., four 8-bit values. + * A string requires two bytes, as the symbol table is limited to 64K. Storing + * a double (%lf) uses two records, so this is quite costly. Use float (%f) + * unless the higher precision is really necessary. + * + * Note that the double-precision float (%lf) assumes a 64 bit double + * representation. This does not seem to be the case on e.g. PIC24 and PIC32. + * Before using a %lf argument on a 16-bit MCU, please verify that + * "sizeof(double)" actually gives 8 as expected. If not, use %f instead. + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) +void vTracePrintF(traceString eventLabel, const char* formatStr, ...) +{ + va_list vl; + + va_start(vl, formatStr); + vTraceVPrintF(eventLabel, formatStr, vl); + va_end(vl); +} +#endif + +/****************************************************************************** + * vTraceVPrintF + * + * vTracePrintF variant that accepts a va_list. + * See vTracePrintF documentation for further details. + * + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) +void vTraceVPrintF(traceString eventLabel, const char* formatStr, va_list vl) +{ +#if (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 0) + uint32_t noOfSlots; + UserEvent* ue1; + uint32_t tempDataBuffer[(3 + MAX_ARG_SIZE) / 4]; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ASSERT(formatStr != NULL, "vTraceVPrintF: formatStr == NULL", TRC_UNUSED); + + trcCRITICAL_SECTION_BEGIN(); + + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + { + /* First, write the "primary" user event entry in the local buffer, but + let the event type be "EVENT_BEING_WRITTEN" for now...*/ + + ue1 = (UserEvent*)(&tempDataBuffer[0]); + + ue1->type = EVENT_BEING_WRITTEN; /* Update this as the last step */ + + noOfSlots = prvTraceUserEventFormat(formatStr, vl, (uint8_t*)tempDataBuffer, 4); + + /* Store the format string, with a reference to the channel symbol */ + ue1->payload = prvTraceOpenSymbol(formatStr, eventLabel); + + ue1->dts = (uint8_t)prvTraceGetDTS(0xFF); + + /* prvTraceGetDTS might stop the recorder in some cases... */ + if (RecorderDataPtr->recorderActive) + { + + /* If the data does not fit in the remaining main buffer, wrap around to + 0 if allowed, otherwise stop the recorder and quit). */ + if (RecorderDataPtr->nextFreeIndex + noOfSlots > RecorderDataPtr->maxEvents) + { + #if (TRC_CFG_SNAPSHOT_MODE == TRC_SNAPSHOT_MODE_RING_BUFFER) + (void)memset(& RecorderDataPtr->eventData[RecorderDataPtr->nextFreeIndex * 4], + 0, + (RecorderDataPtr->maxEvents - RecorderDataPtr->nextFreeIndex)*4); + RecorderDataPtr->nextFreeIndex = 0; + RecorderDataPtr->bufferIsFull = 1; + #else + + /* Stop recorder, since the event data will not fit in the + buffer and not circular buffer in this case... */ + vTraceStop(); + #endif + } + + /* Check if recorder has been stopped (i.e., vTraceStop above) */ + if (RecorderDataPtr->recorderActive) + { + /* Check that the buffer to be overwritten does not contain any user + events that would be partially overwritten. If so, they must be "killed" + by replacing the user event and following data with NULL events (i.e., + using a memset to zero).*/ + #if (TRC_CFG_SNAPSHOT_MODE == TRC_SNAPSHOT_MODE_RING_BUFFER) + prvCheckDataToBeOverwrittenForMultiEntryEvents((uint8_t)noOfSlots); + #endif + /* Copy the local buffer to the main buffer */ + (void)memcpy(& RecorderDataPtr->eventData[RecorderDataPtr->nextFreeIndex * 4], + tempDataBuffer, + noOfSlots * 4); + + /* Update the event type, i.e., number of data entries following the + main USER_EVENT entry (Note: important that this is after the memcpy, + but within the critical section!)*/ + RecorderDataPtr->eventData[RecorderDataPtr->nextFreeIndex * 4] = + (uint8_t) ( USER_EVENT + noOfSlots - 1 ); + + /* Update the main buffer event index (already checked that it fits in + the buffer, so no need to check for wrapping)*/ + + RecorderDataPtr->nextFreeIndex += noOfSlots; + RecorderDataPtr->numEvents += noOfSlots; + + if (RecorderDataPtr->nextFreeIndex >= (TRC_CFG_EVENT_BUFFER_SIZE)) + { + #if (TRC_CFG_SNAPSHOT_MODE == TRC_SNAPSHOT_MODE_RING_BUFFER) + /* We have reached the end, but this is a ring buffer. Start from the beginning again. */ + RecorderDataPtr->bufferIsFull = 1; + RecorderDataPtr->nextFreeIndex = 0; + #else + /* We have reached the end so we stop. */ + vTraceStop(); + #endif + } + } + + #if (TRC_CFG_SNAPSHOT_MODE == TRC_SNAPSHOT_MODE_RING_BUFFER) + /* Make sure the next entry is cleared correctly */ + prvCheckDataToBeOverwrittenForMultiEntryEvents(1); + #endif + + } + } + trcCRITICAL_SECTION_END(); + +#elif (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) + /* Use the separate user event buffer */ + traceString formatLabel; + traceUBChannel channel; + + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + { + formatLabel = xTraceRegisterString(formatStr); + + channel = xTraceRegisterUBChannel(eventLabel, formatLabel); + + prvTraceUBHelper1(channel, eventLabel, formatLabel, vl); + } +#endif +} +#endif + +/****************************************************************************** + * vTracePrint + * + * Basic user event + * + * Generates a User Event with a text label. The label is created/looked up + * in the symbol table using xTraceRegisterString. + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) +void vTracePrint(traceString chn, const char* str) +{ +#if (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 0) + UserEvent* ue; + uint8_t dts1; + TRACE_ALLOC_CRITICAL_SECTION(); + + trcCRITICAL_SECTION_BEGIN(); + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + { + dts1 = (uint8_t)prvTraceGetDTS(0xFF); + ue = (UserEvent*) prvTraceNextFreeEventBufferSlot(); + if (ue != NULL) + { + ue->dts = dts1; + ue->type = USER_EVENT; + ue->payload = prvTraceOpenSymbol(str, chn); + prvTraceUpdateCounters(); + } + } + trcCRITICAL_SECTION_END(); + +#elif (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) + traceUBChannel channel; + uint32_t noOfSlots = 1; + uint32_t tempDataBuffer[(3 + MAX_ARG_SIZE) / 4]; + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + { + traceString trcStr = prvTraceOpenSymbol(str, chn); + channel = xTraceRegisterUBChannel(chn, trcStr); + + if (channel == 0) + { + /* We are dealing with an unknown channel format pair */ + noOfSlots++; /* Also need room for channel and format */ + ((uint16_t*)tempDataBuffer)[2] = chn; + ((uint16_t*)tempDataBuffer)[3] = trcStr; + } + + prvTraceUBHelper2(channel, tempDataBuffer, noOfSlots); + } +#endif +} +#endif + +/******************************************************************************* + * xTraceRegisterString + * + * Register strings in the recorder, e.g. for names of user event channels. + * + * Example: + * myEventHandle = xTraceRegisterString("MyUserEvent"); + * ... + * vTracePrintF(myEventHandle, "My value is: %d", myValue); + ******************************************************************************/ +#if ((TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1)) +traceString xTraceRegisterString(const char* label) +{ + TRACE_ASSERT(label != NULL, "xTraceRegisterString: label == NULL", (traceString)0); + TRACE_ASSERT(RecorderDataPtr != NULL, "Recorder not initialized, call vTraceEnable() first!", (traceHandle)0); + return prvTraceOpenSymbol(label, 0); +} +#endif + + +#if ((!defined TRC_CFG_INCLUDE_READY_EVENTS) || (TRC_CFG_INCLUDE_READY_EVENTS == 1)) + +void prvTraceSetReadyEventsEnabled(int status) +{ + readyEventsEnabled = status; +} + +/******************************************************************************* + * prvTraceStoreTaskReady + * + * This function stores a ready state for the task handle sent in as parameter. + ******************************************************************************/ +void prvTraceStoreTaskReady(traceHandle handle) +{ + uint16_t dts3; + TREvent* tr; + uint8_t hnd8; + + TRACE_ALLOC_CRITICAL_SECTION(); + + if (handle == 0) + { + /* On FreeRTOS v7.3.0, this occurs when creating tasks due to a bad + placement of the trace macro. In that case, the events are ignored. */ + return; + } + + if (! readyEventsEnabled) + { + /* When creating tasks, ready events are also created. If creating + a "hidden" (not traced) task, we must therefore disable recording + of ready events to avoid an undesired ready event... */ + return; + } + + TRACE_ASSERT(handle <= (TRC_CFG_NTASK), "prvTraceStoreTaskReady: Invalid value for handle", TRC_UNUSED); + + if (recorder_busy) + { + /************************************************************************* + * This occurs if an ISR calls a trace function, preempting a previous + * trace call that is being processed in a different ISR or task. + * If this occurs, there is probably a problem in the definition of the + * recorder's internal critical sections (TRACE_ENTER_CRITICAL_SECTION and + * TRACE_EXIT_CRITICAL_SECTION). They must disable the RTOS tick interrupt + * and any other ISRs that calls the trace recorder directly or via + * traced kernel functions. The ARM port disables all interrupts using the + * PRIMASK register to avoid this issue. + *************************************************************************/ + prvTraceError("Recorder busy - high priority ISR using syscall? (1)"); + return; + } + + trcCRITICAL_SECTION_BEGIN(); + if (RecorderDataPtr->recorderActive) /* Need to repeat this check! */ + { + dts3 = (uint16_t)prvTraceGetDTS(0xFFFF); + hnd8 = prvTraceGet8BitHandle(handle); + tr = (TREvent*)prvTraceNextFreeEventBufferSlot(); + if (tr != NULL) + { + tr->type = DIV_TASK_READY; + tr->dts = dts3; + tr->objHandle = hnd8; + prvTraceUpdateCounters(); + } + } + trcCRITICAL_SECTION_END(); +} +#endif + +/******************************************************************************* + * prvTraceStoreLowPower + * + * This function stores a low power state. + ******************************************************************************/ +void prvTraceStoreLowPower(uint32_t flag) +{ + uint16_t dts; + LPEvent* lp; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ASSERT(flag <= 1, "prvTraceStoreLowPower: Invalid flag value", TRC_UNUSED); + + if (recorder_busy) + { + /************************************************************************* + * This occurs if an ISR calls a trace function, preempting a previous + * trace call that is being processed in a different ISR or task. + * If this occurs, there is probably a problem in the definition of the + * recorder's internal critical sections (TRACE_ENTER_CRITICAL_SECTION and + * TRACE_EXIT_CRITICAL_SECTION). They must disable the RTOS tick interrupt + * and any other ISRs that calls the trace recorder directly or via + * traced kernel functions. The ARM port disables all interrupts using the + * PRIMASK register to avoid this issue. + *************************************************************************/ + prvTraceError("Recorder busy - high priority ISR using syscall? (1)"); + return; + } + + trcCRITICAL_SECTION_BEGIN(); + if (RecorderDataPtr->recorderActive) + { + dts = (uint16_t)prvTraceGetDTS(0xFFFF); + lp = (LPEvent*)prvTraceNextFreeEventBufferSlot(); + if (lp != NULL) + { + lp->type = (uint8_t) (LOW_POWER_BEGIN + ( uint8_t ) flag); /* BEGIN or END depending on flag */ + lp->dts = dts; + prvTraceUpdateCounters(); + } + } + trcCRITICAL_SECTION_END(); +} + +/******************************************************************************* + * vTraceStoreMemMangEvent + * + * This function stores malloc and free events. Each call requires two records, + * for size and address respectively. The event code parameter (ecode) is applied + * to the first record (size) and the following address record gets event + * code "ecode + 1", so make sure this is respected in the event code table. + * Note: On "free" calls, the signed_size parameter should be negative. + ******************************************************************************/ +#if (TRC_CFG_INCLUDE_MEMMANG_EVENTS == 1) +#if (TRC_CFG_SCHEDULING_ONLY == 0) +void vTraceStoreMemMangEvent(uint32_t ecode, uint32_t address, int32_t signed_size) +{ + uint8_t dts1; + MemEventSize * ms; + MemEventAddr * ma; + uint16_t size_low; + uint16_t addr_low; + uint8_t addr_high; + uint32_t size; + TRACE_ALLOC_CRITICAL_SECTION(); + + if (RecorderDataPtr == NULL) + { + /* Occurs in vTraceInitTraceData, if using dynamic allocation. */ + return; + } + + if (signed_size < 0) + size = (uint32_t)(- signed_size); + else + size = (uint32_t)(signed_size); + + trcCRITICAL_SECTION_BEGIN(); + + /* Only update heapMemUsage if we have a valid address */ + if (address != 0) + heapMemUsage += (uint32_t)signed_size; + + if (RecorderDataPtr->recorderActive) + { + dts1 = (uint8_t)prvTraceGetDTS(0xFF); + size_low = (uint16_t)prvTraceGetParam(0xFFFF, size); + ms = (MemEventSize *)prvTraceNextFreeEventBufferSlot(); + + if (ms != NULL) + { + ms->dts = dts1; + ms->type = NULL_EVENT; /* Updated when all events are written */ + ms->size = size_low; + prvTraceUpdateCounters(); + + /* Storing a second record with address (signals "failed" if null) */ + #if (TRC_CFG_HEAP_SIZE_BELOW_16M) + /* If the heap address range is within 16 MB, i.e., the upper 8 bits + of addresses are constant, this optimization avoids storing an extra + event record by ignoring the upper 8 bit of the address */ + addr_low = address & 0xFFFF; + addr_high = (address >> 16) & 0xFF; + #else + /* The whole 32 bit address is stored using a second event record + for the upper 16 bit */ + addr_low = (uint16_t)prvTraceGetParam(0xFFFF, address); + addr_high = 0; + #endif + + ma = (MemEventAddr *) prvTraceNextFreeEventBufferSlot(); + if (ma != NULL) + { + ma->addr_low = addr_low; + ma->addr_high = addr_high; + ma->type = (uint8_t) (ecode + 1); /* Note this! */ + ms->type = (uint8_t) ecode; + prvTraceUpdateCounters(); + RecorderDataPtr->heapMemUsage = heapMemUsage; + } + } + } + trcCRITICAL_SECTION_END(); +} +#endif /* TRC_CFG_SCHEDULING_ONLY */ +#endif + +/******************************************************************************* + * prvTraceStoreKernelCall + * + * This is the main integration point for storing kernel calls, and + * is called by the hooks in trcKernelHooks.h (see trcKernelPort.h for event codes). + ******************************************************************************/ +#if (TRC_CFG_SCHEDULING_ONLY == 0) +void prvTraceStoreKernelCall(uint32_t ecode, traceObjectClass objectClass, uint32_t objectNumber) +{ + KernelCall * kse; + uint16_t dts1; + uint8_t hnd8; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ASSERT(ecode < 0xFF, "prvTraceStoreKernelCall: ecode >= 0xFF", TRC_UNUSED); + TRACE_ASSERT(objectClass < TRACE_NCLASSES, "prvTraceStoreKernelCall: objectClass >= TRACE_NCLASSES", TRC_UNUSED); + TRACE_ASSERT(objectNumber <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectClass], "prvTraceStoreKernelCall: Invalid value for objectNumber", TRC_UNUSED); + + if (recorder_busy) + { + /************************************************************************* + * This occurs if an ISR calls a trace function, preempting a previous + * trace call that is being processed in a different ISR or task. + * If this occurs, there is probably a problem in the definition of the + * recorder's internal critical sections (TRACE_ENTER_CRITICAL_SECTION and + * TRACE_EXIT_CRITICAL_SECTION). They must disable the RTOS tick interrupt + * and any other ISRs that calls the trace recorder directly or via + * traced kernel functions. The ARM port disables all interrupts using the + * PRIMASK register to avoid this issue. + *************************************************************************/ + prvTraceError("Recorder busy - high priority ISR using syscall? (2)"); + return; + } + + if (handle_of_last_logged_task == 0) + { + return; + } + + trcCRITICAL_SECTION_BEGIN(); + if (RecorderDataPtr->recorderActive) + { + dts1 = (uint16_t)prvTraceGetDTS(0xFFFF); + hnd8 = prvTraceGet8BitHandle((traceHandle)objectNumber); + kse = (KernelCall*) prvTraceNextFreeEventBufferSlot(); + if (kse != NULL) + { + kse->dts = dts1; + kse->type = (uint8_t)ecode; + kse->objHandle = hnd8; + prvTraceUpdateCounters(); + } + } + trcCRITICAL_SECTION_END(); +} +#endif /* TRC_CFG_SCHEDULING_ONLY */ + +/******************************************************************************* + * prvTraceStoreKernelCallWithParam + * + * Used for storing kernel calls with a handle and a numeric parameter. If the + * numeric parameter does not fit in one byte, and extra XPS event is inserted + * before the kernel call event containing the three upper bytes. + ******************************************************************************/ +#if (TRC_CFG_SCHEDULING_ONLY == 0) +void prvTraceStoreKernelCallWithParam(uint32_t evtcode, + traceObjectClass objectClass, + uint32_t objectNumber, + uint32_t param) +{ + KernelCallWithParamAndHandle * kse; + uint8_t dts2; + uint8_t hnd8; + uint8_t p8; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ASSERT(evtcode < 0xFF, "prvTraceStoreKernelCallWithParam: evtcode >= 0xFF", TRC_UNUSED); + TRACE_ASSERT(objectClass < TRACE_NCLASSES, "prvTraceStoreKernelCallWithParam: objectClass >= TRACE_NCLASSES", TRC_UNUSED); + TRACE_ASSERT(objectNumber <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectClass], "prvTraceStoreKernelCallWithParam: Invalid value for objectNumber", TRC_UNUSED); + + if (recorder_busy) + { + /************************************************************************* + * This occurs if an ISR calls a trace function, preempting a previous + * trace call that is being processed in a different ISR or task. + * If this occurs, there is probably a problem in the definition of the + * recorder's internal critical sections (TRACE_ENTER_CRITICAL_SECTION and + * TRACE_EXIT_CRITICAL_SECTION). They must disable the RTOS tick interrupt + * and any other ISRs that calls the trace recorder directly or via + * traced kernel functions. The ARM port disables all interrupts using the + * PRIMASK register to avoid this issue. + *************************************************************************/ + prvTraceError("Recorder busy - high priority ISR using syscall? (3)"); + return; + } + + trcCRITICAL_SECTION_BEGIN(); + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + { + dts2 = (uint8_t)prvTraceGetDTS(0xFF); + p8 = (uint8_t) prvTraceGetParam(0xFF, param); + hnd8 = prvTraceGet8BitHandle((traceHandle)objectNumber); + kse = (KernelCallWithParamAndHandle*) prvTraceNextFreeEventBufferSlot(); + if (kse != NULL) + { + kse->dts = dts2; + kse->type = (uint8_t)evtcode; + kse->objHandle = hnd8; + kse->param = p8; + prvTraceUpdateCounters(); + } + } + trcCRITICAL_SECTION_END(); +} +#endif /* TRC_CFG_SCHEDULING_ONLY */ + + +/******************************************************************************* + * prvTraceGetParam + * + * Used for storing extra bytes for kernel calls with numeric parameters. + * + * May only be called within a critical section! + ******************************************************************************/ +#if (TRC_CFG_SCHEDULING_ONLY == 0) +static uint32_t prvTraceGetParam(uint32_t param_max, uint32_t param) +{ + XPSEvent* xps; + + TRACE_ASSERT(param_max == 0xFF || param_max == 0xFFFF, + "prvTraceGetParam: Invalid value for param_max", param); + + if (param <= param_max) + { + return param; + } + else + { + xps = (XPSEvent*) prvTraceNextFreeEventBufferSlot(); + if (xps != NULL) + { + xps->type = DIV_XPS; + xps->xps_8 = (uint8_t)((param & (0xFF00 & ~param_max)) >> 8); + xps->xps_16 = (uint16_t)((param & (0xFFFF0000 & ~param_max)) >> 16); + prvTraceUpdateCounters(); + } + + return param & param_max; + } +} +#endif + +/******************************************************************************* + * prvTraceStoreKernelCallWithNumericParamOnly + * + * Used for storing kernel calls with numeric parameters only. This is + * only used for traceTASK_DELAY and traceDELAY_UNTIL at the moment. + ******************************************************************************/ +#if (TRC_CFG_SCHEDULING_ONLY == 0) +void prvTraceStoreKernelCallWithNumericParamOnly(uint32_t evtcode, uint32_t param) +{ + KernelCallWithParam16 * kse; + uint8_t dts6; + uint16_t restParam; + TRACE_ALLOC_CRITICAL_SECTION(); + + restParam = 0; + + TRACE_ASSERT(evtcode < 0xFF, "prvTraceStoreKernelCallWithNumericParamOnly: Invalid value for evtcode", TRC_UNUSED); + + if (recorder_busy) + { + /************************************************************************* + * This occurs if an ISR calls a trace function, preempting a previous + * trace call that is being processed in a different ISR or task. + * If this occurs, there is probably a problem in the definition of the + * recorder's internal critical sections (TRACE_ENTER_CRITICAL_SECTION and + * TRACE_EXIT_CRITICAL_SECTION). They must disable the RTOS tick interrupt + * and any other ISRs that calls the trace recorder directly or via + * traced kernel functions. The ARM port disables all interrupts using the + * PRIMASK register to avoid this issue. + *************************************************************************/ + prvTraceError("Recorder busy - high priority ISR using syscall? (4)"); + return; + } + + trcCRITICAL_SECTION_BEGIN(); + if (RecorderDataPtr->recorderActive && handle_of_last_logged_task) + { + dts6 = (uint8_t)prvTraceGetDTS(0xFF); + restParam = (uint16_t)prvTraceGetParam(0xFFFF, param); + kse = (KernelCallWithParam16*) prvTraceNextFreeEventBufferSlot(); + if (kse != NULL) + { + kse->dts = dts6; + kse->type = (uint8_t)evtcode; + kse->param = restParam; + prvTraceUpdateCounters(); + } + } + trcCRITICAL_SECTION_END(); +} +#endif /* TRC_CFG_SCHEDULING_ONLY */ + +/******************************************************************************* + * prvTraceStoreTaskswitch + * Called by the scheduler from the SWITCHED_OUT hook, and by uiTraceStart. + * At this point interrupts are assumed to be disabled! + ******************************************************************************/ +void prvTraceStoreTaskswitch(traceHandle task_handle) +{ + uint16_t dts3; + TSEvent* ts; + uint8_t hnd8; +#if (TRC_CFG_INCLUDE_ISR_TRACING == 1) + extern int32_t isPendingContextSwitch; +#endif + trcSR_ALLOC_CRITICAL_SECTION_ON_CORTEX_M_ONLY(); + + TRACE_ASSERT(task_handle <= (TRC_CFG_NTASK), + "prvTraceStoreTaskswitch: Invalid value for task_handle", TRC_UNUSED); + + trcCRITICAL_SECTION_BEGIN_ON_CORTEX_M_ONLY(); + + if ((task_handle != handle_of_last_logged_task) && (RecorderDataPtr->recorderActive)) + { +#if (TRC_CFG_INCLUDE_ISR_TRACING == 1) + isPendingContextSwitch = 0; +#endif + + dts3 = (uint16_t)prvTraceGetDTS(0xFFFF); + handle_of_last_logged_task = task_handle; + hnd8 = prvTraceGet8BitHandle(handle_of_last_logged_task); + ts = (TSEvent*)prvTraceNextFreeEventBufferSlot(); + + if (ts != NULL) + { + if (prvTraceGetObjectState(TRACE_CLASS_TASK, + handle_of_last_logged_task) == TASK_STATE_INSTANCE_ACTIVE) + { + ts->type = TS_TASK_RESUME; + } + else + { + ts->type = TS_TASK_BEGIN; + } + + ts->dts = dts3; + ts->objHandle = hnd8; + + prvTraceSetObjectState(TRACE_CLASS_TASK, + handle_of_last_logged_task, + TASK_STATE_INSTANCE_ACTIVE); + + prvTraceUpdateCounters(); + } + } + + trcCRITICAL_SECTION_END_ON_CORTEX_M_ONLY(); +} + +/******************************************************************************* + * prvTraceStoreObjectNameOnCloseEvent + * + * Updates the symbol table with the name of this object from the dynamic + * objects table and stores a "close" event, holding the mapping between handle + * and name (a symbol table handle). The stored name-handle mapping is thus the + * "old" one, valid up until this point. + ******************************************************************************/ +void prvTraceStoreObjectNameOnCloseEvent(uint8_t evtcode, traceHandle handle, + traceObjectClass objectclass) +{ + ObjCloseNameEvent * ce; + const char * name; + traceString idx; + + TRACE_ASSERT(objectclass < TRACE_NCLASSES, + "prvTraceStoreObjectNameOnCloseEvent: objectclass >= TRACE_NCLASSES", TRC_UNUSED); + TRACE_ASSERT(handle <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass], + "prvTraceStoreObjectNameOnCloseEvent: Invalid value for handle", TRC_UNUSED); + + if (RecorderDataPtr->recorderActive) + { + uint8_t hnd8 = prvTraceGet8BitHandle(handle); + name = TRACE_PROPERTY_NAME_GET(objectclass, handle); + idx = prvTraceOpenSymbol(name, 0); + + // Interrupt disable not necessary, already done in trcHooks.h macro + ce = (ObjCloseNameEvent*) prvTraceNextFreeEventBufferSlot(); + if (ce != NULL) + { + ce->type = (uint8_t) evtcode; + ce->objHandle = hnd8; + ce->symbolIndex = idx; + prvTraceUpdateCounters(); + } + } +} + +void prvTraceStoreObjectPropertiesOnCloseEvent(uint8_t evtcode, traceHandle handle, + traceObjectClass objectclass) +{ + ObjClosePropEvent * pe; + + TRACE_ASSERT(objectclass < TRACE_NCLASSES, + "prvTraceStoreObjectPropertiesOnCloseEvent: objectclass >= TRACE_NCLASSES", TRC_UNUSED); + TRACE_ASSERT(handle <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass], + "prvTraceStoreObjectPropertiesOnCloseEvent: Invalid value for handle", TRC_UNUSED); + + if (RecorderDataPtr->recorderActive) + { + // Interrupt disable not necessary, already done in trcHooks.h macro + pe = (ObjClosePropEvent*) prvTraceNextFreeEventBufferSlot(); + if (pe != NULL) + { + if (objectclass == TRACE_CLASS_TASK) + { + pe->arg1 = TRACE_PROPERTY_ACTOR_PRIORITY(objectclass, handle); + } + else + { + pe->arg1 = TRACE_PROPERTY_OBJECT_STATE(objectclass, handle); + } + pe->type = evtcode; + prvTraceUpdateCounters(); + } + } +} + +void prvTraceSetPriorityProperty(uint8_t objectclass, traceHandle id, uint8_t value) +{ + TRACE_ASSERT(objectclass < TRACE_NCLASSES, + "prvTraceSetPriorityProperty: objectclass >= TRACE_NCLASSES", TRC_UNUSED); + TRACE_ASSERT(id <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass], + "prvTraceSetPriorityProperty: Invalid value for id", TRC_UNUSED); + + TRACE_PROPERTY_ACTOR_PRIORITY(objectclass, id) = value; +} + +uint8_t prvTraceGetPriorityProperty(uint8_t objectclass, traceHandle id) +{ + TRACE_ASSERT(objectclass < TRACE_NCLASSES, + "prvTraceGetPriorityProperty: objectclass >= TRACE_NCLASSES", 0); + TRACE_ASSERT(id <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass], + "prvTraceGetPriorityProperty: Invalid value for id", 0); + + return TRACE_PROPERTY_ACTOR_PRIORITY(objectclass, id); +} + +void prvTraceSetObjectState(uint8_t objectclass, traceHandle id, uint8_t value) +{ + TRACE_ASSERT(objectclass < TRACE_NCLASSES, + "prvTraceSetObjectState: objectclass >= TRACE_NCLASSES", TRC_UNUSED); + TRACE_ASSERT(id <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass], + "prvTraceSetObjectState: Invalid value for id", TRC_UNUSED); + + TRACE_PROPERTY_OBJECT_STATE(objectclass, id) = value; +} + +uint8_t prvTraceGetObjectState(uint8_t objectclass, traceHandle id) +{ + TRACE_ASSERT(objectclass < TRACE_NCLASSES, + "prvTraceGetObjectState: objectclass >= TRACE_NCLASSES", 0); + TRACE_ASSERT(id <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass], + "prvTraceGetObjectState: Invalid value for id", 0); + + return TRACE_PROPERTY_OBJECT_STATE(objectclass, id); +} + +void prvTraceSetTaskInstanceFinished(traceHandle handle) +{ + TRACE_ASSERT(handle <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[TRACE_CLASS_TASK], + "prvTraceSetTaskInstanceFinished: Invalid value for handle", TRC_UNUSED); + +#if (TRC_CFG_USE_IMPLICIT_IFE_RULES == 1) + TRACE_PROPERTY_OBJECT_STATE(TRACE_CLASS_TASK, handle) = 0; +#endif +} + +/******************************************************************************* + * Static data initializations + ******************************************************************************/ + +/* A set of stacks that keeps track of available object handles for each class. +The stacks are empty initially, meaning that allocation of new handles will be +based on a counter (for each object class). Any delete operation will +return the handle to the corresponding stack, for reuse on the next allocate.*/ +objectHandleStackType objectHandleStacks = { { 0 }, { 0 }, { 0 }, { 0 }, { 0 } }; + +/* Initial TRC_HWTC_COUNT value, for detecting if the time-stamping source is +enabled. If using the OS periodic timer for time-stamping, this might not +have been configured on the earliest events during the startup. */ +uint32_t init_hwtc_count; + +/******************************************************************************* + * RecorderData + * + * The main data structure in snapshot mode, when using the default static memory + * allocation (TRC_RECORDER_BUFFER_ALLOCATION_STATIC). The recorder uses a pointer + * RecorderDataPtr to access the data, to also allow for dynamic or custom data + * allocation (see TRC_CFG_RECORDER_BUFFER_ALLOCATION). + ******************************************************************************/ +#if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_STATIC) +RecorderDataType RecorderData; +#endif + +/******************************************************************************* + * RecorderDataPtr + * + * Pointer to the main data structure, when in snapshot mode. + ******************************************************************************/ +RecorderDataType* RecorderDataPtr = NULL; + +/* This version of the function dynamically allocates the trace data */ +void prvTraceInitTraceData() +{ + + if (RecorderDataPtr == NULL) + { +#if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_STATIC) + RecorderDataPtr = &RecorderData; +#elif (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC) + RecorderDataPtr = (RecorderDataType*)TRACE_MALLOC(sizeof(RecorderDataType)); + if (! RecorderDataPtr) + { + prvTraceError("Failed allocating recorder buffer!"); + return; + } +#elif (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM) + if (! RecorderDataPtr) + { + prvTraceError("Recorder data pointer not set! Use vTraceSetRecorderDataBuffer()."); + return; + } +#endif + } + else + { + if (RecorderDataPtr->startmarker0 == 1) + { + /* Already initialized */ + return; + } + } + + init_hwtc_count = TRC_HWTC_COUNT; + + (void)memset(RecorderDataPtr, 0, sizeof(RecorderDataType)); + + RecorderDataPtr->version = TRACE_KERNEL_VERSION; + RecorderDataPtr->minor_version = TRACE_MINOR_VERSION; + RecorderDataPtr->irq_priority_order = TRC_IRQ_PRIORITY_ORDER; + RecorderDataPtr->filesize = sizeof(RecorderDataType); + RecorderDataPtr->maxEvents = (TRC_CFG_EVENT_BUFFER_SIZE); + RecorderDataPtr->debugMarker0 = (int32_t) 0xF0F0F0F0; + RecorderDataPtr->isUsing16bitHandles = TRC_CFG_USE_16BIT_OBJECT_HANDLES; + RecorderDataPtr->isrTailchainingThreshold = TRC_CFG_ISR_TAILCHAINING_THRESHOLD; + + /* This function is kernel specific */ + vTraceInitObjectPropertyTable(); + + RecorderDataPtr->debugMarker1 = (int32_t)0xF1F1F1F1; + RecorderDataPtr->SymbolTable.symTableSize = (TRC_CFG_SYMBOL_TABLE_SIZE); + RecorderDataPtr->SymbolTable.nextFreeSymbolIndex = 1; +#if (TRC_CFG_INCLUDE_FLOAT_SUPPORT == 1) + RecorderDataPtr->exampleFloatEncoding = 1.0f; /* otherwise already zero */ +#endif + RecorderDataPtr->debugMarker2 = (int32_t)0xF2F2F2F2; + prvStrncpy(RecorderDataPtr->systemInfo, "Trace Recorder Demo", 80); + RecorderDataPtr->debugMarker3 = (int32_t)0xF3F3F3F3; + RecorderDataPtr->endmarker0 = 0x0A; + RecorderDataPtr->endmarker1 = 0x0B; + RecorderDataPtr->endmarker2 = 0x0C; + RecorderDataPtr->endmarker3 = 0x0D; + RecorderDataPtr->endmarker4 = 0x71; + RecorderDataPtr->endmarker5 = 0x72; + RecorderDataPtr->endmarker6 = 0x73; + RecorderDataPtr->endmarker7 = 0x74; + RecorderDataPtr->endmarker8 = 0xF1; + RecorderDataPtr->endmarker9 = 0xF2; + RecorderDataPtr->endmarker10 = 0xF3; + RecorderDataPtr->endmarker11 = 0xF4; + +#if TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER + RecorderDataPtr->userEventBuffer.bufferID = 1; + RecorderDataPtr->userEventBuffer.version = 0; + RecorderDataPtr->userEventBuffer.numberOfSlots = (TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE); + RecorderDataPtr->userEventBuffer.numberOfChannels = (TRC_CFG_UB_CHANNELS) + 1; +#endif + + /* Kernel specific initialization of the objectHandleStacks variable */ + vTraceInitObjectHandleStack(); + + + /* Finally, the 12-byte "start markers" are initialized, allowing for + Tracealyzer to find the trace data in a larger RAM dump. + + The start and end markers must be unique, but without proper precautions there + might be a risk of accidental duplicates of the start/end markers, e.g., due to + compiler optimizations. + + The below initialization of the start marker is therefore made in reverse order + and the fields are volatile to ensure this assignment order. This to avoid any + chance of accidental duplicates of this elsewhere in memory. + + Moreover, the fields are set byte-by-byte to avoid endian issues.*/ + + RecorderDataPtr->startmarker11 = 0xF4; + RecorderDataPtr->startmarker10 = 0xF3; + RecorderDataPtr->startmarker9 = 0xF2; + RecorderDataPtr->startmarker8 = 0xF1; + RecorderDataPtr->startmarker7 = 0x74; + RecorderDataPtr->startmarker6 = 0x73; + RecorderDataPtr->startmarker5 = 0x72; + RecorderDataPtr->startmarker4 = 0x71; + RecorderDataPtr->startmarker3 = 0x04; + RecorderDataPtr->startmarker2 = 0x03; + RecorderDataPtr->startmarker1 = 0x02; + RecorderDataPtr->startmarker0 = 0x01; + + if (traceErrorMessage != NULL) + { + // An error was detected before vTraceEnable was called, make sure this is stored in the trace data. + prvStrncpy(RecorderDataPtr->systemInfo, traceErrorMessage, 80); + RecorderDataPtr->internalErrorOccured = 1; + vTraceStop(); + } + + + +#ifdef TRC_PORT_SPECIFIC_INIT + TRC_PORT_SPECIFIC_INIT(); +#endif +} + + +void* prvTraceNextFreeEventBufferSlot(void) +{ + if (! RecorderDataPtr->recorderActive) + { + /* If an XTS or XPS event prior to the main event has filled the buffer + before saving the main event, and store mode is "stop when full". */ + return NULL; + } + + if (RecorderDataPtr->nextFreeIndex >= (TRC_CFG_EVENT_BUFFER_SIZE)) + { + prvTraceError("Attempt to index outside event buffer!"); + return NULL; + } + return (void*)(&RecorderDataPtr->eventData[RecorderDataPtr->nextFreeIndex*4]); +} + +uint16_t uiIndexOfObject(traceHandle objecthandle, uint8_t objectclass) +{ + TRACE_ASSERT(objectclass < TRACE_NCLASSES, + "uiIndexOfObject: Invalid value for objectclass", 0); + TRACE_ASSERT(objecthandle > 0 && objecthandle <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass], + "uiIndexOfObject: Invalid value for objecthandle", 0); + + if ((objectclass < TRACE_NCLASSES) && (objecthandle > 0) && + (objecthandle <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass])) + { + return (uint16_t)(RecorderDataPtr->ObjectPropertyTable.StartIndexOfClass[objectclass] + + (RecorderDataPtr->ObjectPropertyTable.TotalPropertyBytesPerClass[objectclass] * (objecthandle-1))); + } + + prvTraceError("Object table lookup with invalid object handle or object class!"); + return 0; +} + +traceHandle prvTraceGetObjectHandle(traceObjectClass objectclass) +{ + traceHandle handle; + static int indexOfHandle; + + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ASSERT(RecorderDataPtr != NULL, "Recorder not initialized, call vTraceEnable() first!", (traceHandle)0); + + TRACE_ASSERT(objectclass < TRACE_NCLASSES, + "prvTraceGetObjectHandle: Invalid value for objectclass", (traceHandle)0); + + trcCRITICAL_SECTION_BEGIN(); + indexOfHandle = objectHandleStacks.indexOfNextAvailableHandle[objectclass]; + if (objectHandleStacks.objectHandles[indexOfHandle] == 0) + { + /* Zero is used to indicate a never before used handle, i.e., + new slots in the handle stack. The handle slot needs to + be initialized here (starts at 1). */ + objectHandleStacks.objectHandles[indexOfHandle] = + (traceHandle)(1 + indexOfHandle - + objectHandleStacks.lowestIndexOfClass[objectclass]); + } + + handle = objectHandleStacks.objectHandles[indexOfHandle]; + + if (objectHandleStacks.indexOfNextAvailableHandle[objectclass] + > objectHandleStacks.highestIndexOfClass[objectclass]) + { + prvTraceError(pszTraceGetErrorNotEnoughHandles(objectclass)); + handle = 0; + } + else + { + int hndCount; + objectHandleStacks.indexOfNextAvailableHandle[objectclass]++; + + hndCount = objectHandleStacks.indexOfNextAvailableHandle[objectclass] - + objectHandleStacks.lowestIndexOfClass[objectclass]; + + if (hndCount > + objectHandleStacks.handleCountWaterMarksOfClass[objectclass]) + { + objectHandleStacks.handleCountWaterMarksOfClass[objectclass] = + (traceHandle)hndCount; + } + } + trcCRITICAL_SECTION_END(); + + return handle; +} + +void prvTraceFreeObjectHandle(traceObjectClass objectclass, traceHandle handle) +{ + int indexOfHandle; + + TRACE_ASSERT(objectclass < TRACE_NCLASSES, + "prvTraceFreeObjectHandle: Invalid value for objectclass", TRC_UNUSED); + TRACE_ASSERT(handle > 0 && handle <= RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass], + "prvTraceFreeObjectHandle: Invalid value for handle", TRC_UNUSED); + + /* Check that there is room to push the handle on the stack */ + if ((objectHandleStacks.indexOfNextAvailableHandle[objectclass] - 1) < + objectHandleStacks.lowestIndexOfClass[objectclass]) + { + /* Error */ + prvTraceError("Attempt to free more handles than allocated!"); + } + else + { + objectHandleStacks.indexOfNextAvailableHandle[objectclass]--; + indexOfHandle = objectHandleStacks.indexOfNextAvailableHandle[objectclass]; + objectHandleStacks.objectHandles[indexOfHandle] = handle; + } +} + +/******************************************************************************* + * prvMarkObjectAsUsed + * + * Sets an "is used flag" on object creation, using the first byte of the name + * field. This allows for counting the number of used Object Table slots, even + * if no names have been set. + ******************************************************************************/ +void prvMarkObjectAsUsed(traceObjectClass objectclass, traceHandle handle) +{ + uint16_t idx = uiIndexOfObject(handle, objectclass); + RecorderDataPtr->ObjectPropertyTable.objbytes[idx] = 1; +} + +/******************************************************************************* + * prvStrncpy + * + * Private string copy function, to improve portability between compilers. + ******************************************************************************/ +static void prvStrncpy(char* dst, const char* src, uint32_t maxLength) +{ + uint32_t i; + for (i = 0; i < maxLength; i++) + { + dst[i] = src[i]; + if (src[i] == 0) + break; + } +} + +/******************************************************************************* + * prvTraceSetObjectName + * + * Registers the names of queues, semaphores and other kernel objects in the + * recorder's Object Property Table, at the given handle and object class. + ******************************************************************************/ +void prvTraceSetObjectName(traceObjectClass objectclass, + traceHandle handle, + const char* name) +{ + static uint16_t idx; + + TRACE_ASSERT(name != NULL, "prvTraceSetObjectName: name == NULL", TRC_UNUSED); + + if (objectclass >= TRACE_NCLASSES) + { + prvTraceError("Illegal object class in prvTraceSetObjectName"); + return; + } + + if (handle == 0) + { + prvTraceError("Illegal handle (0) in prvTraceSetObjectName."); + return; + } + + if (handle > RecorderDataPtr->ObjectPropertyTable.NumberOfObjectsPerClass[objectclass]) + { + /* ERROR */ + prvTraceError(pszTraceGetErrorNotEnoughHandles(objectclass)); + } + else + { + idx = uiIndexOfObject(handle, objectclass); + + if (traceErrorMessage == NULL) + { + prvStrncpy((char*)&(RecorderDataPtr->ObjectPropertyTable.objbytes[idx]), + name, + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[ objectclass ]); + } + } +} + +traceString prvTraceOpenSymbol(const char* name, traceString userEventChannel) +{ + uint16_t result; + uint8_t len; + uint8_t crc; + TRACE_ALLOC_CRITICAL_SECTION(); + + len = 0; + crc = 0; + + TRACE_ASSERT(name != NULL, "prvTraceOpenSymbol: name == NULL", (traceString)0); + + prvTraceGetChecksum(name, &crc, &len); + + trcCRITICAL_SECTION_BEGIN(); + result = prvTraceLookupSymbolTableEntry(name, crc, len, userEventChannel); + if (!result) + { + result = prvTraceCreateSymbolTableEntry(name, crc, len, userEventChannel); + } + trcCRITICAL_SECTION_END(); + + return result; +} + + +/****************************************************************************** +* vTraceSetFrequency +* +* Registers the clock rate of the time source for the event timestamping. +* This is normally not required, but if the default value (TRC_HWTC_FREQ_HZ) +* should be incorrect for your setup, you can override it using this function. +* +* Must be called prior to vTraceEnable, and the time source is assumed to +* have a fixed clock frequency after the startup. +* +* Note that, in snapshot mode, the value is divided by the TRC_HWTC_DIVISOR. +* This is a software "prescaler" that is also applied on the timestamps. +*****************************************************************************/ +void vTraceSetFrequency(uint32_t frequency) +{ + timestampFrequency = frequency; +} + +/******************************************************************************* + * Supporting functions + ******************************************************************************/ + +/******************************************************************************* + * prvTraceError + * + * Called by various parts in the recorder. Stops the recorder and stores a + * pointer to an error message, which is printed by the monitor task. + * If you are not using the monitor task, you may use xTraceGetLastError() + * from your application to check if the recorder is OK. + * + * Note: If a recorder error is registered before vTraceStart is called, the + * trace start will be aborted. This can occur if any of the Nxxxx constants + * (e.g., TRC_CFG_NTASK) in trcConfig.h is too small. + ******************************************************************************/ +void prvTraceError(const char* msg) +{ + /* Stop the recorder */ + if (RecorderDataPtr != NULL) + { + vTraceStop(); + } + + /* If first error only... */ + if (traceErrorMessage == NULL) + { + traceErrorMessage = (char*)(intptr_t) msg; + if (RecorderDataPtr != NULL) + { + prvStrncpy(RecorderDataPtr->systemInfo, traceErrorMessage, 80); + RecorderDataPtr->internalErrorOccured = 1; + } + } +} + +void vTraceSetFilterMask(uint16_t filterMask) +{ + CurrentFilterMask = filterMask; +} + +void vTraceSetFilterGroup(uint16_t filterGroup) +{ + CurrentFilterGroup = filterGroup; +} + +/****************************************************************************** + * prvCheckDataToBeOverwrittenForMultiEntryEvents + * + * This checks if the next event to be overwritten is a multi-entry user event, + * i.e., a USER_EVENT followed by data entries. + * Such data entries do not have an event code at byte 0, as other events. + * All 4 bytes are user data, so the first byte of such data events must + * not be interpreted as type field. The number of data entries following + * a USER_EVENT is given in the event code of the USER_EVENT. + * Therefore, when overwriting a USER_EVENT (when using in ring-buffer mode) + * any data entries following must be replaced with NULL events (code 0). + * + * This is assumed to execute within a critical section... + *****************************************************************************/ + +#if (TRC_CFG_SNAPSHOT_MODE == TRC_SNAPSHOT_MODE_RING_BUFFER) +void prvCheckDataToBeOverwrittenForMultiEntryEvents(uint8_t nofEntriesToCheck) +{ + /* Generic "int" type is desired - should be 16 bit variable on 16 bit HW */ + unsigned int i = 0; + unsigned int e = 0; + + TRACE_ASSERT(nofEntriesToCheck != 0, + "prvCheckDataToBeOverwrittenForMultiEntryEvents: nofEntriesToCheck == 0", TRC_UNUSED); + + while (i < nofEntriesToCheck) + { + e = RecorderDataPtr->nextFreeIndex + i; + if ((RecorderDataPtr->eventData[e*4] > USER_EVENT) && + (RecorderDataPtr->eventData[e*4] < USER_EVENT + 16)) + { + uint8_t nDataEvents = (uint8_t)(RecorderDataPtr->eventData[e*4] - USER_EVENT); + if ((e + nDataEvents) < RecorderDataPtr->maxEvents) + { + (void)memset(& RecorderDataPtr->eventData[e*4], 0, (size_t) (4 + 4 * nDataEvents)); + } + } + else if (RecorderDataPtr->eventData[e*4] == DIV_XPS) + { + if ((e + 1) < RecorderDataPtr->maxEvents) + { + /* Clear 8 bytes */ + (void)memset(& RecorderDataPtr->eventData[e*4], 0, 4 + 4); + } + else + { + /* Clear 8 bytes, 4 first and 4 last */ + (void)memset(& RecorderDataPtr->eventData[0], 0, 4); + (void)memset(& RecorderDataPtr->eventData[e*4], 0, 4); + } + } + i++; + } +} +#endif + +/******************************************************************************* + * prvTraceUpdateCounters + * + * Updates the index of the event buffer. + ******************************************************************************/ +void prvTraceUpdateCounters(void) +{ + if (RecorderDataPtr->recorderActive == 0) + { + return; + } + + RecorderDataPtr->numEvents++; + + RecorderDataPtr->nextFreeIndex++; + + if (RecorderDataPtr->nextFreeIndex >= (TRC_CFG_EVENT_BUFFER_SIZE)) + { +#if (TRC_CFG_SNAPSHOT_MODE == TRC_SNAPSHOT_MODE_RING_BUFFER) + RecorderDataPtr->bufferIsFull = 1; + RecorderDataPtr->nextFreeIndex = 0; +#else + vTraceStop(); +#endif + } + +#if (TRC_CFG_SNAPSHOT_MODE == TRC_SNAPSHOT_MODE_RING_BUFFER) + prvCheckDataToBeOverwrittenForMultiEntryEvents(1); +#endif +} + +/****************************************************************************** + * prvTraceGetDTS + * + * Returns a differential timestamp (DTS), i.e., the time since + * last event, and creates an XTS event if the DTS does not fit in the + * number of bits given. The XTS event holds the MSB bytes of the DTS. + * + * The parameter param_maxDTS should be 0xFF for 8-bit dts or 0xFFFF for + * events with 16-bit dts fields. + *****************************************************************************/ +uint16_t prvTraceGetDTS(uint16_t param_maxDTS) +{ + static uint32_t old_timestamp = 0; + XTSEvent* xts = 0; + uint32_t dts = 0; + uint32_t timestamp = 0; + + TRACE_ASSERT(param_maxDTS == 0xFF || param_maxDTS == 0xFFFF, "prvTraceGetDTS: Invalid value for param_maxDTS", 0); + + + if (RecorderDataPtr->frequency == 0) + { + if (timestampFrequency != 0) + { + /* If to override default TRC_HWTC_FREQ_HZ value with value set by vTraceSetFrequency */ + RecorderDataPtr->frequency = timestampFrequency / (TRC_HWTC_DIVISOR); + } + else if (init_hwtc_count != (TRC_HWTC_COUNT)) + { + /* If using default value and timer has been started. + Note: If the default frequency value set here would be incorrect, e.g., + if the timer has actually not been configured yet, override this + with vTraceSetFrequency. + */ + RecorderDataPtr->frequency = (TRC_HWTC_FREQ_HZ) / (TRC_HWTC_DIVISOR); + } + /* If no override (vTraceSetFrequency) and timer inactive -> no action */ + } + + /************************************************************************** + * The below statements read the timestamp from the timer port module. + * If necessary, whole seconds are extracted using division while the rest + * comes from the modulo operation. + **************************************************************************/ + + prvTracePortGetTimeStamp(×tamp); + + /*************************************************************************** + * Since dts is unsigned the result will be correct even if timestamp has + * wrapped around. + ***************************************************************************/ + dts = timestamp - old_timestamp; + old_timestamp = timestamp; + + if (RecorderDataPtr->frequency > 0) + { + /* Check if dts > 1 second */ + if (dts > RecorderDataPtr->frequency) + { + /* More than 1 second has passed */ + RecorderDataPtr->absTimeLastEventSecond += dts / RecorderDataPtr->frequency; + /* The part that is not an entire second is added to absTimeLastEvent */ + RecorderDataPtr->absTimeLastEvent += dts % RecorderDataPtr->frequency; + } + else + { + RecorderDataPtr->absTimeLastEvent += dts; + } + + /* Check if absTimeLastEvent >= 1 second */ + if (RecorderDataPtr->absTimeLastEvent >= RecorderDataPtr->frequency) + { + /* RecorderDataPtr->absTimeLastEvent is more than or equal to 1 second, but always less than 2 seconds */ + RecorderDataPtr->absTimeLastEventSecond++; + RecorderDataPtr->absTimeLastEvent -= RecorderDataPtr->frequency; + /* RecorderDataPtr->absTimeLastEvent is now less than 1 second */ + } + } + else + { + /* Special case if the recorder has not yet started (frequency may be uninitialized, i.e., zero) */ + RecorderDataPtr->absTimeLastEvent = timestamp; + } + + /* If the dts (time since last event) does not fit in event->dts (only 8 or 16 bits) */ + if (dts > param_maxDTS) + { + /* Create an XTS event (eXtended TimeStamp) containing the higher dts bits*/ + xts = (XTSEvent*) prvTraceNextFreeEventBufferSlot(); + + if (xts != NULL) + { + if (param_maxDTS == 0xFFFF) + { + xts->type = XTS16; + xts->xts_16 = (uint16_t)((dts / 0x10000) & 0xFFFF); + xts->xts_8 = 0; + } + else if (param_maxDTS == 0xFF) + { + xts->type = XTS8; + xts->xts_16 = (uint16_t)((dts / 0x100) & 0xFFFF); + xts->xts_8 = (uint8_t)((dts / 0x1000000) & 0xFF); + } + else + { + prvTraceError("Bad param_maxDTS in prvTraceGetDTS"); + } + prvTraceUpdateCounters(); + } + } + + return (uint16_t)dts & param_maxDTS; +} + +/******************************************************************************* + * prvTraceLookupSymbolTableEntry + * + * Find an entry in the symbol table, return 0 if not present. + * + * The strings are stored in a byte pool, with four bytes of "meta-data" for + * every string. + * byte 0-1: index of next entry with same checksum (for fast lookup). + * byte 2-3: reference to a symbol table entry, a label for vTracePrintF + * format strings only (the handle of the destination channel). + * byte 4..(4 + length): the string (object name or user event label), with + * zero-termination + ******************************************************************************/ +traceString prvTraceLookupSymbolTableEntry(const char* name, + uint8_t crc6, + uint8_t len, + traceString chn) +{ + uint16_t i = RecorderDataPtr->SymbolTable.latestEntryOfChecksum[ crc6 ]; + + TRACE_ASSERT(name != NULL, "prvTraceLookupSymbolTableEntry: name == NULL", (traceString)0); + TRACE_ASSERT(len != 0, "prvTraceLookupSymbolTableEntry: len == 0", (traceString)0); + + while (i != 0) + { + if (RecorderDataPtr->SymbolTable.symbytes[i + 2] == (chn & 0x00FF)) + { + if (RecorderDataPtr->SymbolTable.symbytes[i + 3] == (chn / 0x100)) + { + if (RecorderDataPtr->SymbolTable.symbytes[i + 4 + len] == '\0') + { + if (strncmp((char*)(& RecorderDataPtr->SymbolTable.symbytes[i + 4]), name, len) == 0) + { + break; /* found */ + } + } + } + } + i = (uint16_t)(RecorderDataPtr->SymbolTable.symbytes[i] + (RecorderDataPtr->SymbolTable.symbytes[i + 1] * 0x100)); + } + return i; +} + +/******************************************************************************* + * prvTraceCreateSymbolTableEntry + * + * Creates an entry in the symbol table, independent if it exists already. + * + * The strings are stored in a byte pool, with four bytes of "meta-data" for + * every string. + * byte 0-1: index of next entry with same checksum (for fast lookup). + * byte 2-3: reference to a symbol table entry, a label for vTracePrintF + * format strings only (the handle of the destination channel). + * byte 4..(4 + length): the string (object name or user event label), with + * zero-termination + ******************************************************************************/ +uint16_t prvTraceCreateSymbolTableEntry(const char* name, + uint8_t crc6, + uint8_t len, + traceString channel) +{ + uint16_t ret = 0; + + TRACE_ASSERT(name != NULL, "prvTraceCreateSymbolTableEntry: name == NULL", 0); + TRACE_ASSERT(len != 0, "prvTraceCreateSymbolTableEntry: len == 0", 0); + + if (RecorderDataPtr->SymbolTable.nextFreeSymbolIndex + len + 4 >= (TRC_CFG_SYMBOL_TABLE_SIZE)) + { + prvTraceError("Symbol table full. Increase TRC_CFG_SYMBOL_TABLE_SIZE in trcConfig.h"); + ret = 0; + } + else + { + + RecorderDataPtr->SymbolTable.symbytes + [ RecorderDataPtr->SymbolTable.nextFreeSymbolIndex] = + (uint8_t)(RecorderDataPtr->SymbolTable.latestEntryOfChecksum[ crc6 ] & 0x00FF); + + RecorderDataPtr->SymbolTable.symbytes + [ RecorderDataPtr->SymbolTable.nextFreeSymbolIndex + 1] = + (uint8_t)(RecorderDataPtr->SymbolTable.latestEntryOfChecksum[ crc6 ] / 0x100); + + RecorderDataPtr->SymbolTable.symbytes + [ RecorderDataPtr->SymbolTable.nextFreeSymbolIndex + 2] = + (uint8_t)(channel & 0x00FF); + + RecorderDataPtr->SymbolTable.symbytes + [ RecorderDataPtr->SymbolTable.nextFreeSymbolIndex + 3] = + (uint8_t)(channel / 0x100); + + /* set name (bytes 4...4+len-1) */ + prvStrncpy((char*)&(RecorderDataPtr->SymbolTable.symbytes + [ RecorderDataPtr->SymbolTable.nextFreeSymbolIndex + 4]), name, len); + + /* Set zero termination (at offset 4+len) */ + RecorderDataPtr->SymbolTable.symbytes + [RecorderDataPtr->SymbolTable.nextFreeSymbolIndex + 4 + len] = '\0'; + + /* store index of entry (for return value, and as head of LL[crc6]) */ + RecorderDataPtr->SymbolTable.latestEntryOfChecksum + [ crc6 ] = (uint16_t)RecorderDataPtr->SymbolTable.nextFreeSymbolIndex; + + RecorderDataPtr->SymbolTable.nextFreeSymbolIndex += (uint32_t) (len + 5); + + ret = (uint16_t)(RecorderDataPtr->SymbolTable.nextFreeSymbolIndex - (uint8_t)(len + 5)); + } + + return ret; +} + + +/******************************************************************************* + * prvTraceGetChecksum + * + * Calculates a simple 6-bit checksum from a string, used to index the string + * for fast symbol table lookup. + ******************************************************************************/ +void prvTraceGetChecksum(const char *pname, uint8_t* pcrc, uint8_t* plength) +{ + unsigned char c; + int length = 1; /* Should be 1 to account for '\0' */ + int crc = 0; + + TRACE_ASSERT(pname != NULL, "prvTraceGetChecksum: pname == NULL", TRC_UNUSED); + TRACE_ASSERT(pcrc != NULL, "prvTraceGetChecksum: pcrc == NULL", TRC_UNUSED); + TRACE_ASSERT(plength != NULL, "prvTraceGetChecksum: plength == NULL", TRC_UNUSED); + + if (pname != (const char *) 0) + { + for (; (c = (unsigned char) *pname++) != '\0';) + { + crc += c; + length++; + } + } + *pcrc = (uint8_t)(crc & 0x3F); + *plength = (uint8_t)length; +} + +#if (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) + +static void prvTraceStoreXID(traceHandle handle); + +/****************************************************************************** + * prvTraceStoreXID + * + * Stores an XID (eXtended IDentifier) event. + * This is used if an object/task handle is larger than 255. + * The parameter "handle" is the full (16 bit) handle, assumed to be 256 or + * larger. Handles below 256 should not use this function. + * + * NOTE: this function MUST be called from within a critical section. + *****************************************************************************/ +static void prvTraceStoreXID(traceHandle handle) +{ + XPSEvent* xid; + + TRACE_ASSERT(handle >= 256, "prvTraceStoreXID: Handle < 256", TRC_UNUSED); + + xid = (XPSEvent*)prvTraceNextFreeEventBufferSlot(); + + if (xid != NULL) + { + xid->type = XID; + + /* This function is (only) used when traceHandle is 16 bit... */ + xid->xps_16 = handle; + + prvTraceUpdateCounters(); + } +} + +static uint8_t prvTraceGet8BitHandle(traceHandle handle) +{ + if (handle > 255) + { + prvTraceStoreXID(handle); + /* The full handle (16 bit) is stored in the XID event. + This code (255) is used instead of zero (which is an error code).*/ + return 255; + } + return (uint8_t)(handle & 0xFF); +} +#endif /*(TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1)*/ + + +/* If using DWT timestamping (default on ARM Cortex-M3, M4 and M7), make sure the DWT unit is initialized. */ +#ifndef TRC_CFG_ARM_CM_USE_SYSTICK +#if ((TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_Cortex_M) && (defined (__CORTEX_M) && (__CORTEX_M >= 0x03))) +void prvTraceInitCortexM() +{ + /* Ensure that the DWT registers are unlocked and can be modified. */ + TRC_REG_ITM_LOCKACCESS = TRC_ITM_LOCKACCESS_UNLOCK; + + /* Make sure DWT is enabled, if supported */ + TRC_REG_DEMCR |= TRC_DEMCR_TRCENA; + + do{ + /* Verify that DWT is supported */ + if (TRC_REG_DEMCR == 0) + { + /* This function is called on Cortex-M3, M4 and M7 devices to initialize + the DWT unit, assumed present. The DWT cycle counter is used for timestamping. + + If the below error is produced, the DWT unit does not seem to be available. + + In that case, define the macro TRC_CFG_ARM_CM_USE_SYSTICK in your build + to use SysTick timestamping instead, or define your own timestamping by + setting TRC_CFG_HARDWARE_PORT to TRC_HARDWARE_PORT_APPLICATION_DEFINED + and make the necessary definitions, as explained in trcHardwarePort.h.*/ + + prvTraceError("DWT unit not available, see code comment."); + break; + } + + /* Verify that DWT_CYCCNT is supported */ + if (TRC_REG_DWT_CTRL & TRC_DWT_CTRL_NOCYCCNT) + { + /* This function is called on Cortex-M3, M4 and M7 devices to initialize + the DWT unit, assumed present. The DWT cycle counter is used for timestamping. + + If the below error is produced, the cycle counter does not seem to be available. + + In that case, define the macro TRC_CFG_ARM_CM_USE_SYSTICK in your build + to use SysTick timestamping instead, or define your own timestamping by + setting TRC_CFG_HARDWARE_PORT to TRC_HARDWARE_PORT_APPLICATION_DEFINED + and make the necessary definitions, as explained in trcHardwarePort.h.*/ + + prvTraceError("DWT_CYCCNT not available, see code comment."); + break; + } + + /* Reset the cycle counter */ + TRC_REG_DWT_CYCCNT = 0; + + /* Enable the cycle counter */ + TRC_REG_DWT_CTRL |= TRC_DWT_CTRL_CYCCNTENA; + + }while(0); /* breaks above jump here */ +} +#endif +#endif + +/****************************************************************************** + * prvTracePortGetTimeStamp + * + * Returns the current time based on the HWTC macros which provide a hardware + * isolation layer towards the hardware timer/counter. + * + * The HWTC macros and prvTracePortGetTimeStamp is the main porting issue + * or the trace recorder library. Typically you should not need to change + * the code of prvTracePortGetTimeStamp if using the HWTC macros. + * + ******************************************************************************/ +void prvTracePortGetTimeStamp(uint32_t *pTimestamp) +{ + static uint32_t last_hwtc_count = 0; + uint32_t hwtc_count = 0; + +#if TRC_HWTC_TYPE == TRC_OS_TIMER_INCR || TRC_HWTC_TYPE == TRC_OS_TIMER_DECR + /* systick based timer */ + static uint32_t last_traceTickCount = 0; + uint32_t traceTickCount = 0; +#else /*TRC_HWTC_TYPE == TRC_OS_TIMER_INCR || TRC_HWTC_TYPE == TRC_OS_TIMER_DECR*/ + /* Free running timer */ + static uint32_t last_hwtc_rest = 0; + uint32_t diff = 0; + uint32_t diff_scaled = 0; +#endif /*TRC_HWTC_TYPE == TRC_OS_TIMER_INCR || TRC_HWTC_TYPE == TRC_OS_TIMER_DECR*/ + + if (trace_disable_timestamp == 1) + { + if (pTimestamp) + *pTimestamp = last_timestamp; + return; + } + + /* Retrieve TRC_HWTC_COUNT only once since the same value should be used all throughout this function. */ +#if (TRC_HWTC_TYPE == TRC_OS_TIMER_INCR || TRC_HWTC_TYPE == TRC_FREE_RUNNING_32BIT_INCR) + /* Get the increasing tick count */ + hwtc_count = (TRC_HWTC_COUNT); +#elif (TRC_HWTC_TYPE == TRC_OS_TIMER_DECR || TRC_HWTC_TYPE == TRC_FREE_RUNNING_32BIT_DECR) + /* Convert decreasing tick count into increasing tick count */ + hwtc_count = (TRC_HWTC_PERIOD) - (TRC_HWTC_COUNT); +#else + #error "TRC_HWTC_TYPE has unexpected value" +#endif + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Win32) + /* The Win32 port uses ulGetRunTimeCounterValue for timestamping, which in turn + uses QueryPerformanceCounter. That function is not always reliable when used over + multiple threads. We must therefore handle rare cases where the timestamp is less + than the previous. In practice, this should "never" roll over since the + performance counter is 64 bit wide. */ + + if (last_hwtc_count > hwtc_count) + { + hwtc_count = last_hwtc_count; + } +#endif + +#if (TRC_HWTC_TYPE == TRC_OS_TIMER_INCR || TRC_HWTC_TYPE == TRC_OS_TIMER_DECR) + /* Timestamping is based on a timer that wraps at TRC_HWTC_PERIOD */ + if (last_traceTickCount - uiTraceTickCount - 1 < 0x80000000) + { + /* This means last_traceTickCount is higher than uiTraceTickCount, + so we have previously compensated for a missed tick. + Therefore we use the last stored value because that is more accurate. */ + traceTickCount = last_traceTickCount; + } + else + { + /* Business as usual */ + traceTickCount = uiTraceTickCount; + } + + /* Check for overflow. May occur if the update of uiTraceTickCount has been + delayed due to disabled interrupts. */ + if (traceTickCount == last_traceTickCount && hwtc_count < last_hwtc_count) + { + /* A trace tick has occurred but not been executed by the kernel, so we compensate manually. */ + traceTickCount++; + } + + /* Check if the return address is OK, then we perform the calculation. */ + if (pTimestamp) + { + /* Get timestamp from trace ticks. Scale down the period to avoid unwanted overflows. */ + last_timestamp = traceTickCount * ((TRC_HWTC_PERIOD) / (TRC_HWTC_DIVISOR)); + /* Increase timestamp by (hwtc_count + "lost hardware ticks from scaling down period") / TRC_HWTC_DIVISOR. */ + last_timestamp += (hwtc_count + traceTickCount * ((TRC_HWTC_PERIOD) % (TRC_HWTC_DIVISOR))) / (TRC_HWTC_DIVISOR); + } + /* Store the previous value */ + last_traceTickCount = traceTickCount; + +#else /*(TRC_HWTC_TYPE == TRC_OS_TIMER_INCR || TRC_HWTC_TYPE == TRC_OS_TIMER_DECR)*/ + + /* Timestamping is based on a free running timer */ + /* This part handles free running clocks that can be scaled down to avoid too large DTS values. + Without this, the scaled timestamp will incorrectly wrap at (2^32 / TRC_HWTC_DIVISOR) ticks. + The scaled timestamp returned from this function is supposed to go from 0 -> 2^32, which in real time would represent (0 -> 2^32 * TRC_HWTC_DIVISOR) ticks. */ + + /* First we see how long time has passed since the last timestamp call, and we also add the ticks that was lost when we scaled down the last time. */ + diff = (hwtc_count - last_hwtc_count) + last_hwtc_rest; + + /* Scale down the diff */ + diff_scaled = diff / (TRC_HWTC_DIVISOR); + + /* Find out how many ticks were lost when scaling down, so we can add them the next time */ + last_hwtc_rest = diff % (TRC_HWTC_DIVISOR); + + /* We increase the scaled timestamp by the scaled amount */ + last_timestamp += diff_scaled; +#endif /*(TRC_HWTC_TYPE == TRC_OS_TIMER_INCR || TRC_HWTC_TYPE == TRC_OS_TIMER_DECR)*/ + + /* Is anyone interested in the results? */ + if (pTimestamp) + *pTimestamp = last_timestamp; + + /* Store the previous value */ + last_hwtc_count = hwtc_count; +} + +#endif /*(TRC_USE_TRACEALYZER_RECORDER == 1)*/ + +#endif /*(TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT)*/ diff --git a/Tracealyzer/trcStreamingRecorder.c b/Tracealyzer/trcStreamingRecorder.c new file mode 100644 index 00000000..0ca034b8 --- /dev/null +++ b/Tracealyzer/trcStreamingRecorder.c @@ -0,0 +1,2035 @@ +/******************************************************************************* + * Trace Recorder Library for Tracealyzer v4.3.11 + * Percepio AB, www.percepio.com + * + * trcStreamingRecorder.c + * + * The generic core of the trace recorder's streaming mode. + * + * Terms of Use + * This file is part of the trace recorder library (RECORDER), which is the + * intellectual property of Percepio AB (PERCEPIO) and provided under a + * license as follows. + * The RECORDER may be used free of charge for the purpose of recording data + * intended for analysis in PERCEPIO products. It may not be used or modified + * for other purposes without explicit permission from PERCEPIO. + * You may distribute the RECORDER in its original source code form, assuming + * this text (terms of use, disclaimer, copyright notice) is unchanged. You are + * allowed to distribute the RECORDER with minor modifications intended for + * configuration or porting of the RECORDER, e.g., to allow using it on a + * specific processor, processor family or with a specific communication + * interface. Any such modifications should be documented directly below + * this comment block. + * + * Disclaimer + * The RECORDER is being delivered to you AS IS and PERCEPIO makes no warranty + * as to its use or performance. PERCEPIO does not and cannot warrant the + * performance or results you may obtain by using the RECORDER or documentation. + * PERCEPIO make no warranties, express or implied, as to noninfringement of + * third party rights, merchantability, or fitness for any particular purpose. + * In no event will PERCEPIO, its technology partners, or distributors be liable + * to you for any consequential, incidental or special damages, including any + * lost profits or lost savings, even if a representative of PERCEPIO has been + * advised of the possibility of such damages, or for any claim by any third + * party. Some jurisdictions do not allow the exclusion or limitation of + * incidental, consequential or special damages, or the exclusion of implied + * warranties or limitations on how long an implied warranty may last, so the + * above limitations may not apply to you. + * + * Tabs are used for indent in this file (1 tab = 4 spaces) + * + * Copyright Percepio AB, 2018. + * www.percepio.com + ******************************************************************************/ + +#include "trcRecorder.h" + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#include +#include +#include + +#include "trcExtensions.h" + +uint32_t trcHeapCounter = 0; + +typedef struct{ + uint16_t EventID; + uint16_t EventCount; + uint32_t TS; +} BaseEvent; + +typedef struct{ + BaseEvent base; + uint32_t param1; +} EventWithParam_1; + +typedef struct{ + BaseEvent base; + uint32_t param1; + uint32_t param2; +} EventWithParam_2; + +typedef struct{ + BaseEvent base; + uint32_t param1; + uint32_t param2; + uint32_t param3; +} EventWithParam_3; + +typedef struct{ + BaseEvent base; + uint32_t param1; + uint32_t param2; + uint32_t param3; + uint32_t param4; +} EventWithParam_4; + +typedef struct{ + BaseEvent base; + uint32_t param1; + uint32_t param2; + uint32_t param3; + uint32_t param4; + uint32_t param5; +} EventWithParam_5; + +/* Used in event functions with variable number of parameters. */ +typedef struct +{ + BaseEvent base; + uint32_t data[15]; /* maximum payload size */ +} largestEventType; + +typedef struct{ + uint32_t psf; + uint16_t version; + uint16_t platform; + uint32_t options; + uint32_t heapCounter; + uint16_t symbolSize; + uint16_t symbolCount; + uint16_t objectDataSize; + uint16_t objectDataCount; +} PSFHeaderInfo; + + +/* The size of each slot in the Symbol Table */ +#define SYMBOL_TABLE_SLOT_SIZE (sizeof(uint32_t) + (((TRC_CFG_SYMBOL_MAX_LENGTH)+(sizeof(uint32_t)-1))/sizeof(uint32_t))*sizeof(uint32_t)) + +#define OBJECT_DATA_SLOT_SIZE (sizeof(uint32_t) + sizeof(uint32_t)) + +/* The total size of the Symbol Table */ +#define SYMBOL_TABLE_BUFFER_SIZE ((TRC_CFG_SYMBOL_TABLE_SLOTS) * SYMBOL_TABLE_SLOT_SIZE) + +/* The total size of the Object Data Table */ +#define OBJECT_DATA_TABLE_BUFFER_SIZE ((TRC_CFG_OBJECT_DATA_SLOTS) * OBJECT_DATA_SLOT_SIZE) + +#if (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT > 128) +#error "TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT cannot be larger than 128" +#endif /* (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT > 128) */ + +/* The Symbol Table type - just a byte array */ +typedef struct{ + union + { + uint32_t pSymbolTableBufferUINT32[SYMBOL_TABLE_BUFFER_SIZE / sizeof(uint32_t)]; + uint8_t pSymbolTableBufferUINT8[SYMBOL_TABLE_BUFFER_SIZE]; + } SymbolTableBuffer; +} SymbolTable; + +/* The Object Data Table type - just a byte array */ +typedef struct{ + union + { + uint32_t pObjectDataTableBufferUINT32[OBJECT_DATA_TABLE_BUFFER_SIZE / sizeof(uint32_t)]; + uint8_t pObjectDataTableBufferUINT8[OBJECT_DATA_TABLE_BUFFER_SIZE]; + } ObjectDataTableBuffer; +} ObjectDataTable; + +typedef struct{ + uint16_t Status; /* 16 bit to avoid implicit padding (warnings) */ + uint16_t BytesRemaining; + char* WritePointer; +} PageType; + +/* Code used for "task address" when no task has started, to indicate "(startup)". + * This value was used since NULL/0 was already reserved for the idle task. */ +#define HANDLE_NO_TASK 2 + +/* The status codes for the pages of the internal trace buffer. */ +#define PAGE_STATUS_FREE 0 +#define PAGE_STATUS_WRITE 1 +#define PAGE_STATUS_READ 2 + +/* Calls prvTraceError if the _assert condition is false. For void functions, +where no return value is to be provided. */ +#define PSF_ASSERT_VOID(_assert, _err) if (! (_assert)){ prvTraceError(_err); return; } + +/* Calls prvTraceError if the _assert condition is false. For non-void functions, +where a return value is to be provided. */ +#define PSF_ASSERT_RET(_assert, _err, _return) if (! (_assert)){ prvTraceError(_err); return _return; } + +/* Part of the PSF format - encodes the number of 32-bit params in an event */ +#define PARAM_COUNT(n) ((n & 0xF) << 12) + +/* We skip the slot for PSF_ERROR_NONE so error code 1 is the first bit */ +#define GET_ERROR_WARNING_FLAG(errCode) (ErrorAndWarningFlags & (1 << ((errCode) - 1))) +#define SET_ERROR_WARNING_FLAG(errCode) (ErrorAndWarningFlags |= (1 << ((errCode) - 1))) + +/* Used for flags indicating if a certain error or warning has occurred */ +static uint32_t ErrorAndWarningFlags = 0; + +/* The Symbol Table instance - keeps names of tasks and other named objects. */ +static SymbolTable symbolTable = { { { 0 } } }; + +/* This points to the first unused entry in the symbol table. */ +static uint32_t firstFreeSymbolTableIndex = 0; + +/* The Object Data Table instance - keeps initial priorities of tasks. */ +static ObjectDataTable objectDataTable = { { { 0 } } }; + +/* This points to the first unused entry in the object data table. */ +static uint32_t firstFreeObjectDataTableIndex = 0; + +/* Keeps track of ISR nesting */ +static uint32_t ISR_stack[TRC_CFG_MAX_ISR_NESTING]; + +/* Keeps track of ISR nesting */ +static int8_t ISR_stack_index = -1; + +/* Any error that occurred in the recorder (also creates User Event) */ +static int errorCode = PSF_ERROR_NONE; + +/* Counts the number of trace sessions (not yet used) */ +static uint32_t SessionCounter = 0u; + +/* Master switch for recording (0 => Disabled, 1 => Enabled) */ +uint32_t RecorderEnabled = 0u; + +/* Used to determine endian of data (big/little) */ +static uint32_t PSFEndianessIdentifier = 0x50534600; + +/* Used to interpret the data format */ +static uint16_t FormatVersion = 0x0006; + +/* The number of events stored. Used as event sequence number. */ +static uint32_t eventCounter = 0; + +/* Remembers if an earlier ISR in a sequence of adjacent ISRs has triggered a task switch. +In that case, vTraceStoreISREnd does not store a return to the previously executing task. */ +int32_t isPendingContextSwitch = 0; + +uint32_t uiTraceTickCount = 0; +uint32_t timestampFrequency = 0; +uint32_t DroppedEventCounter = 0; +uint32_t TotalBytesRemaining_LowWaterMark = (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT) * (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE); +uint32_t TotalBytesRemaining = (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT) * (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE); + +PageType PageInfo[TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT]; + +char* EventBuffer = NULL; + +PSFExtensionInfoType PSFExtensionInfo = TRC_EXTENSION_INFO; + +/******************************************************************************* + * NoRoomForSymbol + * + * Incremented on prvTraceSaveSymbol if no room for saving the symbol name. This + * is used for storing the names of: + * - Tasks + * - Named ISRs (xTraceSetISRProperties) + * - Named kernel objects (vTraceStoreKernelObjectName) + * - User event channels (xTraceRegisterString) + * + * This variable should be zero. If not, it shows the number of missing slots so + * far. In that case, increment SYMBOL_TABLE_SLOTS with (at least) this value. + ******************************************************************************/ +volatile uint32_t NoRoomForSymbol = 0; + +/******************************************************************************* + * NoRoomForObjectData + * + * Incremented on prvTraceSaveObjectData if no room for saving the object data, + * i.e., the base priorities of tasks. There must be one slot for each task. + * If not, this variable will show the difference. + * + * This variable should be zero. If not, it shows the number of missing slots so + * far. In that case, increment OBJECT_DATA_SLOTS with (at least) this value. + ******************************************************************************/ +volatile uint32_t NoRoomForObjectData = 0; + +/******************************************************************************* + * LongestSymbolName + * + * Updated in prvTraceSaveSymbol. Should not exceed TRC_CFG_SYMBOL_MAX_LENGTH, + * otherwise symbol names will be truncated. In that case, set + * TRC_CFG_SYMBOL_MAX_LENGTH to (at least) this value. + ******************************************************************************/ +volatile uint32_t LongestSymbolName = 0; + +/******************************************************************************* + * MaxBytesTruncated + * + * Set in prvTraceStoreStringEvent if the total data payload exceeds 60 bytes, + * including data arguments and the string. For user events, that is 52 bytes + * for string and data arguments. In that is exceeded, the event is truncated + * (usually only the string, unless more than 15 parameters) and this variable + * holds the maximum number of truncated bytes, from any event. + ******************************************************************************/ +volatile uint32_t MaxBytesTruncated = 0; + +uint16_t CurrentFilterMask = 0xFFFF; + +uint16_t CurrentFilterGroup = FilterGroup0; + +volatile uint32_t uiTraceSystemState = TRC_STATE_IN_STARTUP; + +/* Internal common function for storing string events */ +static void prvTraceStoreStringEventHelper( int nArgs, + uint16_t eventID, + traceString userEvtChannel, + int len, + const char* str, + va_list vl); + +/* Not static to avoid warnings from SysGCC/PPC */ +void prvTraceStoreSimpleStringEventHelper(uint16_t eventID, + traceString userEvtChannel, + const char* str); + +/* Stores the header information on Start */ +static void prvTraceStoreHeader(void); + +/* Stores the Start Event */ +static void prvTraceStoreStartEvent(void); + +/* Stores the symbol table on Start */ +static void prvTraceStoreSymbolTable(void); + +/* Stores the object table on Start */ +static void prvTraceStoreObjectDataTable(void); + +/* Store the Timestamp Config on Start */ +static void prvTraceStoreTSConfig(void); + +/* Store information about trace library extensions. */ +static void prvTraceStoreExtensionInfo(void); + +/* Internal function for starting/stopping the recorder. */ +static void prvSetRecorderEnabled(uint32_t isEnabled); + +/* Mark the page read as complete. */ +static void prvPageReadComplete(int pageIndex); + +/* Retrieve a buffer page to write to. */ +static int prvAllocateBufferPage(int prevPage); + +/* Get the current buffer page index (return value) and the number +of valid bytes in the buffer page (bytesUsed). */ +static int prvGetBufferPage(int32_t* bytesUsed); + +/* Performs timestamping using definitions in trcHardwarePort.h */ +static uint32_t prvGetTimestamp32(void); + +/* Returns the string associated with the error code */ +static const char* prvTraceGetError(int errCode); + +/* Signal an error. */ +void prvTraceError(int errCode); + +/* Signal a warning (does not stop the recorder). */ +void prvTraceWarning(int errCode); + +/****************************************************************************** + * vTraceInstanceFinishedNow + * + * Creates an event that ends the current task instance at this very instant. + * This makes the viewer to splits the current fragment at this point and begin + * a new actor instance, even if no task-switch has occurred. + *****************************************************************************/ +void vTraceInstanceFinishedNow(void) +{ + prvTraceStoreEvent0(PSF_EVENT_IFE_DIRECT); +} + +/****************************************************************************** + * vTraceInstanceFinishedNext + * + * Marks the current "task instance" as finished on the next kernel call. + * + * If that kernel call is blocking, the instance ends after the blocking event + * and the corresponding return event is then the start of the next instance. + * If the kernel call is not blocking, the viewer instead splits the current + * fragment right before the kernel call, which makes this call the first event + * of the next instance. + *****************************************************************************/ +void vTraceInstanceFinishedNext(void) +{ + prvTraceStoreEvent0(PSF_EVENT_IFE_NEXT); +} + +/******************************************************************************* + * vTraceStoreKernelObjectName + * + * Parameter object: pointer to the Event Group that shall be named + * Parameter name: the name to set (const string literal) + * + * Sets a name for a kernel object for display in Tracealyzer. + ******************************************************************************/ +void vTraceStoreKernelObjectName(void* object, const char* name) +{ + uint16_t eventID = PSF_EVENT_OBJ_NAME; + + PSF_ASSERT_VOID(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE); + + /* Always save in symbol table, in case the recording has not yet started */ + prvTraceSaveObjectSymbol(object, name); + + prvTraceStoreStringEvent(1, eventID, name, object); +} + + +/****************************************************************************** +* vTraceSetFrequency +* +* Registers the clock rate of the time source for the event timestamping. +* This is normally not required, but if the default value (TRC_HWTC_FREQ_HZ) +* should be incorrect for your setup, you can override it using this function. +* +* Must be called prior to vTraceEnable, and the time source is assumed to +* have a fixed clock frequency after the startup. +*****************************************************************************/ +void vTraceSetFrequency(uint32_t frequency) +{ + timestampFrequency = frequency; +} + +#if (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) + +/******************************************************************************* +* xTraceRegisterString +* +* Stores a name for a user event channel, returns the handle. +******************************************************************************/ +traceString xTraceRegisterString(const char* name) +{ + traceString str; + uint16_t eventID = PSF_EVENT_OBJ_NAME; + + str = prvTraceSaveSymbol(name); + + PSF_ASSERT_RET(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE, str); + + /* Always save in symbol table, if the recording has not yet started */ + prvTraceStoreStringEvent(1, eventID, (const char*)name, str); + + return str; +} + +/****************************************************************************** + * vTracePrint + * + * Generates "User Events", with unformatted text. + * + * User Events can be used for very efficient application logging, and are shown + * as yellow labels in the main trace view. + * + * You may group User Events into User Event Channels. The yellow User Event + * labels shows the logged string, preceded by the channel name within + * brackets. For example: + * + * "[MyChannel] Hello World!" + * + * The User Event Channels are shown in the View Filter, which makes it easy to + * select what User Events you wish to display. User Event Channels are created + * using xTraceRegisterString(). + * + * Example: + * + * traceString chn = xTraceRegisterString("MyChannel"); + * ... + * vTracePrint(chn, "Hello World!"); + * + ******************************************************************************/ +void vTracePrint(traceString chn, const char* str) +{ + uint16_t eventID = PSF_EVENT_USER_EVENT; + PSF_ASSERT_VOID(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE); + + prvTraceStoreSimpleStringEventHelper(eventID, chn, str); +} + +/******************************************************************************* +* vTraceConsoleChannelPrintF +* +* Wrapper for vTracePrint, using the default channel. Can be used as a drop-in +* replacement for printf and similar functions, e.g. in a debug logging macro. +* +* Example: +* +* // Old: #define LogString debug_console_printf +* +* // New, log to Tracealyzer instead: +* #define LogString vTraceConsoleChannelPrintF +* ... +* LogString("My value is: %d", myValue); +******************************************************************************/ +void vTraceConsoleChannelPrintF(const char* fmt, ...) +{ + va_list vl; + char tempBuf[60]; + static traceString consoleChannel = NULL; + + if (consoleChannel == NULL) + consoleChannel = xTraceRegisterString("Debug Console"); + + va_start(vl, fmt); + vsnprintf(tempBuf, 60, fmt, vl); + vTracePrint(consoleChannel, tempBuf); + va_end(vl); +} + +/****************************************************************************** + * vTracePrintF + * + * Generates "User Events", with formatted text and data, similar to a "printf". + * It is very fast since the actual formatting is done on the host side when the + * trace is displayed. + * + * User Events can be used for very efficient application logging, and are shown + * as yellow labels in the main trace view. + * An advantage of User Events is that data can be plotted in the "User Event + * Signal Plot" view, visualizing any data you log as User Events, discrete + * states or control system signals (e.g. system inputs or outputs). + * + * You may group User Events into User Event Channels. The yellow User Event + * labels show the logged string, preceded by the channel name within brackets. + * + * Example: + * + * "[MyChannel] Hello World!" + * + * The User Event Channels are shown in the View Filter, which makes it easy to + * select what User Events you wish to display. User Event Channels are created + * using xTraceRegisterString(). + * + * Example: + * + * traceString adc_uechannel = xTraceRegisterString("ADC User Events"); + * ... + * vTracePrintF(adc_uechannel, + * "ADC channel %d: %d volts", + * ch, adc_reading); + * + * All data arguments are assumed to be 32 bit wide. The following formats are + * supported: + * %d - signed integer. The following width and padding format is supported: "%05d" -> "-0042" and "%5d" -> " -42" + * %u - unsigned integer. The following width and padding format is supported: "%05u" -> "00042" and "%5u" -> " 42" + * %X - hexadecimal (uppercase). The following width and padding format is supported: "%04X" -> "002A" and "%4X" -> " 2A" + * %x - hexadecimal (lowercase). The following width and padding format is supported: "%04x" -> "002a" and "%4x" -> " 2a" + * %s - string (currently, this must be an earlier stored symbol name) + * + * Up to 15 data arguments are allowed, with a total size of maximum 60 byte + * including 8 byte for the base event fields and the format string. So with + * one data argument, the maximum string length is 48 chars. If this is exceeded + * the string is truncated (4 bytes at a time). + * + ******************************************************************************/ +void vTracePrintF(traceString chn, const char* fmt, ...) +{ + va_list vl; + + va_start(vl, fmt); + vTraceVPrintF(chn, fmt, vl); + va_end(vl); +} + +/****************************************************************************** + * vTraceVPrintF + * + * vTracePrintF variant that accepts a va_list. + * See vTracePrintF documentation for further details. + * + ******************************************************************************/ +void vTraceVPrintF(traceString chn, const char* fmt, va_list vl) +{ + int i = 0; + int nArgs = 0; + int eventID = PSF_EVENT_USER_EVENT; + + /* Count the number of arguments in the format string (e.g., %d) */ + for (i = 0; (fmt[i] != 0) && (i < 52); i++) + { + if (fmt[i] == '%') + { + if (fmt[i + 1] == 0) + { + /* Found end of string, let for loop detect it */ + continue; + } + + if (fmt[i + 1] != '%') + { + nArgs++; /* Found an argument */ + } + + i++; /* Move past format specifier or non-argument '%' */ + } + } + + if (chn != NULL) + { + /* Make room for the channel */ + nArgs++; + } + eventID += nArgs; + + PSF_ASSERT_VOID(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE); + + prvTraceStoreStringEventHelper(nArgs, (uint16_t)eventID, chn, i, fmt, vl); +} +#endif /* (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) */ + +/******************************************************************************* + * xTraceSetISRProperties + * + * Stores a name and priority level for an Interrupt Service Routine, to allow + * for better visualization. Returns a traceHandle used by vTraceStoreISRBegin. + * + * Example: + * #define PRIO_ISR_TIMER1 3 // the hardware priority of the interrupt + * ... + * traceHandle Timer1Handle = xTraceSetISRProperties("ISRTimer1", PRIO_ISR_TIMER1); + * ... + * void ISR_handler() + * { + * vTraceStoreISRBegin(Timer1Handle); + * ... + * vTraceStoreISREnd(0); + * } + * + ******************************************************************************/ +traceHandle xTraceSetISRProperties(const char* name, uint8_t priority) +{ + traceHandle isrHandle; + uint16_t eventID = PSF_EVENT_DEFINE_ISR; + + /* Always save in symbol table, in case the recording has not yet started */ + isrHandle = prvTraceSaveSymbol(name); + + /* Save object data in object data table */ + prvTraceSaveObjectData((void*)isrHandle, priority); + + PSF_ASSERT_RET(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE, isrHandle); + + prvTraceStoreStringEvent(2, eventID, name, isrHandle, priority); + + return isrHandle; +} + +/******************************************************************************* + * vTraceStoreISRBegin + * + * Registers the beginning of an Interrupt Service Routine, using a traceHandle + * provided by xTraceSetISRProperties. + * + * Example: + * #define PRIO_ISR_TIMER1 3 // the hardware priority of the interrupt + * ... + * traceHandle Timer1Handle = xTraceSetISRProperties("ISRTimer1", PRIO_ISR_TIMER1); + * ... + * void ISR_handler() + * { + * vTraceStoreISRBegin(Timer1Handle); + * ... + * vTraceStoreISREnd(0); + * } + * + ******************************************************************************/ +void vTraceStoreISRBegin(traceHandle handle) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + /* We are at the start of a possible ISR chain. + No context switches should have been triggered now. */ + if (ISR_stack_index == -1) + isPendingContextSwitch = 0; + + if (ISR_stack_index < (TRC_CFG_MAX_ISR_NESTING) - 1) + { + ISR_stack_index++; + ISR_stack[ISR_stack_index] = (uint32_t)handle; +#if (TRC_CFG_INCLUDE_ISR_TRACING == 1) + prvTraceStoreEvent1(PSF_EVENT_ISR_BEGIN, (uint32_t)handle); +#endif + TRACE_EXIT_CRITICAL_SECTION(); + } + else + { + TRACE_EXIT_CRITICAL_SECTION(); + prvTraceError(PSF_ERROR_ISR_NESTING_OVERFLOW); + } +} + +/******************************************************************************* + * vTraceStoreISREnd + * + * Registers the end of an Interrupt Service Routine. + * + * The parameter pendingISR indicates if the interrupt has requested a + * task-switch (= 1), e.g., by signaling a semaphore. Otherwise (= 0) the + * interrupt is assumed to return to the previous context. + * + * Example: + * #define PRIO_OF_ISR_TIMER1 3 // the hardware priority of the interrupt + * traceHandle traceHandleIsrTimer1 = 0; // The ID set by the recorder + * ... + * traceHandleIsrTimer1 = xTraceSetISRProperties("ISRTimer1", PRIO_OF_ISR_TIMER1); + * ... + * void ISR_handler() + * { + * vTraceStoreISRBegin(traceHandleIsrTimer1); + * ... + * vTraceStoreISREnd(0); + * } + * + ******************************************************************************/ +void vTraceStoreISREnd(int isTaskSwitchRequired) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + (void)ISR_stack; + + /* Is there a pending task-switch? (perhaps from an earlier ISR) */ + isPendingContextSwitch |= isTaskSwitchRequired; + + if (ISR_stack_index > 0) + { + ISR_stack_index--; + +#if (TRC_CFG_INCLUDE_ISR_TRACING == 1) + /* Store return to interrupted ISR (if nested ISRs)*/ + prvTraceStoreEvent1(PSF_EVENT_ISR_RESUME, (uint32_t)ISR_stack[ISR_stack_index]); +#endif + } + else + { + ISR_stack_index--; + + /* Store return to interrupted task, if no context switch will occur in between. */ + if ((isPendingContextSwitch == 0) || (prvTraceIsSchedulerSuspended())) + { +#if (TRC_CFG_INCLUDE_ISR_TRACING == 1) + prvTraceStoreEvent1(PSF_EVENT_TS_RESUME, (uint32_t)TRACE_GET_CURRENT_TASK()); +#endif + } + } + + TRACE_EXIT_CRITICAL_SECTION(); +} + +/******************************************************************************* + * xTraceGetLastError + * + * Returns the last error or warning, as a string, or NULL if none. + *****************************************************************************/ +const char* xTraceGetLastError(void) +{ + return prvTraceGetError(errorCode); +} + +/******************************************************************************* + * vTraceClearError + * + * Clears any errors. + *****************************************************************************/ +void vTraceClearError(void) +{ + NoRoomForSymbol = 0; + LongestSymbolName = 0; + NoRoomForObjectData = 0; + MaxBytesTruncated = 0; + errorCode = PSF_ERROR_NONE; +} + +/******************************************************************************* + * vTraceStop + * + * Stops the tracing. + *****************************************************************************/ +void vTraceStop(void) +{ + prvSetRecorderEnabled(0); +} + +/******************************************************************************* + * vTraceSetRecorderDataBuffer + * + * If custom allocation is used, this function must be called so the recorder + * library knows where to save the trace data. + ******************************************************************************/ +#if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM) + +extern char* _TzTraceData; + +void vTraceSetRecorderDataBuffer(void* pRecorderData) +{ + _TzTraceData = pRecorderData; +} +#endif + + +/******************************************************************************* +* xTraceIsRecordingEnabled +* Returns true (1) if the recorder is enabled (i.e. is recording), otherwise 0. +******************************************************************************/ +int xTraceIsRecordingEnabled(void) +{ + return (int)RecorderEnabled; +} + +void vTraceSetFilterMask(uint16_t filterMask) +{ + CurrentFilterMask = filterMask; +} + +void vTraceSetFilterGroup(uint16_t filterGroup) +{ + CurrentFilterGroup = filterGroup; +} + + +/******************************************************************************/ +/*** INTERNAL FUNCTIONS *******************************************************/ +/******************************************************************************/ + +/* Internal function for starting/stopping the recorder. */ +static void prvSetRecorderEnabled(uint32_t isEnabled) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + if (RecorderEnabled == isEnabled) + { + return; + } + + TRACE_ENTER_CRITICAL_SECTION(); + + if (isEnabled) + { + TRC_STREAM_PORT_ON_TRACE_BEGIN(); + + #if (TRC_STREAM_PORT_USE_INTERNAL_BUFFER == 1) + prvPagedEventBufferInit(_TzTraceData); + #endif + + eventCounter = 0; + ISR_stack_index = -1; + prvTraceStoreHeader(); + prvTraceStoreSymbolTable(); + prvTraceStoreObjectDataTable(); + prvTraceStoreExtensionInfo(); + prvTraceStoreStartEvent(); + prvTraceStoreTSConfig(); + } + else + { + TRC_STREAM_PORT_ON_TRACE_END(); + } + + RecorderEnabled = isEnabled; + + TRACE_EXIT_CRITICAL_SECTION(); +} + +static void prvTraceStoreStartEvent() +{ + void* currentTask; + + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + if (uiTraceSystemState == TRC_STATE_IN_STARTUP) + { + currentTask = (void*)HANDLE_NO_TASK; + } + else + { + currentTask = TRACE_GET_CURRENT_TASK(); + } + + eventCounter++; + + { + TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING(EventWithParam_3, pxEvent, sizeof(EventWithParam_3)); + if (pxEvent != NULL) + { + pxEvent->base.EventID = PSF_EVENT_TRACE_START | PARAM_COUNT(3); + pxEvent->base.EventCount = (uint16_t)eventCounter; + pxEvent->base.TS = prvGetTimestamp32(); + pxEvent->param1 = (uint32_t)TRACE_GET_OS_TICKS(); + pxEvent->param2 = (uint32_t)currentTask; + pxEvent->param3 = SessionCounter++; + TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING(pxEvent, sizeof(EventWithParam_3)); + } + } + + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Store the Timestamp Config event */ +static void prvTraceStoreTSConfig(void) +{ + /* If not overridden using vTraceSetFrequency, use default value */ + if (timestampFrequency == 0) + { + timestampFrequency = TRC_HWTC_FREQ_HZ; + } + + eventCounter++; + + + { +#if (TRC_HWTC_TYPE == TRC_CUSTOM_TIMER_INCR || TRC_HWTC_TYPE == TRC_CUSTOM_TIMER_DECR) + + TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING(EventWithParam_5, event, sizeof(EventWithParam_5)); + if (event != NULL) + { + event->base.EventID = PSF_EVENT_TS_CONFIG | (uint16_t)PARAM_COUNT(5); + event->base.EventCount = (uint16_t)eventCounter; + event->base.TS = prvGetTimestamp32(); + + event->param1 = (uint32_t)timestampFrequency; + event->param2 = (uint32_t)(TRACE_TICK_RATE_HZ); + event->param3 = (uint32_t)(TRC_HWTC_TYPE); + event->param4 = (uint32_t)(TRC_CFG_ISR_TAILCHAINING_THRESHOLD); + event->param5 = (uint32_t)(TRC_HWTC_PERIOD); + TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING(event, (uint32_t)sizeof(EventWithParam_5)); + } +#else + TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING(EventWithParam_4, event, sizeof(EventWithParam_4)); + if (event != NULL) + { + event->base.EventID = PSF_EVENT_TS_CONFIG | (uint16_t)PARAM_COUNT(4); + event->base.EventCount = (uint16_t)eventCounter; + event->base.TS = prvGetTimestamp32(); + + event->param1 = (uint32_t)timestampFrequency; + event->param2 = (uint32_t)(TRACE_TICK_RATE_HZ); + event->param3 = (uint32_t)(TRC_HWTC_TYPE); + event->param4 = (uint32_t)(TRC_CFG_ISR_TAILCHAINING_THRESHOLD); + TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING(event, (uint32_t)sizeof(EventWithParam_4)); + } +#endif + + } +} + +/* Stores the symbol table on Start */ +static void prvTraceStoreSymbolTable(void) +{ + uint32_t i = 0; + uint32_t j = 0; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + { + for (i = 0; i < (sizeof(SymbolTable) / sizeof(uint32_t)); i += (SYMBOL_TABLE_SLOT_SIZE / sizeof(uint32_t))) + { + TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING(uint32_t, data, SYMBOL_TABLE_SLOT_SIZE); + + for (j = 0; j < (SYMBOL_TABLE_SLOT_SIZE / sizeof(uint32_t)); j++) + { + data[j] = symbolTable.SymbolTableBuffer.pSymbolTableBufferUINT32[i+j]; + } + + TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING(data, SYMBOL_TABLE_SLOT_SIZE); + } + } + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Stores the object table on Start */ +static void prvTraceStoreObjectDataTable(void) +{ + uint32_t i = 0; + uint32_t j = 0; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + { + for (i = 0; i < (sizeof(ObjectDataTable) / sizeof(uint32_t)); i += (OBJECT_DATA_SLOT_SIZE / sizeof(uint32_t))) + { + TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING(uint32_t, data, OBJECT_DATA_SLOT_SIZE); + + for (j = 0; j < (OBJECT_DATA_SLOT_SIZE / sizeof(uint32_t)); j++) + { + data[j] = objectDataTable.ObjectDataTableBuffer.pObjectDataTableBufferUINT32[i+j]; + } + + TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING(data, OBJECT_DATA_SLOT_SIZE); + } + } + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Stores the header information on Start */ +static void prvTraceStoreHeader(void) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + { + TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING(PSFHeaderInfo, header, sizeof(PSFHeaderInfo)); + header->psf = PSFEndianessIdentifier; + header->version = FormatVersion; + header->platform = TRACE_KERNEL_VERSION; + header->options = 0; + header->heapCounter = trcHeapCounter; + /* Lowest bit used for TRC_IRQ_PRIORITY_ORDER */ + header->options = header->options | (TRC_IRQ_PRIORITY_ORDER << 0); + header->symbolSize = SYMBOL_TABLE_SLOT_SIZE; + header->symbolCount = (TRC_CFG_SYMBOL_TABLE_SLOTS); + header->objectDataSize = 8; + header->objectDataCount = (TRC_CFG_OBJECT_DATA_SLOTS); + TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING(header, sizeof(PSFHeaderInfo)); + } + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Stores the header information on Start */ +static void prvTraceStoreExtensionInfo(void) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + { + TRC_STREAM_PORT_ALLOCATE_EVENT_BLOCKING(PSFExtensionInfoType, extinfo, sizeof(PSFExtensionInfoType)); + memcpy(extinfo, &PSFExtensionInfo, sizeof(PSFExtensionInfoType)); + TRC_STREAM_PORT_COMMIT_EVENT_BLOCKING(extinfo, sizeof(PSFExtensionInfoType)); + } + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Returns the error or warning, as a string, or NULL if none. */ +static const char* prvTraceGetError(int errCode) +{ + /* Note: the error messages are short, in order to fit in a User Event. + Instead, the users can read more in the below comments.*/ + + switch (errCode) + { + + case PSF_WARNING_SYMBOL_TABLE_SLOTS: + /* There was not enough symbol table slots for storing symbol names. + The number of missing slots is counted by NoRoomForSymbol. Inspect this + variable and increase TRC_CFG_SYMBOL_TABLE_SLOTS by at least that value. */ + + return "Exceeded SYMBOL_TABLE_SLOTS (see prvTraceGetError)"; + + case PSF_WARNING_SYMBOL_MAX_LENGTH: + /* A symbol name exceeded TRC_CFG_SYMBOL_MAX_LENGTH in length. + Make sure the symbol names are at most TRC_CFG_SYMBOL_MAX_LENGTH, + or inspect LongestSymbolName and increase TRC_CFG_SYMBOL_MAX_LENGTH + to at least this value. */ + + return "Exceeded SYMBOL_MAX_LENGTH (see prvTraceGetError)"; + + case PSF_WARNING_OBJECT_DATA_SLOTS: + /* There was not enough symbol object table slots for storing object + properties, such as task priorites. The number of missing slots is + counted by NoRoomForObjectData. Inspect this variable and increase + TRC_CFG_OBJECT_DATA_SLOTS by at least that value. */ + + return "Exceeded OBJECT_DATA_SLOTS (see prvTraceGetError)"; + + case PSF_WARNING_STRING_TOO_LONG: + /* Some string argument was longer than the maximum payload size + and has been truncated by "MaxBytesTruncated" bytes. + + This may happen for the following functions: + - vTracePrint + - vTracePrintF + - vTraceStoreKernelObjectName + - xTraceRegisterString + - vTraceSetISRProperties + + A PSF event may store maximum 60 bytes payload, including data + arguments and string characters. For User Events, also the User + Event Channel (4 bytes) must be squeezed in, if a channel is + specified (can be NULL). */ + + return "String too long (see prvTraceGetError)"; + + case PSF_WARNING_STREAM_PORT_READ: + /* TRC_STREAM_PORT_READ_DATA is expected to return 0 when completed successfully. + This means there is an error in the communication with host/Tracealyzer. */ + + return "TRC_STREAM_PORT_READ_DATA returned error (!= 0)."; + + case PSF_WARNING_STREAM_PORT_WRITE: + /* TRC_STREAM_PORT_WRITE_DATA is expected to return 0 when completed successfully. + This means there is an error in the communication with host/Tracealyzer. */ + + return "TRC_STREAM_PORT_WRITE_DATA returned error (!= 0)."; + + case PSF_WARNING_STACKMON_NO_SLOTS: + /* TRC_CFG_STACK_MONITOR_MAX_TASKS is too small to monitor all tasks. */ + + return "TRC_CFG_STACK_MONITOR_MAX_TASKS too small!"; + + case PSF_WARNING_STREAM_PORT_INITIAL_BLOCKING: + /* Blocking occurred during vTraceEnable. This happens if the trace buffer is + smaller than the initial transmission (trace header, object table, and symbol table). */ + + return "Blocking in vTraceEnable (see xTraceGetLastError)"; + + case PSF_ERROR_EVENT_CODE_TOO_LARGE: + /* The highest allowed event code is 4095, anything higher is an unexpected error. + Please contact support@percepio.com for assistance.*/ + + return "Invalid event code (see prvTraceGetError)"; + + case PSF_ERROR_ISR_NESTING_OVERFLOW: + /* Nesting of ISR trace calls exceeded the limit (TRC_CFG_MAX_ISR_NESTING). + If this is unlikely, make sure that you call vTraceStoreISRExit in the end + of all ISR handlers. Or increase TRC_CFG_MAX_ISR_NESTING. */ + + return "Exceeded ISR nesting (see prvTraceGetError)"; + + case PSF_ERROR_DWT_NOT_SUPPORTED: + /* On ARM Cortex-M only - failed to initialize DWT Cycle Counter since not supported by this chip. + DWT timestamping is selected automatically for ART Cortex-M3, M4 and higher, based on the __CORTEX_M + macro normally set by ARM's CMSIS library, since typically available. You can however select + SysTick timestamping instead by defining adding "#define TRC_CFG_ARM_CM_USE_SYSTICK".*/ + + return "DWT not supported (see prvTraceGetError)"; + + case PSF_ERROR_DWT_CYCCNT_NOT_SUPPORTED: + /* On ARM Cortex-M only - failed to initialize DWT Cycle Counter since not supported by this chip. + DWT timestamping is selected automatically for ART Cortex-M3, M4 and higher, based on the __CORTEX_M + macro normally set by ARM's CMSIS library, since typically available. You can however select + SysTick timestamping instead by defining adding "#define TRC_CFG_ARM_CM_USE_SYSTICK".*/ + + return "DWT_CYCCNT not supported (see prvTraceGetError)"; + + case PSF_ERROR_TZCTRLTASK_NOT_CREATED: + /* vTraceEnable failed creating the trace control task (TzCtrl) - incorrect parameters (priority?) + or insufficient heap size? */ + return "Could not create TzCtrl (see prvTraceGetError)"; + + case PSF_ERROR_STREAM_PORT_WRITE: + /* TRC_STREAM_PORT_WRITE_DATA is expected to return 0 when completed successfully. + This means there is an error in the communication with host/Tracealyzer. */ + return "TRC_STREAM_PORT_WRITE_DATA returned error (!= 0)."; + } + + return NULL; +} + +/* Store an event with zero parameters (event ID only) */ +void prvTraceStoreEvent0(uint16_t eventID) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + PSF_ASSERT_VOID(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE); + + TRACE_ENTER_CRITICAL_SECTION(); + + if (RecorderEnabled) + { + eventCounter++; + + { + TRC_STREAM_PORT_ALLOCATE_EVENT(BaseEvent, event, sizeof(BaseEvent)); + if (event != NULL) + { + event->EventID = eventID | PARAM_COUNT(0); + event->EventCount = (uint16_t)eventCounter; + event->TS = prvGetTimestamp32(); + TRC_STREAM_PORT_COMMIT_EVENT(event, sizeof(BaseEvent)); + } + } + } + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Store an event with one 32-bit parameter (pointer address or an int) */ +void prvTraceStoreEvent1(uint16_t eventID, uint32_t param1) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + PSF_ASSERT_VOID(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE); + + TRACE_ENTER_CRITICAL_SECTION(); + + if (RecorderEnabled) + { + eventCounter++; + + { + TRC_STREAM_PORT_ALLOCATE_EVENT(EventWithParam_1, event, sizeof(EventWithParam_1)); + if (event != NULL) + { + event->base.EventID = eventID | PARAM_COUNT(1); + event->base.EventCount = (uint16_t)eventCounter; + event->base.TS = prvGetTimestamp32(); + event->param1 = (uint32_t)param1; + TRC_STREAM_PORT_COMMIT_EVENT(event, sizeof(EventWithParam_1)); + } + } + } + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Store an event with two 32-bit parameters */ +void prvTraceStoreEvent2(uint16_t eventID, uint32_t param1, uint32_t param2) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + PSF_ASSERT_VOID(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE); + + TRACE_ENTER_CRITICAL_SECTION(); + + if (RecorderEnabled) + { + eventCounter++; + + { + TRC_STREAM_PORT_ALLOCATE_EVENT(EventWithParam_2, event, sizeof(EventWithParam_2)); + if (event != NULL) + { + event->base.EventID = eventID | PARAM_COUNT(2); + event->base.EventCount = (uint16_t)eventCounter; + event->base.TS = prvGetTimestamp32(); + event->param1 = (uint32_t)param1; + event->param2 = param2; + TRC_STREAM_PORT_COMMIT_EVENT(event, sizeof(EventWithParam_2)); + } + } + } + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Store an event with three 32-bit parameters */ +void prvTraceStoreEvent3( uint16_t eventID, + uint32_t param1, + uint32_t param2, + uint32_t param3) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + PSF_ASSERT_VOID(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE); + + TRACE_ENTER_CRITICAL_SECTION(); + + if (RecorderEnabled) + { + eventCounter++; + + { + TRC_STREAM_PORT_ALLOCATE_EVENT(EventWithParam_3, event, sizeof(EventWithParam_3)); + if (event != NULL) + { + event->base.EventID = eventID | PARAM_COUNT(3); + event->base.EventCount = (uint16_t)eventCounter; + event->base.TS = prvGetTimestamp32(); + event->param1 = (uint32_t)param1; + event->param2 = param2; + event->param3 = param3; + TRC_STREAM_PORT_COMMIT_EVENT(event, sizeof(EventWithParam_3)); + } + } + } + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Stores an event with 32-bit integer parameters */ +void prvTraceStoreEvent(int nParam, uint16_t eventID, ...) +{ + va_list vl; + int i; + TRACE_ALLOC_CRITICAL_SECTION(); + + PSF_ASSERT_VOID(eventID < 4096, PSF_ERROR_EVENT_CODE_TOO_LARGE); + + TRACE_ENTER_CRITICAL_SECTION(); + + if (RecorderEnabled) + { + int eventSize = (int)sizeof(BaseEvent) + nParam * (int)sizeof(uint32_t); + + eventCounter++; + + { + TRC_STREAM_PORT_ALLOCATE_DYNAMIC_EVENT(largestEventType, event, eventSize); + if (event != NULL) + { + event->base.EventID = eventID | (uint16_t)PARAM_COUNT(nParam); + event->base.EventCount = (uint16_t)eventCounter; + event->base.TS = prvGetTimestamp32(); + + va_start(vl, eventID); + for (i = 0; i < nParam; i++) + { + uint32_t* tmp = (uint32_t*) &(event->data[i]); + *tmp = va_arg(vl, uint32_t); + } + va_end(vl); + + TRC_STREAM_PORT_COMMIT_EVENT(event, (uint32_t)eventSize); + } + } + } + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Stories an event with a string and 32-bit integer parameters */ +void prvTraceStoreStringEvent(int nArgs, uint16_t eventID, const char* str, ...) +{ + int len; + va_list vl; + + for (len = 0; (str[len] != 0) && (len < 52); len++); /* empty loop */ + + va_start(vl, str); + prvTraceStoreStringEventHelper(nArgs, eventID, NULL, len, str, vl); + va_end(vl); +} + +/* Internal common function for storing string events */ +static void prvTraceStoreStringEventHelper(int nArgs, + uint16_t eventID, + traceString userEvtChannel, + int len, + const char* str, + va_list vl) +{ + int nWords; + int nStrWords; + int i; + int offset = 0; + TRACE_ALLOC_CRITICAL_SECTION(); + + /* The string length in multiples of 32 bit words (+1 for null character) */ + nStrWords = (len+1+3)/4; + + offset = nArgs * 4; + + /* The total number of 32-bit words needed for the whole payload */ + nWords = nStrWords + nArgs; + + if (nWords > 15) /* if attempting to store more than 60 byte (= max) */ + { + /* Truncate event if too large. The string characters are stored + last, so usually only the string is truncated, unless there a lot + of parameters... */ + + /* Diagnostics ... */ + uint32_t bytesTruncated = (uint32_t)(nWords - 15) * 4; + + if (bytesTruncated > MaxBytesTruncated) + { + MaxBytesTruncated = bytesTruncated; + } + + nWords = 15; + len = 15 * 4 - offset; + } + + TRACE_ENTER_CRITICAL_SECTION(); + + if (RecorderEnabled) + { + int eventSize = (int)sizeof(BaseEvent) + nWords * (int)sizeof(uint32_t); + + eventCounter++; + + { + TRC_STREAM_PORT_ALLOCATE_DYNAMIC_EVENT(largestEventType, event, eventSize); + if (event != NULL) + { + uint32_t* data32; + uint8_t* data8; + event->base.EventID = (eventID) | (uint16_t)PARAM_COUNT(nWords); + event->base.EventCount = (uint16_t)eventCounter; + event->base.TS = prvGetTimestamp32(); + + /* 32-bit write-pointer for the data argument */ + data32 = (uint32_t*) &(event->data[0]); + + for (i = 0; i < nArgs; i++) + { + if ((userEvtChannel != NULL) && (i == 0)) + { + /* First, add the User Event Channel if not NULL */ + data32[i] = (uint32_t)userEvtChannel; + } + else + { + /* Add data arguments... */ + data32[i] = va_arg(vl, uint32_t); + } + } + data8 = (uint8_t*)&(event->data[0]); + for (i = 0; i < len; i++) + { + data8[offset + i] = str[i]; + } + + if (len < (15 * 4 - offset)) + data8[offset + len] = 0; /* Only truncate if we don't fill up the buffer completely */ + TRC_STREAM_PORT_COMMIT_EVENT(event, (uint32_t)eventSize); + } + } + } + + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Internal common function for storing string events without additional arguments */ +void prvTraceStoreSimpleStringEventHelper(uint16_t eventID, + traceString userEvtChannel, + const char* str) +{ + int len; + int nWords; + int nStrWords; + int i; + int nArgs = 0; + int offset = 0; + TRACE_ALLOC_CRITICAL_SECTION(); + + for (len = 0; (str[len] != 0) && (len < 52); len++); /* empty loop */ + + /* The string length in multiples of 32 bit words (+1 for null character) */ + nStrWords = (len+1+3)/4; + + /* If a user event channel is specified, add in the list */ + if (userEvtChannel) + { + nArgs++; + eventID++; + } + + offset = nArgs * 4; + + /* The total number of 32-bit words needed for the whole payload */ + nWords = nStrWords + nArgs; + + if (nWords > 15) /* if attempting to store more than 60 byte (= max) */ + { + /* Truncate event if too large. The string characters are stored + last, so usually only the string is truncated, unless there a lot + of parameters... */ + + /* Diagnostics ... */ + uint32_t bytesTruncated = (uint32_t)(nWords - 15) * 4; + + if (bytesTruncated > MaxBytesTruncated) + { + MaxBytesTruncated = bytesTruncated; + } + + nWords = 15; + len = 15 * 4 - offset; + } + + TRACE_ENTER_CRITICAL_SECTION(); + + if (RecorderEnabled) + { + int eventSize = (int)sizeof(BaseEvent) + nWords * (int)sizeof(uint32_t); + + eventCounter++; + + { + TRC_STREAM_PORT_ALLOCATE_DYNAMIC_EVENT(largestEventType, event, eventSize); + if (event != NULL) + { + uint32_t* data32; + uint8_t* data8; + event->base.EventID = (eventID) | (uint16_t)PARAM_COUNT(nWords); + event->base.EventCount = (uint16_t)eventCounter; + event->base.TS = prvGetTimestamp32(); + + /* 32-bit write-pointer for the data argument */ + data32 = (uint32_t*) &(event->data[0]); + + if (userEvtChannel != NULL) + { + /* First, add the User Event Channel if not NULL */ + data32[0] = (uint32_t)userEvtChannel; + } + + data8 = (uint8_t*) &(event->data[0]); + for (i = 0; i < len; i++) + { + data8[offset + i] = str[i]; + } + + if (len < (15 * 4 - offset)) + data8[offset + len] = 0; /* Only truncate if we don't fill up the buffer completely */ + TRC_STREAM_PORT_COMMIT_EVENT(event, (uint32_t)eventSize); + } + } + } + + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Saves a symbol name in the symbol table and returns the slot address */ +void* prvTraceSaveSymbol(const char *name) +{ + void* retVal = 0; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + if (firstFreeSymbolTableIndex < SYMBOL_TABLE_BUFFER_SIZE) + { + /* The address to the available symbol table slot is the address we use */ + retVal = &symbolTable.SymbolTableBuffer.pSymbolTableBufferUINT8[firstFreeSymbolTableIndex]; + prvTraceSaveObjectSymbol(retVal, name); + } + TRACE_EXIT_CRITICAL_SECTION(); + + return retVal; +} + +/* Saves a string in the symbol table for an object (task name etc.) */ +void prvTraceSaveObjectSymbol(void* address, const char *name) +{ + uint32_t i; + uint8_t *ptrSymbol; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + /* We do not look for previous entries -> changing a registered string is no longer possible */ + if (firstFreeSymbolTableIndex < SYMBOL_TABLE_BUFFER_SIZE) + { + /* We access the symbol table via the union member pSymbolTableBufferUINT32 to avoid strict-aliasing issues */ + symbolTable.SymbolTableBuffer.pSymbolTableBufferUINT32[firstFreeSymbolTableIndex / sizeof(uint32_t)] = (uint32_t)address; + + /* We access the symbol table via the union member pSymbolTableBufferUINT8 to avoid strict-aliasing issues */ + ptrSymbol = &symbolTable.SymbolTableBuffer.pSymbolTableBufferUINT8[firstFreeSymbolTableIndex + sizeof(uint32_t)]; + for (i = 0; i < (TRC_CFG_SYMBOL_MAX_LENGTH); i++) + { + ptrSymbol[i] = (uint8_t)name[i]; /* We do this first to ensure we also get the 0 termination, if there is one */ + + if (name[i] == 0) + break; + } + + /* Check the length of "name", if longer than SYMBOL_MAX_LENGTH */ + while ((name[i] != 0) && i < 128) + { + i++; + } + + /* Remember the longest symbol name, for diagnostic purposes */ + if (i > LongestSymbolName) + { + LongestSymbolName = i; + } + + firstFreeSymbolTableIndex += SYMBOL_TABLE_SLOT_SIZE; + } + else + { + NoRoomForSymbol++; + } + + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Deletes a symbol name (task name etc.) from symbol table */ +void prvTraceDeleteSymbol(void *address) +{ + uint32_t i, j; + uint32_t *ptr, *lastEntryPtr; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + for (i = 0; i < firstFreeSymbolTableIndex; i += SYMBOL_TABLE_SLOT_SIZE) + { + /* We access the symbol table via the union member pSymbolTableBufferUINT32 to avoid strict-aliasing issues */ + ptr = &symbolTable.SymbolTableBuffer.pSymbolTableBufferUINT32[i / sizeof(uint32_t)]; + if (*ptr == (uint32_t)address) + { + /* See if we have another entry in the table, and that this isn't already the last entry */ + if (firstFreeSymbolTableIndex > SYMBOL_TABLE_SLOT_SIZE && i != (firstFreeSymbolTableIndex - SYMBOL_TABLE_SLOT_SIZE)) + { + /* Another entry is available, get pointer to the last one */ + /* We access the symbol table via the union member pSymbolTableBufferUINT32 to avoid strict-aliasing issues */ + lastEntryPtr = &symbolTable.SymbolTableBuffer.pSymbolTableBufferUINT32[(firstFreeSymbolTableIndex - SYMBOL_TABLE_SLOT_SIZE) / sizeof(uint32_t)]; + + /* Copy last entry to this position */ + for (j = 0; j < (SYMBOL_TABLE_SLOT_SIZE) / sizeof(uint32_t); j++) + { + ptr[j] = lastEntryPtr[j]; + } + + /* For good measure we also zero out the original position */ + *lastEntryPtr = 0; + } + else + *ptr = 0; /* No other entry found, or this is the last entry */ + + /* Lower index */ + firstFreeSymbolTableIndex -= SYMBOL_TABLE_SLOT_SIZE; + + break; + } + } + + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Saves an object data entry (current task priority) in object data table */ +void prvTraceSaveObjectData(const void *address, uint32_t data) +{ + uint32_t i; + uint32_t foundSlot; + uint32_t *ptr; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + foundSlot = firstFreeObjectDataTableIndex; + + /* First look for previous entries using this address */ + for (i = 0; i < firstFreeObjectDataTableIndex; i += OBJECT_DATA_SLOT_SIZE) + { + /* We access the data table via the union member pObjectDataTableBufferUINT32 to avoid strict-aliasing issues */ + ptr = &objectDataTable.ObjectDataTableBuffer.pObjectDataTableBufferUINT32[i / sizeof(uint32_t)]; + if (*ptr == (uint32_t)address) + { + foundSlot = i; + break; + } + } + + if (foundSlot < OBJECT_DATA_TABLE_BUFFER_SIZE) + { + /* We access the data table via the union member pObjectDataTableBufferUINT32 to avoid strict-aliasing issues */ + objectDataTable.ObjectDataTableBuffer.pObjectDataTableBufferUINT32[foundSlot / sizeof(uint32_t)] = (uint32_t)address; + objectDataTable.ObjectDataTableBuffer.pObjectDataTableBufferUINT32[foundSlot / sizeof(uint32_t) + 1] = data; + + /* Is this the last entry in the object data table? */ + if (foundSlot == firstFreeObjectDataTableIndex) + { + firstFreeObjectDataTableIndex += OBJECT_DATA_SLOT_SIZE; + } + } + else + { + NoRoomForObjectData++; + } + + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Removes an object data entry (task base priority) from object data table */ +void prvTraceDeleteObjectData(void *address) +{ + uint32_t i, j; + uint32_t *ptr, *lastEntryPtr; + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + + for (i = 0; i < firstFreeObjectDataTableIndex; i += OBJECT_DATA_SLOT_SIZE) + { + /* We access the data table via the union member pObjectDataTableBufferUINT32 to avoid strict-aliasing issues */ + ptr = &objectDataTable.ObjectDataTableBuffer.pObjectDataTableBufferUINT32[i / sizeof(uint32_t)]; + if (*ptr == (uint32_t)address) + { + /* See if we have another entry in the table, and that this isn't already the last entry */ + if (firstFreeObjectDataTableIndex > OBJECT_DATA_SLOT_SIZE && i != (firstFreeObjectDataTableIndex - OBJECT_DATA_SLOT_SIZE)) + { + /* Another entry is available, get pointer to the last one */ + /* We access the data table via the union member pObjectDataTableBufferUINT32 to avoid strict-aliasing issues */ + lastEntryPtr = &objectDataTable.ObjectDataTableBuffer.pObjectDataTableBufferUINT32[(firstFreeObjectDataTableIndex - OBJECT_DATA_SLOT_SIZE) / sizeof(uint32_t)]; + + /* Copy last entry to this position */ + for (j = 0; j < (OBJECT_DATA_SLOT_SIZE) / sizeof(uint32_t); j++) + { + ptr[j] = lastEntryPtr[j]; + } + + /* For good measure we also zero out the original position */ + *lastEntryPtr = 0; + } + else + *ptr = 0; /* No other entry found, or this is the last entry */ + + /* Lower index */ + firstFreeObjectDataTableIndex -= OBJECT_DATA_SLOT_SIZE; + + break; + } + } + + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Checks if the provided command is a valid command */ +int prvIsValidCommand(TracealyzerCommandType* cmd) +{ + uint16_t checksum = (uint16_t)(0xFFFF - ( cmd->cmdCode + + cmd->param1 + + cmd->param2 + + cmd->param3 + + cmd->param4 + + cmd->param5)); + + if (cmd->checksumMSB != (unsigned char)(checksum >> 8)) + return 0; + + if (cmd->checksumLSB != (unsigned char)(checksum & 0xFF)) + return 0; + + if (cmd->cmdCode > CMD_LAST_COMMAND) + return 0; + + return 1; +} + +/* Executed the received command (Start or Stop) */ +void prvProcessCommand(TracealyzerCommandType* cmd) +{ + switch(cmd->cmdCode) + { + case CMD_SET_ACTIVE: + prvSetRecorderEnabled(cmd->param1); + break; + default: + break; + } +} + +/* Called on warnings, when the recording can continue. */ +void prvTraceWarning(int errCode) +{ + if (GET_ERROR_WARNING_FLAG(errCode) == 0) + { + /* Will never reach this point more than once per warning type, since we verify if ErrorAndWarningFlags[errCode] has already been set */ + SET_ERROR_WARNING_FLAG(errCode); + + prvTraceStoreSimpleStringEventHelper(PSF_EVENT_USER_EVENT, trcWarningChannel, prvTraceGetError(errCode)); + } +} + +/* Called on critical errors in the recorder. Stops the recorder! */ +void prvTraceError(int errCode) +{ + if (errorCode == PSF_ERROR_NONE) + { + /* Will never reach this point more than once, since we verify if errorCode has already been set */ + errorCode = errCode; + SET_ERROR_WARNING_FLAG(errorCode); + + prvTraceStoreSimpleStringEventHelper(PSF_EVENT_USER_EVENT, trcWarningChannel, prvTraceGetError(errorCode)); + prvTraceStoreSimpleStringEventHelper(PSF_EVENT_USER_EVENT, trcWarningChannel, "Recorder stopped in prvTraceError()"); + + prvSetRecorderEnabled(0); + } +} + +/* If using DWT timestamping (default on ARM Cortex-M3, M4 and M7), make sure the DWT unit is initialized. */ +#ifndef TRC_CFG_ARM_CM_USE_SYSTICK +#if ((TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_Cortex_M) && (defined (__CORTEX_M) && (__CORTEX_M >= 0x03))) + +void prvTraceInitCortexM() +{ + /* Make sure the DWT registers are unlocked, in case the debugger doesn't do this. */ + TRC_REG_ITM_LOCKACCESS = TRC_ITM_LOCKACCESS_UNLOCK; + + /* Make sure DWT is enabled is enabled, if supported */ + TRC_REG_DEMCR |= TRC_DEMCR_TRCENA; + + do + { + /* Verify that DWT is supported */ + if (TRC_REG_DEMCR == 0) + { + /* This function is called on Cortex-M3, M4 and M7 devices to initialize + the DWT unit, assumed present. The DWT cycle counter is used for timestamping. + + If the below error is produced, the DWT unit does not seem to be available. + + In that case, define the macro TRC_CFG_ARM_CM_USE_SYSTICK in your build + to use SysTick timestamping instead, or define your own timestamping by + setting TRC_CFG_HARDWARE_PORT to TRC_HARDWARE_PORT_APPLICATION_DEFINED + and make the necessary definitions, as explained in trcHardwarePort.h.*/ + + prvTraceError(PSF_ERROR_DWT_NOT_SUPPORTED); + break; + } + + /* Verify that DWT_CYCCNT is supported */ + if (TRC_REG_DWT_CTRL & TRC_DWT_CTRL_NOCYCCNT) + { + /* This function is called on Cortex-M3, M4 and M7 devices to initialize + the DWT unit, assumed present. The DWT cycle counter is used for timestamping. + + If the below error is produced, the cycle counter does not seem to be available. + + In that case, define the macro TRC_CFG_ARM_CM_USE_SYSTICK in your build + to use SysTick timestamping instead, or define your own timestamping by + setting TRC_CFG_HARDWARE_PORT to TRC_HARDWARE_PORT_APPLICATION_DEFINED + and make the necessary definitions, as explained in trcHardwarePort.h.*/ + + prvTraceError(PSF_ERROR_DWT_CYCCNT_NOT_SUPPORTED); + break; + } + + /* Reset the cycle counter */ + TRC_REG_DWT_CYCCNT = 0; + + /* Enable the cycle counter */ + TRC_REG_DWT_CTRL |= TRC_DWT_CTRL_CYCCNTENA; + + } while(0); /* breaks above jump here */ +} +#endif +#endif + +/* Performs timestamping using definitions in trcHardwarePort.h */ +static uint32_t prvGetTimestamp32(void) +{ +#if ((TRC_HWTC_TYPE == TRC_FREE_RUNNING_32BIT_INCR) || (TRC_HWTC_TYPE == TRC_FREE_RUNNING_32BIT_DECR)) + return TRC_HWTC_COUNT; +#endif + +#if ((TRC_HWTC_TYPE == TRC_CUSTOM_TIMER_INCR) || (TRC_HWTC_TYPE == TRC_CUSTOM_TIMER_DECR)) + return TRC_HWTC_COUNT; +#endif + +#if ((TRC_HWTC_TYPE == TRC_OS_TIMER_INCR) || (TRC_HWTC_TYPE == TRC_OS_TIMER_DECR)) + uint32_t ticks = TRACE_GET_OS_TICKS(); + return ((TRC_HWTC_COUNT) & 0x00FFFFFFU) + ((ticks & 0x000000FFU) << 24); +#endif +} + +/* Retrieve a buffer page to write to. */ +static int prvAllocateBufferPage(int prevPage) +{ + int index; + int count = 0; + + index = (prevPage + 1) % (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT); + + while((PageInfo[index].Status != PAGE_STATUS_FREE) && (count ++ < (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT))) + { + index = (index + 1) % (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT); + } + + if (PageInfo[index].Status == PAGE_STATUS_FREE) + { + return index; + } + + return -1; +} + +/* Mark the page read as complete. */ +static void prvPageReadComplete(int pageIndex) +{ + TRACE_ALLOC_CRITICAL_SECTION(); + + TRACE_ENTER_CRITICAL_SECTION(); + PageInfo[pageIndex].BytesRemaining = (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE); + PageInfo[pageIndex].WritePointer = &EventBuffer[pageIndex * (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE)]; + PageInfo[pageIndex].Status = PAGE_STATUS_FREE; + + TotalBytesRemaining += (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE); + + TRACE_EXIT_CRITICAL_SECTION(); +} + +/* Get the current buffer page index and remaining number of bytes. */ +static int prvGetBufferPage(int32_t* bytesUsed) +{ + static int8_t lastPage = -1; + int count = 0; + int8_t index = (int8_t) ((lastPage + 1) % (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT)); + + while((PageInfo[index].Status != PAGE_STATUS_READ) && (count++ < (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT))) + { + index = (int8_t)((index + 1) % (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT)); + } + + if (PageInfo[index].Status == PAGE_STATUS_READ) + { + *bytesUsed = (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE) - PageInfo[index].BytesRemaining; + lastPage = index; + return index; + } + + *bytesUsed = 0; + + return -1; +} + +/******************************************************************************* + * uint32_t prvPagedEventBufferTransfer(void) + * + * Transfers one buffer page of trace data, if a full page is available, using + * the macro TRC_STREAM_PORT_WRITE_DATA as defined in trcStreamingPort.h. + * + * This function is intended to be called the periodic TzCtrl task with a suitable + * delay (e.g. 10-100 ms). + * + * Returns the number of bytes sent. If non-zero, it is good to call this + * again, in order to send any additional data waiting in the buffer. + * If zero, wait a while before calling again. + * + * In case of errors from the streaming interface, it registers a warning + * (PSF_WARNING_STREAM_PORT_WRITE) provided by xTraceGetLastError(). + * + *******************************************************************************/ +uint32_t prvPagedEventBufferTransfer(void) +{ + int8_t pageToTransfer = -1; + int32_t bytesTransferredTotal = 0; + int32_t bytesTransferredNow = 0; + int32_t bytesToTransfer; + + pageToTransfer = (int8_t)prvGetBufferPage(&bytesToTransfer); + + /* bytesToTransfer now contains the number of "valid" bytes in the buffer page, that should be transmitted. + There might be some unused junk bytes in the end, that must be ignored. */ + + if (pageToTransfer > -1) + { + while (1) /* Keep going until we have transferred all that we intended to */ + { + if (TRC_STREAM_PORT_WRITE_DATA( + &EventBuffer[pageToTransfer * (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE) + bytesTransferredTotal], + (uint32_t)(bytesToTransfer - bytesTransferredTotal), + &bytesTransferredNow) == 0) + { + /* Write was successful. Update the number of transferred bytes. */ + bytesTransferredTotal += bytesTransferredNow; + + if (bytesTransferredTotal == bytesToTransfer) + { + /* All bytes have been transferred. Mark the buffer page as "Read Complete" (so it can be written to) and return OK. */ + prvPageReadComplete(pageToTransfer); + return (uint32_t)bytesTransferredTotal; + } + } + else + { + /* Some error from the streaming interface... */ + vTraceStop(); + return 0; + } + } + } + return 0; +} + +/******************************************************************************* + * void* prvPagedEventBufferGetWritePointer(int sizeOfEvent) + * + * Returns a pointer to an available location in the buffer able to store the + * requested size. + * + * Return value: The pointer. + * + * Parameters: + * - sizeOfEvent: The size of the event that is to be placed in the buffer. + * +*******************************************************************************/ +void* prvPagedEventBufferGetWritePointer(int sizeOfEvent) +{ + void* ret; + static int currentWritePage = -1; + + if (currentWritePage == -1) + { + currentWritePage = prvAllocateBufferPage(currentWritePage); + if (currentWritePage == -1) + { + DroppedEventCounter++; + return NULL; + } + } + + if (PageInfo[currentWritePage].BytesRemaining - sizeOfEvent < 0) + { + PageInfo[currentWritePage].Status = PAGE_STATUS_READ; + + TotalBytesRemaining -= PageInfo[currentWritePage].BytesRemaining; // Last trailing bytes + + if (TotalBytesRemaining < TotalBytesRemaining_LowWaterMark) + TotalBytesRemaining_LowWaterMark = TotalBytesRemaining; + + currentWritePage = prvAllocateBufferPage(currentWritePage); + if (currentWritePage == -1) + { + DroppedEventCounter++; + return NULL; + } + } + ret = PageInfo[currentWritePage].WritePointer; + PageInfo[currentWritePage].WritePointer += sizeOfEvent; + PageInfo[currentWritePage].BytesRemaining = (uint16_t)(PageInfo[currentWritePage].BytesRemaining -sizeOfEvent); + + TotalBytesRemaining = (TotalBytesRemaining-(uint16_t)sizeOfEvent); + + if (TotalBytesRemaining < TotalBytesRemaining_LowWaterMark) + TotalBytesRemaining_LowWaterMark = TotalBytesRemaining; + + return ret; +} + +/******************************************************************************* + * void prvPagedEventBufferInit(char* buffer) + * + * Assigns the buffer to use and initializes the PageInfo structure. + * + * Return value: void + * + * Parameters: + * - char* buffer: pointer to the trace data buffer, allocated by the caller. + * +*******************************************************************************/ +void prvPagedEventBufferInit(char* buffer) +{ + int i; + TRACE_ALLOC_CRITICAL_SECTION(); + + EventBuffer = buffer; + + TRACE_ENTER_CRITICAL_SECTION(); + for (i = 0; i < (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_COUNT); i++) + { + PageInfo[i].BytesRemaining = (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE); + PageInfo[i].WritePointer = &EventBuffer[i * (TRC_CFG_PAGED_EVENT_BUFFER_PAGE_SIZE)]; + PageInfo[i].Status = PAGE_STATUS_FREE; + } + TRACE_EXIT_CRITICAL_SECTION(); + +} + +#endif /*(TRC_USE_TRACEALYZER_RECORDER == 1)*/ + +#endif /*(TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING)*/