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IstvanZsSzekelyIstvanZsSzekely
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General updates:
- Added/Updated licensce headers - Updated testbench depndencies - Updated class hierarchy Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
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‎library/drivers/common/scoreboard.sv‎

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,38 @@
1+
// ***************************************************************************
2+
// ***************************************************************************
3+
// Copyright (C) 2024 - 2025 Analog Devices, Inc. All rights reserved.
4+
//
5+
// In this HDL repository, there are many different and unique modules, consisting
6+
// of various HDL (Verilog or VHDL) components. The individual modules are
7+
// developed independently, and may be accompanied by separate and unique license
8+
// terms.
9+
//
10+
// The user should read each of these license terms, and understand the
11+
// freedoms and responsabilities that he or she has by using this source/core.
12+
//
13+
// This core is distributed in the hope that it will be useful, but WITHOUT ANY
14+
// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
15+
// A PARTICULAR PURPOSE.
16+
//
17+
// Redistribution and use of source or resulting binaries, with or without modification
18+
// of this file, are permitted under one of the following two license terms:
19+
//
20+
// 1. The GNU General Public License version 2 as published by the
21+
// Free Software Foundation, which can be found in the top level directory
22+
// of this repository (LICENSE_GPL2), and also online at:
23+
// <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
24+
//
25+
// OR
26+
//
27+
// 2. An ADI specific BSD license, which can be found in the top level directory
28+
// of this repository (LICENSE_ADIBSD), and also on-line at:
29+
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
30+
// This will allow to generate bit files and not release the source code,
31+
// as long as it attaches to an ADI device.
32+
//
33+
// ***************************************************************************
34+
// ***************************************************************************
35+
136
`include "utils.svh"
237

338
package scoreboard_pkg;

‎library/drivers/common/scoreboard_pack.sv‎

Lines changed: 35 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,38 @@
1+
// ***************************************************************************
2+
// ***************************************************************************
3+
// Copyright (C) 2024 - 2025 Analog Devices, Inc. All rights reserved.
4+
//
5+
// In this HDL repository, there are many different and unique modules, consisting
6+
// of various HDL (Verilog or VHDL) components. The individual modules are
7+
// developed independently, and may be accompanied by separate and unique license
8+
// terms.
9+
//
10+
// The user should read each of these license terms, and understand the
11+
// freedoms and responsabilities that he or she has by using this source/core.
12+
//
13+
// This core is distributed in the hope that it will be useful, but WITHOUT ANY
14+
// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
15+
// A PARTICULAR PURPOSE.
16+
//
17+
// Redistribution and use of source or resulting binaries, with or without modification
18+
// of this file, are permitted under one of the following two license terms:
19+
//
20+
// 1. The GNU General Public License version 2 as published by the
21+
// Free Software Foundation, which can be found in the top level directory
22+
// of this repository (LICENSE_GPL2), and also online at:
23+
// <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
24+
//
25+
// OR
26+
//
27+
// 2. An ADI specific BSD license, which can be found in the top level directory
28+
// of this repository (LICENSE_ADIBSD), and also on-line at:
29+
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
30+
// This will allow to generate bit files and not release the source code,
31+
// as long as it attaches to an ADI device.
32+
//
33+
// ***************************************************************************
34+
// ***************************************************************************
35+
136
`include "utils.svh"
237

338
package scoreboard_pack_pkg;
@@ -49,50 +84,6 @@ package scoreboard_pack_pkg;
4984

5085
if (this.enabled == 0)
5186
return;
52-
53-
// forever begin : tx_path
54-
// if (this.enabled == 0)
55-
// break;
56-
// if ((this.source_byte_stream_size > 0) &&
57-
// (this.sink_byte_stream_size >= this.channels*this.samples*this.width/8)) begin
58-
// byte_streams_empty_sig = 0;
59-
// for (int i=0; i<this.channels*this.samples*this.width/8; i++) begin
60-
// sink_byte_stream_block[i] = this.sink_byte_stream.pop_back();
61-
// this.sink_byte_stream_size--;
62-
// end
63-
// for (int i=0; i<outer_loop; i++) begin
64-
// for (int j=0; j<inner_loop; j++) begin
65-
// for (int k=0; k<this.width/8; k++) begin
66-
// source_byte = this.source_byte_stream.pop_back();
67-
// if (this.sink_type == CYCLIC)
68-
// this.source_byte_stream.push_front(source_byte);
69-
// else
70-
// this.source_byte_stream_size--;
71-
// sink_byte = sink_byte_stream_block[(outer_loop*j+i)*this.width/8+k];
72-
// this.info($sformatf("Scoreboard source-sink data: exp %h - rcv %h", source_byte, sink_byte), 100);
73-
// if (source_byte != sink_byte) begin
74-
// this.error($sformatf("Scoreboard failed at: exp %h - rcv %h", source_byte, sink_byte));
75-
// end
76-
// end
77-
// end
78-
// end
79-
// end else begin
80-
// if ((this.source_byte_stream_size == 0) &&
81-
// (this.sink_byte_stream_size == 0)) begin
82-
// byte_streams_empty_sig = 1;
83-
// ->>byte_streams_empty;
84-
// end
85-
// fork begin
86-
// fork
87-
// @source_transaction_event;
88-
// @sink_transaction_event;
89-
// @stop_scoreboard;
90-
// join_any
91-
// byte_streams_empty_sig = 0;
92-
// disable fork;
93-
// end join
94-
// end
95-
// end
9687

9788
while ((this.subscriber_source.get_size() > 0) &&
9889
(this.subscriber_sink.get_size() >= this.channels*this.samples*this.width/8)) begin

‎library/drivers/common/watchdog.sv‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// ***************************************************************************
22
// ***************************************************************************
3-
// Copyright 2014 - 2021 (c) Analog Devices, Inc. All rights reserved.
3+
// Copyright (C) 2024 - 2025 Analog Devices, Inc. All rights reserved.
44
//
55
// In this HDL repository, there are many different and unique modules, consisting
66
// of various HDL (Verilog or VHDL) components. The individual modules are
@@ -26,12 +26,13 @@
2626
//
2727
// 2. An ADI specific BSD license, which can be found in the top level directory
2828
// of this repository (LICENSE_ADIBSD), and also on-line at:
29-
// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
29+
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
3030
// This will allow to generate bit files and not release the source code,
3131
// as long as it attaches to an ADI device.
3232
//
3333
// ***************************************************************************
3434
// ***************************************************************************
35+
3536
`include "utils.svh"
3637

3738
package watchdog_pkg;

‎library/drivers/data_offload/data_offload_api.sv‎

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// ***************************************************************************
22
// ***************************************************************************
3-
// Copyright 2014 - 2018 (c) Analog Devices, Inc. All rights reserved.
3+
// Copyright (C) 2024 - 2025 Analog Devices, Inc. All rights reserved.
44
//
55
// In this HDL repository, there are many different and unique modules, consisting
66
// of various HDL (Verilog or VHDL) components. The individual modules are
@@ -26,7 +26,7 @@
2626
//
2727
// 2. An ADI specific BSD license, which can be found in the top level directory
2828
// of this repository (LICENSE_ADIBSD), and also on-line at:
29-
// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
29+
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
3030
// This will allow to generate bit files and not release the source code,
3131
// as long as it attaches to an ADI device.
3232
//
@@ -38,19 +38,20 @@
3838
package data_offload_api_pkg;
3939

4040
import logger_pkg::*;
41-
import adi_peripheral_pkg::*;
42-
import adi_regmap_data_offload_pkg::*;
41+
import adi_common_pkg::*;
42+
import adi_api_pkg::*;
4343
import adi_regmap_pkg::*;
44-
import reg_accessor_pkg::*;
44+
import adi_regmap_data_offload_pkg::*;
45+
import m_axi_sequencer_pkg::*;
4546

46-
class data_offload_api extends adi_peripheral;
47+
class data_offload_api extends adi_api;
4748

4849
// -----------------
4950
//
5051
// -----------------
5152
function new(
5253
input string name,
53-
input reg_accessor bus,
54+
input m_axi_sequencer_base bus,
5455
input bit [31:0] base_address,
5556
input adi_component parent = null);
5657

‎library/drivers/dmac/dma_trans.sv‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// ***************************************************************************
22
// ***************************************************************************
3-
// Copyright 2014 - 2018, 2024 (c) Analog Devices, Inc. All rights reserved.
3+
// Copyright (C) 2014 - 2018, 2024 Analog Devices, Inc. All rights reserved.
44
//
55
// In this HDL repository, there are many different and unique modules, consisting
66
// of various HDL (Verilog or VHDL) components. The individual modules are
@@ -26,7 +26,7 @@
2626
//
2727
// 2. An ADI specific BSD license, which can be found in the top level directory
2828
// of this repository (LICENSE_ADIBSD), and also on-line at:
29-
// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
29+
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
3030
// This will allow to generate bit files and not release the source code,
3131
// as long as it attaches to an ADI device.
3232
//

‎library/drivers/dmac/dmac_api.sv‎

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// ***************************************************************************
22
// ***************************************************************************
3-
// Copyright 2014 - 2018, 2024 (c) Analog Devices, Inc. All rights reserved.
3+
// Copyright (C) 2014 - 2018, 2025 Analog Devices, Inc. All rights reserved.
44
//
55
// In this HDL repository, there are many different and unique modules, consisting
66
// of various HDL (Verilog or VHDL) components. The individual modules are
@@ -26,7 +26,7 @@
2626
//
2727
// 2. An ADI specific BSD license, which can be found in the top level directory
2828
// of this repository (LICENSE_ADIBSD), and also on-line at:
29-
// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
29+
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
3030
// This will allow to generate bit files and not release the source code,
3131
// as long as it attaches to an ADI device.
3232
//
@@ -38,13 +38,14 @@
3838
package dmac_api_pkg;
3939

4040
import logger_pkg::*;
41-
import adi_peripheral_pkg::*;
42-
import adi_regmap_dmac_pkg::*;
41+
import adi_common_pkg::*;
42+
import adi_api_pkg::*;
4343
import adi_regmap_pkg::*;
44-
import reg_accessor_pkg::*;
44+
import adi_regmap_dmac_pkg::*;
45+
import m_axi_sequencer_pkg::*;
4546
import dma_trans_pkg::*;
4647

47-
class dmac_api extends adi_peripheral;
48+
class dmac_api extends adi_api;
4849

4950
// DMAC parameters
5051
axi_dmac_params_t p;
@@ -54,7 +55,7 @@ package dmac_api_pkg;
5455
// -----------------
5556
function new(
5657
input string name,
57-
input reg_accessor bus,
58+
input m_axi_sequencer_base bus,
5859
input bit [31:0] base_address,
5960
input adi_component parent = null);
6061

‎library/drivers/jesd/adi_jesd204_pkg.sv‎

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// ***************************************************************************
22
// ***************************************************************************
3-
// Copyright 2014 - 2021 (c) Analog Devices, Inc. All rights reserved.
3+
// Copyright (C) 2014 - 2025 Analog Devices, Inc. All rights reserved.
44
//
55
// In this HDL repository, there are many different and unique modules, consisting
66
// of various HDL (Verilog or VHDL) components. The individual modules are
@@ -26,19 +26,21 @@
2626
//
2727
// 2. An ADI specific BSD license, which can be found in the top level directory
2828
// of this repository (LICENSE_ADIBSD), and also on-line at:
29-
// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
29+
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
3030
// This will allow to generate bit files and not release the source code,
3131
// as long as it attaches to an ADI device.
3232
//
3333
// ***************************************************************************
3434
// ***************************************************************************
35+
3536
`include "utils.svh"
3637

3738
package adi_jesd204_pkg;
3839

3940
import logger_pkg::*;
40-
import adi_peripheral_pkg::*;
41-
import reg_accessor_pkg::*;
41+
import adi_common_pkg::*;
42+
import adi_api_pkg::*;
43+
import m_axi_sequencer_pkg::*;
4244
import adi_regmap_pkg::*;
4345
import adi_regmap_jesd_tx_pkg::*;
4446
import adi_regmap_jesd_rx_pkg::*;
@@ -181,7 +183,7 @@ package adi_jesd204_pkg;
181183
//============================================================================
182184
// Base Link layer class
183185
//============================================================================
184-
class link_layer extends adi_peripheral;
186+
class link_layer extends adi_api;
185187

186188
jesd_link link;
187189
int dp_width = 4; // Data width towards Phy
@@ -196,7 +198,7 @@ package adi_jesd204_pkg;
196198
// -----------------
197199
//
198200
// -----------------
199-
function new (string name, reg_accessor bus, bit [31:0] base_address, jesd_link link);
201+
function new (string name, m_axi_sequencer_base bus, bit [31:0] base_address, jesd_link link);
200202

201203
super.new(name, bus, base_address);
202204
this.link = link;
@@ -273,7 +275,7 @@ package adi_jesd204_pkg;
273275
// -----------------
274276
//
275277
// -----------------
276-
function new (string name, reg_accessor bus, bit [31:0] base_address, jesd_link link);
278+
function new (string name, m_axi_sequencer_base bus, bit [31:0] base_address, jesd_link link);
277279
super.new(name, bus, base_address, link);
278280
endfunction
279281

@@ -433,7 +435,7 @@ package adi_jesd204_pkg;
433435
// -----------------
434436
//
435437
// -----------------
436-
function new (string name, reg_accessor bus, bit [31:0] base_address, jesd_link link);
438+
function new (string name, m_axi_sequencer_base bus, bit [31:0] base_address, jesd_link link);
437439
super.new(name, bus, base_address, link);
438440
endfunction
439441

‎library/drivers/xcvr/adi_xcvr_pkg.sv‎

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// ***************************************************************************
22
// ***************************************************************************
3-
// Copyright 2014 - 2021 (c) Analog Devices, Inc. All rights reserved.
3+
// Copyright (C) 2014 - 2025 Analog Devices, Inc. All rights reserved.
44
//
55
// In this HDL repository, there are many different and unique modules, consisting
66
// of various HDL (Verilog or VHDL) components. The individual modules are
@@ -26,22 +26,23 @@
2626
//
2727
// 2. An ADI specific BSD license, which can be found in the top level directory
2828
// of this repository (LICENSE_ADIBSD), and also on_line at:
29-
// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
29+
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
3030
// This will allow to generate bit files and not release the source code,
3131
// as long as it attaches to an ADI device.
3232
//
3333
// ***************************************************************************
3434
// ***************************************************************************
35+
3536
`include "utils.svh"
3637

3738
package adi_xcvr_pkg;
3839

3940
import logger_pkg::*;
40-
import adi_peripheral_pkg::*;
41-
import reg_accessor_pkg::*;
41+
import adi_common_pkg::*;
42+
import adi_api_pkg::*;
43+
import m_axi_sequencer_pkg::*;
4244
import adi_regmap_pkg::*;
4345
import adi_regmap_xcvr_pkg::*;
44-
import adi_jesd204_pkg::*;
4546

4647
typedef enum bit [2:0] {
4748
OUTCLKPCS = 1,
@@ -285,7 +286,7 @@ package adi_xcvr_pkg;
285286
//============================================================================
286287
// Xilinx XCVR class
287288
//============================================================================
288-
class xcvr extends adi_peripheral;
289+
class xcvr extends adi_api;
289290

290291
// Capabilities
291292
bit qpll_enable;
@@ -299,7 +300,7 @@ package adi_xcvr_pkg;
299300
// -----------------
300301
//
301302
// -----------------
302-
function new (string name, reg_accessor bus, bit [31:0] base_address);
303+
function new (string name, m_axi_sequencer_base bus, bit [31:0] base_address);
303304
super.new(name, bus, base_address);
304305
endfunction
305306

‎library/includes/Makeinclude_axi.mk‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
## Copyright 2024(c) Analog Devices, Inc.
1+
## Copyright (C) 2024 - 2025 Analog Devices, Inc.
22
####################################################################################
33
####################################################################################
44

@@ -9,4 +9,3 @@ SV_DEPS += $(TB_LIBRARY_PATH)/vip/amd/axi/s_axi_sequencer.sv
99
SV_DEPS += $(TB_LIBRARY_PATH)/vip/amd/axi/adi_axi_monitor.sv
1010
SV_DEPS += $(TB_LIBRARY_PATH)/vip/amd/axi/axi_definitions.svh
1111
SV_DEPS += $(TB_LIBRARY_PATH)/utilities/pub_sub_pkg.sv
12-
SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/reg_accessor.sv

‎library/includes/Makeinclude_axis.mk‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
## Copyright 2024(c) Analog Devices, Inc.
1+
## Copyright (C) 2024 Analog Devices, Inc.
22
####################################################################################
33
####################################################################################
44

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