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testbenches/ip/spi_engine: update to support n lanes
Several changes to support more than one lane for SDI and SDO: * Update config files; * Insert a new test for lane mask. Signed-off-by: Carlos Souza <carlos.souza@analog.com>
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15 files changed

+1368
-365
lines changed

15 files changed

+1368
-365
lines changed

‎testbenches/ip/spi_engine/cfgs/cfg00.tcl‎

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -30,20 +30,24 @@ set ad_project_params(CS_TO_MISO) 0
3030
set ad_project_params(CLOCK_DIVIDER) 0
3131
set ad_project_params(NUM_OF_WORDS) 5
3232
set ad_project_params(NUM_OF_TRANSFERS) 5
33+
set ad_project_params(SPI_LANE_MASK) 1
3334
set ad_project_params(CS_ACTIVE_HIGH) 0
3435
set ad_project_params(ECHO_SCLK_DELAY) 0.1
3536

3637
set spi_s_vip_cfg [ list \
37-
MODE 0 \
38-
CPOL $ad_project_params(CPOL) \
39-
CPHA $ad_project_params(CPHA) \
40-
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
41-
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
42-
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
43-
MASTER_TIN $ad_project_params(MASTER_TIN) \
44-
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
45-
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
46-
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
38+
MODE 0 \
39+
CPOL $ad_project_params(CPOL) \
40+
CPHA $ad_project_params(CPHA) \
41+
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
42+
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
43+
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
44+
MASTER_TIN $ad_project_params(MASTER_TIN) \
45+
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
46+
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
47+
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
48+
NUM_OF_SDI $ad_project_params(NUM_OF_SDI) \
49+
NUM_OF_SDO $ad_project_params(NUM_OF_SDO) \
50+
SPI_LANE_MASK $ad_project_params(SPI_LANE_MASK) \
4751
]
4852
set ad_project_params(spi_s_vip_cfg) $spi_s_vip_cfg
4953

‎testbenches/ip/spi_engine/cfgs/cfg01.tcl‎

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -30,20 +30,24 @@ set ad_project_params(CS_TO_MISO) 0
3030
set ad_project_params(CLOCK_DIVIDER) 2
3131
set ad_project_params(NUM_OF_WORDS) 3
3232
set ad_project_params(NUM_OF_TRANSFERS) 5
33+
set ad_project_params(SPI_LANE_MASK) 1
3334
set ad_project_params(CS_ACTIVE_HIGH) 0
3435
set ad_project_params(ECHO_SCLK_DELAY) 0.1
3536

3637
set spi_s_vip_cfg [ list \
37-
MODE 0 \
38-
CPOL $ad_project_params(CPOL) \
39-
CPHA $ad_project_params(CPHA) \
40-
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
41-
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
42-
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
43-
MASTER_TIN $ad_project_params(MASTER_TIN) \
44-
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
45-
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
46-
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
38+
MODE 0 \
39+
CPOL $ad_project_params(CPOL) \
40+
CPHA $ad_project_params(CPHA) \
41+
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
42+
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
43+
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
44+
MASTER_TIN $ad_project_params(MASTER_TIN) \
45+
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
46+
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
47+
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
48+
NUM_OF_SDI $ad_project_params(NUM_OF_SDI) \
49+
NUM_OF_SDO $ad_project_params(NUM_OF_SDO) \
50+
SPI_LANE_MASK $ad_project_params(SPI_LANE_MASK) \
4751
]
4852
set ad_project_params(spi_s_vip_cfg) $spi_s_vip_cfg
4953

‎testbenches/ip/spi_engine/cfgs/cfg10.tcl‎

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -30,20 +30,24 @@ set ad_project_params(CS_TO_MISO) 0
3030
set ad_project_params(CLOCK_DIVIDER) 2
3131
set ad_project_params(NUM_OF_WORDS) 3
3232
set ad_project_params(NUM_OF_TRANSFERS) 5
33+
set ad_project_params(SPI_LANE_MASK) 1
3334
set ad_project_params(CS_ACTIVE_HIGH) 0
3435
set ad_project_params(ECHO_SCLK_DELAY) 0.1
3536

3637
set spi_s_vip_cfg [ list \
37-
MODE 0 \
38-
CPOL $ad_project_params(CPOL) \
39-
CPHA $ad_project_params(CPHA) \
40-
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
41-
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
42-
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
43-
MASTER_TIN $ad_project_params(MASTER_TIN) \
44-
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
45-
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
46-
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
38+
MODE 0 \
39+
CPOL $ad_project_params(CPOL) \
40+
CPHA $ad_project_params(CPHA) \
41+
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
42+
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
43+
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
44+
MASTER_TIN $ad_project_params(MASTER_TIN) \
45+
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
46+
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
47+
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
48+
NUM_OF_SDI $ad_project_params(NUM_OF_SDI) \
49+
NUM_OF_SDO $ad_project_params(NUM_OF_SDO) \
50+
SPI_LANE_MASK $ad_project_params(SPI_LANE_MASK) \
4751
]
4852
set ad_project_params(spi_s_vip_cfg) $spi_s_vip_cfg
4953

‎testbenches/ip/spi_engine/cfgs/cfg11.tcl‎

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -30,20 +30,24 @@ set ad_project_params(CS_TO_MISO) 0
3030
set ad_project_params(CLOCK_DIVIDER) 2
3131
set ad_project_params(NUM_OF_WORDS) 3
3232
set ad_project_params(NUM_OF_TRANSFERS) 5
33+
set ad_project_params(SPI_LANE_MASK) 1
3334
set ad_project_params(CS_ACTIVE_HIGH) 0
3435
set ad_project_params(ECHO_SCLK_DELAY) 0.1
3536

3637
set spi_s_vip_cfg [ list \
37-
MODE 0 \
38-
CPOL $ad_project_params(CPOL) \
39-
CPHA $ad_project_params(CPHA) \
40-
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
41-
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
42-
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
43-
MASTER_TIN $ad_project_params(MASTER_TIN) \
44-
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
45-
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
46-
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
38+
MODE 0 \
39+
CPOL $ad_project_params(CPOL) \
40+
CPHA $ad_project_params(CPHA) \
41+
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
42+
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
43+
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
44+
MASTER_TIN $ad_project_params(MASTER_TIN) \
45+
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
46+
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
47+
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
48+
NUM_OF_SDI $ad_project_params(NUM_OF_SDI) \
49+
NUM_OF_SDO $ad_project_params(NUM_OF_SDO) \
50+
SPI_LANE_MASK $ad_project_params(SPI_LANE_MASK) \
4751
]
4852
set ad_project_params(spi_s_vip_cfg) $spi_s_vip_cfg
4953

‎testbenches/ip/spi_engine/cfgs/cfg_inv_cs.tcl‎

Lines changed: 15 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -30,20 +30,24 @@ set ad_project_params(CS_TO_MISO) 0
3030
set ad_project_params(CLOCK_DIVIDER) 2
3131
set ad_project_params(NUM_OF_WORDS) 3
3232
set ad_project_params(NUM_OF_TRANSFERS) 5
33-
set ad_project_params(CS_ACTIVE_HIGH) 1
33+
set ad_project_params(SPI_LANE_MASK) 1
34+
set ad_project_params(CS_ACTIVE_HIGH) 0
3435
set ad_project_params(ECHO_SCLK_DELAY) 0.1
3536

3637
set spi_s_vip_cfg [ list \
37-
MODE 0 \
38-
CPOL $ad_project_params(CPOL) \
39-
CPHA $ad_project_params(CPHA) \
40-
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
41-
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
42-
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
43-
MASTER_TIN $ad_project_params(MASTER_TIN) \
44-
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
45-
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
46-
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
38+
MODE 0 \
39+
CPOL $ad_project_params(CPOL) \
40+
CPHA $ad_project_params(CPHA) \
41+
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
42+
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
43+
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
44+
MASTER_TIN $ad_project_params(MASTER_TIN) \
45+
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
46+
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
47+
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
48+
NUM_OF_SDI $ad_project_params(NUM_OF_SDI) \
49+
NUM_OF_SDO $ad_project_params(NUM_OF_SDO) \
50+
SPI_LANE_MASK $ad_project_params(SPI_LANE_MASK) \
4751
]
4852
set ad_project_params(spi_s_vip_cfg) $spi_s_vip_cfg
4953

‎testbenches/ip/spi_engine/cfgs/cfg_num_sdi.tcl‎

Lines changed: 63 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,63 @@
1+
global ad_project_params
2+
3+
# SPI Engine DUT parameters
4+
set ad_project_params(DATA_WIDTH) 32
5+
set ad_project_params(ASYNC_SPI_CLK) 1
6+
set ad_project_params(NUM_OF_CS) 1
7+
set ad_project_params(NUM_OF_SDI) 4
8+
set ad_project_params(NUM_OF_SDO) 4
9+
set ad_project_params(SDI_DELAY) 0
10+
set ad_project_params(ECHO_SCLK) 0
11+
set ad_project_params(CMD_MEM_ADDR_WIDTH) 4
12+
set ad_project_params(DATA_MEM_ADDR_WIDTH) 4
13+
set ad_project_params(SDI_FIFO_ADDR_WIDTH) 7
14+
set ad_project_params(SDO_FIFO_ADDR_WIDTH) 7
15+
set ad_project_params(SYNC_FIFO_ADDR_WIDTH) 4
16+
set ad_project_params(CMD_FIFO_ADDR_WIDTH) 4
17+
set ad_project_params(SDO_STREAMING) 0
18+
19+
# Test parameterscfg_nu
20+
set ad_project_params(DATA_DLENGTH) 8
21+
set ad_project_params(THREE_WIRE) 0
22+
set ad_project_params(CPOL) 1
23+
set ad_project_params(CPHA) 1
24+
set ad_project_params(SDO_IDLE_STATE) 0
25+
set ad_project_params(SLAVE_TIN) 0
26+
set ad_project_params(SLAVE_TOUT) 0
27+
set ad_project_params(MASTER_TIN) 0
28+
set ad_project_params(MASTER_TOUT) 0
29+
set ad_project_params(CS_TO_MISO) 0
30+
set ad_project_params(CLOCK_DIVIDER) 2
31+
set ad_project_params(NUM_OF_WORDS) 3
32+
set ad_project_params(NUM_OF_TRANSFERS) 5
33+
set ad_project_params(SPI_LANE_MASK) 15
34+
set ad_project_params(CS_ACTIVE_HIGH) 0
35+
set ad_project_params(ECHO_SCLK_DELAY) 0.1
36+
37+
38+
set spi_s_vip_cfg [ list \
39+
MODE 0 \
40+
CPOL $ad_project_params(CPOL) \
41+
CPHA $ad_project_params(CPHA) \
42+
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
43+
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
44+
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
45+
MASTER_TIN $ad_project_params(MASTER_TIN) \
46+
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
47+
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
48+
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
49+
NUM_OF_SDI $ad_project_params(NUM_OF_SDI) \
50+
NUM_OF_SDO $ad_project_params(NUM_OF_SDO) \
51+
SPI_LANE_MASK $ad_project_params(SPI_LANE_MASK) \
52+
]
53+
set ad_project_params(spi_s_vip_cfg) $spi_s_vip_cfg
54+
55+
set axis_sdo_src_vip_cfg [ list \
56+
INTERFACE_MODE {MASTER} \
57+
HAS_TREADY 1 \
58+
HAS_TLAST 0 \
59+
TDATA_NUM_BYTES [expr $ad_project_params(DATA_WIDTH)/8] \
60+
TDEST_WIDTH 0 \
61+
TID_WIDTH 0 \
62+
]
63+
set ad_project_params(axis_sdo_src_vip_cfg) $axis_sdo_src_vip_cfg

‎testbenches/ip/spi_engine/cfgs/cfg_sdo_streaming.tcl‎

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -30,20 +30,24 @@ set ad_project_params(CS_TO_MISO) 0
3030
set ad_project_params(CLOCK_DIVIDER) 2
3131
set ad_project_params(NUM_OF_WORDS) 5
3232
set ad_project_params(NUM_OF_TRANSFERS) 3
33+
set ad_project_params(SPI_LANE_MASK) 1
3334
set ad_project_params(CS_ACTIVE_HIGH) 0
3435
set ad_project_params(ECHO_SCLK_DELAY) 0.1
3536

3637
set spi_s_vip_cfg [ list \
37-
MODE 0 \
38-
CPOL $ad_project_params(CPOL) \
39-
CPHA $ad_project_params(CPHA) \
40-
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
41-
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
42-
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
43-
MASTER_TIN $ad_project_params(MASTER_TIN) \
44-
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
45-
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
46-
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
38+
MODE 0 \
39+
CPOL $ad_project_params(CPOL) \
40+
CPHA $ad_project_params(CPHA) \
41+
INV_CS $ad_project_params(CS_ACTIVE_HIGH) \
42+
SLAVE_TIN $ad_project_params(SLAVE_TIN) \
43+
SLAVE_TOUT $ad_project_params(SLAVE_TOUT) \
44+
MASTER_TIN $ad_project_params(MASTER_TIN) \
45+
MASTER_TOUT $ad_project_params(MASTER_TOUT) \
46+
CS_TO_MISO $ad_project_params(CS_TO_MISO) \
47+
DATA_DLENGTH $ad_project_params(DATA_DLENGTH) \
48+
NUM_OF_SDI $ad_project_params(NUM_OF_SDI) \
49+
NUM_OF_SDO $ad_project_params(NUM_OF_SDO) \
50+
SPI_LANE_MASK $ad_project_params(SPI_LANE_MASK) \
4751
]
4852
set ad_project_params(spi_s_vip_cfg) $spi_s_vip_cfg
4953

‎testbenches/ip/spi_engine/spi_engine_test_bd.tcl‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ ad_ip_parameter axi_spi_engine_dma CONFIG.SYNC_TRANSFER_START 0
4848
ad_ip_parameter axi_spi_engine_dma CONFIG.AXI_SLICE_SRC 0
4949
ad_ip_parameter axi_spi_engine_dma CONFIG.AXI_SLICE_DEST 1
5050
ad_ip_parameter axi_spi_engine_dma CONFIG.DMA_2D_TRANSFER 0
51-
ad_ip_parameter axi_spi_engine_dma CONFIG.DMA_DATA_WIDTH_SRC $data_width
51+
ad_ip_parameter axi_spi_engine_dma CONFIG.DMA_DATA_WIDTH_SRC [expr {$data_width * $num_sdi}]
5252
ad_ip_parameter axi_spi_engine_dma CONFIG.DMA_DATA_WIDTH_DEST 64
5353

5454
ad_connect $sys_cpu_clk spi_clkgen/clk

‎testbenches/ip/spi_engine/system_project.tcl‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,7 @@ adi_sim_project_files [list \
2828
"tests/test_program.sv" \
2929
"tests/test_sleep_delay.sv" \
3030
"tests/test_slowdata.sv" \
31+
"tests/test_lanes.sv" \
3132
]
3233

3334
#set a default test program

‎testbenches/ip/spi_engine/system_tb.sv‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -36,15 +36,15 @@
3636
`include "utils.svh"
3737

3838
module system_tb();
39-
wire spi_engine_spi_cs;
40-
wire spi_engine_spi_sclk;
41-
wire spi_engine_spi_clk;
42-
wire spi_engine_spi_sdi;
43-
wire spi_engine_spi_sdo;
44-
wire spi_engine_irq;
45-
`ifdef DEF_ECHO_SCLK
46-
wire spi_engine_echo_sclk;
47-
`endif
39+
wire spi_engine_spi_sclk;
40+
wire spi_engine_spi_clk;
41+
wire [(`NUM_OF_CS-1) :0] spi_engine_spi_cs;
42+
wire [(`NUM_OF_SDI-1):0] spi_engine_spi_sdi;
43+
wire [(`NUM_OF_SDO-1):0] spi_engine_spi_sdo;
44+
wire spi_engine_irq;
45+
`ifdef DEF_ECHO_SCLK
46+
wire spi_engine_echo_sclk;
47+
`endif
4848

4949
`TEST_PROGRAM test(
5050
.spi_engine_irq(spi_engine_irq),

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