arch: arm: boot: dts: xilinx: cn0577: Add DMA src and dest widths

The default configuration is still two-lane mode.
To change to one-lane mode, the "adi,use-one-lane;" attribute needs to
be specified.

Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>

Author: IuliaCMoldovan

arch/arm/boot/dts/xilinx/zynq-zed-adv7511-cn0577.dts

@@ -1,11 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Analog Devices LTC2387
+ * Analog Devices LTC2387-18/ADAQ23878
  *
  * hdl_project: <cn0577/zed>
  * board_revision: <A>
  *
- * Copyright (C) 2022 Analog Devices Inc.
+ * Copyright (C) 2022 - 2025 Analog Devices Inc.
  */
 /dts-v1/;
 
@@ -54,6 +54,19 @@
 		#dma-cells = <1>;
 		interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&clkc 15>;
+
+		adi,channels {
+			#size-cells = <0>;
+			#address-cells = <1>;
+
+			dma-channel@0 {
+				reg = <0>;
+				adi,source-bus-width = <32>;
+				adi,source-bus-type = <2>;
+				adi,destination-bus-width = <64>;
+				adi,destination-bus-type = <0>;
+			};
+		};
 	};
 
 	axi_pwm_gen: pwm@44a60000 {
@@ -75,6 +88,7 @@
 		pwm-names = "cnv", "clk_en";
 		vref-supply = <&vref>;
 
-		adi,use-two-lanes;
+		// uncomment the below command to use in one lane mode
+		// adi,use-one-lane;
 	};
 };