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backends: s/ilang/rtlil as a result of https://github.com/YosysHQ/yos… CI #3605: Commit 590cba1 pushed by github-merge-queue bot
7m 25s main
main
7m 25s
backends: s/ilang/rtlil as a result of https://github.com/YosysHQ/yos… CI #3604: Commit 590cba1 pushed by github-merge-queue bot
7m 9s gh-readonly-queue/main/pr-1542-ab3a355a54993dae164863d94816a2c5c0df7657
gh-readonly-queue/main/pr-1542-ab3a355a54993dae164863d94816a2c5c0df7657
7m 9s
CI CI #3603: Merge group checks requested
8m 5s
8m 5s
back/vendor: s/ilang/rtlil as a result of YosysHQ/yosys#4704 CI #3602: Pull request #1542 opened by vk2seb
6m 45s vk2seb:seb/rtlil-main
vk2seb:seb/rtlil-main
6m 45s
rpc: use rtlil instead of ilang CI #3601: Commit ab3a355 pushed by github-merge-queue bot
7m 29s main
main
7m 29s
rpc: use rtlil instead of ilang CI #3600: Commit ab3a355 pushed by github-merge-queue bot
7m 50s gh-readonly-queue/main/pr-1540-ef4f68a1be4f549ecec0db73ebc751f7e8f6ac51
gh-readonly-queue/main/pr-1540-ef4f68a1be4f549ecec0db73ebc751f7e8f6ac51
7m 50s
CI CI #3599: Merge group checks requested
7m 8s
7m 8s
rpc: use rtlil instead of ilang CI #3598: Pull request #1540 opened by rroohhh
7m 7s rroohhh:fix_rpc_yosys_head
rroohhh:fix_rpc_yosys_head
7m 7s
hdl._dsl: use Enum for fsm state signal CI #3597: Commit ef4f68a pushed by github-merge-queue bot
7m 21s main
main
7m 21s
hdl._dsl: use Enum for fsm state signal CI #3596: Commit ef4f68a pushed by github-merge-queue bot
7m 21s gh-readonly-queue/main/pr-1536-b6bf515e5b2f7cb64fbeac7f17997e5099a80731
gh-readonly-queue/main/pr-1536-b6bf515e5b2f7cb64fbeac7f17997e5099a80731
7m 21s
CI CI #3595: Merge group checks requested
8m 23s
8m 23s
rpc: add support for wiring.Component. CI #3594: Commit 3857822 pushed by whitequark
6m 48s v0.5.3
v0.5.3
6m 48s
rpc: add support for wiring.Component. CI #3593: Commit 3857822 pushed by whitequark
6m 19s v0.5.x
v0.5.x
6m 19s
rpc: add support for wiring.Component. [0.5 backport] CI #3592: Pull request #1533 synchronize by jfng
6m 12s jfng:rpc_components-0.5
jfng:rpc_components-0.5
6m 12s
rpc: add support for wiring.Component. [0.5 backport] CI #3591: Pull request #1533 synchronize by jfng
1m 14s jfng:rpc_components-0.5
jfng:rpc_components-0.5
1m 14s
rpc: add support for wiring.Component. [0.5 backport] CI #3590: Pull request #1533 reopened by jfng
1m 11s jfng:rpc_components-0.5
jfng:rpc_components-0.5
1m 11s
rpc: add support for wiring.Component. [0.5 backport] CI #3589: Pull request #1533 reopened by jfng
2m 21s jfng:rpc_components-0.5
jfng:rpc_components-0.5
2m 21s
hdl._dsl: use Enum for fsm state signal CI #3588: Pull request #1536 opened by rroohhh
7m 41s rroohhh:fsm_state_enum
rroohhh:fsm_state_enum
7m 41s
rpc: add support for wiring.Component. [0.5 backport] CI #3587: Pull request #1533 opened by jfng
1m 22s jfng:rpc_components-0.5
jfng:rpc_components-0.5
1m 22s
Fix handling of CRC start and valid signals CI #3586: Pull request #1532 opened by John-K
7m 59s John-K:crc-fix
John-K:crc-fix
7m 59s
Drop support for Python 3.8. CI #3585: Commit b6bf515 pushed by github-merge-queue bot
7m 33s main
main
7m 33s
Drop support for Python 3.8. CI #3584: Commit b6bf515 pushed by github-merge-queue bot
8m 52s gh-readonly-queue/main/pr-1531-41762f143538488b568302ac30801a59ca09c86b
gh-readonly-queue/main/pr-1531-41762f143538488b568302ac30801a59ca09c86b
8m 52s
CI CI #3583: Merge group checks requested
7m 48s
7m 48s
Drop support for Python 3.8 CI #3582: Pull request #1531 opened by whitequark
8m 11s whitequark:py3.9
whitequark:py3.9
8m 11s
vendor._gowin: Add 'add_preferences' override CI #3581: Commit 41762f1 pushed by github-merge-queue bot
6m 10s main
main
6m 10s
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