Allow attributes in architechture header #407
Description
When declaring attributes for usage in Xilinx Block Designs, i get errors "Attribute specifications must be in the immediate declarative part" which i understand is the vdhl default way to do it, but vivado only seems to except my attribute definitions if they are in the header of my architecture declarations.
While i could just ignore the errors i get from using the later syntax, I also can not use neovims lsp to rename signals in those attribute declarations while they show an error.
Could we turn of this error or get a switch to turn it of? That would be really beneficial for development for block designs.
P.S.: I know block designs have a lot of issues, but thats what i have been given at work.