Merge branch 'JingJerYen-main' into develop

Author: eyck

.github/workflows/ci-transaction_recording.yml

@@ -0,0 +1,44 @@
+name: CI Transaction Recording
+
+on:
+  push:
+    paths:
+      - '**.cpp'
+      - '**.h'
+      - '**CMakeLists.txt'
+      - '.github/workflows/**'
+  pull_request:
+    paths:
+      - '**.cpp'
+      - '**.h'
+      - '**CMakeLists.txt'
+      - '.github/workflows/**'
+
+jobs:
+  build-and-test:
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        cpp_std: [11, 14, 17, 20]
+    steps:
+      - uses: actions/checkout@v4
+
+      - name: Update submodules
+        run: git submodule update --init --recursive
+
+      - name: Install dependencies
+        run: |
+          sudo apt-get update
+          sudo apt-get install -y cmake g++ python3-pip
+          pip3 install "conan<2.0"
+
+      - name: Configure
+        run: >
+          cmake -S . -B build
+          -DCMAKE_CXX_STANDARD=${{ matrix.cpp_std }}
+
+      - name: Build
+        run: cmake --build build -j
+
+      - name: Run transaction_recording
+        run: ./build/examples/transaction_recording/transaction_recording

src/interfaces/axi/pin/axi4_target.h

@@ -437,10 +437,16 @@ template <typename CFG> inline void axi::pin::axi4_target<CFG>::wdata_t() {
             // TODO: assuming consecutive write (not scattered)
             auto strobe = strb.to_uint();
             if(last) {
-                auto act_data_len = CFG::IS_LITE ? util::bit_count(strobe) : fsm_hndl->aux.i32.i0;
+                // If it is axi lite, number of strobes define the size, for axi4 aligned accesses, axsize & axburst determine size,
+                // for unaligned accesses strobe count determines size
+                auto act_data_len = CFG::IS_LITE ? util::bit_count(strobe) : offset == 0 ? (beat_count + 1) * size : fsm_hndl->aux.i32.i0;
                 gp->set_data_length(act_data_len);
-                gp->set_byte_enable_length(act_data_len);
                 gp->set_streaming_width(act_data_len);
+                if(fsm_hndl->aux.i32.i0 == act_data_len) {
+                    gp->set_byte_enable_length(0);
+                } else {
+                    gp->set_byte_enable_length(act_data_len);
+                }
             }
             auto tp = CFG::IS_LITE || this->w_last->read() ? axi::fsm::protocol_time_point_e::BegReqE
                                                            : axi::fsm::protocol_time_point_e::BegPartReqE;